CN115114880A - Method for applying accelerated Newton splitting iteration method to mixed-size unit circuit layout - Google Patents

Method for applying accelerated Newton splitting iteration method to mixed-size unit circuit layout Download PDF

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CN115114880A
CN115114880A CN202210695559.5A CN202210695559A CN115114880A CN 115114880 A CN115114880 A CN 115114880A CN 202210695559 A CN202210695559 A CN 202210695559A CN 115114880 A CN115114880 A CN 115114880A
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周晨璨
施佺
曹阳
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Nantong University
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    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
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Abstract

The invention provides an accelerated Newton splitting iterative method applied to a circuit layout method of a mixed size unit, which comprises the steps of preprocessing a multiple-time line height unit into a single-time line height subunit, placing the single-time line height subunit on a nearest line matched with a power line, establishing a network flow model for all units, diffusing the network flow model to avoid local congestion, expressing a legalization problem as a convex quadratic programming problem, equivalently converting the quadratic programming problem into a linear complementary problem, equivalently expressing the linear complementary problem as a generalized absolute value equation, designing an accelerated Newton splitting iterative method to solve, finally, restoring the multiple-time line height standard unit, placing the multiple-time line height standard unit on a placeable position in the line, and processing the rest illegal units. Compared with the prior art, the generalized absolute value equation equivalent to the legalization problem is solved by the accelerated Newton splitting iteration method, the setting of parameters is not considered too much, only one parameter matrix needs to be determined, and suggestions are given to the selection of the parameter matrix, so that the limitation that the effective or efficient solution cannot be realized due to the improper selection of the parameters or the parameter matrix is avoided. The invention can effectively accelerate the convergence speed of the iterative process and quickly obtain the high-quality neighborhood solution of the legalization problem.

Description

Method for applying accelerated Newton splitting iteration method to mixed-size unit circuit layout
Technical Field
The invention relates to the field of automation of physical design of a super-large-scale integrated circuit, in particular to a method for applying an accelerated Newton's splitting iteration method to layout of a unit circuit with mixed sizes.
Background
The physical design of Very Large Scale Integration (VLSI) circuits is critical to the fabrication of semiconductor chips. With the development of advanced node technology of very large scale integrated circuits, it is mainstream to design circuits with standard cell libraries of various heights. The multiple high standard cells have better pin accessibility and shorter delays, but their presence also presents greater challenges for the layout phase. Different from the single-row high standard unit, only the unit overlapping of the row needs to be considered when moving, and the overlapping problem of the units in the adjacent rows needs to be additionally considered in the moving process of the multiple-row high unit. In addition, the layout of mixed size cells is subject to power rail matching constraints. The number of standard cells in the circuit design is large, so that the solution space combination explosion has extremely high computational complexity, and the layout problem is an NP-difficult problem. For such problems, an iterative solution method is usually adopted to obtain an approximate solution, and how to approach the optimal solution quickly and efficiently is a problem to be solved at present.
The existing legalization algorithm is divided into a heuristic algorithm and an analytic algorithm; the heuristic algorithm has the advantage of high solving speed, but is easy to fall into a local optimal solution. Analytical methods typically solve a legalization problem by building a mathematical model of the problem. The Chenjian Li et al (CN106971042A) propose to equivalently represent quadratic programming problem in the legalization problem as linear complementary problem, and apply the modular matrix splitting iterative method to solve the linear complementary problem, however, the method needs to determine more parameters, if one of the parameters is not properly selected, the iterative method is easy to cause unable convergence.
Disclosure of Invention
The purpose of the invention is as follows: the invention aims to solve the problems by converting a linear complementary problem equivalent to a legalization problem into a generalized absolute value equation and then designing an accelerated Newton's splitting iterative method for solving. Compared with the prior art, the method only comprises one parameter matrix, and the proposal is given to the selection of the parameter matrix, thereby effectively avoiding the problems of difficult convergence or too low convergence speed caused by improper parameter selection. The invention can greatly reduce the iteration times and the running time in the iterative solution process and further improve the design efficiency in the layout stage.
The accelerated Newton's splitting iterative method is applied to a mixed size unit circuit layout method: firstly preprocessing a multiple-time row high unit into a single-time row sub-unit, placing the single-time row sub-unit on a nearest row matched with a power line, then establishing a network flow model for all units, diffusing the network flow model to avoid local congestion, then expressing a legalization problem as a convex quadratic programming problem, equivalently converting the quadratic programming problem into a linear complementation problem, equivalently expressing the linear complementation problem as a generalized absolute value equation, designing an accelerated Newton splitting iterative method for solving, finally, restoring the multiple-time row high standard unit, placing the multiple-time row high standard unit on a placeable position in the row, and processing the rest illegal units. Compared with the prior art, the generalized absolute value equation equivalent to the legalization problem is solved through the accelerated Newton's splitting iteration method, the parameter setting is not considered excessively, only one parameter matrix needs to be determined, and the suggestion is given to the selection of the parameter matrix, so that the limitation that the effective or efficient solution cannot be carried out due to the fact that the parameter or the parameter matrix is selected improperly is avoided; the convergence rate of the iterative process can be effectively accelerated, and the high-quality neighborhood solution of the legalization problem can be quickly obtained.
In order to achieve the above object, the present invention provides an accelerated newton splitting iteration method applied to a mixed size unit circuit layout method, including the following steps:
s1: preprocessing the standard unit, dividing the multiple-time row height standard unit into multiple single-time row height standard subunits, and placing the subunits on the nearest row matched with a power line;
s2: establishing a network flow model for all units, and diffusing the network flow model;
s3: expressing the legalization problem as a convex quadratic programming problem;
s4: equivalently converting the quadratic programming problem into a linear complementary problem;
s5: equivalently representing the linear complementary problem as a generalized absolute value equation;
s6: solving a generalized absolute value equation by using an accelerated Newton iteration method;
s7: restoring the multiple times of high standard cells and placing the multiple times of high standard cells on placeable positions in the rows;
s8: and carrying out legalization processing on the remaining illegal units.
Further, the specific implementation manner of step S1 includes: giving a rectangular layout area of a chip, and respectively representing the lower left corner coordinate and the upper right corner coordinate of the rectangular layout area by (0, 0) and (W, H); w represents the width of the layout region, and H represents the height of the layout region; the movable standard unit set to be laid out is C ═ C 1 ,c 2 ,…c n ) Wherein the unit c i The initial lower left corner coordinate obtained from the global phase is
Figure BDA0003700111650000021
The width and height of the cell are w i ,h i The coordinates after the legalization stage are determined as (x) i ,y i ) Represents; for the multiple high standard cell, it is expressed as a plurality of subunits, and is expressed by (c) i1 ,c i2 ,…c it ) Where t denotes that the height of the standard cell is t times higher than the line height.
Further, the heights of all the units are integral multiples of the line height; then aligning all the standard units to the nearest row matched with the power line of the standard units; the power lines and the grounding lines are arranged in the rows in a staggered manner, and for odd-number multiple-row high units, the power types at two ends of the odd-number multiple-row high units are different, so that the odd-number multiple-row high units can be placed on any row as long as the odd-number multiple-row high units do not exceed the layout area, and the power types are matched by turning over; for even-numbered multiple row high cells, the power supply types at both ends are the same, and therefore need to be placed on the rows matching their power supply types.
Further, the specific implementation manner of step S2 includes: in order to avoid overcrowding of standard cells in subsequent processing, cells are diffused using a net flow algorithm to ensure that the sum of the cell widths in each row does not exceed the width of the row, and the layout area is traversed horizontally and verticallyThe direction is divided into grids uniformly, each grid forms a node in the network flow graph, and in addition, two nodes, namely a super source node (N) are additionally created B ) And a super sink node (N) E ) Calculating the sum s of the areas of the cells in each grid C It is compared with the grid area s G Making a comparison if s C >s G The grid is called an overflow grid and the area of the overflow s is recorded o If s is C ≤s G The grid is called a free grid and the remaining free area s is recorded f For an overflow mesh, it is set to the source node N in the network flow s And establishing a slave N B To N s Arc of (a), capacity and cost on the arc are set to s, respectively o And zero, for the free mesh, set it as the target node N t And establishing a slave N t To N E Arc of (a), capacity and cost on the arc are set to s, respectively f And 0, and for the overflow grid, find the idle grid adjacent to it, establish from N s To N t The capacity and the cost on the arc are respectively set as infinity and the displacement of the unit moving between the two grids, the established network flow graph is solved, the strategy of the unit moving in the grids can be obtained, the unit is moved according to the strategy, and the moved unit c i Has the coordinates of
Figure BDA0003700111650000031
Further, the specific implementation manner of step S3 includes: the process of legalization is to eliminate the overlap between cells and to optimize for minimizing the standard cell total displacement, and in the previous step the cells have undergone a minimum movement in the vertical direction, i.e. aligned with the matching power rails, so that the displacement in the vertical direction can be ignored, describing the legalization problem as the following model (27):
Figure BDA0003700111650000032
the model is rewritten into a standard form of the convex quadratic programming problem, namely:
Figure BDA0003700111650000033
wherein the content of the first and second substances,
Figure BDA0003700111650000034
is a matrix of the unit cells, and,
Figure BDA0003700111650000035
is a column vector whose components consist of the initial abscissas of the standard cells; any adjacent pair of standard cells should satisfy inequality x j -x i ≥w i (x j ≥x i ) If the inequality is established between all adjacent cells, then we can write the matrix form Wx ≧ d, W is a matrix containing only two elements-1 and 1 in each row, and represents cell c respectively i And c j Abscissa x of j ,x i D is a column vector, where the corresponding component represents the left cell c i Width w of i (ii) a Then the number of rows of W and d is the number of constraints, and the number of columns of W is the total number of standard cells, i.e. the sum of the number of single-time row units and the number of subunits into which multiple-time row units are split, then
Figure BDA0003700111650000041
Figure BDA0003700111650000042
R is likewise a matrix of-1 and 1 per row, -1 denotes a multiple of row height cells c i Subunit c of i1 1 represents c i Subunit c of i2 Sequentially pushing classes; x is the number of i2 -x i1 C is guaranteed 0 i Are equal on the abscissa of the subunit(s), a constraint matrix Rx equal to 0 is obtained, where
Figure BDA0003700111650000043
The matrix W, R and vector d constructed from this position are as follows:
Figure BDA0003700111650000044
R=(0 -1 1 0),d=(w 1 w 2 ) T
by using the lagrange multiplier method, the equality constraint in quadratic programming is added to the objective function, then (2) can be expressed as:
Figure BDA0003700111650000045
wherein λ is a lagrange multiplier.
Further, the specific implementation manner of step S4 is: using the Karush-Kuhn-Tucker (KKT) condition, model (3) can be written as a KKT equation set with the following conditions:
Figure BDA0003700111650000046
the equation set (4) is modified to the form:
Figure BDA0003700111650000047
order to
Figure BDA0003700111650000048
The problem evolves to find a pair of non-negative and orthogonal solution vectors
Figure BDA0003700111650000049
The following conditions are satisfied:
w=Az+q≥0,z≥0 and w T z≥0. (19)
the problem (6) is a linear complementary problem, wherein
Figure BDA00037001116500000410
Further, the specific implementation manner of step S5 is: let z be (| v | -v) and w be (| v | + v), then (6) can be transformed into the following equivalent generalized absolute equation:
(A+I)v-(A-I)|v|=q. (20)
let C ═ a + I, E ═ a-I where I is the identity matrix, then (7) can be restated as follows:
Cv-E|v|=q. (21)。
further, the specific implementation manner of step S6 is: let f (v) Cv-E | v | -q, and let f (v) 0; since f (v) is a piecewise linear vector function, which is not continuously differentiable, newton's iteration method cannot be directly applied to solve the equation; therefore, based on the sub-gradient of the component of | v |, a generalized Jacobian of | v |, is used
Figure BDA0003700111650000051
To obtain an approximate solution of generalized absolute value equation (8);
Figure BDA0003700111650000052
can be represented by a diagonal matrix D (v), wherein
Figure BDA0003700111650000053
And sign (v) k ) Is a vector with component values of
Figure BDA0003700111650000054
For the nonlinear equation system F (v), it is decomposed into the sum of the differentiable function H (v) and the Lipschitz continuous function G (v), i.e., F (v) ═ H (v) + G (v), so that F (v), i.e., F (v), can be solved using a modified Newton iteration method
v k+1 =v k -H′(v k ) -1 (H(v k )+G(v k )),k=0,1,2,…, (23)
Taking h (v) ═ c (v) + Ω (v), g (v) ═ Ω (v) -E | v | -q, where Ω is a semi-positive definite matrix, the following iterative format can be obtained by solving f (v) with (10):
v k+1 =v k -(C+Ω) -1 (Cv k -E|v k |-q). (24)
multiplying both sides of (11) by (C + omega) to obtain
(C+Ω)v k+1 =Ωv k +E|v k |+g. (25)
Since C is a + I and E is a-I, the matrices C and E are two positive definite matrices, let C be M 1 -N 1 For splitting the matrix C, E ═ M 2 -N 2 Is the splitting of the matrix E and the latest estimated value v is k+1 V replacing the right side of the equation k The following iterative format is available:
(M 1 +Ω)v k+1 =(N 1 +Ω)v k +M 2 |v k |-N 2 |v k+1 |+q. (26)
wherein, N is required 2 Is a lower triangular matrix; specifically, according to the structure of matrix A in formula (5), M 1 ,N 1 ,M 2 ,N 2 The values are as follows:
Figure BDA0003700111650000061
Figure BDA0003700111650000062
wherein the content of the first and second substances,
Figure BDA0003700111650000063
is an identity matrix; take omega as omega I and omega as normal number, let B 1 =B+λR T R, therefore, the process of solving the legalization problem using equation (13) is as follows:
Figure BDA0003700111650000064
given an arbitrary initial vector
Figure BDA0003700111650000065
Calculating v by iteratively solving a linear system k+1 Up to the two-norm RES (v) of the absolute residual vector k ):=||z k -z k-1 || 2 Less than or equal to a given constant, in which case the iterative sequence can be considered
Figure BDA0003700111650000066
Converge, and z k =(|v k |-v k ),k=0,1,2,…。
Further, the specific implementation manner of step S7 is: and sorting the coordinates of all the subunits of each multiple high standard unit according to an ascending order, wherein the median is the coordinate of the multiple high standard unit, and then placing the unit on a placeable position closest to the coordinate.
Further, the specific implementation manner of step S8 is: for a few standard cells which still overlap or exceed the right boundary of the layout area, traversing the standard cells from the upper right corner of the layout area to the left in the order from top to bottom, and if the cell c is i Beyond the right boundary, the coordinate is set as W-W i If unit c i And c i-1 Overlap, then c i-1 The coordinate is x i -w i-1 (ii) a Since the movement of multiple line height cells may cause the cells of adjacent rows to overlap, for multiple line height cells that have moved in the previous row, they are not moved in the next row; and traversing the standard cells again from left to right and from bottom to top according to the same rule, wherein all cell overlaps can be eliminated after the step.
Compared with the prior art, the technical scheme of the invention has the following advantages: firstly preprocessing a multiple-time row high unit into a single-time row sub-unit, placing the single-time row sub-unit on a nearest row matched with a power line, then establishing a network flow model for all units, diffusing the network flow model to avoid local congestion, then expressing a legalization problem as a convex quadratic programming problem, equivalently converting the quadratic programming problem into a linear complementation problem, equivalently expressing the linear complementation problem as a generalized absolute value equation, designing an accelerated Newton splitting iterative method for solving, finally, restoring the multiple-time row high standard unit, placing the multiple-time row high standard unit on a placeable position in the row, and processing the rest illegal units. Compared with the prior art, the generalized absolute value equation equivalent to the legalization problem is solved by the accelerated Newton splitting iteration method, the setting of parameters is not considered too much, only one parameter matrix needs to be determined, and suggestions are given to the selection of the parameter matrix, so that the limitation that the effective or efficient solution cannot be realized due to the improper selection of the parameters or the parameter matrix is avoided. The convergence rate of the iterative process can be effectively accelerated, and the high-quality neighborhood solution of the legalization problem can be quickly obtained.
Compared with the prior art, the method converts the linear complementary problem equivalent to the legalization problem into a generalized absolute value equation, and then designs an accelerated Newton's splitting iterative method for solving. Compared with the prior art, the method only comprises one parameter matrix, and the proposal is given to the selection of the parameter matrix, thereby effectively avoiding the problems of difficult convergence or too low convergence speed caused by improper parameter selection. The invention can greatly reduce the iteration times and the running time in the iterative solution process and further improve the design efficiency in the layout stage.
Drawings
FIG. 1 is a flow chart of mixed size standard cell circuit legalization;
FIG. 2 is a layout illustration considering power rail constraints;
FIG. 3 is a diagram showing an example of a layout of mixed-size standard cells
FIG. 4 is a diagram of accelerated Newton's iterative solution steps;
FIG. 5 is an iterative diagram of one embodiment of accelerated Newton iteration to solve a generalized absolute value equation derived from a legalization problem.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by those skilled in the art without any creative work based on the embodiments of the present invention belong to the protection scope of the present invention.
As shown in fig. 1, an accelerated newton splitting iterative method applied to a mixed-size unit circuit layout method specifically includes the following steps:
s1: preprocessing the standard unit, dividing the multiple-time row height standard unit into multiple single-time row height standard subunits, and placing the subunits on the nearest row matched with a power line;
s2: establishing a network flow model for all units, and diffusing the network flow model;
s3: expressing the legalization problem as a convex quadratic programming problem;
s4: equivalently converting the quadratic programming problem into a linear complementary problem;
s5: equivalently representing the linear complementary problem as a generalized absolute value equation;
s6: solving a generalized absolute value equation by using an accelerated Newton iteration method;
s7: restoring the multiple times of high standard cells and placing the multiple times of high standard cells on placeable positions in the rows;
s8: and carrying out legalization processing on the remaining illegal units.
Further in this example, the specific implementation manner of step S1 includes: giving a rectangular layout area of a chip, and respectively representing the lower left corner coordinate and the upper right corner coordinate of the rectangular layout area by (0, 0) and (W, H); w represents the width of the layout region, and H represents the height of the layout region; the movable standard unit set to be laid out is C ═ C 1 ,c 2 ,…c n ) Wherein the unit c i The initial lower left corner coordinate obtained from the global phase is
Figure BDA0003700111650000081
The width and height of the cell are w i ,h i The coordinates after the legalization stage are determined as (x) i ,y i ) Represents; for the multiple high standard cell, it is expressed as a plurality of subunits, and is expressed by (c) i1 ,c i2 ,…c it ) Is shown, wherein t represents a markThe height of the quasi-unit is t times higher than the row height; note that the height of all cells is an integer multiple of the line height; then aligning all the standard cells to the nearest row matched with the power line of the standard cells; the power lines and the grounding lines are arranged in a staggered manner in the rows; for odd-number multiple row height units, the power types at two ends of the odd-number multiple row height units are different, so that the odd-number multiple row height units can be placed on any row as long as the odd-number multiple row height units do not exceed the layout area, and the power types are matched by turning over; for even-numbered row-high cells, the power types at both ends are the same, so the cells need to be placed on rows matched with the power types; as shown in fig. 2, the red line represents a power supply line, the blue line represents a ground line, and the dotted line represents a row in which cells can be placed.
Further in this example, the specific implementation manner of step S2 includes: in order to avoid overcrowding of the standard cells in the subsequent processing, the cells are diffused by using a network flow algorithm to ensure that the sum of the widths of the cells in each row does not exceed the width of the row; uniformly dividing a layout area into grids in the horizontal direction and the vertical direction, wherein each grid forms a node in a network flow graph; in addition, two additional nodes, i.e., super source node (N) are created B ) And a super sink node (N) E ) (ii) a Calculating the sum s of the areas of the affiliated units in each grid C It is compared with the grid area s G Comparing; if s is C >s G The grid is called an overflow grid and the area of the overflow s is recorded o (ii) a If s is C ≤s G The grid is called a free grid and the remaining free area s is recorded f (ii) a For an overflow mesh, it is set to the source node N in the network flow s And establishing a slave N B To N s Arc of (a), capacity and cost on the arc are set to s, respectively o And zero; for the idle mesh, set it as the target node N t And establishing a slave N t To N E Arc of (a), capacity and cost on the arc are set to s, respectively f And 0; and for the overflow grid, searching the idle grid adjacent to the overflow grid, and establishing a secondary N s To N t Arc, capacity and cost on the arc are set to infinity and the position of the cell moving between the two grids, respectivelyMoving; solving the established network flow graph to obtain a strategy for moving the unit in the grid, and moving the unit according to the strategy and the moved unit c i Has the coordinates of
Figure BDA0003700111650000091
Further in this example, the specific implementation manner of step S3 includes: the legalization process is to eliminate the overlap between cells and to optimize for minimizing the standard cell total displacement, and in the previous step the cells have undergone a minimum movement in the vertical direction, i.e. aligned with the matching power rails, so that the displacement in the vertical direction can be ignored, describing the legalization problem as the following model (27):
Figure BDA0003700111650000092
the model is rewritten into a standard form of the convex quadratic programming problem, namely:
Figure BDA0003700111650000093
wherein the content of the first and second substances,
Figure BDA0003700111650000094
is a matrix of units, and is,
Figure BDA0003700111650000095
is a column vector whose components consist of the initial abscissas of the standard cells; any adjacent pair of standard cells should satisfy inequality x j -x i ≥w i (x j ≥x i ) If the inequality is established between all adjacent cells, the matrix form Wx ≧ d can be written, W is a matrix containing only two elements-1 and 1 in each row, and represents the cell c respectively i And c j Abscissa x of j ,x i D is a column vector, where the corresponding component represents the left cell c i Width w of i (ii) a Then the number of rows of W and d is the number of constraints, and the number of columns of W is the total number of standard cells, i.e. the sum of the number of single-time row units and the number of subunits into which multiple-time row units are split, then
Figure BDA0003700111650000096
Figure BDA0003700111650000097
R is likewise a matrix of-1 and 1 per row, -1 denotes a multiple of row height cells c i Subunit c of i1 1 represents c i Subunit c of i2 Sequentially pushing classes; x is the number of i2 -x i1 Not equal to 0 guarantees c i Are equal, and thus a constraint matrix Rx of 0 is obtained, wherein
Figure BDA0003700111650000098
FIG. 3 is a simplified illustration of a mixed-size standard cell layout, with matrix W, R and vector d constructed according to this position as follows:
Figure BDA0003700111650000099
R=(0 -1 1 0),d=(w 1 w 2 ) T
by using the lagrange multiplier method, the equality constraint in quadratic programming is added to the objective function, then (2) can be expressed as:
Figure BDA0003700111650000101
where λ is the lagrange multiplier.
Further in this example, the specific implementation manner of step S4 is: using the Karush-Kuhn-Tucker (KKT) condition, model (3) can be written as a KKT equation set with the following conditions:
Figure BDA0003700111650000102
the equation set (4) is modified to the form:
Figure BDA0003700111650000103
order to
Figure BDA0003700111650000104
The problem evolves to find a pair of non-negative and orthogonal solution vectors
Figure BDA0003700111650000105
The following conditions are satisfied:
w=Az+q≥0,z≥0 and w T z≥0. (32)
the problem (6) is a linear complementary problem, wherein
Figure BDA0003700111650000106
Further in this example, the specific implementation manner of step S5 is: let z be (| v | -v) and w be (| v | + v), then (6) can be transformed into the following equivalent generalized absolute equation:
(A+I)v-(A-I)|v|=q. (33)
let C ═ a + I, E ═ a-I where I is the identity matrix, then (7) can be restated as follows:
Cv-E|v|=q. (34)
further in this example, the specific implementation manner of step S6 is: let f (v) Cv-E | v | -q, and let f (v) 0; since f (v) is a piecewise linear vector function, which is not continuously differentiable, newton's iteration method cannot be directly applied to solve the equation; therefore, based on the sub-gradient of the component of | v |, a generalized Jacobian of | v |, is used
Figure BDA0003700111650000107
To obtain an approximate solution of generalized absolute value equation (8);
Figure BDA0003700111650000108
can be represented by a diagonal matrix D (v), wherein
Figure BDA0003700111650000111
And sign (v) k ) Is a vector with component values of
Figure BDA0003700111650000112
For the nonlinear equation system F (v), it is decomposed into the sum of the differentiable function H (v) and the Lipschitz continuous function G (v), i.e., F (v) ═ H (v) + G (v), so that F (v), i.e., F (v), can be solved using a modified Newton iteration method
v k+1 =v k -H′(v k ) -1 (H(v k )+G(v k )),k=0,1,2,…, (36)
According to the modified newton-type iterative method of the general absolute value equation of the thesis, taking h (v) ═ c (v) + Ω (v), g (v) ═ Ω (v) -E | v | -q where Ω is a semi-positive definite matrix, using (10) to solve f (v) can obtain the following iterative format:
v k+1 =v k -(C+Ω) -1 (Cv k -E|v k |-q). (37)
multiplying both sides of (11) by (C + omega) simultaneously to obtain
(C+Ω)v k+1 =Ωv k +E|v k |+q. (38)
Because C is a + I and E is a-I, the matrices C and E are two positive definite matrices, and in the present invention, C is M 1 -N 1 For splitting of matrix C, E ═ M 2 -N 2 Is the splitting of the matrix E and the latest estimated value v is k+1 V replacing the right side of the equation k The following iterative format is available:
(M 1 +Ω)v k+1 =(N 1 +Ω)v k +M 2 |v k |-N 2 |v k+1 |+q. (39)
wherein, N is required 2 Is a lower triangular matrix; specifically, according to the structure of matrix A in formula (5), M 1 ,N 1 ,M 2 ,N 2 The values are as follows:
Figure BDA0003700111650000113
Figure BDA0003700111650000114
wherein the content of the first and second substances,
Figure BDA0003700111650000115
is an identity matrix; take omega as omega I and omega as normal number, let B 1 =B+λR T R, therefore, the process of solving the legalization problem using equation (13) is as follows:
Figure BDA0003700111650000121
given an arbitrary initial vector
Figure BDA0003700111650000122
Calculating v by iteratively solving a linear system k+1 Up to the two-norm RES (v) of the absolute residual vector k ):=||z k -z k-1 || 2 Less than or equal to a given constant, in which case the iterative sequence can be considered
Figure BDA0003700111650000123
Converge, and z k =(|v k |-v k ) K is 0, 1, 2, …; the solving process is shown in FIG. 4; FIG. 5 shows an example of applying an accelerated Newton splitting iterative method to solve after a legalization problem is transformed into a generalized absolute value equation, where the abscissa represents the number of iterations, the ordinate represents the value of the two-norm RES of the absolute residual vector, and the iteration convergence condition is RES (v) (k) )≤10 -5
Further in this example, the specific implementation manner of step S7 is: and sorting the x coordinates of all the subunits of each multiple-time row height standard unit according to an ascending order, wherein the median is the x coordinate of the multiple-time row height unit, and then placing the unit on a placeable position closest to the obtained x coordinate.
Further in this example, the specific implementation manner of step S8 is: for a few standard cells which still overlap or exceed the right boundary of the layout area, traversing the standard cells from the upper right corner of the layout area to the left in the order from top to bottom, and if the cell c is i Beyond the right boundary, the coordinate is set as W-W i If unit c i And c i-1 Overlap, then c i-1 The coordinate is x i -w i-1 (ii) a Since the movement of multiple line height cells may cause the cells of adjacent lines to overlap, for multiple line height cells that have moved in the previous line, they are not moved in the next line; and traversing the standard cells again from left to right and from bottom to top according to the same rule, wherein all cell overlaps can be eliminated after the step.
The modified newton-type iterative method of the generalized absolute value equation of the Chinese thesis has the following specific thesis information: wang A, CaoY, Chen J X. modified Newton-type iteration methods for generated absolute values [ J ]. Journal of Optimization Theory and applications, 2019, 181 (1): 216-230.
The above description is only an exemplary embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent processes that are transformed by the content of the present specification and the attached drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (10)

1. An accelerated Newton's splitting iterative method is applied to a circuit layout method of a unit with mixed size, and is characterized in that: the method comprises the following steps:
s1: preprocessing the standard unit, dividing the multiple-time row height standard unit into multiple single-time row height standard subunits, and placing the subunits on the nearest row matched with a power line;
s2: establishing a network flow model for all units, and diffusing the network flow model;
s3: expressing the legalization problem as a convex quadratic programming problem;
s4: equivalently converting the quadratic programming problem into a linear complementary problem;
s5: equivalently representing the linear complementary problem as a generalized absolute value equation;
s6: solving a generalized absolute value equation by using an accelerated Newton iteration method;
s7: restoring the multiple times of high standard cells and placing the multiple times of high standard cells on placeable positions in the rows;
s8: and carrying out legalization processing on the remaining illegal units.
2. The method of claim 1, wherein the method comprises applying an accelerated iterative method of Newton splitting to a mixed-size cell circuit layout: the specific implementation manner of step S1 includes: giving a rectangular layout area of a chip, and respectively representing the lower left corner coordinate and the upper right corner coordinate of the rectangular layout area by (0, 0) and (W, H); w represents the width of the layout region, and H represents the height of the layout region; the movable standard unit set to be laid out is C ═ C 1 ,c 2 ,…c n ) Wherein the unit c i The initial lower left corner coordinate obtained from the global phase is
Figure RE-FDA0003766933900000011
The width and height of the cell are w i ,h i The coordinates after the legalization stage are determined as (x) i ,y i ) Representing; for the multiple high standard cell, it is expressed as a plurality of subunits, and is expressed by (c) i1 ,c i2 ,…c it ) Where t denotes that the height of the standard cell is t times higher than the line height.
3. The method of claim 2, wherein the iterative method of newton's splitting is applied to a mixed-size cell circuit layout method, and wherein: the heights of all units are integral multiples of the line height; then aligning all the standard cells to the nearest row matched with the power line of the standard cells; the power lines and the grounding lines are arranged in the rows in a staggered manner, and for odd-number multiple-row high units, the power types at two ends of the odd-number multiple-row high units are different, so that the odd-number multiple-row high units can be placed on any row as long as the odd-number multiple-row high units do not exceed the layout area, and the power types are matched by turning over; for even-numbered multiple row high cells, the power supply types at both ends are the same, and therefore need to be placed on the rows matching their power supply types.
4. The method of claim 2, wherein the iterative method of newton's splitting is applied to a mixed-size cell circuit layout method, and wherein: the specific implementation manner of step S2 includes: in order to avoid overcrowding of standard cells in subsequent processing, cells are diffused by using a network flow algorithm to ensure that the sum of the cell widths in each row does not exceed the width of the row, a layout area is uniformly divided into grids in the horizontal direction and the vertical direction, each grid forms a node in a network flow graph, and in addition, two nodes, namely super source nodes (N) are additionally created B ) And a super sink node (N) E ) Calculating the sum s of the areas of the cells in each grid C It is compared with the grid area s G Making a comparison if s C >s G The grid is called an overflow grid and the area of the overflow s is recorded o If s is C ≤s G The grid is called a free grid and the remaining free area s is recorded f For an overflow mesh, it is set to the source node N in the network flow s And establishing a slave N B To N s Arc of (a), capacity and cost on the arc are set to s, respectively o And zero, for the free mesh, set it as the target node N t And establishing a slave N t To N E Arc of (a), capacity and cost on the arc are set to s, respectively f And 0, and for the overflow grid, find the idle grid adjacent to it, establish from N s To N t The capacity and the cost on the arc are respectively set as infinity and the displacement of the unit moving between the two grids, the well-established network flow graph is solved, the strategy of the unit moving in the grids can be obtained, and the unit is moved according to the strategyMoving unit, moved unit c i Has the coordinates of
Figure RE-FDA0003766933900000021
5. The method of claim 4, wherein the iterative method of Newton splitting is applied to a mixed-size unit circuit layout method, and wherein: the specific implementation manner of step S3 includes: the process of legalization is to eliminate the overlap between cells and to optimize for minimizing the standard cell total displacement, and in the previous step the cells have undergone a minimum movement in the vertical direction, i.e. aligned with the matching power rails, so that the displacement in the vertical direction can be ignored, describing the legalization problem as the following model (27):
Figure RE-FDA0003766933900000022
the model is rewritten into a standard form of the convex quadratic programming problem, namely:
Figure RE-FDA0003766933900000023
wherein the content of the first and second substances,
Figure RE-FDA0003766933900000024
is a matrix of units, and is,
Figure RE-FDA0003766933900000025
is a column vector whose components consist of the initial abscissas of the standard cells; any adjacent pair of standard cells should satisfy inequality x j -x i ≥w i (x j ≥x i ) If the inequality is established between all adjacent cells, then we can write the matrix form Wx ≧ d, W is a matrix containing only two elements-1 and 1 in each row, and represents cell c respectively i And c j Abscissa x of j ,x i D is a column vector, where the corresponding component represents the left cell c i Width w of i (ii) a Then the number of rows of W and d is the number of constraints, and the number of columns of W is the total number of standard cells, i.e. the sum of the number of single-time row units and the number of subunits into which multiple-time row units are split, then
Figure RE-FDA0003766933900000031
Figure RE-FDA0003766933900000032
R is likewise a matrix of-1 and 1 per row, -1 denotes a multiple of row height cells c i Subunit c of i1 1 represents c i Subunit c of i2 Sequentially pushing classes; x is the number of i2 -x i1 C is guaranteed 0 i Are equal, and thus a constraint matrix Rx of 0 is obtained, wherein
Figure RE-FDA0003766933900000033
The matrix W, R and vector d constructed from this position are as follows:
Figure RE-FDA0003766933900000034
R=(0 -1 1 0),d=(w 1 w 2 ) T
by using the lagrange multiplier method, the equality constraint in quadratic programming is added to the objective function, then (2) can be expressed as:
Figure RE-FDA0003766933900000035
where λ is the lagrange multiplier.
6. An accelerated iterative method of newton's splitting as claimed in claim 5 applied to a mixed size cell circuit layout method, wherein: the specific implementation manner of step S4 is: using the Karush-Kuhn-Tucker (KKT) condition, model (3) can be written as a KKT equation set with the following conditions:
Figure RE-FDA0003766933900000036
the equation set (4) is modified to the form:
Figure RE-FDA0003766933900000037
order to
Figure RE-FDA0003766933900000038
The problem then evolves to seek a pair of non-negative and orthogonal solution vectors
Figure RE-FDA0003766933900000039
The following conditions are satisfied:
w=Az+q≥0,z≥0 and w T z≥0. (6)
the problem (6) is a linear complementary problem, wherein
Figure RE-FDA00037669339000000310
7. An accelerated iterative method of newton's splitting as claimed in claim 6 applied to a mixed size cell circuit layout method, wherein: the specific implementation manner of step S5 is: let z be (| v | -v) and w be (| v | + v), then (6) can be transformed into the following equivalent generalized absolute equation:
(A+I)v-(A-I)|v|=q. (7)
let C ═ a + I, E ═ a-I where I is the identity matrix, then (7) can be restated as follows:
Cv-E|v|=q. (8)。
8. an accelerated newton splitting according to claim 7The iterative method is applied to a mixed-size unit circuit layout method, and is characterized in that: the specific implementation manner of the step S6 is as follows: let f (v) Cv-E | v | -q, and let f (v) 0; since F (v) is a piecewise linear vector function, which is not continuously differentiable, Newton's iteration method cannot be directly applied to solve the equation; therefore, based on the sub-gradient of the component of | v |, a generalized Jacobian of | v |, is used
Figure RE-FDA0003766933900000041
To obtain an approximate solution of generalized absolute value equation (8);
Figure RE-FDA0003766933900000042
can be represented by a diagonal matrix D (v), wherein
Figure RE-FDA0003766933900000043
And sign (v) k ) Is a vector having component values of
Figure RE-FDA0003766933900000044
For the nonlinear equation system F (v), it is decomposed into the sum of the differentiable function H (v) and the Lipschitz continuous function G (v), i.e., F (v) ═ H (v) + G (v), so that F (v), i.e., F (v), can be solved using a modified Newton iteration method
v k+1 =v k -H′(v k ) -1 (H(v k )+G(v k )),k=0,1,2,…, (10)
Taking h (v) ═ c (v) + Ω (v), g (v) ═ Ω (v) -E | v | -q, where Ω is a semi-positive definite matrix, the following iterative format can be obtained by solving f (v) with (10):
v k+1 =v k -(C+Ω) -1 (Cv k -E|v k |-q). (11)
multiplying both sides of (11) by (C + omega) simultaneously to obtain
(C+Ω)v k+1 =Ωv k +E|v k |+q. (12)
Since C is A+ I, E ═ a-I, so matrices C and E are two positive definite matrices, let C ═ M 1 -N 1 For splitting the matrix C, E ═ M 2 -N 2 Is a split of matrix E and the latest estimated value v is k+1 V replacing the right side of the equation k The following iterative format is available:
(M 1 +Ω)v k+1 =(N 1 +Ω)v k +M 2 |v k |-N 2 |v k+1 |+q. (13)
wherein, N is required 2 Is a lower triangular matrix; specifically, according to the structure of matrix A in formula (5), M 1 ,N 1 ,M 2 ,N 2 The values are as follows:
Figure RE-FDA0003766933900000051
Figure RE-FDA0003766933900000052
wherein the content of the first and second substances,
Figure RE-FDA0003766933900000053
is a unit matrix; take omega as omega I and omega as normal number, let B 1 =B+λR T R, therefore, the process of solving the legalization problem using equation (13) is as follows:
Figure RE-FDA0003766933900000054
given an arbitrary initial vector
Figure RE-FDA0003766933900000055
Calculating v by iteratively solving a linear system k+1 Up to the two-norm RES (v) of the absolute residual vector k ):=||z k -z k-1 || 2 Is less than or equal to a given oneA constant, at which point the iterative sequence can be considered
Figure RE-FDA0003766933900000056
Converge, and z k =(|v k |-v k ),k=0,1,2,…。
9. An accelerated iterative method of newton's splitting as claimed in claim 8 applied to a mixed size cell circuit layout method, wherein: the specific implementation manner of the step S7 is as follows: and sorting the coordinates of all the subunits of each multiple high standard unit according to an ascending order, wherein the median is the coordinate of the multiple high standard unit, and then placing the unit on a placeable position closest to the coordinate.
10. An accelerated iterative method of newton's splitting according to claim 9 applied to a mixed-size cell circuit layout method, wherein: the specific implementation manner of the step S8 is as follows: for a few standard cells which still overlap or exceed the right boundary of the layout area, traversing the standard cells from the upper right corner of the layout area to the left in the order from top to bottom, and if the cell c is i Beyond the right boundary, the coordinate is set as W-W i If unit c i And c i-1 Overlap, then c i-1 The coordinate is x i -w i-1 (ii) a Since the movement of multiple line height cells may cause the cells of adjacent rows to overlap, for multiple line height cells that have moved in the previous row, they are not moved in the next row; and traversing the standard cells again from left to right and from bottom to top according to the same rule, wherein all cell overlaps can be eliminated after the step.
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CN116151179A (en) * 2022-10-31 2023-05-23 芯行纪科技有限公司 Layout planning method of chip design and related equipment
CN116151179B (en) * 2022-10-31 2023-11-03 芯行纪科技有限公司 Layout planning method of chip design and related equipment

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