CN115098258A - Forth multitask scheduling method and device based on multi-core stack processor - Google Patents
Forth multitask scheduling method and device based on multi-core stack processor Download PDFInfo
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Abstract
The invention provides a Forth multitask scheduling method and a Forth multitask scheduling device based on a multi-core stack processor, wherein the Forth multitask scheduling method comprises a Forth task initialization step, a Forth task scheduling step and a multi-core scheduling step; the Forth multitask scheduling device comprises a Forth task initialization module, a Forth task scheduling module and a multi-core scheduling module. In the Forth field, the present multitask Forth systems corresponding to the single-core stack processor and the on-chip multi-stack processor are not suitable for operating on the hardware platform of the multi-core stack processor, and a mature multi-task scheduling mechanism facing the multi-core stack processor and a design scheme of the multi-task Forth system are lacked. The Forth multitask scheduling method based on the multi-core stack processor is a multitask scheduling method suitable for a hardware platform of the multi-core stack processor, and can improve the utilization rate of hardware resources and reduce energy consumption.
Description
Technical Field
The invention relates to the field of task scheduling of a multitask Forth system, in particular to a Forth multitask scheduling method and device based on a multi-core stack processor.
Background
At present, the Forth chip exists in a mode of a single-core stack processor, a multi-core stack processor and a multi-processor on a chip, a single task Forth system running on the single-core stack processor and a multi-task Forth system running on the multi-processor on the chip both have mature design schemes, but the multi-task Forth system facing the single-core stack processor and the multi-core stack processor is still in an exploration stage at present, and particularly, the multi-core stack processor does not have a multi-task Forth system which can run on a corresponding hardware platform. Due to the characteristics of the on-chip multiprocessor, the multitask Forth system of the on-chip multiprocessor enables one processor not to execute other Forth tasks before one Forth task is not executed, and the multitask mechanism is adapted to a multicore stack processor, so that the concurrency number of Forth tasks is limited, and processor resources are wasted.
Disclosure of Invention
In order to solve the related technical problems, the invention provides a Forth multitask scheduling method and a Forth multitask scheduling device based on a multi-core stack processor.
The invention provides a Forth multitask scheduling method based on a multi-core stack processor, which comprises the following steps: a Forth task initialization step, a Forth task scheduling step and a multi-core scheduling step, wherein,
the Forth task initialization step is executed when the multitask Forth system starts a new Forth task;
the Forth task scheduling step is executed when the time slice of one task is consumed;
the multi-core scheduling step is initiated by the Forth task scheduling step when one or more processor cores wait to allocate a task.
Further, the Forth task initialization step specifically includes: the multi-task Forth system applies for a necessary operation space for a new task, initializes a new Forth task TCB according to the information of the new Forth task and a necessary operation space address, and then inserts the new Forth task TCB into the tail of a total task queue and the tail of a task scheduling queue with the same priority.
Further, the stored content of the Forth task TCB includes: the task scheduling method comprises the steps of task scheduling queue next task address, total task queue next task address, task priority, task name address, parameter stack memory space address, parameter stack pointer, return stack memory space address, return stack pointer, task number, task state, current task execution address, task free space address and task free space size.
Further, the task priorities are classified into 3 levels, the priority level 1 is the highest priority level, the priority level 3 is the lowest priority level, the task priorities related to basic IO in the multitask Forth system are 1 level, the priority level of a foreground task in the multitask Forth system is 2 level, and the priority level of a background task in the multitask Forth system is 3 level; the task scheduling queue comprises three queues which respectively correspond to the priorities of 1, 2 and 3 and are used for storing ready-state tasks in the multi-task Forth system; the total task queue has only one queue for storing all tasks in the multitask Forth system.
Further, the Forth task scheduling step specifically includes: and obtaining the access authority of the task scheduling queue, storing a Forth task site, inserting the replaced Forth task TCB into the tail of the task scheduling queue with the same priority, releasing the access authority of the task scheduling queue, judging whether a Forth task exists in a task variable corresponding to the current processor core, if so, recovering the Forth task site to continue executing the task in the task variable, if not, transferring to the multi-core scheduling step, judging whether a Forth task TCB exists in the task variable corresponding to the current processor core after the multi-core scheduling step is executed, if so, recovering the Forth task site to continue executing the task in the task variable, and if not, immediately closing the core.
Further, the contents of the Forth task field saving and restoring include a program counter, a parameter stack pointer, parameter stack data, a return stack pointer, and return stack data.
Further, the task variables corresponding to the processor cores are necessary variables in the multitask Forth system, the multitask Forth system applies for one task variable for each core of the multicore stack processor, and is used for storing the address of the Forth task TCB, the task variables are continuously stored in the multitask Forth system according to the sequence of the processor core numbers, if the value of the task variable is 0, it indicates that the core corresponding to the task variable needs to be allocated with a task, and if the value of the task variable is not 0, it indicates that the core corresponding to the task variable has a task in operation, and it does not need to allocate a new task.
Further, the multi-core scheduling step specifically includes: taking out a head address of a queue head Forth task TCB from a highest priority task scheduling queue which is not empty, storing the head address into a task variable corresponding to a current processor core, then searching a task variable with a value of 0 from a first processor core, allocating a task TCB to the task variable with the value of 0, exiting the multi-core scheduling step if all the task scheduling queues are empty, and starting the core and allocating a Forth task if the task scheduling queues are not empty and meet the processor core in a closed state.
The invention provides a Forth multitask scheduling device based on a multi-core stack processor, which is characterized by comprising a Forth task initialization module, a Forth task scheduling module and a multi-core scheduling module, wherein,
the Forth task initialization module is used for applying for a necessary memory space for the operation of the Forth task, initializing a Forth task TCB and inserting the TCB into a task queue;
the Forth task scheduling module is used for saving and restoring a Forth task in operation, starting the multi-core scheduling module when a processor core needs a task, and closing the current processor core when all task scheduling queues are empty;
the multi-core scheduling module allocates a task to each core of the processor, wherein the core needs to be allocated with the task, and when no task can be allocated in the multi-task Forth system, the multi-core scheduling module is directly ended.
Drawings
One or more embodiments are illustrated by the corresponding figures in the drawings, which are not meant to be limiting.
FIG. 1 is a Forth multitask scheduling method according to a first embodiment of the present invention;
FIG. 2 is a detailed procedure of a Forth task initialization procedure according to a first embodiment of the present invention;
fig. 3 is a specific step of a Forth task scheduling step according to a first embodiment of the present invention;
FIG. 4 is a flowchart illustrating a specific procedure of a multi-core scheduling procedure according to a first embodiment of the present invention;
fig. 5 is a Forth multitask scheduling device according to a second embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be further described in detail with reference to the accompanying drawings and examples. It is to be noted that the following examples are only illustrative of the present invention, and do not limit the scope of the present invention. Likewise, the following examples are only some but not all examples of the present invention, and all other examples obtained by those skilled in the art without any inventive step are within the scope of the present invention.
Example 1
The embodiment of the invention provides a Forth multitask scheduling method based on a multi-core stack processor, which comprises the following steps: a Forth task initialization step S101, a Forth task scheduling step S103, and a multi-core scheduling step S105, as shown in fig. 1.
The Forth task initialization step S101 is executed when the multitask Forth system starts a new Forth task, and the specific execution steps are shown in fig. 2 and include:
step S201: apply for Forth task TCB, parameter stack, and return stack memory space.
The multi-task Forth system should support a dynamic memory allocation mechanism, so that the operating memory space of each task can be better managed, and the memory resource utilization rate is improved.
The stored contents of the Forth task TCB comprise: the task scheduling method comprises the steps of task scheduling queue next task address, total task queue next task address, task priority, task name address, parameter stack storage space address, parameter stack pointer, return stack storage space address, return stack pointer, task number, task state, current task execution address, task free space address and task free space size, wherein the size of storage space occupied by each item in TCB is the same as the size of a word of a Forth system, and the method is shown in table 1.
Table 1 shows the storage entries and the occupied size of each entry of the TCB in this embodiment.
TABLE 1 Forth task TCB project Table
| Name of item | Size (Unit: word) |
| Task scheduling queue next task address | 1 |
| Next task address of total task queue | 1 |
| Task priority | 1 |
| Task name address | 1 |
| Parameter stack memory space address | 1 |
| Parameter stack pointer | 1 |
| Return stack storageSpatial address | 1 |
| Return stack pointer | 1 |
| Task numbering | 1 |
| Task state | 1 |
| Current task execution address | 1 |
| Task free space addresses | 1 |
| Size of task free space | 1 |
The memory size of the parameter stack and return stack of the application should be no smaller than the size of the hardware parameter stack and hardware return stack within the multi-core stack processor core.
Step S203: the Forth task TCB initializes. Initializing the applied Forth task TCB, wherein the initialization content comprises task priority, task name address, parameter stack memory space address, parameter stack pointer, return stack memory space address, return stack pointer, task number, task state, current task execution address, task free space address and task free space size.
Specifically, the initial values of the parameter stack pointer and the return stack pointer are both 0; the task number is automatically distributed by a Forth system; the task state is initially a ready state; the current task execution address initial address is the address of the first instruction of the Forth task; the task free space address and the task free space size are addresses and sizes in the middle of a memory dynamically applied in the process of executing the storage task, and initial values of the addresses and the sizes are 0.
Step S205: the Forth task TCB is inserted to the tail of the overall task queue. Inserting the initialized Forth task TCB into the tail of the total task queue, and setting the content of the address item of the next task of the total task queue of the original last TCB of the queue as the address of the memory space where the address item of the next task of the total task queue is located in the Forth task TCB of the current step, namely, the total task queue is organized by using a linked list.
It should be noted that the overall task queue is a queue in the Forth system for storing all tasks in the Forth system, and all tasks can be found in the overall task queue.
Step S207: and inserting the Forth task TCB into the tail of the corresponding priority task scheduling queue. Inserting the initialized Forth task TCB into the tail of the task scheduling queue with the corresponding priority according to the priority of the Forth task TCB, and setting the content of the address item of the next task of the task scheduling queue of the original last TCB of the queue as the address of the memory space where the address item of the next task of the task scheduling queue in the Forth task TCB of the current step is located, namely all the task scheduling queues are organized by using a linked list.
It should be noted that the task scheduling queue is a queue used to store ready-state tasks in the Forth system, and tasks in other states are not in the task scheduling queue.
The method includes that an inner core of a multi-core stack processor triggers task switching interruption when a time slice is finished, and a Forth task scheduling step S103 is executed, where the specific execution step is shown in fig. 3 and includes:
and S301, obtaining the access right of the task scheduling queue.
The task scheduling queue is a critical resource, a plurality of processor cores may read and write data in the task scheduling queue at the same time, in order to ensure the correctness of the content of the task scheduling queue, the multi-core stack processor is required to provide a function of accessing the critical resource, and if the multi-core stack processor does not have a similar function to ensure the correct and ordered access of the task scheduling queue, the subsequent steps cannot ensure the correctness of task switching and the stability of system operation.
Step S303: saving the Forth task site.
The Forth task site includes: task PC, parameter stack pointer, parameter stack, return stack pointer, return stack.
Step S305: the Forth task state is set to the ready state.
Step S307: and inserting the TCB of the Forth task into the tail of the task scheduling queue with the corresponding priority.
Step S308: and releasing the access right of the task scheduling queue.
Step S309: and setting a task variable corresponding to the current processor core to be 0.
Each multicore stack processor core corresponds to a task variable in the Forth system, the task variable indicates which task the corresponding core is currently running, if the value of the task variable is 0, it indicates that the processor core corresponding to the task variable needs to be allocated with a task, otherwise, if the task variable stores the head address of the Forth task TCB, it indicates that the processor core corresponding to the task variable is running a task, the task variables of all cores are continuously stored in the Forth system according to the sequence of the core numbers, and each task variable occupies a storage space of a word.
Step S311: and judging whether the task variable corresponding to the processor core is 0, if so, executing step S319, and if not, executing step S313.
Step S313: and restoring the new Forth task site.
The Forth task site includes: task PC, parameter stack pointer, parameter stack, return stack pointer, return stack.
Step S315: the slice or chunk size is set according to the new Forth task priority.
Step S317: and setting the state of the new Forth task as an execution state, and interrupting and returning to continue executing the Forth task.
Step S319: and judging whether the multi-core scheduling step can be started or not, if so, turning to the multi-core scheduling step S321.
It should be noted that the multi-core scheduling step starts the required access right, the access right of the multi-core scheduling step is a critical resource, multiple processor cores may run the multi-core scheduling step at the same time, and in order to ensure the correctness of the multi-core scheduling and the task scheduling, the multi-core stack processor is required to provide a function of accessing the critical resource, and if the multi-core stack processor does not have similar functions to ensure the correct and ordered access of the multi-core scheduling and the task scheduling, the subsequent steps cannot ensure the correctness of task switching and the stability of system operation.
Step S321: and executing a multi-core scheduling step.
It should be noted that the multi-core scheduling step S321 is the same as the multi-core scheduling step S105.
Step S323: and judging whether the task variable corresponding to the processor core is 0, if so, executing step 325, otherwise, executing step 313.
Step S325: the current processor core is turned off. If the multicore stack processor does not support the shutdown kernel operation, this step may be replaced with running an idle instruction.
When one or more processor cores wait for the task to be allocated and the multi-core scheduling step is not executed by any of the cores, the multi-core scheduling step S105 is started by the Forth task scheduling step S103 in the multi-core scheduling step S105. The access task scheduling queue in the multi-core scheduling step S105 also needs to apply for access right, so that the execution of the multi-core scheduling step S105 requires at least two access rights of critical resources: and the multi-core scheduling step access right and the task scheduling queue access right. Since the access of the task scheduling queue is only accessed during task switching, the access right of the multi-core scheduling step and the access right of the task queue can be set as one access right, and the first embodiment will explain the multi-core scheduling step S105 in the form of one access right.
The specific steps of the multi-core scheduling step S105 are shown in fig. 4, and include:
step S401: and judging whether the priority task scheduling queue of the 1 level is empty or not, if so, executing the step S403, otherwise, executing the step S409.
Step S403: and judging whether the 2-level priority task scheduling queue is empty, if so, executing the step S405, and if not, executing the step S409.
Step S405: and judging whether the 3-level priority task scheduling queue is empty, if so, executing the step S407, and if not, executing the step S409.
Step S407: and exiting the multi-core scheduling step and returning to the Forth task scheduling module. At this time, no ready task in the Forth system can be executed, and the current processor core can be closed by exiting the multi-core scheduling step, so that energy is saved.
The Forth task scheduling module is an example of the Forth task scheduling step S103.
Step S409: and taking out the head address of the head of the queue Forth task TCB from the priority task scheduling queue and storing the head address into a task variable corresponding to the current processor kernel.
Step S411: the value of the task variable corresponding to the first processor core is obtained, and step S415 is executed.
Step S413: and obtaining the value of the task variable corresponding to the next processor core.
Step S415: it is determined whether the value of the task variable is 0, if so, step S405 is executed, and if not, step S425 is executed.
Step S417: and judging whether the 1-level priority task scheduling queue is empty, if so, executing step S419, and if not, executing step S423.
Step S419: and judging whether the 2-level priority task scheduling queue is empty, if so, executing step S421, and if not, executing step S423.
Step S421: and judging whether the 3-level priority task scheduling queue is empty, if so, executing the step S407, and if not, executing the step S423.
Step S423: and taking out the head task TCB from the priority task scheduling queue, storing the address of the TCB into a task variable corresponding to the processor kernel, and starting the kernel if the processor kernel is in a closed state.
If the processor core is not running, step S423 may start the core, and if the multicore stack processor does not support the core to stop running, the step of starting the core in step S423 may be omitted.
Step S425: and judging whether a task variable corresponding to the next processor core exists, if so, executing the step S413, and if not, executing the step S407.
The second embodiment of the present invention provides a Forth multitask scheduling device based on a multi-core stack processor, including: a Forth task initialization module S501, a Forth task scheduling module S503 and a multi-core scheduling module S505.
The Forth task initialization module S501 is an implementation of the Forth task initialization step S101 in the first embodiment of the present invention, and is mainly used for applying a necessary memory space for the new task to run when a multi-task Forth system runs a new Forth task, initializing a Forth task TCB, and inserting the Forth task TCB into a queue tail of a total task queue and a task scheduling queue tail with the same priority.
The Forth task scheduling module S503 is an implementation of the Forth task scheduling step S103 in the first embodiment of the present invention, and is mainly configured to obtain an access right of a task scheduling queue, store a Forth task field, insert a replaced Forth task TCB into a task scheduling queue tail of the same priority, release the access right of the task scheduling queue, determine whether a Forth task exists in a task variable corresponding to a current processor core, if yes, resume the Forth task field to continue executing a task in the task variable, if no, go to execute the multi-core scheduling module S505, after executing the multi-core scheduling module S505, determine whether a Forth task TCB exists in a task variable corresponding to the current processor core, if yes, resume the Forth task field to continue executing a task in the task variable, and if no, immediately close the core.
The multi-core scheduling module S505 is an implementation of the multi-core scheduling step S105 according to the first embodiment of the present invention, and is mainly configured to take out a head address of a queue head Forth task TCB from a highest priority task scheduling queue that is not empty, store the head address into a task variable corresponding to a current processor core, then start searching for a task variable having a value of 0 from a first processor core, and allocate a task TCB to the task variable having the value of 0, exit the multi-core scheduling module S505 if all task scheduling queues are empty, and start the core and allocate a Forth task if the task scheduling queues are not empty and a processor core in a closed state is encountered.
The device further comprises a critical resource application module, which is used for the multitask Forth system to correctly access various critical resources in the system, such as a task scheduling queue and the like, wherein the module creates a variable for each critical resource in the multitask Forth system, the variable is used for storing the current available quantity of the same critical resource, the critical resource access right needs to be applied when the variable of the critical resources is accessed, when a task successfully applies for a critical resource, the value of the variable corresponding to the critical resource is reduced by 1, and when a task releases a critical resource, the value of the variable corresponding to the critical resource is increased by 1.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; in the light of the above two embodiments, only one preferred embodiment of the present invention is considered to be a preferred embodiment of the present invention, and the scope of the present invention is not limited by the above two embodiments.
Claims (9)
1. A Forth multitask scheduling method based on a multi-core stack processor is characterized by comprising a Forth task initialization step, a Forth task scheduling step and a multi-core scheduling step, wherein,
the Forth task initialization step is executed when the multitask Forth system starts a new Forth task;
the Forth task scheduling step is executed when the time slice of one task is consumed;
the multi-core scheduling step is initiated by the Forth task scheduling step when one or more processor cores wait to allocate a task.
2. The Forth multitask scheduling method according to claim 1, wherein the Forth task initialization step is specifically: the multi-task Forth system applies for a necessary operation space for a new task, initializes a new Forth task TCB according to the information of the new Forth task and a necessary operation space address, and then inserts the new Forth task TCB into the tail of a total task queue and the tail of a task scheduling queue with the same priority.
3. The Forth multitask scheduling method of claim 2, wherein the Forth task TCB stores contents including: the task scheduling method comprises the steps of task scheduling queue next task address, total task queue next task address, task priority, task name address, parameter stack memory space address, parameter stack pointer, return stack memory space address, return stack pointer, task number, task state, current task execution address, task free space address and task free space size.
4. The Forth multitask scheduling method according to claim 3, wherein the task priority is divided into 3 levels, the priority level 1 is the highest priority level, the priority level 3 is the lowest priority level, the task priority level related to the basic IO in the multitask Forth system is the 1 level, the priority level of the foreground task in the multitask Forth system is the 2 level, and the priority level of the background task in the multitask Forth system is the 3 level; the task scheduling queue comprises three queues which respectively correspond to the priorities of 1, 2 and 3 and are used for storing ready-state tasks in the multi-task Forth system; the total task queue only has one queue for storing all tasks in the multitask Forth system.
5. The Forth multitask scheduling method according to claim 1, wherein the Forth task scheduling step specifically includes: the method comprises the steps of obtaining access authority of a task scheduling queue, storing a Forth task site, inserting a replaced Forth task TCB into the tail of the task scheduling queue with the same priority, releasing the access authority of the task scheduling queue, judging whether a Forth task exists in a task variable corresponding to a current processor core, if so, recovering the Forth task site to continue executing tasks in the task variable, if not, switching to execute the multi-core scheduling step, judging whether a Forth task TCB exists in the task variable corresponding to the current processor core after the multi-core scheduling step is executed, if so, recovering the Forth task site to continue executing tasks in the task variable, and if not, immediately closing the core.
6. The Forth multitasking scheduling method of claim 5, wherein the Forth task context includes program counter, parameter stack pointer, parameter stack data, return stack pointer, return stack data.
7. The Forth multitask scheduling method according to claim 5, wherein the task variables corresponding to the processor cores are necessary variables in the multitask Forth system, the multitask Forth system applies for one task variable for each core of the multicore stack processor, the task variable is used for storing an address of the Forth task TCB, the task variables are continuously stored in the multitask Forth system according to the sequence of processor core numbers, if the value of the task variable is 0, it indicates that the core corresponding to the task variable needs to be assigned with one task, and if the value of the task variable is not 0, it indicates that the core corresponding to the task variable has a task in operation, and it does not need to assign a new task.
8. The Forth multitask scheduling method according to claim 1, wherein the multi-core scheduling step specifically is: taking out a head address of a head of a Forth task TCB from a highest priority task scheduling queue which is not empty, storing the head address into a task variable corresponding to a current processor core, then searching a task variable with a value of 0 from the first processor core, allocating a task TCB to the task variable with the value of 0, exiting the multi-core scheduling step if all task scheduling queues are empty, and starting the core and allocating a Forth task if the task scheduling queues are not empty and meet the processor core in a closed state.
9. A Forth multitask scheduling device based on a multi-core stack processor is characterized by comprising a Forth task initialization module, a Forth task scheduling module and a multi-core scheduling module, wherein,
the Forth task initialization module is used for applying for a necessary memory space for the operation of the Forth task, initializing a Forth task TCB and inserting the TCB into a task queue;
the Forth task scheduling module is used for saving and restoring a Forth task in operation, starting the multi-core scheduling module when a processor core needs a task, and closing the current processor core when all task scheduling queues are empty;
the multi-core scheduling module allocates a task to each core of the processor, wherein the core needs to be allocated with the task, and when no task can be allocated in the multi-task Forth system, the multi-core scheduling module is directly ended.
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