CN115085571B - Inverter system control method and protection circuit - Google Patents

Inverter system control method and protection circuit Download PDF

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Publication number
CN115085571B
CN115085571B CN202210990137.0A CN202210990137A CN115085571B CN 115085571 B CN115085571 B CN 115085571B CN 202210990137 A CN202210990137 A CN 202210990137A CN 115085571 B CN115085571 B CN 115085571B
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circuit
fault
inverter system
state
conversion
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CN115085571A (en
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莫翔学
兰金秋
陆华峰
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Shenzhen Daipusen New Energy Technology Co ltd
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Shenzhen Daipusen New Energy Technology Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/122—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for inverters, i.e. dc/ac converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses an inversion system control method and a protection circuit, relates to the technical field of inversion protection, and solves the technical problem of inversion system control and protection; adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the power MOSFET RT turn-off state of the conversion circuit of the conversion inverter system; and judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operation state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through a conversion formula. The invention can greatly improve the control capability and the protection capability of the inverter system.

Description

Inverter system control method and protection circuit
Technical Field
The present invention relates to the field of control technologies, and in particular, to an inverter system control method and a protection circuit.
Background
The inverter system is a converter for converting direct current into alternating current, the protection circuit is an additional circuit for preventing the current surge, voltage surge and other protection circuits from being normally influenced, and the inverter system comprises an inverter and a protection control circuit thereof. The inverter system comprises an inverter and a protection control circuit thereof. The inverter is a converter for converting direct current into alternating current, and the protection circuit is an additional circuit for preventing current surge, voltage surge and the like from being influenced normally. In the application process of the inverter system, how to realize the control and the circuit protection of the inverter system is a technical problem to be solved urgently, the prior art also has a control method and a protection circuit, but in the application process, the control capability is lagged, the working efficiency of the protection circuit is low, and when the control of the inverter system is realized, the automation degree is poor.
Disclosure of Invention
In view of the technical defects, the invention discloses an inverter system control method and a protection circuit, which can greatly improve the control capability of the inverter system and the protection capability of the inverter system.
The invention adopts the following technical scheme:
an inversion system control method comprises the following steps:
step one, obtaining circuit state parameters and operation data parameters of the inverter system; the characteristic vector of the original sample data output by the circuit of the inverter system is collected as
Figure 281597DEST_PATH_IMAGE001
The original sample data is combined with a probability density function of
Figure 57792DEST_PATH_IMAGE002
Data feature vector
Figure 385000DEST_PATH_IMAGE003
Is
Figure 108105DEST_PATH_IMAGE004
The order accumulation is obtained by an accumulation generating function:
Figure 735527DEST_PATH_IMAGE005
（1）
in the formula (1), when
Figure 620306DEST_PATH_IMAGE006
When it is obtained
Figure 434809DEST_PATH_IMAGE007
Sum of order moments
Figure 368130DEST_PATH_IMAGE008
The cumulative amount of the steps,
Figure 99326DEST_PATH_IMAGE008
step cumulative amount through
Figure 905739DEST_PATH_IMAGE009
The order moment is calculated, r represents a constant,
Figure 722385DEST_PATH_IMAGE010
a parameter indicative of a state of the circuit,
Figure 6867DEST_PATH_IMAGE011
a parameter indicative of the operational data is,
Figure 592569DEST_PATH_IMAGE012
representing a set of operational data parameter data;
adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the power MOSFET RT off state of the conversion circuit of the conversion inverter system;
judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operation state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through a conversion formula, wherein:
the conversion formula is:
Figure 835463DEST_PATH_IMAGE013
（2）
in the formula (2), the first and second groups,
Figure 139405DEST_PATH_IMAGE014
which represents the output value of the encoder and,
Figure 24316DEST_PATH_IMAGE015
indicates fault information when
Figure 464524DEST_PATH_IMAGE016
When the voltage is larger than 1, the running state of the inverter system is recorded as a state when
Figure 612740DEST_PATH_IMAGE017
When the current value is less than 1, the operation state of the inverter system is recorded as another state, and the data attribute of the operation state is recorded as a symbol set
Figure 403979DEST_PATH_IMAGE018
，
Figure 295842DEST_PATH_IMAGE019
Is a set
Figure 856137DEST_PATH_IMAGE020
A non-empty subset of the set of bits that are disjoint,
Figure 96625DEST_PATH_IMAGE021
fault random variable for circuit fault signal for number of subsets
Figure 860313DEST_PATH_IMAGE022
The third-order cumulant derivation function is:
Figure 601873DEST_PATH_IMAGE023
（3）
in the formula (3), a discrete time series in which the characteristic signal of the faulty circuit is collected is set to 0.
As a further technical scheme of the invention, the method for acquiring the circuit state parameters comprises the following steps:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating the reference state parameter of the lowest direct current bus voltage through the input voltage.
As a further technical scheme of the invention, the method for acquiring the operation data parameters comprises the following steps:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating to obtain the reference state parameter of the lowest direct current bus voltage, the current, the voltage, the capacity, the generated energy and the irradiation value of each inverter in different time periods through the input voltage.
As a further technical scheme of the invention, the operation mode of the conversion circuit is adjusted through the acquired circuit state parameters and the operation data parameters.
As a further technical scheme of the invention, the fault diagnosis function realizes the circuit data information diagnosis by the following method:
when sampling the characteristic signal of the fault
Figure 501827DEST_PATH_IMAGE024
Of characteristic signals in the case of stationary random processes with a mean value of 0
Figure 506692DEST_PATH_IMAGE025
The order cumulant function is expressed as:
Figure 679047DEST_PATH_IMAGE026
（4）
in equation (4), of the characteristic signal
Figure 924433DEST_PATH_IMAGE027
Cumulative amount of order and time
Figure 459319DEST_PATH_IMAGE028
Is independent of the change in (2), is hysteresis
Figure 120239DEST_PATH_IMAGE029
Correlation function, characteristic signal
Figure 904524DEST_PATH_IMAGE030
For stationary data information, the sampled signal of the fault circuit is a characteristic signal
Figure 676302DEST_PATH_IMAGE031
Is
Figure 800116DEST_PATH_IMAGE027
Sum of order moments
Figure 818887DEST_PATH_IMAGE027
Step cumulant, take
Figure 778884DEST_PATH_IMAGE032
Of the latter random vector
Figure 869200DEST_PATH_IMAGE027
Sum of order moments
Figure 863832DEST_PATH_IMAGE027
The order cumulates, and only
Figure 912559DEST_PATH_IMAGE033
And (3) each independent element, wherein a third-order cumulant function of the simplified circuit characteristic signal is expressed as:
Figure 625432DEST_PATH_IMAGE034
（5）
in equation (5), based on the characteristic signal
Figure 988280DEST_PATH_IMAGE027
Order moment sum
Figure 24369DEST_PATH_IMAGE027
The order cumulant can obtain a characteristic signal
Figure 197992DEST_PATH_IMAGE035
The kurtosis and skewness of
Figure 381849DEST_PATH_IMAGE036
Obtaining the 1-dimensional slice representation skewness of the third-order cumulant
Figure 564700DEST_PATH_IMAGE037
To make the fourth order cumulative
Figure 517612DEST_PATH_IMAGE038
To obtain the kurtosis
Figure 924454DEST_PATH_IMAGE039
Obtaining the signal characteristic value, root, of which the kurtosis and skewness of the circuit fault characteristic signal are dimensionlessCarrying out fault diagnosis on the circuit according to the parameter change of the inverter system;
degree of pass deviation
Figure 595607DEST_PATH_IMAGE040
Judging whether the probability distribution of the circuit signals of the inverter system is symmetrical or not and judging the kurtosis
Figure 316569DEST_PATH_IMAGE041
Reflecting the steepness of the probability distribution of the output signal of the inverter system, the mean value in the signal being
Figure 389568DEST_PATH_IMAGE042
Variance of
Figure 91944DEST_PATH_IMAGE043
Of gaussian random variables
Figure 735546DEST_PATH_IMAGE044
Result value of order conversion formula
Figure 306205DEST_PATH_IMAGE045
。
An inverter system control protection circuit comprising an inverter system, wherein the protection circuit comprises:
the fault signal acquisition module circuit is used for acquiring fault data information in the operation process of the inverter system;
the conversion circuit is used for converting and acquiring fault data information in the operation process of the inverter system;
the power MOSFRT circuit is used for controlling the conversion circuit to realize the conversion of the data information;
the output end of the inverter system is connected with the input end of the fault signal acquisition module circuit, the output end of the fault signal acquisition module circuit is connected with the input end of the conversion circuit, the output end of the conversion circuit is connected with the input end of the power MOSFET RT circuit, and the output end of the power MOSFET RT circuit is connected with the input end of the inverter system.
As a further technical scheme of the invention, the fault signal acquisition module circuit comprises an LM358DR2G chip circuit and a resistor circuit, wherein the embedded controller of the STM32F407VET6 chip is connected with the embedded controller of the STM32F407VET6 chip.
As a further technical scheme of the invention, the conversion circuit comprises an embedded controller, a main circuit power diode and a capacitor, wherein the main circuit power diode and the capacitor are connected with the embedded controller
Figure 984442DEST_PATH_IMAGE046
、
Figure 920037DEST_PATH_IMAGE047
An inductor
Figure 237886DEST_PATH_IMAGE048
、
Figure 300651DEST_PATH_IMAGE049
And a resistance circuit, wherein the DC input voltage of the control circuit is 28V, and the load resistance is
Figure 82662DEST_PATH_IMAGE050
The embedded controller is further connected with a power circuit and an LM317 single-chip linear power supply voltage regulator, wherein the LM317 single-chip linear power supply voltage regulator enables the output voltage range of the conversion circuit to be 1.2 to 37V, and the voltage regulation range of the power supply voltage regulator is as follows:
Figure 205470DEST_PATH_IMAGE051
（6）
in the formula (6), wherein
Figure 338511DEST_PATH_IMAGE052
Which represents the current at the regulation terminal,
Figure 204967DEST_PATH_IMAGE053
it is shown that the resistance of the regulating terminal to ground,
Figure 903802DEST_PATH_IMAGE054
representing the resistance between the regulating terminal and the output terminal, the main measuring point in the conversion circuit being
Figure 197511DEST_PATH_IMAGE055
、
Figure 552269DEST_PATH_IMAGE056
、
Figure 210697DEST_PATH_IMAGE057
、
Figure 701721DEST_PATH_IMAGE058
、
Figure 87703DEST_PATH_IMAGE059
、
Figure 946069DEST_PATH_IMAGE060
、
Figure 482224DEST_PATH_IMAGE061
、
Figure 93334DEST_PATH_IMAGE062
、
Figure 994425DEST_PATH_IMAGE063
And
Figure 323775DEST_PATH_IMAGE064
。
as a further technical scheme of the invention, the conversion circuit is also provided with a Sepic chopper converter, so that the circuit limits starting current and impact current under a continuous conduction mode.
As a further technical scheme of the invention, the converter generates three loops under the conducting state of the power MOSFET RT circuit, and a power supply and an inductor are connected
Figure 601304DEST_PATH_IMAGE065
And a power MOSFET forming a first loop circuit
Figure 801341DEST_PATH_IMAGE065
The current of which increases linearly under the supply voltage, the second loop comprising a capacitor
Figure 794705DEST_PATH_IMAGE066
Power MOSFET and inductor
Figure 955559DEST_PATH_IMAGE067
When the current of the inductor is in the capacitor
Figure 240041DEST_PATH_IMAGE066
Increased under the influence of discharge, and third loop passing through capacitor
Figure 232267DEST_PATH_IMAGE068
Supply power to the liability of the main circuit, according to
Figure 724429DEST_PATH_IMAGE069
Capacitance of
Figure 513524DEST_PATH_IMAGE068
The voltage on the capacitor is decreased and,
Figure 647702DEST_PATH_IMAGE068
when the value of (b) is greater than 10 000. Mu.F, then
Figure 25594DEST_PATH_IMAGE070
。
The invention has the beneficial and positive effects that:
the invention can automatically acquire the circuit state parameters and the operation data parameters of the inverter system; adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the power MOSFET RT turn-off state of the conversion circuit of the conversion inverter system; in a specific embodiment, after various data information in the operation of the inverter system is acquired, the mode in the circuit is adjusted according to the data information, for example, if more fault data information is acquired, whether the power mosfet is started to be turned off or not can be considered. And judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operating state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through a conversion formula.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without inventive exercise, wherein:
FIG. 1 is a schematic flow chart of an inverter system control method according to the present invention;
FIG. 2 is a schematic diagram of an inverter system control protection circuit according to the present invention;
FIG. 3 is a schematic diagram of a fault signal acquisition module circuit according to the present invention;
FIG. 4 is a schematic diagram of a conversion circuit according to the present invention;
FIG. 5 is a schematic diagram of a power MOSFET RT circuit according to the present invention;
FIG. 6 is a waveform diagram of voltage signals according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, and it should be understood that the embodiments described herein are merely for purposes of illustration and explanation, and are not intended to limit the present invention.
Example (1) method
As shown in fig. 1, an inverter system control method includes the following steps:
step one, obtaining circuit state parameters and operation data parameters of the inverter system; the feature vector of the original sample data output by the circuit of the inverter system is collected as
Figure 501706DEST_PATH_IMAGE001
The original sample data is combined with a probability density function of
Figure 965048DEST_PATH_IMAGE002
Data feature vector
Figure 591333DEST_PATH_IMAGE003
Is/are as follows
Figure 948365DEST_PATH_IMAGE004
The order accumulation is obtained by an accumulation generating function:
Figure 923274DEST_PATH_IMAGE005
（1）
in the formula (1), when
Figure 686962DEST_PATH_IMAGE006
When it is obtained
Figure 631784DEST_PATH_IMAGE007
Sum of order moments
Figure 328476DEST_PATH_IMAGE008
The cumulative amount of the steps,
Figure 5445DEST_PATH_IMAGE008
step cumulative amount through
Figure 240117DEST_PATH_IMAGE009
The order moment is calculated, r represents a constant,
Figure 67259DEST_PATH_IMAGE010
a parameter indicative of a state of the circuit,
Figure 884036DEST_PATH_IMAGE011
a parameter representing the operational data is then determined,
Figure 341693DEST_PATH_IMAGE012
representing a set of operational data parameter data;
in a specific embodiment, the data information state of the inverter system is obtained by obtaining the circuit state parameter and the operation data parameter of the inverter system, for example, besides obtaining the parameter data information during the operation of the inverter system, various data information such as the ambient environment and the like are also obtained.
Adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the power MOSFET RT turn-off state of the conversion circuit of the conversion inverter system;
in a specific embodiment, after various data information in the operation of the inverter system is acquired, the mode in the circuit is adjusted according to the data information, for example, if more fault data information is acquired, whether the power mosfet is started to be turned off or not can be considered.
Judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operation state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through a conversion formula, wherein:
the conversion formula is:
Figure 63662DEST_PATH_IMAGE071
（2）
in the formula (2), the first and second groups,
Figure 22390DEST_PATH_IMAGE072
which represents the output value of the encoder and,
Figure 896937DEST_PATH_IMAGE015
indicates fault information when
Figure 774763DEST_PATH_IMAGE016
When the voltage is larger than 1, the running state of the inverter system is recorded as a state when
Figure 921710DEST_PATH_IMAGE017
When the frequency is less than 1, the operation state of the inverter system is recorded as another state, and the data attribute of the operation state is recorded as a symbol set
Figure 243319DEST_PATH_IMAGE018
，
Figure 283956DEST_PATH_IMAGE019
Is a set
Figure 286678DEST_PATH_IMAGE020
A non-empty subset of the set of bits that are disjoint,
Figure 920922DEST_PATH_IMAGE021
fault random variation for circuit fault signals for number of subsets
Figure 283770DEST_PATH_IMAGE022
The third order cumulant derivation function is:
Figure 929646DEST_PATH_IMAGE023
（3）
in the formula (3), the first and second groups of the compound,
and setting the discrete time sequence of the characteristic signals of the collected fault circuit to be 0.
In a specific embodiment, states affecting various data information are fused into a data function formula by introducing an encoder output value so as to improve the diagnosis and application capability of circuit fault data information.
In the above embodiment, the method for acquiring the circuit state parameter includes:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating the reference state parameter of the lowest direct current bus voltage through the input voltage.
In an embodiment, the data information is not limited to the above data information.
In the above embodiment, the method for acquiring the operation data parameter includes:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating to obtain the reference state parameter of the lowest direct current bus voltage, the current, the voltage, the capacity, the generated energy of each inverter at different time periods and the irradiation value through the input voltage.
In a specific embodiment, data information of the inverter system of the photovoltaic power station can be various, the data information of the operation state of the inverter can be measured by collecting the power generation amount and the irradiation value of each inverter in different time periods, a monitoring system records and calculates the collected power generation amount and the irradiation value of all the inverters in different time periods at a certain time interval, and a user judges whether the inverter system normally operates according to the power generation total amount and the total irradiation value in the same time period; if the inverter system runs normally, ending and exiting; if the inverter system is not operated normally, the user clicks the time period in the first graph in which the inverter system is not operated normally. Therefore, for the extraction and calculation of data information, circuit state parameters of input voltage, input current, ripple data information, disturbance data information and real-time direct current bus voltage are required; and acquiring and considering the reference state parameter of the lowest direct current bus voltage through input voltage calculation.
In the above embodiment, the operation mode of the conversion circuit is adjusted by the collected circuit state parameters and operation data parameters.
In the above embodiment, the fault diagnosis function performs the circuit data information diagnosis by the following method:
when sampling fault signature
Figure 352537DEST_PATH_IMAGE024
Of the characteristic signal in the case of stationary random processes with a mean value of 0
Figure 474077DEST_PATH_IMAGE073
The order cumulant function is expressed as:
Figure 125769DEST_PATH_IMAGE074
（4）
in equation (4), of the characteristic signal
Figure 875420DEST_PATH_IMAGE027
Order cumulant and time
Figure 406895DEST_PATH_IMAGE028
Is independent of the change in (2) is hysteresis
Figure 563201DEST_PATH_IMAGE029
Function of correlation, characteristic signal
Figure 595748DEST_PATH_IMAGE030
For stationary data information, the sampled signal of the fault circuit is a characteristic signal
Figure 153899DEST_PATH_IMAGE031
Is/are as follows
Figure 590697DEST_PATH_IMAGE027
Sum of order moments
Figure 749146DEST_PATH_IMAGE027
Step cumulant, get
Figure 539378DEST_PATH_IMAGE032
Of the latter random vector
Figure 404566DEST_PATH_IMAGE027
Sum of order moments
Figure 340161DEST_PATH_IMAGE027
The order cumulates, and only
Figure 533376DEST_PATH_IMAGE033
And (4) the third-order cumulant function of the circuit characteristic signal obtained by simplification is expressed as:
Figure 579830DEST_PATH_IMAGE034
（5）
in equation (5), based on the characteristic signal
Figure 378153DEST_PATH_IMAGE027
Sum of order moments
Figure 156753DEST_PATH_IMAGE027
The order cumulant can obtain a characteristic signal
Figure 86531DEST_PATH_IMAGE035
The kurtosis and skewness of
Figure 687408DEST_PATH_IMAGE036
Obtaining the 1-dimensional slice representation skewness of the third-order cumulant
Figure 261609DEST_PATH_IMAGE037
To make the fourth order cumulative
Figure 539007DEST_PATH_IMAGE038
To obtain the kurtosis
Figure 441235DEST_PATH_IMAGE039
Obtaining the signal characteristic values of which the kurtosis and skewness are dimensionless, and diagnosing the fault of the circuit according to the parameter change of the inverter system;
degree of pass deviation
Figure 95070DEST_PATH_IMAGE040
Judging whether the probability distribution of the circuit signals of the inverter system is symmetrical or not and judging the kurtosis
Figure 523777DEST_PATH_IMAGE041
Reflecting the steepness of the probability distribution of the output signal of the inverter system, the mean value in the signal being
Figure 722808DEST_PATH_IMAGE042
Variance of
Figure 361600DEST_PATH_IMAGE043
Of gaussian random variables
Figure 491230DEST_PATH_IMAGE044
Cumulative amount of order
Figure 853073DEST_PATH_IMAGE045
。
Through the function, the fault diagnosis function can completely inhibit the influence of Gaussian noise, filter out Gaussian components in the acquired signals, and keep the higher-order moment not to be 0 completely. The data protection capability is improved by converting the data information state in the circuit.
Example (2) Circuit
As shown in fig. 2, an inverter system control protection circuit includes an inverter system, wherein the protection circuit includes:
as shown in fig. 3, the fault signal acquisition module circuit is configured to acquire fault data information during operation of the inverter system;
as shown in fig. 4, the converting circuit is used for converting and acquiring fault data information in the operation process of the inverter system;
as shown in fig. 5, the power mosfet rt circuit is used for controlling the conversion circuit to realize the conversion of the data information;
the output end of the inversion system is connected with the input end of the fault signal acquisition module circuit, the output end of the fault signal acquisition module circuit is connected with the input end of the conversion circuit, the output end of the conversion circuit is connected with the input end of the power MOSFET RT circuit, and the output end of the power MOSFET RT circuit is connected with the input end of the inversion system.
In the above embodiment, the fault signal acquisition module circuit includes an LM358DR2G chip circuit and a resistor circuit, in which an embedded controller of an STM32F407VET6 chip is connected to an embedded controller of the STM32F407VET6 chip.
In the above embodiment, according to the requirement of fault diagnosis of the system, the system controls signal generation, data acquisition and the like of hardware through software, and the main control unit of the fault diagnosis device uses an embedded controller of an STM32F407VET6 chip and is connected with an upper computer through PA11 and PA12, so as to realize communication with the upper computer. The fault signal acquisition module needs to simultaneously acquire the input and the output of the circuit to be diagnosed, and in order to acquire more sampling signals, the acquisition module selects an analog-to-digital conversion chip with 8 channels for acquisition and acquires the output signal of the fault circuit. The acquisition module circuit uses an AD7606 chip to acquire data, the module adopts 5V single power supply to supply power, 8 paths of synchronous data acquisition and parallel interfaces are integrated in the module, and acquisition channels can perform sampling at the rate of 200 Ksps. The LM358DR2G in the data acquisition channel forms a voltage follower which is used for improving input impedance, playing a role in circuit isolation, reducing circuit interference and improving sampling precision. The module chip is internally integrated with a low-noise signal conditioning circuit, and the module chip is externally provided with a protection circuit, so that the acquisition daunt can bear larger instantaneous voltage.
In the above embodiment, the conversion circuit includes an embedded controller, a main circuit power diode connected to the embedded controller, and a capacitor
Figure 534590DEST_PATH_IMAGE046
、
Figure 349093DEST_PATH_IMAGE047
Inductor
Figure 16835DEST_PATH_IMAGE048
、
Figure 482451DEST_PATH_IMAGE049
And a resistance circuit, wherein the DC input voltage of the control circuit is 28V, and the load resistance is
Figure 351181DEST_PATH_IMAGE050
The embedded controller is further connected with a power circuit and an LM317 monolithic linear power voltage regulator, wherein the LM317 monolithic linear power voltage regulator enables the output voltage range of the conversion circuit to be 1.2-37V, and the voltage regulation range of the power voltage regulator is as follows:
Figure 636669DEST_PATH_IMAGE051
（6）
in the formula (6), wherein
Figure 108102DEST_PATH_IMAGE052
Which represents the current at the regulation terminal,
Figure 241274DEST_PATH_IMAGE053
it is shown that the resistance of the regulating terminal to ground,
Figure 202277DEST_PATH_IMAGE054
representing the resistance between the regulating terminal and the output terminal, the main measuring point in the conversion circuit being
Figure 912744DEST_PATH_IMAGE055
、
Figure 254777DEST_PATH_IMAGE056
、
Figure 226144DEST_PATH_IMAGE057
、
Figure 561310DEST_PATH_IMAGE058
、
Figure 572123DEST_PATH_IMAGE059
、
Figure 775571DEST_PATH_IMAGE060
、
Figure 821019DEST_PATH_IMAGE061
、
Figure 61507DEST_PATH_IMAGE062
、
Figure 74462DEST_PATH_IMAGE063
And
Figure 301176DEST_PATH_IMAGE064
。
in the above embodiment, the converter circuit is further provided with a Sepic chopper converter, so that the circuit limits the starting current and the inrush current in the continuous conduction mode.
In the above embodiment, the power mosfet circuit generates three loops to connect the power source and the inductor when the converter is in the on state
Figure 388080DEST_PATH_IMAGE065
And a power MOSFET forming a first loop circuit
Figure 861787DEST_PATH_IMAGE065
The current of which increases linearly under the supply voltage, the second loop comprising a capacitor
Figure 909509DEST_PATH_IMAGE066
Power MOSFET and inductor
Figure 392442DEST_PATH_IMAGE067
When the current of the inductor is in the capacitor
Figure 333854DEST_PATH_IMAGE066
Increased under the influence of discharge, and third loop passing through capacitor
Figure 791511DEST_PATH_IMAGE068
Supply power to the liability of the main circuit, according to
Figure 779059DEST_PATH_IMAGE069
Capacitor
Figure 550837DEST_PATH_IMAGE068
The voltage on the capacitor is decreased and,
Figure 346754DEST_PATH_IMAGE068
when the value of (A) is more than 10 000. Mu.F,
Figure 490160DEST_PATH_IMAGE070
。
in the specific embodimentsMeasuring point
Figure 184577DEST_PATH_IMAGE055
、
Figure 946997DEST_PATH_IMAGE056
、
Figure 925317DEST_PATH_IMAGE057
、
Figure 990356DEST_PATH_IMAGE058
The peak value and the peak value of the voltage signal can reflect the hard fault type of the circuit, and the fault characteristic parameter is selected as the peak value when fault diagnosis is carried out
Figure 686917DEST_PATH_IMAGE075
Peak to peak value
Figure 987448DEST_PATH_IMAGE076
. Selecting the fault characteristic parameter as the peak value during the power MOSFET turn-off period
Figure 367745DEST_PATH_IMAGE077
、
Figure 790636DEST_PATH_IMAGE078
Peak to peak value
Figure 646597DEST_PATH_IMAGE079
And
Figure 563868DEST_PATH_IMAGE080
peak value during conduction of power MOSFET
Figure 579098DEST_PATH_IMAGE081
、
Figure 923622DEST_PATH_IMAGE082
Measuring point
Figure 266879DEST_PATH_IMAGE083
Peak value of voltage signal, measuringDot
Figure 768268DEST_PATH_IMAGE084
Peak value of voltage signal
Figure 591998DEST_PATH_IMAGE085
As a soft fault signature parameter.
A UC3843A chip is used in the control circuit, an LM317 monolithic linear power supply voltage regulator is added in the secondary power supply circuit, and the output voltage range is adjusted within a certain range. In the above embodiment, the input end of the conversion circuit is connected to a fault signal acquisition module, and the fault signal acquisition module includes an LM358DR2G chip circuit and a resistor circuit, where an embedded controller of an STM32F407VET6 chip is connected to an embedded controller of the STM32F407VET6 chip.
Carry out (3) verification
As shown in fig. 6, in order to verify the technical effects, the QT Creator 4.11.0 development tool is used for system modular programming, and the system client mainly completes analysis and calculation of data acquired by the terminal device and displays the calculation and diagnosis results to the system interactive interface. The system interface mainly comprises the functions of parameter setting of the excitation signal, control of fault feature extraction, input and output waveform display and the like.
Capacitor in experimental environment hardware circuit
Figure 356692DEST_PATH_IMAGE066
Select 50V/220
Figure 921665DEST_PATH_IMAGE086
Electrolytic capacitor, capacitor
Figure 243057DEST_PATH_IMAGE068
Select 25V/220
Figure 436140DEST_PATH_IMAGE086
Electrolytic capacitor and inductor of
Figure 43839DEST_PATH_IMAGE065
、
Figure 909158DEST_PATH_IMAGE067
All use 3A/470
Figure 283508DEST_PATH_IMAGE087
The model of the power MOSFET is IRF540, the model of the power diode is MBR3045, and the load is 10W/10
Figure 816251DEST_PATH_IMAGE088
The high power resistor.
Under the standard working condition, the data acquisition module is used for measuring the point when the circuit works normally
Figure 594852DEST_PATH_IMAGE089
、
Figure 259051DEST_PATH_IMAGE090
、
Figure 871647DEST_PATH_IMAGE091
、
Figure 445847DEST_PATH_IMAGE092
The voltage signal of (2) is collected, and the output signal waveform is shown in fig. 6. Simulating an operating data parameter fault occurring in the circuit by removing circuit elements, and calculating a fault diagnosis rate by a formula:
Figure 723245DEST_PATH_IMAGE093
（6）
in equation (6), where N represents the number of modes of operation of the circuit,
Figure 891052DEST_PATH_IMAGE095
indicating the mode of operation of a certain circuit,
Figure 951412DEST_PATH_IMAGE097
representing the total number of samples correctly diagnosed in all modes of circuit operation. Diagnosing using three systemsThe method comprises the following steps of carrying out fault diagnosis in an experimental circuit, wherein a scheme 1 is an NPC three-level inverter hybrid modeling and open-circuit fault diagnosis technology, a scheme 2 is a cold continuous rolling strip fault diagnosis technology based on a quantum particle swarm algorithm-support vector machine, comparing and analyzing the two methods with the method disclosed by the invention, and calculating the operation data parameter fault diagnosis rate of the three systems as shown in a table 1.
TABLE 1 failure diagnosis Rate for operating data parameters of three systems
Figure 708016DEST_PATH_IMAGE098
According to the calculated fault diagnosis rate, the fault diagnosis method has the highest diagnosis rate and the best fault detection effect on the operation data parameter faults in the electronic circuit. Power MOSFET open circuit, DIODE open circuit, capacitor open circuit for fault of operation data parameter
Figure 969364DEST_PATH_IMAGE066
Short circuit, capacitance
Figure 545839DEST_PATH_IMAGE068
Open circuit and inductance
Figure 675469DEST_PATH_IMAGE065
The open circuit condition, the failure diagnosis rate is 100%.
The mean fault diagnosis rate of the method of the scheme 1 for the fault of the operation data parameter in the circuit is 94%, and the fault diagnosis rate for the open circuit condition of the DIODE in the fault of the operation data parameter reaches 100%. The mean failure diagnosis rate of the method of scheme 2 for operating data parameter failures was 97.6%, where inductance occurred in the circuit
Figure 37311DEST_PATH_IMAGE065
The diagnosis rate of the open circuit condition is as high as 100 percent
Some values of the circuit state parameter interval are simulated by replacing components and series-parallel resistors, the circuit state parameters in the experimental circuit are diagnosed by using the three systems, and the diagnosis rates of the circuit state parameters of the three systems are obtained through calculation and are shown in table 2.
TABLE 2 diagnostic rates of Circuit State parameters for three systems
Figure 453249DEST_PATH_IMAGE099
The invention aims at the capacitor in the circuit state parameter
Figure 454703DEST_PATH_IMAGE066
The capacitance value is reduced by 20 to 50 percent, and the fault diagnosis rate reaches 100 percent at most. When the on-resistance of the power MOSFET is increased by 20 to 50 percent, the fault diagnosis rate is as low as 93 percent. Scheme 1 method for capacitors
Figure 201073DEST_PATH_IMAGE100
The open failure diagnosis rate is as low as 90%. When the capacitance appears
Figure 729006DEST_PATH_IMAGE101
When the capacitance value is reduced by 20 to 50 percent, and the equivalent impedance is increased by 25 to 100 percent, the fault diagnosis rate of the scheme 1 is only 88 percent, and the fault diagnosis rate of the power MOSFET when the on-resistance is increased is as low as 80 percent. The method in the scheme 1 has poor diagnosis effect on the circuit state parameters of the circuit. The mean failure diagnosis rate of the scheme 2 method on the circuit state parameters is 91.2%. For the occurrence of inductance
Figure 269840DEST_PATH_IMAGE065
Open circuit and capacitance
Figure 758591DEST_PATH_IMAGE066
The diagnostic rate is as high as 100% when the capacitance value is reduced by 50 to 80%. But is influenced by other harmonic signals in the circuit to influence the state parameters of the circuit
Figure 557919DEST_PATH_IMAGE102
And
Figure 691091DEST_PATH_IMAGE103
the failure diagnosis rate of (a) is less than 90%.
Although specific embodiments of the present invention have been described herein, it will be understood by those skilled in the art that these embodiments are by way of example only, and that various omissions, substitutions and changes in the form and details of the methods and titanium alloy apparatus described may be made by those skilled in the art without departing from the spirit and scope of the invention. For example, it is within the scope of the present invention to combine the steps of the above-described methods to perform substantially the same function in substantially the same way to achieve substantially the same result. Accordingly, the scope of the invention is to be limited only by the following claims.

Claims (9)

1. An inversion system control method is characterized in that: the method comprises the following steps:
step one, obtaining circuit state parameters and operation data parameters of the inverter system; the feature vector of the original sample data output by the circuit of the inverter system is collected as
Figure 214489DEST_PATH_IMAGE001
The original sample data is combined with a probability density function of
Figure 459526DEST_PATH_IMAGE002
Feature vector of original sample data
Figure 786733DEST_PATH_IMAGE003
Is
Figure 588467DEST_PATH_IMAGE004
The order accumulation is obtained by an cumulant generation function:
Figure 478538DEST_PATH_IMAGE005
（1）
in the formula (1), when
Figure 363317DEST_PATH_IMAGE006
When it is obtained
Figure 895930DEST_PATH_IMAGE007
Sum of order moments
Figure 376721DEST_PATH_IMAGE008
The cumulative amount of the steps,
Figure 107917DEST_PATH_IMAGE008
step cumulative amount through
Figure 914330DEST_PATH_IMAGE009
The order moment is calculated, r represents a constant,
Figure 199817DEST_PATH_IMAGE010
a parameter indicative of a state of the circuit,
Figure 264725DEST_PATH_IMAGE011
a parameter indicative of the operational data is,
Figure 804422DEST_PATH_IMAGE012
representing a set of operational data parameter data;
adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the turn-off state of a power MOSFET of the conversion circuit of the conversion inverter system;
step three, judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operation state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through k-order accumulated quantity, and the fault diagnosis function comprises the following steps:
the conversion formula is:
Figure 562163DEST_PATH_IMAGE013
（2）
in the formula (2), the first and second groups,
Figure 69367DEST_PATH_IMAGE014
which represents the output value of the encoder and,
Figure 154611DEST_PATH_IMAGE015
indicates fault information when
Figure 125978DEST_PATH_IMAGE016
When the voltage is more than 1, the running state of the inverter system is recorded as a state when
Figure 477456DEST_PATH_IMAGE017
When the current value is less than 1, the operation state of the inverter system is recorded as another state, and the data attribute of the operation state is recorded as a symbol set
Figure 534273DEST_PATH_IMAGE018
，
Figure 878667DEST_PATH_IMAGE019
Is a set
Figure 455273DEST_PATH_IMAGE020
A non-empty subset of the set of bits that are disjoint,
Figure 289237DEST_PATH_IMAGE021
fault random variable for circuit fault signal for number of subsets
Figure 256187DEST_PATH_IMAGE022
The third-order cumulant derivation function is:
Figure 466588DEST_PATH_IMAGE023
（3）
in the formula (3), the discrete time series in which the characteristic signal of the faulty circuit is collected is set to 0.
2. The inverter system control method according to claim 1, wherein: the circuit state parameter obtaining method comprises the following steps:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating the reference state parameter of the lowest direct current bus voltage through the input voltage.
3. The inverter system control method according to claim 1, wherein: the method for acquiring the operating data parameters comprises the following steps:
if an inverter system control starting instruction is received, acquiring input voltage, input current, ripple data information, disturbance data information and circuit state parameters of real-time direct current bus voltage; and calculating to obtain the reference state parameter of the lowest direct current bus voltage, the current, the voltage, the capacity, the generated energy of each inverter at different time periods and the irradiation value through the input voltage.
4. The inverter system control method according to claim 1, wherein: the fault diagnosis function realizes circuit data information diagnosis by the following method:
when sampling fault signature
Figure 350231DEST_PATH_IMAGE024
Of characteristic signals in the case of stationary random processes with a mean value of 0
Figure 102899DEST_PATH_IMAGE025
The order cumulant function is expressed as:
Figure 806413DEST_PATH_IMAGE026
（4）
in equation (4), of the characteristic signal
Figure 758188DEST_PATH_IMAGE027
Cumulative amount of order and time
Figure 309386DEST_PATH_IMAGE028
Is independent of the change in (2), is hysteresis
Figure 953994DEST_PATH_IMAGE029
Function of correlation, characteristic signal
Figure 144804DEST_PATH_IMAGE030
For stationary data information, the sampled signal of the fault circuit is a characteristic signal
Figure 447741DEST_PATH_IMAGE031
Is
Figure 571554DEST_PATH_IMAGE027
Sum of order moments
Figure 668954DEST_PATH_IMAGE027
Step cumulant, take
Figure 612640DEST_PATH_IMAGE032
Of the latter random vector
Figure 906218DEST_PATH_IMAGE027
Sum of order moments
Figure 390199DEST_PATH_IMAGE027
The order cumulates, and only
Figure 907768DEST_PATH_IMAGE033
And (4) the third-order cumulant function of the circuit characteristic signal obtained by simplification is expressed as:
Figure 73170DEST_PATH_IMAGE034
（5）
in equation (5), based on the characteristic signal
Figure 717909DEST_PATH_IMAGE027
Order moment sum
Figure 285157DEST_PATH_IMAGE027
The step-cumulant can be used to obtain a characteristic signal
Figure 176890DEST_PATH_IMAGE035
The kurtosis and skewness of
Figure 845899DEST_PATH_IMAGE036
Obtaining the 1-dimensional slice representation skewness of the third-order cumulant
Figure 543597DEST_PATH_IMAGE037
To make the fourth order cumulative
Figure 965351DEST_PATH_IMAGE038
To obtain the kurtosis
Figure 44297DEST_PATH_IMAGE039
Obtaining the signal characteristic values of which the kurtosis and skewness are dimensionless, and diagnosing the fault of the circuit according to the parameter change of the inverter system;
degree of pass deviation
Figure 918712DEST_PATH_IMAGE040
Judging whether the probability distribution of the circuit signal of the inversion system is symmetrical or not, and the kurtosis
Figure 623363DEST_PATH_IMAGE041
The steepness degree of the probability distribution of the output signal of the inverter system is reflected, and the mean value in the signal is
Figure 709743DEST_PATH_IMAGE042
Variance of
Figure 208857DEST_PATH_IMAGE043
Of Gaussian random variables
Figure 570568DEST_PATH_IMAGE027
Cumulative amount of order
Figure 813331DEST_PATH_IMAGE044
。
5. The utility model provides an inversion system control protection circuit, includes inversion system, its characterized in that: the protection circuit includes:
the fault signal acquisition module circuit is used for acquiring fault data information in the operation process of the inverter system;
acquiring circuit state parameters and operation data parameters of the inverter system; the characteristic vector of the original sample data output by the circuit of the inverter system is collected as
Figure 960410DEST_PATH_IMAGE001
The original sample data is combined with a probability density function of
Figure 427163DEST_PATH_IMAGE002
Data feature vector
Figure 541750DEST_PATH_IMAGE003
Is/are as follows
Figure 807777DEST_PATH_IMAGE045
The order accumulation is obtained by an accumulation generating function:
Figure 324209DEST_PATH_IMAGE046
（1）
in the formula (1), when
Figure 961864DEST_PATH_IMAGE006
When it is obtained
Figure 314479DEST_PATH_IMAGE047
Order moment sum
Figure 899044DEST_PATH_IMAGE008
The cumulative amount of the order is,
Figure 269982DEST_PATH_IMAGE008
step cumulative amount through
Figure 16221DEST_PATH_IMAGE009
The order moment is calculated, r represents a constant,
Figure 384361DEST_PATH_IMAGE010
a parameter indicative of a state of the circuit,
Figure 303776DEST_PATH_IMAGE011
a parameter indicative of the operational data is,
Figure 279953DEST_PATH_IMAGE048
representing a set of operational data parameter data; the conversion circuit is used for converting and acquiring fault data information in the operation process of the inverter system; adjusting the operation mode of the conversion circuit according to the circuit state parameters and the operation data parameters, wherein the operation mode controls the turn-off state of a power MOSFET of the conversion circuit of the conversion inverter system;
the power MOSFET circuit is used for controlling the conversion circuit to realize the conversion of fault data information; judging fault data information in the conversion circuit through a fault diagnosis function so as to switch or adjust the operation state of the inverter system, wherein the fault diagnosis function realizes the output conversion of the fault data information in the conversion circuit through k-order cumulant, and the fault diagnosis function comprises the following steps:
the conversion formula is:
Figure 197094DEST_PATH_IMAGE013
（2）
in the formula (2), the first and second groups of the chemical reaction are represented by the following formula,
Figure 773568DEST_PATH_IMAGE014
which represents the value of the output of the encoder,
Figure 247406DEST_PATH_IMAGE015
indicates fault information when
Figure 327358DEST_PATH_IMAGE016
When the voltage is larger than 1, the running state of the inverter system is recorded as a state when
Figure 946558DEST_PATH_IMAGE017
When the frequency is less than 1, the operation state of the inverter system is recorded as another state, and the data attribute of the operation state is recorded as a symbol set
Figure 479170DEST_PATH_IMAGE018
，
Figure 756699DEST_PATH_IMAGE019
Is a set
Figure 691157DEST_PATH_IMAGE020
A non-empty subset of the set of bits that are disjoint,
Figure 481259DEST_PATH_IMAGE021
fault random variation for circuit fault signals for number of subsets
Figure 248970DEST_PATH_IMAGE022
The third order cumulant derivation function is:
Figure 517140DEST_PATH_IMAGE023
（3）
in formula (3), setting the discrete time sequence of the characteristic signal of the fault circuit to be 0; the output end of the inverter system is connected with the input end of the fault signal acquisition module circuit, the output end of the fault signal acquisition module circuit is connected with the input end of the conversion circuit, the output end of the conversion circuit is connected with the input end of the power MOSFET circuit, and the output end of the power MOSFET circuit is connected with the input end of the inverter system.
6. The inverter system control protection circuit of claim 5, wherein: the fault signal acquisition module circuit comprises an embedded controller of an STM32F407VET6 chip, an LM358DR2G chip circuit and a resistor circuit, wherein the LM358DR2G chip circuit is connected with the embedded controller of the STM32F407VET6 chip.
7. The inverter system control protection circuit of claim 5, wherein: the conversion circuit comprises an embedded controller, a main circuit power diode connected with the embedded controller, and a capacitor
Figure 571684DEST_PATH_IMAGE049
、
Figure 80157DEST_PATH_IMAGE050
Inductor
Figure 587361DEST_PATH_IMAGE051
、
Figure 393643DEST_PATH_IMAGE052
And a resistance circuit, wherein the DC input voltage of the conversion circuit is 28V, and the load resistance is
Figure 568273DEST_PATH_IMAGE053
The embedded controller is also connected with a power circuit and an LM317 monolithic linear power voltage regulator, wherein the LM317 monolithic linear power voltage regulator ensures that the output voltage range of the conversion circuit ranges from 1.2 to 37V, and the power voltage regulatorThe voltage regulation range of (a) is:
Figure 982068DEST_PATH_IMAGE054
（6）
in the formula (6), wherein
Figure 242148DEST_PATH_IMAGE055
Which represents the current at the regulation terminal,
Figure 852121DEST_PATH_IMAGE056
indicating that the tuning terminal is resistive to ground,
Figure 631989DEST_PATH_IMAGE057
representing the resistance between the regulated terminal and the output terminal.
8. The inverter system control protection circuit of claim 5, wherein: the conversion circuit is also provided with a Sepic chopper conversion circuit, so that the circuit limits starting current and impact current under a continuous conduction mode.
9. The inverter system control protection circuit of claim 5, wherein: the conversion circuit generates three loops to connect the power supply and the inductor in the on state of the power MOSFET circuit
Figure 403636DEST_PATH_IMAGE058
And a power MOSFET forming a first loop circuit
Figure 151012DEST_PATH_IMAGE058
The current of which increases linearly under the supply voltage, the second loop comprising a capacitor
Figure 564676DEST_PATH_IMAGE059
Power MOSFET and inductor
Figure 992859DEST_PATH_IMAGE060
At this time, the inductor
Figure 466565DEST_PATH_IMAGE060
Current in the capacitor
Figure 170079DEST_PATH_IMAGE059
Increased under the influence of discharge, and the third loop passing through the capacitor
Figure 872587DEST_PATH_IMAGE061
Power is supplied to the load of the main circuit.
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