CN115064566A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN115064566A
CN115064566A CN202210653512.2A CN202210653512A CN115064566A CN 115064566 A CN115064566 A CN 115064566A CN 202210653512 A CN202210653512 A CN 202210653512A CN 115064566 A CN115064566 A CN 115064566A
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sub
transistor
display panel
pixel
pixels
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CN202210653512.2A
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Chinese (zh)
Inventor
乐琴
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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Priority to CN202210653512.2A priority Critical patent/CN115064566A/en
Publication of CN115064566A publication Critical patent/CN115064566A/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention provides a display panel and a display device, wherein a shielding layer in the display panel receives a fixed voltage signal, in the direction vertical to the plane of the display panel, the orthographic projection of the shielding layer and the orthographic projection of a second part of a semiconductor layer have a first overlapping region, the coupling between a grid electrode and a first electrode of a driving transistor is reduced through the shielding layer, the areas of the first overlapping regions are different based on different sub-pixels, namely the areas of the first overlapping regions which are different are designed aiming at different sub-pixels, the coupling between the grid electrode and the first electrode of the driving transistor can be effectively reduced through the shielding layer in each sub-pixel, the stability of the driving transistor in each sub-pixel is further improved, the brightness of each sub-pixel in the first frame display tends to be infinite and consistent, and the display effect of the display panel is finally improved.

Description

Display panel and display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the continuous development of scientific technology, modern society has entered informatization and developed towards intellectualization, and display is a key link for realizing information exchange and intellectualization; among the display technologies, the OLED (Organic Light-Emitting Diode) display technology is considered as a next generation display technology with subversiveness. The OLED display technology is a device for generating electroluminescence by utilizing a multi-layer organic thin film structure, the manufacturing process is simple, only lower driving voltage is needed, and the main characteristics make the OLED very prominent in meeting the application of a display panel; compared with an LCD (Liquid Crystal Display) Display panel, the OLED Display panel has the advantages of being lighter, thinner, high in brightness, low in power consumption, fast in response, high in definition, good in flexibility, high in luminous efficiency and the like, and can meet new requirements of consumers on Display technologies.
However, the conventional OLED display panel has a problem that the luminance of the first frame of the RGB three-color sub-pixels is not uniform, which causes white image smear and color cast, and further affects the display effect of the display panel.
Disclosure of Invention
In view of the above, to solve the above problems, the present invention provides a display panel and a display device, and the technical solution is as follows:
a display panel, the display panel comprising: a plurality of sub-pixels;
the sub-pixel includes:
the pixel circuit comprises a driving transistor and a data writing transistor, wherein the driving transistor is used for providing driving current for the light-emitting element, and the data writing transistor is used for providing data signals for the driving transistor;
the pixel circuit further includes a semiconductor layer including a first portion as an active layer of the data writing transistor and a second portion through which a first electrode of the driving transistor is electrically connected to a first electrode of the data writing transistor, and a shielding layer;
the shielding layer receives a fixed voltage signal, and in a direction perpendicular to a plane of the display panel, an orthographic projection of the shielding layer and an orthographic projection of the second part have a first overlapping area;
the plurality of sub-pixels include: a plurality of first sub-pixels and a plurality of second sub-pixels, an area of the first overlapping region in the first sub-pixels being larger than an area of the first overlapping region in the second sub-pixels.
A display device comprises the display panel.
Compared with the prior art, the invention has the following beneficial effects:
the shielding layer in the display panel provided by the invention receives a fixed voltage signal, in the direction perpendicular to the plane of the display panel, the orthographic projection of the shielding layer and the orthographic projection of the second part of the semiconductor layer have a first overlapping region, the coupling between the grid electrode of the driving transistor and the first electrode is reduced through the shielding layer, the areas of the first overlapping regions are different based on different sub-pixels, namely the areas of the first overlapping regions which are different are designed aiming at different sub-pixels, the coupling between the grid electrode of the driving transistor and the first electrode can be effectively reduced through the shielding layer in each sub-pixel, the stability of the driving transistor in each sub-pixel is further improved, the brightness of each sub-pixel in the first frame display tends to be infinite and consistent, and the display effect of the display panel is finally improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic diagram of an RGB gray scale efficiency curve according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 3 is a diagram of a sub-pixel according to an embodiment of the present invention;
fig. 4 is a schematic circuit layout diagram of a sub-pixel provided in an embodiment of the present invention;
fig. 5 is a schematic diagram of a partial circuit layout of a sub-pixel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating a layout comparison of two sub-pixels according to an embodiment of the present invention;
fig. 7 is a schematic diagram illustrating a layout comparison of a part of circuits of three sub-pixels according to an embodiment of the present invention;
FIG. 8 is a diagram of another sub-pixel according to an embodiment of the present invention;
fig. 9 is a schematic circuit layout diagram of a second plate as a shielding layer and a second portion according to an embodiment of the present invention;
FIG. 10 is a diagram of another sub-pixel provided in accordance with an embodiment of the present invention;
fig. 11 is a schematic diagram of a partial circuit layout of another sub-pixel provided in the embodiment of the present invention;
FIG. 12 is a schematic diagram illustrating a layout comparison of two sub-pixels according to an embodiment of the present invention;
fig. 13 is a schematic diagram illustrating a layout comparison of a part of circuits of three sub-pixels according to an embodiment of the present invention;
FIG. 14 is a diagram of another sub-pixel provided in accordance with an embodiment of the present invention;
FIG. 15 is a diagram of another sub-pixel provided in accordance with an embodiment of the present invention;
FIG. 16 is a diagram of another sub-pixel provided in accordance with an embodiment of the present invention;
FIG. 17 is a diagram of another sub-pixel provided in accordance with an embodiment of the present invention;
fig. 18 is a schematic structural diagram of a display device according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
Based on the content recorded in the background art, referring to fig. 1, fig. 1 is a schematic diagram of an RGB gray scale efficiency curve provided by an embodiment of the present invention, in which a curve 1 represents a gray scale efficiency curve of an R sub-pixel, a curve 2 represents a gray scale efficiency curve of a G sub-pixel, and a curve 3 represents a gray scale efficiency curve of a B sub-pixel, as can be seen from the schematic diagram of the RGB gray scale efficiency curve shown in fig. 1, the efficiency is reduced under low luminance, and under the same current density, as the luminance is reduced, the B sub-pixel is reduced first, and the variation trends of the R sub-pixel and the G sub-pixel are relatively consistent; therefore, the brightness of the RGB sub-pixels is inconsistent during the first frame display, which causes white image smear and color cast, and further affects the display effect of the display panel.
Based on the invention, the RGB three-color sub-pixels are adjusted to solve the technical problems in the prior art and improve the final display effect of the display panel.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a display panel according to an embodiment of the present invention, where the display panel includes: a plurality of sub-pixels 11, in order to realize a full-color display of the display panel, the plurality of sub-pixels 11 may optionally include a sub-pixel for emitting green light, a sub-pixel for emitting blue light, and a sub-pixel for emitting red light.
Referring to fig. 3, fig. 3 is a schematic diagram of a sub-pixel according to an embodiment of the present invention, where the sub-pixel 11 includes: a pixel circuit 12 and a light emitting element Q, the pixel circuit 12 including a driving transistor T1 and a data writing transistor 72, the driving transistor T1 for supplying a driving current to the light emitting element Q, and the data writing transistor T2 for supplying a data signal Vdata to the driving transistor T1.
In the data writing stage, the control signal S1 received by the gate of the data writing transistor T2 is a pulse signal, and the control signal S1 outputs an active pulse to control the data writing transistor T2 to be in a conducting state, so that the data signal Vdata is written into the gate of the driving transistor through at least the data writing transistor T2.
The driving transistor T1 is coupled to the light emitting element Q, the driving transistor T1 generates a corresponding driving current based on the data signal Vdata, and transmits the driving current to the light emitting element Q, and the light emitting element Q emits light based on the driving current.
It should be noted that, in the embodiment of the present invention, one end of the gate of the driving transistor T1 is defined as a first node N1, and a connection point of the driving transistor T1 and the data transistor T2 is defined as a second node N2.
Referring to fig. 4, fig. 4 is a circuit layout schematic diagram of a sub-pixel provided in an embodiment of the present invention, referring to fig. 5, fig. 5 is a partial circuit layout schematic diagram of a sub-pixel provided in an embodiment of the present invention, the pixel circuit further includes a semiconductor layer 14 and a shielding layer 13, the semiconductor layer 14 includes a first portion 141 and a second portion 142, the first portion 141 serves as an active layer of the data writing transistor T2, the first pole of the driving transistor T1 is electrically connected to the first pole of the data writing transistor T2 through the second portion 141, and at this time, the second portion T2 may be understood as a partial position in the circuit layout where the second node N2 is located.
The shielding layer 13 receives a fixed voltage signal, and in a direction perpendicular to a plane of the display panel, an orthogonal projection of the shielding layer 13 and an orthogonal projection of the second portion 142 have a first overlapping area.
Referring to fig. 6, fig. 6 is a schematic diagram illustrating a layout comparison of two sub-pixels according to an embodiment of the present invention, where the plurality of sub-pixels 11 include: a plurality of first sub-pixels 11a and a plurality of second sub-pixels 11b, an area of the first overlapping region in the first sub-pixels 11a being larger than an area of the first overlapping region in the second sub-pixels 11 b.
For example, as shown in fig. 6, the area of the first overlapping region in the first sub-pixel 11a is the entire area of the second portion 142, and the area of the first overlapping region in the second sub-pixel 11b is half the area in the width direction of the second portion 142.
Specifically, the driving current Ids generated by the driving transistor T1 based on the data signal Vdata is:
Ids＝K*(V N2 -V N1 -|Vth|) 2 ＝K*(PVDD-V N1 -|Vth|) 2
wherein K is the current coefficient; v N2 Is the voltage of the second node N2; v N1 The voltage of the first node N1, Vth is the threshold voltage of the driving transistor T1.
Specifically, in the inventive process of the present invention, it is found that when the alignment relationship between the shielding layer 13 and the semiconductor layer 14 is not designed, a coupling capacitance is formed between the first node N1 and the second node N2; during the first frame display, the display panel is lighted from the black state, specifically:
present in the black state display: v N1 ＝V data +Vth，V N2 PVDD; the first node N1 is at a high potential of about 4.5V; wherein, V data PVDD is a first power supply voltage, about 4.6V, for the data voltage.
Before the white display of the first frame, the gate of the driving transistor T1 is first reset, that is, there are: v N1 ＝V REF (ii) a The first node N1 is changed from high to low at about-4.5V, and accordingly the second node N2 is pulled low at about-4.4V due to the coupling between the first node N1 and the second node N2; wherein, V REF Is the gate reset voltage of the driving transistor T1.
Next, a data signal Vdata is written to the gate of the driving transistor T1, that is, there is: v N2 ＝V data (ii) a The second node N2 changes from low to high at this time, which is about 3V, and accordingly the first node N1 is pulled high at this time, which is about 2.9V, due to the coupling between the first node N1 and the second node N2.
In the process of performing the white picture display of the first frame, there are: v N1 ＝V data +Vth，V N2 PVDD; the first node N1 is low, about 1.5V; the potential of the second node N2 is about 4.6V.
Before the white frame display of the second frame, the gate of the driving transistor T1 is also reset, that is, there are: v N1 ＝V REF (ii) a The first node N1 is changed from high to low, about-4.5V, accordingly due to the coupling between the first node N1 and the second node N2At this time, the potential of the second node N2 is also pulled low, about-1.4V.
Next, a data signal Vdata is written to the gate of the driving transistor T1, that is, there is: v N2 ＝V data (ii) a At this time, the second node N2 changes from low to high, about 3V, and accordingly, due to the coupling between the first node N1 and the second node N2, the potential of the first node N1 is also pulled high, about-0.1V.
Therefore, the voltage of the first node N1 when displaying the first frame white is greater than the voltage of the first node N1 when displaying the second frame white, which results in the driving current when displaying the first frame white being less than the driving current when displaying the second frame white, and further results in the brightness of the first frame being low.
Based on this, the display panel provided by the embodiment of the invention improves the sub-pixels, wherein the shielding layer 13 receives a fixed voltage signal, and in the direction perpendicular to the plane of the display panel, the front projection of the shielding layer 13 and the front projection of the second portion 142 of the semiconductor layer 14 have a first overlapping region, the coupling between the gate and the first pole of the driving transistor T1 is reduced by the shielding layer 13, and the area of the first overlapping region is made different based on different sub-pixels, for example, the area of the first overlapping region in the B sub-pixel shown in fig. 1 may be larger than the area of the first overlapping region in the R sub-pixel, or larger than the area of the first overlapping region in the G sub-pixel, that is, the area of the first overlapping region different from the sub-pixel design for different gray scale efficiencies, so as to ensure that the shielding layer 13 in each sub-pixel can effectively reduce the coupling between the gate and the first pole of the driving transistor T1, that is, the coupling between the first node N1 and the second node N2 is reduced, and the stability of the driving transistor T1 in each sub-pixel is further improved, so that the brightness of each sub-pixel in the first frame display is infinitely consistent, and finally the display effect of the display panel is improved.
Optionally, in another embodiment of the present invention, referring to fig. 7, fig. 7 is a schematic diagram illustrating a comparison of a partial circuit layout of three sub-pixels according to an embodiment of the present invention, where the plurality of sub-pixels further include: and a plurality of third sub-pixels 11 c.
The area of the first overlap region in the third sub-pixel 11c is equal to the area of the first overlap region in the second sub-pixel 11 b.
Specifically, as can be seen from the RGB gray scale efficiency curve diagram shown in fig. 1, the efficiency is reduced under low luminance, and the B sub-pixel is reduced first along with the reduction of luminance under the same current density, and the variation trends of the R sub-pixel and the G sub-pixel are relatively consistent; therefore, in the embodiment of the present invention, a B sub-pixel is taken as the first sub-pixel 11a, an R sub-pixel is taken as the second sub-pixel 11B, and a G sub-pixel is taken as the third sub-pixel 11c for example, at this time, in order to ensure that the luminance of the RGB three-color sub-pixels in the first frame is infinitely consistent, in the embodiment of the present invention, the area of the first overlapping region in the first sub-pixel 11a is made larger than the area of the first overlapping region in the second sub-pixel 11B and larger than the area of the first overlapping region in the third sub-pixel 11 c.
In order to simplify the design of the sub-pixels in the display panel, the area of the first overlapping region in the third sub-pixel 11c is made equal to the area of the first overlapping region in the second sub-pixel 11b in the embodiment of the present invention.
For example, the area of the first overlapping region in the first sub-pixel 11a is the entire area of the second portion 142, the area of the first overlapping region in the second sub-pixel 11b is half the area in the width direction of the second portion 142, and the area of the first overlapping region in the third sub-pixel 11c is also half the area in the width direction of the second portion 142.
Optionally, in another embodiment of the present invention, as shown in fig. 3 and 4, the pixel circuit 12 further includes: a power signal line.
The power signal line is used for providing the fixed voltage signal.
Specifically, the fixed voltage signal is the first power voltage PVDD, that is, in the embodiment of the present invention, the shield layer 13 is directly provided with the required fixed voltage signal based on the connection between the existing power signal line in the sub-pixel and the shield layer 13, and no additional signal line is required, so that the wiring manner of the display panel can be simplified.
Optionally, in another embodiment of the present invention, referring to fig. 8, fig. 8 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: a storage capacitor C1.
The storage capacitor C1 includes a first plate and a second plate.
The first plate is electrically connected to the gate of the driving transistor T1, and the second plate is electrically connected to the power signal line.
Specifically, the first plate is multiplexed as the gate of the driving transistor T1; referring to fig. 9, fig. 9 is a circuit layout diagram of a second plate as a shielding layer and a second part, where the second plate is multiplexed as the shielding layer 13, and the second plate includes a third part 131 and a fourth part 132 when serving as the shielding layer 13 according to an embodiment of the present invention.
In a direction perpendicular to the plane of the display panel, the orthographic projection of the third portion 131 completely overlaps with the orthographic projection of the first plate, and the orthographic projection of the fourth portion 132 has an overlapping region with the orthographic projection of the second portion 142.
In this embodiment, the first plate of the storage capacitor C1 is multiplexed as the gate of the driving transistor T1, the second plate is multiplexed as the shielding layer 13, the orthogonal projection of the third portion 131 completely overlaps the orthogonal projection of the first plate by modifying the second plate, the orthogonal projection of the fourth portion 132 has an overlapping region with the orthogonal projection of the second portion 142, that is, the region of the second plate for functioning as the shielding layer 13 is the region where the fourth portion 132 is located, and the region of the third portion 131 opposite to the first plate serves as the effective region of the storage capacitor C1.
That is, in the embodiment of the present application, the second plate is modified to serve as the shielding layer 13 based on the existing storage capacitor C1 in the sub-pixel, so that the front projection of the fourth portion 132 and the front projection of the second portion 142 have an overlapping region, that is, the coupling between the gate and the first electrode of the driving transistor T1, that is, the coupling between the first node N1 and the second node N2, can be effectively reduced, and further, the stability of the driving transistor T1 in each sub-pixel is improved, so that the brightness of each sub-pixel in the first frame display tends to be infinitely consistent, and finally, the display effect of the display panel is improved.
Optionally, in another embodiment of the present invention, referring to fig. 10, fig. 10 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: a first transistor T3; a first pole of the first transistor T3 receives the fixed voltage signal, i.e., the first power supply voltage PVDD.
Referring to fig. 11, fig. 11 is a schematic circuit layout diagram of another sub-pixel provided in the embodiment of the present invention, where the semiconductor layer 14 further includes a third portion 143 and a fourth portion 144, and the third portion 143 is used as an active layer of the first transistor T3.
The first pole of the driving transistor T1 is electrically connected to the second pole of the first transistor T3 through the fourth portion 144.
As shown in fig. 11, the second portion 142 and the fourth portion 144 extend along the first direction X, and one end of the second portion 142 is connected to one end of the fourth portion 144.
The first portion 141 is located at an end of the second portion 142 away from the fourth portion 144, and the third portion 143 is located at an end of the fourth portion 144 away from the second portion 142.
Since the first pole of the driving transistor T1 is connected to the data writing transistor T2 through the second portion 142 and to the first transistor T3 through the fourth portion 144, a region where the second portion 142 and the fourth portion 144 are located together can be understood as a position where the second node N2 is located in the circuit layout.
At this time, in a direction perpendicular to the plane of the display panel, an orthogonal projection of the shielding layer 13 and an orthogonal projection of the fourth portion 144 have a second overlapping area.
Referring to fig. 12, fig. 12 is a schematic diagram illustrating a layout comparison of two types of sub-pixels according to an embodiment of the present invention, where the plurality of sub-pixels include: a plurality of first sub-pixels 11a and a plurality of second sub-pixels 11b, an area of the second overlapping region in the first sub-pixels 11a being larger than an area of the second overlapping region in the second sub-pixels 11 b.
For example, the area of the second overlapping region in the first sub-pixel 11a is the entire area of the fourth portion 144, and the area of the second overlapping region in the second sub-pixel 11b is half the area of the fourth portion 144 in the width direction.
Optionally, in another embodiment of the present invention, referring to fig. 13, fig. 13 is a schematic diagram illustrating a comparison of a partial circuit layout of three sub-pixels according to an embodiment of the present invention, where the plurality of sub-pixels further include: and a plurality of third sub-pixels 11 c.
The area of the second overlapping area in the third sub-pixel 11c is equal to the area of the second overlapping area in the second sub-pixel 11 b.
Specifically, as can be seen from the RGB gray scale efficiency curve diagram shown in fig. 1, the efficiency is reduced under low luminance, and the B sub-pixel is reduced first along with the reduction of luminance under the same current density, and the variation trends of the R sub-pixel and the G sub-pixel are relatively consistent; therefore, in the embodiment of the present invention, a B sub-pixel is taken as the first sub-pixel 11a, an R sub-pixel is taken as the second sub-pixel 11B, and a G sub-pixel is taken as the third sub-pixel 11c for example, at this time, in order to ensure that the luminance of the RGB three-color sub-pixels in the first frame is infinitely consistent, in the embodiment of the present invention, the area of the second overlapping region in the first sub-pixel 11a is made larger than the area of the second overlapping region in the second sub-pixel 11B and larger than the area of the second overlapping region in the third sub-pixel 11 c.
In order to simplify the design of the sub-pixels in the display panel, the area of the second overlapping region in the third sub-pixel 11c is made equal to the area of the second overlapping region in the second sub-pixel 11b in the embodiment of the present invention.
For example, the area of the second overlapping region in the first sub-pixel 11a is the entire area of the fourth portion 144, the area of the second overlapping region in the second sub-pixel 11b is half the area of the fourth portion 144 in the width direction, and the area of the second overlapping region in the third sub-pixel 11c is also half the area of the fourth portion 144 in the width direction.
Note that the width direction of the second portion 142 and the width direction of the fourth portion 144 are perpendicular to the first direction X.
That is, the display panel provided by the embodiment of the invention improves the sub-pixels, wherein the shielding layer 13 receives the fixed voltage signal, and in the direction perpendicular to the plane of the display panel, the front projection of the shielding layer 13 and the front projection of the second portion 142 of the semiconductor layer 14 have a first overlapping region, and the front projection of the fourth portion 144 of the semiconductor layer 14 has a second overlapping region, so as to cover the second node N2 as omnidirectionally as possible, thereby reducing the coupling between the gate and the first pole of the driving transistor T1 to the greatest extent, and making the total area of the first overlapping region and the second overlapping region different based on different sub-pixels, for example, as shown in fig. 1, the total area of the first overlapping region and the second overlapping region in the B sub-pixel may be larger than the total area of the first overlapping region and the second overlapping region in the R sub-pixel, or larger than the total area of the first overlapping region and the second overlapping region in the G sub-pixel, that is to say, the total areas of the first overlapping region and the second overlapping region which are different are designed for the sub-pixels with different gray scale efficiencies, so that the shielding layer 13 in each sub-pixel can effectively reduce the coupling between the gate of the driving transistor T1 and the first electrode, that is, the coupling between the first node N1 and the second node N2, and further improve the stability of the driving transistor T1 in each sub-pixel, so that the brightness of each sub-pixel in the first frame display tends to be infinite and consistent, and finally the display effect of the display panel is improved.
Optionally, in another embodiment of the present invention, referring to fig. 14, fig. 14 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: and a second transistor T4.
A first pole of the second transistor T4 is electrically connected to a second pole of the driving transistor T1, and a second pole of the second transistor T4 is electrically connected to an anode of the light emitting element Q.
Specifically, in this embodiment, the first transistor T3 and the second transistor T4 serve as two light emission control transistors of the pixel circuit 12 for controlling the light emitting element Q to emit light, gates of the first transistor T3 and the second transistor T4 receive the control signal S2 at the same time, and the second transistor T4 is in an on state or an off state under the control of the control signal S2; the control signal S2 received by the gate of the second transistor T4 is a pulse signal, and in the light emitting stage, the control signal S2 outputs an active pulse to control the second transistor T4 to be in the on state, so that the driving current provided by the driving transistor T1 flows into the light emitting element Q to cause it to emit light; in the non-light emitting period, the control signal S2 outputs an inactive pulse to control the second transistor T4 to be in an off state, and the light emitting element Q does not emit light.
Optionally, in another embodiment of the present invention, referring to fig. 15, fig. 15 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: the transistor T5 is compensated.
The first pole of the compensation transistor T5 is electrically connected to the second pole of the driving transistor T1, and the second pole of the compensation transistor T5 is electrically connected to the gate of the driving transistor T1.
Specifically, the compensation transistor T5 is used to compensate the threshold voltage of the driving transistor T1; the first pole of the compensation transistor T5 is electrically connected to the second pole of the driving transistor T1, the second pole of the compensation transistor T5 is electrically connected to the gate of the driving transistor T1, and the gate of the compensation transistor T5 is configured to receive the control signal S1. The control signal S1 received by the compensation transistor T5 is a pulse signal, and an active pulse of the control signal S1 controls the compensation transistor T5 to be in a conducting state to compensate the threshold voltage of the driving transistor T1; the inactive pulse of the control signal S1 controls the compensation transistor T5 to be in an off state. Accordingly, the compensation transistor T5 selectively compensates the threshold voltage of the driving transistor T1 under the control of the control signal S1.
Optionally, in another embodiment of the present invention, referring to fig. 16, fig. 16 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: the first reset transistor T6.
A first pole of the first reset transistor T6 receives a first reset signal V REF1 And a second pole of the first reset transistor T6 is electrically connected to the gate of the driving transistor T1.
In particular, a first resetA first electrode of the transistor T6 receives the first reset signal V REF1 The second pole of the first reset transistor T6 is electrically connected to the gate of the driving transistor T1, and the gate of the first reset transistor T6 is configured to receive the control signal S3. The control signal S3 received by the first reset transistor T6 is a pulse signal, and the active pulse of the control signal S3 controls the first reset transistor T6 to be in a conducting state, so as to reset the gate of the driving transistor T1; the inactive pulse of the control signal S3 controls the first reset transistor T6 to be in an off state.
Optionally, in another embodiment of the present invention, referring to fig. 17, fig. 17 is a schematic diagram of another sub-pixel provided in the embodiment of the present invention, where the pixel circuit 12 further includes: and a second reset transistor T7.
A first pole of the second reset transistor T7 receives a second reset signal V REF2 A second electrode of the second reset transistor T7 is electrically connected to an anode of the light emitting element Q.
Specifically, the first pole of the second reset transistor T7 is used for receiving the second reset signal V REF2 A second pole of the second reset transistor T7 is electrically connected to the anode of the light emitting element Q, and a gate of the second reset transistor T7 is configured to receive the control signal S2. The control signal S2 received by the second reset transistor T7 is a pulse signal, and the active pulse of the control signal S2 controls the second reset transistor T7 to be in a conducting state, so as to reset the anode of the light emitting element Q; the inactive pulse of the control signal S2 controls the second reset transistor T7 to be in an off state.
The cathode of the light emitting element Q is connected to the second power voltage terminal for receiving the second power voltage PVEE.
Optionally, based on all the above embodiments of the present invention, in another embodiment of the present invention, a display device is further provided, referring to fig. 18, and fig. 18 is a schematic structural diagram of the display device provided in the present invention.
The display device 100 includes the display panel according to the above embodiments of the present application.
The display device 100 includes, but is not limited to, a display device such as a mobile phone or a flat panel, and the display device has at least the same technical effects as the display panel.
The display panel and the display device provided by the present invention are described in detail above, and the principle and the embodiment of the present invention are explained in detail herein by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (15)

1. A display panel, comprising: a plurality of sub-pixels;
the sub-pixel includes:
the pixel circuit comprises a driving transistor and a data writing transistor, wherein the driving transistor is used for providing driving current for the light-emitting element, and the data writing transistor is used for providing data signals for the driving transistor;
the pixel circuit further includes a semiconductor layer including a first portion as an active layer of the data writing transistor and a second portion through which a first pole of the driving transistor is electrically connected to a first pole of the data writing transistor, and a shielding layer;
the shielding layer receives a fixed voltage signal, and in a direction perpendicular to a plane of the display panel, an orthographic projection of the shielding layer and an orthographic projection of the second part have a first overlapping area;
the plurality of sub-pixels include: a plurality of first sub-pixels and a plurality of second sub-pixels, an area of the first overlapping region in the first sub-pixels being larger than an area of the first overlapping region in the second sub-pixels.
2. The display panel of claim 1, wherein the plurality of sub-pixels further comprises: a plurality of third sub-pixels;
the area of the first overlap region in the third sub-pixel is equal to the area of the first overlap region in the second sub-pixel.
3. The display panel according to claim 1, wherein the pixel circuit further comprises: a power supply signal line;
the power signal line is used for providing the fixed voltage signal.
4. The display panel according to claim 3, wherein the pixel circuit further comprises: a storage capacitor;
the storage capacitor comprises a first polar plate and a second polar plate;
the first plate is electrically connected to the gate of the driving transistor, and the second plate is electrically connected to the power signal line.
5. The display panel according to claim 4, wherein the second plate is multiplexed as the shielding layer, the second plate comprising a third portion and a fourth portion;
in a direction perpendicular to a plane of the display panel, an orthogonal projection of the third portion completely overlaps an orthogonal projection of the first polar plate, and an orthogonal projection of the fourth portion has an overlapping region with an orthogonal projection of the second portion.
6. The display panel of claim 4, wherein the first plate is multiplexed as a gate of the driving transistor.
7. The display panel according to claim 1, wherein the pixel circuit further comprises: a first transistor;
the first electrode of the first transistor receives the fixed voltage signal, the semiconductor layer further comprises a third part and a fourth part, and the third part is used as an active layer of the first transistor;
the first pole of the driving transistor is electrically connected to the second pole of the first transistor through the fourth portion.
8. The display panel according to claim 7, wherein the second portion and the fourth portion each extend in a first direction, and one end of the second portion is connected to one end of the fourth portion;
the first portion is located at one end of the second portion, which is far away from the fourth portion, and the third portion is located at one end of the fourth portion, which is far away from the second portion.
9. The display panel of claim 8, wherein the orthographic projection of the shielding layer and the orthographic projection of the fourth portion have a second overlapping area in a direction perpendicular to the plane of the display panel;
the plurality of sub-pixels include: a plurality of first sub-pixels and a plurality of second sub-pixels, an area of the second overlapping region in the first sub-pixels being larger than an area of the second overlapping region in the second sub-pixels.
10. The display panel of claim 9, wherein the plurality of sub-pixels further comprises: a plurality of third sub-pixels;
the area of the second overlap region in the third sub-pixel is equal to the area of the second overlap region in the second sub-pixel.
11. The display panel according to claim 1, wherein the pixel circuit further comprises: a second transistor;
a first electrode of the second transistor is electrically connected to a second electrode of the driving transistor, and a second electrode of the second transistor is electrically connected to an anode of the light-emitting element.
12. The display panel according to claim 1, wherein the pixel circuit further comprises: a compensation transistor;
the first pole of the compensation transistor is electrically connected with the second pole of the driving transistor, and the second pole of the compensation transistor is electrically connected with the grid electrode of the driving transistor.
13. The display panel according to claim 1, wherein the pixel circuit further comprises: a first reset transistor;
a first pole of the first reset transistor receives a first reset signal, and a second pole of the first reset transistor is electrically connected to the gate of the driving transistor.
14. The display panel according to claim 1, wherein the pixel circuit further comprises: a second reset transistor;
a first pole of the second reset transistor receives a second reset signal, and a second pole of the second reset transistor is electrically connected to an anode of the light emitting element.
15. A display device characterized in that it comprises a display panel according to any one of claims 1 to 14.
CN202210653512.2A 2022-06-10 2022-06-10 Display panel and display device Pending CN115064566A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115440162A (en) * 2022-11-09 2022-12-06 惠科股份有限公司 Display panel and display device
CN115933232A (en) * 2022-10-25 2023-04-07 武汉华星光电半导体显示技术有限公司 Display panel and display device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115933232A (en) * 2022-10-25 2023-04-07 武汉华星光电半导体显示技术有限公司 Display panel and display device
WO2024087713A1 (en) * 2022-10-25 2024-05-02 武汉华星光电半导体显示技术有限公司 Display panel and display device
CN115440162A (en) * 2022-11-09 2022-12-06 惠科股份有限公司 Display panel and display device
US11967282B2 (en) 2022-11-09 2024-04-23 HKC Corporation Limited Display panel and display device

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