CN115051893A

CN115051893A - Parameter setting method, parameter setting apparatus, and non-transitory readable storage medium

Info

Publication number: CN115051893A
Application number: CN202210463035.3A
Authority: CN
Inventors: 魏家徵; 魏述琦; 于梁
Original assignee: Beijing Eswin Computing Technology Co Ltd; Haining Eswin IC Design Co Ltd
Current assignee: Beijing Eswin Computing Technology Co Ltd; Haining Eswin IC Design Co Ltd
Priority date: 2022-04-28
Filing date: 2022-04-28
Publication date: 2022-09-13

Abstract

A parameter setting method, a parameter setting apparatus, and a readable storage medium. The parameter setting device is in communication connection with the multistage continuous time linear equalizer and comprises an initial module, an input module, an acquisition module and a setting module. The initialization module initializes a plurality of parameters of the multistage continuous time linear equalizer; the input module inputs a first data sequence to the multistage continuous time linear equalizer; the acquisition module acquires a second data sequence output from the multistage continuous time linear equalizer; the setting module sets a plurality of parameters based on the first data sequence and the second data sequence. The plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors. By comparing the first data sequence with the second data sequence, a plurality of parameters, such as inductance values and the like, of the multistage CTLE are adaptively adjusted, so that the multistage CTLE structure achieves better performance, intersymbol interference is effectively reduced, signal quality of a receiving end is improved, and power consumption and occupied area are reduced.

Description

Parameter setting method, parameter setting apparatus, and non-transitory readable storage medium

Technical Field

Embodiments of the present disclosure relate to a parameter setting method, a parameter setting apparatus, and a non-transitory readable storage medium.

Background

With the development of society, new technologies such as 5G, virtual reality, artificial intelligence and the like are continuously evolving, the demand of mass data on bandwidth is continuously rising, and high bandwidth depends on high-speed signals to perform data communication, exchange and processing among different equipment nodes. The transmission line and printed PCB backplane loss has become a major factor limiting the speed of high speed signal transmission. The effects of skin effects and dielectric losses on the high frequency components of the signal during signal transmission are particularly severe. Meanwhile, strong intersymbol interference can be caused by high-frequency attenuation of signals, difficulty is increased for recovering the later-stage clock data, and a higher error rate is caused.

In order to improve the signal transmission effect and reduce the error rate of the whole signal transmission system, compensation is usually performed on the high frequency component of the signal, wherein the most typical method is to use an equalizer technique. Equalizers can be further classified into analog equalizers and digital equalizers, where analog equalizers are also called Continuous Time Linear Equalization (CTLE).

Disclosure of Invention

At least one embodiment of the present disclosure provides a parameter setting apparatus, communicatively connected to a multi-stage continuous time linear equalizer, the parameter setting apparatus includes an initialization module, an input module, an obtaining module, and a setting module, the initialization module is communicatively connected to the multi-stage continuous time linear equalizer, the input module is communicatively connected to the multi-stage continuous time linear equalizer, the obtaining module is communicatively connected to the multi-stage continuous time linear equalizer, the setting module is communicatively connected to the input module, the obtaining module, and the multi-stage continuous time linear equalizer, and each stage of the multi-stage continuous time linear equalizer includes a plurality of inductors. The initialization module is configured to initialize a plurality of parameters of the multistage continuous-time linear equalizer; the input module is configured to input a first data sequence to the multi-stage continuous-time linear equalizer; the acquisition module is configured to acquire a second data sequence output from the multi-stage continuous-time linear equalizer; the setting module is configured to set the plurality of parameters based on the first data sequence and the second data sequence. The plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors.

For example, in at least one embodiment of the present disclosure, each stage of the multi-stage continuous time linear equalizer further includes a plurality of resistors and a plurality of capacitors, and the plurality of parameters further includes a second parameter and a third parameter, wherein the second parameter indicates a resistance value of each of the plurality of resistors and the third parameter indicates a capacitance value of each of the plurality of capacitors.

For example, in at least one embodiment of the present disclosure, the setting module includes: the device comprises a first sub-setting module, a second sub-setting module and a third sub-setting module. The first sub-setting module is configured to adjust a value of the first parameter and/or the second parameter, and maintain the third parameter at a third preset value. A second sub-setup module is configured to store the respective first and second parameters to a first scan set in response to the first and second data sequences being identical. A third sub-setup module is configured to set the first parameter to a first calibrated value and the second parameter to a second calibrated value based on the first scan set.

For example, in at least one embodiment of the present disclosure, the first sub-setup module includes a first adjustment module. The first adjusting module is configured to increase the value of the first parameter from a first preset value in increments according to a first preset interval; or increasing the value of the second parameter from a second preset value according to a second preset interval.

For example, in at least one embodiment of the present disclosure, the first calibration value is an average or median of at least one of the first parameters stored in the first scan set, and the second calibration value is an average or median of at least one of the second parameters stored in the first scan set.

For example, in at least one embodiment of the present disclosure, the setting module includes: a fourth setting submodule, a fifth setting submodule and a sixth setting submodule. And the fourth setting submodule is configured to keep the first parameter as a first corrected value, keep the second parameter as a second corrected value and adjust the value of the third parameter. A fifth setup submodule configured to store the corresponding third parameter to a second scan set in response to the first data sequence and the second data sequence being identical. A sixth setting submodule configured to set the third parameter to a third calibration value based on the second scan set.

For example, in at least one embodiment of the present disclosure, the fourth setting sub-module includes a second adjusting module configured to increment a value of the third parameter from a third preset value at a third predetermined interval.

For example, in at least one embodiment of the present disclosure, the third calibration value is an average or median value of at least one of the third parameters stored in the second scan set.

For example, in at least one embodiment of the present disclosure, the parameter setting apparatus further includes a locking module. The locking module is configured to obtain a locking frequency of the multi-stage continuous-time linear equalizer.

For example, in at least one embodiment of the present disclosure, the locking module includes: a first locking submodule and a second locking submodule. The first lock sub-module is configured to set the first parameter to a first lock value, the second parameter to a second lock value, and the third parameter to a third lock value. A second lock submodule is configured to input a reference data signal to the multi-stage continuous-time linear equalizer to determine the lock frequency.

For example, in at least one embodiment of the present disclosure, the first lock value is an intermediate value within an adjustable range of the first parameter, the second lock value is an intermediate value within an adjustable range of the second parameter, and the third lock value is an intermediate value within an adjustable range of the third parameter.

For example, in at least one embodiment of the present disclosure, the multi-stage continuous-time linear equalizer is a two-stage continuous-time linear equalizer.

For example, at least one embodiment of the present disclosure further provides a parameter setting method applied to a multi-stage continuous time linear equalizer, each stage of the multi-stage continuous time linear equalizer including a plurality of inductors, the parameter setting method including: initializing a plurality of parameters of the multistage continuous-time linear equalizer; inputting a first data sequence to the multistage continuous time linear equalizer; acquiring a second data sequence output from the multistage continuous time linear equalizer; setting the plurality of parameters based on the first data sequence and the second data sequence. The plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors.

For example, at least one embodiment of the present disclosure further provides a parameter setting apparatus of a multistage continuous time linear equalizer, including: a processor and a memory. The memory includes one or more computer program modules. The one or more computer program modules are stored in the memory and configured to be executed by the processor, the one or more computer program modules comprising instructions for performing a parameter setting method as in any of the embodiments above.

For example, at least one embodiment of the present disclosure also provides a non-transitory readable storage medium having computer instructions stored thereon. The computer instructions, when executed by a processor, perform a parameter setting method as in any of the embodiments described above.

Drawings

To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly described below, and it should be apparent that the drawings described below only relate to some embodiments of the present disclosure and are not limiting on the present disclosure.

Fig. 1 is a schematic structural diagram of a continuous-time linear equalizer (CTLE) according to at least one embodiment of the present disclosure;

fig. 2 is a schematic diagram of a gain-inductance-frequency curve provided in at least one embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of another CTLE provided in at least one embodiment of the present disclosure;

fig. 4 is a flowchart of a parameter setting method for a multi-level CTLE according to at least one embodiment of the present disclosure;

fig. 5 is a schematic diagram of a first scan set provided by at least one embodiment of the present disclosure;

fig. 6 is a three-dimensional schematic diagram of a first scan set and a second scan set provided by at least one embodiment of the present disclosure;

fig. 7 is a schematic block diagram of a parameter setting apparatus according to at least one embodiment of the present disclosure;

FIG. 8 is a schematic block diagram of another parameter setting apparatus provided in at least one embodiment of the present disclosure;

fig. 9 is a schematic block diagram of another parameter setting apparatus provided in at least one embodiment of the present disclosure;

fig. 10 is a schematic block diagram of still another parameter setting apparatus provided in at least one embodiment of the present disclosure;

FIG. 11 is a schematic block diagram of a non-transitory readable storage medium provided in at least one embodiment of the present disclosure; and

fig. 12 is a schematic block diagram of an electronic device according to at least one embodiment of the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without any inventive step, are within the scope of protection of the disclosure.

Flowcharts are used in this disclosure to illustrate the operations performed by systems according to embodiments of the present application. It should be understood that the preceding or following operations are not necessarily performed in the exact order in which they are performed. Rather, the various steps may be processed in reverse order or simultaneously, as desired. Meanwhile, other operations may be added to the processes, or a certain step or several steps of operations may be removed from the processes.

Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and the like in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item preceding the word comprises the element or item listed after the word and its equivalent, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.

Since the gain of the transmission channel decreases with increasing frequency, however, the transmission system delivers higher and higher signal rates, the bandwidth of the signal becomes larger. A High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission Interface, which can transmit uncompressed audio and video signals. At present, the HDMI has multiple versions, and HDMI version 1.4 is the most popular version, supports 4K resolution, but has a bandwidth of 10.2 Gbps. The HDMI version 2.1 released in 2017 in 1 month has a bandwidth greatly increased to 48Gbps, and can support images with higher frame rates up to 8K/60Hz or 4K/120 Hz. The sink equalizer of HDMI needs to cover a wide frequency data rate from 3.4Gbps to 12Gbps to achieve backward compatibility from HDMI version 1.4 to HDMI version 2.1. To achieve transmission rates above 10Gbps, more stages of Continuous Time Linear Equalizers (CTLE) may be added to achieve higher gain, but this results in increased power, area, and noise.

The general CTLE structure is composed of a differential amplifier and source degeneration introducing a resistance capacitance. A differential amplifier with only RC negative feedback can provide frequency peaking with gain at the Nyquist frequency (Nyquist frequnecy), but the gain is insufficient at high data rates in excess of 10 Gbps. Inductive peaking techniques are useful for higher signal rates while keeping power consumption constant.

Fig. 1 illustrates a schematic structural diagram of a CTLE according to at least one embodiment of the present disclosure, and fig. 2 illustrates a gain-inductance-bandwidth curve according to at least one embodiment of the present disclosure.

As shown in fig. 1, the CTLE structure employs a plurality of passive inductors (L0 and L1), a plurality of capacitors (C0, C1, C2, and C3), and a plurality of resistors (R0, R1, R2, and R3). For CTLE with inductance L-resistance R-capacitance C, a high pass transfer function can be implemented to compensate for channel loss. Va and Vb in fig. 1 denote input voltages, VDD denotes a stable voltage (e.g., a high-level voltage), and embodiments of the present disclosure do not limit specific voltage values, and may be set according to actual requirements. As shown in fig. 2, compared to the CTLE structure without inductance (L ═ 0), the CTLE structure with inductance (L) is adopted>0) The high-frequency gain can be achieved, and the strength of signals is improved. The X-axis in fig. 2 represents frequency (Hz), the Y-axis represents gain of the signal, a represents the ratio of current or voltage, and typically dB ═ 20 × logA. For example, as can be seen from FIG. 2, the optimum inductance value L is used _opt The signal can be made more stable, but generally the inductance value in the CTLE structure is fixed and not necessarily the optimal inductance value is employed.

Fig. 3 is a schematic structural diagram of another CTLE according to at least one embodiment of the present disclosure. As shown in FIG. 3, V _IN The input voltage is represented, and the specific voltage value is not limited by the embodiments of the disclosure and can be set according to actual requirements. The CTLE structure adopts an active inductor, the compensation capability of high-speed data can be improved by adopting the active inductor, but the CTLE structure also has the defects that the active inductor uses an MOS (metal oxide semiconductor) tube to introduce noise, the voltage drop caused by threshold voltage limits the swing of output signals in a circuit and can cause more serious damage to the circuitLarge Process, Voltage, and Temperature (PVT) problems. Generally, in order to recover the swing, a boost circuit is added to the circuit or a dual power supply is used for supplying power, which results in higher power consumption.

Typically, 3 levels of CTLE as shown in fig. 1 are required to compensate for 29dB loss for a data transmission rate of 6 Gbps. For data transmission rates above 10Gbps, 40dB of loss needs to be compensated for, and 3 or more levels of CTLE are required. This results in lower DC gain and occupies a larger area and power consumption. Furthermore, for the CTLE structure shown in fig. 1, the values of the capacitance and resistance are adjustable, but the value of the inductance is fixed.

At least in order to overcome the technical problem, at least one embodiment of the present disclosure provides a parameter setting method applied to a multistage Continuous Time Linear Equalizer (CTLE). Each stage of the multistage continuous time linear equalizer comprises a plurality of inductors, and the parameter setting method comprises the following steps: initializing a plurality of parameters of a multistage continuous time linear equalizer; inputting a first data sequence to a multistage continuous time linear equalizer; acquiring a second data sequence output from the multistage continuous time linear equalizer; based on the first data sequence and the second data sequence, a plurality of parameters are set. The plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors.

Accordingly, at least one embodiment of the present disclosure also provides a parameter setting apparatus and a non-transitory readable storage medium corresponding to the above parameter setting method.

By the parameter setting method of the multistage Continuous Time Linear Equalizer (CTLE) provided by at least one embodiment of the present disclosure, multiple parameter values, such as inductance values, in the multistage CTLE structure may be adaptively adjusted, so that the multistage CTLE structure achieves better performance, inter-symbol interference is effectively reduced, signal quality of a receiving end is improved, and power consumption is reduced.

Note that the CTLE structure used in the embodiment of the present disclosure is not limited to the circuit structure shown in fig. 1, and other CTLE circuit structures may be used.

In the following, a parameter setting method for a multi-level CTLE provided by the present disclosure is described in a non-limiting manner through multiple examples or embodiments and examples thereof, and as described below, different features in these specific examples or embodiments may be combined with each other without mutual conflict, so as to obtain new examples or embodiments, and these new examples or embodiments also belong to the protection scope of the present disclosure.

Fig. 4 is a flowchart of a parameter setting method applied to a multi-level CTLE according to at least one embodiment of the present disclosure.

As shown in fig. 4, a parameter setting method 20 applied to a multi-level CTLE according to at least one embodiment of the present disclosure may be applied not only to the CTLE structure shown in fig. 1, but also to any other CTLE structure including an inductor, a resistor, and a capacitor, which is not limited in this respect by the embodiment of the present disclosure. In at least one embodiment of the present disclosure, each stage of the multi-stage CTLE includes a plurality of inductors, and the parameter setting method 20 may include the following steps S201 to S204.

Step S201: a plurality of parameters of a multi-stage continuous-time linear equalizer are initialized.

Step S202: the first data sequence is input to a multi-stage continuous-time linear equalizer.

Step S203: a second data sequence output from the multi-stage continuous-time linear equalizer is obtained.

Step S204: a plurality of parameters are set based on the first data sequence and the second data sequence.

In an embodiment of the present disclosure, the plurality of parameters includes a first parameter indicating an inductance value of each of the plurality of inductors.

According to the parameter setting method 20 provided in at least one embodiment of the present disclosure, a plurality of parameters, such as inductance values, of the multi-level CTLE may be adaptively adjusted by comparing the first data sequence and the second data sequence, so that the multi-level CTLE structure achieves better performance, inter-symbol interference is effectively reduced, signal quality of a receiving end is improved, and power consumption is reduced.

It should be noted that, in the embodiments of the present disclosure, the execution sequence of the steps of the parameter setting method 20 is not limited, and although the execution process of the steps is described in a specific sequence, this does not limit the embodiments of the present disclosure. The various steps in the parameter setting method 20 may be performed in series or in parallel, which may be based on actual requirements. For example, the parameter setting method 20 may also include more or fewer steps, and embodiments of the present disclosure are not limited in this respect.

For example, in at least one embodiment of the present disclosure, as shown in fig. 1, the circuit structure of the CTLE includes a plurality of resistors and a plurality of capacitors in addition to a plurality of inductors. For example, the plurality of parameters of the CTLE may include an inductance parameter, a resistance parameter, a capacitance parameter, i.e., a first parameter, a second parameter, and a third parameter. The inductance parameter indicates a value of each of a plurality of inductances included in the CTLE structure, the resistance parameter indicates a value of each of a plurality of resistances included in the CTLE structure, and the capacitance parameter indicates a value of each of a plurality of capacitances included in the CTLE structure.

It should be noted that, in various embodiments of the present disclosure, the "first parameter" is used to refer to an inductance parameter indicating each of the plurality of inductances, the "second parameter" is used to refer to a resistance parameter indicating each of the plurality of resistances, and the "third parameter" is used to refer to a capacitance parameter indicating each of the plurality of capacitances. The "first parameter", "second parameter", and "third parameter" are not limited to a specific parameter or a specific order.

For example, in at least one embodiment of the present disclosure, for step S201, initializing a plurality of parameters of the multi-level CTLE may include setting a first parameter to a first preset value, setting a second parameter to a second preset value, and setting a third parameter to a third preset value. For example, in one example, the first preset value, the second preset value, and the third preset value are all set to 0, and for another example, the first preset value may be a middle value within an adjustable range of inductance values in the corresponding CTLE structure, the second preset value may be a middle value within an adjustable range of resistance values in the corresponding CTLE structure, and the third preset value may be a middle value within an adjustable range of capacitance values in the corresponding CTLE structure. For example, in one example, the adjustable range of one inductance is 0 to 6 nanohenries (nH), and the first preset value may be 3 nH. For example, in at least one embodiment of the present disclosure, the first preset value, the second preset value, and the third preset value may be set to minimize eye openness of an eye pattern of the multi-level CTLE output signal. The eye opening size of the eye pattern directly reflects the signal quality of the output end, and the larger the eye opening of the eye pattern, the smaller the intersymbol interference in the whole signal transmission system is.

It should be noted that, in the embodiment of the present disclosure, values of the first preset value, the second preset value, and the third preset value are not limited, and may be set according to actual requirements.

It should be further noted that, in various embodiments of the present disclosure, the "first preset value" is used to refer to an initial value of the inductance parameter, the "second preset value" is used to refer to an initial value of the resistance parameter, and the "third preset value" is used to refer to an initial value of the capacitance parameter. The first preset value, the second preset value and the third preset value are not limited to a specific value or a specific sequence. The values of the first preset value, the second preset value, and the third preset value may be the same or different, and the embodiment of the disclosure is not limited to this.

For example, in at least one embodiment of the present disclosure, for step S202, a first data sequence is input to the multi-stage continuous-time linear equalizer. For example, in at least one embodiment of the present disclosure, the input data sequence may be a worst case sequence (worst case pattern) or any other random sequence. For example, in one example, the data sequence is 01110 … … 10111. The length and content of the data sequence are not limited by the embodiments of the present disclosure, and may be set according to actual situations.

For example, in at least one embodiment of the present disclosure, the worst case sequence may be set according to a transmission channel length, a material of a transmission channel, and the like. For example, a provider of a transmission channel may provide a corresponding worst case sequence of transmission channels.

For example, in at least one embodiment of the present disclosure, for step S203, a second data sequence output from the multistage continuous time linear equalizer is acquired.

It should be noted that, in the embodiment of the present disclosure, the first data sequence may refer to a data sequence of which the input CTLE aims to train the CTLE, and the second data sequence may refer to a data sequence of which the CTLE outputs when the first data sequence is used as the input. Neither the "first data sequence" nor the "second data sequence" is limited to a specific certain data sequence nor a specific order. For example, in embodiments of the present disclosure, neither the first data sequence nor the second data sequence carries timing information.

For example, in at least one embodiment of the present disclosure, for step S204, setting the plurality of parameters based on the first data sequence and the second data sequence may include: the method further includes adjusting the first parameter and/or the second parameter, maintaining the third parameter at a third preset value, and in response to the first data sequence and the second data sequence being the same, storing the respective first parameter and second parameter to a first scan set, setting the first parameter to a first calibration value based on the first scan set, and setting the second parameter to a second calibration value.

For example, in at least one embodiment of the present disclosure, adjusting the first parameter and/or the second parameter may include incrementing the value of the first parameter from a first preset value at a first predetermined interval; or incrementing the value of the second parameter from a second preset value at a second predetermined interval. For another example, in at least one embodiment of the present disclosure, the adjusting of the first parameter and/or the second parameter may be performed by a binary search, and the embodiment of the present disclosure does not limit a specific adjusting manner of the parameter.

Fig. 5 is a schematic diagram of a first scan set provided by at least one embodiment of the present disclosure.

For example, in at least one embodiment of the present disclosure, the horizontal axis in fig. 5 represents a first parameter (inductance parameter) and the vertical axis represents a second parameter (i.e., resistance parameter). For example, the inductance value of each inductor in the multi-stage CTLE can be adjusted within a range of 0-7nH, and the resistance value of each resistor in the multi-stage CTLE can be adjusted within a range of 0-7 kilo-ohms (k Ω), as shown in fig. 5. For example, in at least one embodiment of the present disclosure, both the first predetermined interval and the second predetermined interval are set to 1. First, the first parameter, the second parameter, and the third parameter are all initialized to 0. Then, the third parameter is kept unchanged (0), and the first parameter and/or the second parameter are/is continuously adjusted. For example, in the case where the first parameter is 0, the second parameter is 0, and the third parameter is 0, the first data sequence input to the CTLE structure and the second data sequence output from the CTLE structure are compared. If the first data sequence and the second data sequence are different, continuously comparing whether the first data sequence and the second data sequence are the same under the condition that the first parameter is 1nH, the second parameter is 0 and the third parameter is 0, and so on, obtaining the statistical table shown in fig. 5. F in the table indicates that the first data sequence is different from the second data sequence, and P in the table indicates that the first data sequence is the same as the second data sequence. In response to the first and second data sequences being identical, corresponding first and second parameters are stored to the first scan set. For example, first parameters (for example, 1, 2, 3, 4, 5, 6 of the first parameters that can be stored to the first scan set in fig. 5) and second parameters (for example, 1, 2, 3 of the second parameters that can be stored to the first scan set in fig. 5) corresponding to the shaded areas in the table are stored to the first scan set.

It should be noted that, in the embodiment of the present disclosure, the first predetermined interval is used to indicate the parameter variation amount of each adjustment in the process of adjusting the first parameter, the second predetermined interval is used to indicate the parameter variation amount of each adjustment in the process of adjusting the second parameter, and the third predetermined interval is used to indicate the parameter variation amount of each adjustment in the process of adjusting the third parameter. The specific values of the first predetermined interval, the second predetermined interval, and the third predetermined interval may be set according to actual requirements, and the embodiment of the disclosure is not limited thereto. The first, second and third predetermined intervals are not limited to a particular value or a particular order.

It should be further noted that, in the embodiment of the present disclosure, the first scan set is used to indicate that a set of the first parameter and the second parameter satisfying the condition that the first data sequence and the second data sequence are identical is stored. The second scanning set is used for indicating the storage of a set of third parameters satisfying the condition that the first data sequence and the second data sequence are identical. The first and second scan sets are not limited to a particular set, nor to a particular order.

For example, in at least one embodiment of the present disclosure, based on the first scan set, the first parameter is set to a first calibration value and the second parameter is set to a second calibration value. For example, in at least one embodiment of the present disclosure, the first calibration value may be a median or average value of at least one first parameter stored in the first scan set, and the second calibration value may be a median or average value of at least one second parameter stored in the first scan set. For example, in at least one embodiment of the present disclosure, as shown in fig. 5, the first scan set corresponds to a shaded region in the table of fig. 5 from which the first and second calibration values are determined. For example, the center position of the shaded area (at the dark shading) is selected as the first and second calibration values, that is, the first parameter is set to 4nH and the second parameter is set to 2k Ω. The first parameter corresponding to the central position is a median value of at least one first parameter stored in the first scanning set, and the second parameter corresponding to the central position is a median value of at least one second parameter stored in the first scanning set.

For example, in at least one embodiment of the present disclosure, the values of the corresponding first parameter stored in the first scan set include: 1.4, 5, 6, 10, the first calibration value may take the middle value of the aforementioned 5 values, i.e., "5", or may take the average value of the remaining three values, i.e., "5", after removing the maximum value "10" and the minimum value "1" of the aforementioned 5 values. It should be noted that, the present disclosure does not limit the specific calculation manner of the first calibration value, and may be set according to actual requirements. Similarly, the specific calculation modes of the second calibration value and the third calibration value are not limited by the present disclosure, and may be set according to actual requirements.

It should be noted that the embodiment of the present disclosure does not require that the first calibration value/the second calibration value is necessarily a corresponding middle value or an average value in the first scan set, and may also be set as other values in the first scan set, and may be selected according to actual requirements.

It should be further noted that, in the embodiment of the present disclosure, the first calibration value is used to indicate the adjusted first parameter, the second calibration value is used to indicate the adjusted second parameter, and the third calibration value is used to indicate the adjusted third parameter. The first, second and third calibration values are not limited to a specific numerical value or a specific order.

For example, in at least one embodiment of the present disclosure, for step S204, setting a plurality of parameters based on the first data sequence and the second data sequence may include: the method includes maintaining a first parameter at a first calibration value, maintaining a second parameter at a second calibration value, adjusting a third parameter, in response to the first data sequence and the second data sequence being the same, storing a corresponding third parameter to a second scan set, and setting the third parameter to a third calibration value based on the second scan set.

For example, in at least one embodiment of the present disclosure, the first parameter is maintained as a first calibrated value (e.g., 4nH) obtained through the above training, the second parameter is maintained as a second calibrated value (e.g., 2k Ω) obtained through the above training, and the third parameter is adjusted. For example, adjusting the third parameter may include incrementing the third parameter from a third preset value at a third predetermined interval. For example, the third parameter is incremented by 1 from 0 until a maximum value within the adjustable range of the third parameter is reached. For another example, in at least one embodiment of the present disclosure, the third parameter is adjusted according to a binary search method. It should be noted that, the embodiment of the present disclosure does not limit the specific method for adjusting the third parameter.

For example, in at least one embodiment of the present disclosure, an input first data sequence is compared with an output second data sequence, and when the first data sequence and the second data sequence are determined to be identical, the corresponding third parameter is stored to the second scan set. For example, in the case where the first parameter is maintained at 4nH and the second parameter is maintained at 2k Ω, when the third parameter takes on values of 4pF, 5pF, and 6pF, the input first data sequence and the output second data sequence are the same, and the third parameter takes on values of 4pF, 5pF, and 6pF is stored in the second scan set. A third calibration value is determined based on the second scan set. For example, the third calibration value may be an average or median value of at least one third parameter stored in the second scan set. For example, when the third parameters respectively taking values of 4pF, 5pF, and 6pF are stored in the second scanning set, the third calibration value may take a value of 5 pF.

It should be noted that the embodiment of the present disclosure does not require that the third calibration value is necessarily a corresponding middle value or an average value in the second scanning set, and may also be set as another value in the second scanning set, and may be selected according to actual requirements.

Fig. 6 is a three-dimensional (3D) schematic diagram of a first scan set and a second scan set according to at least one embodiment of the present disclosure. For example, as shown in fig. 6, the X-axis represents the inductance parameter L (i.e., the first parameter), the Z-axis represents the resistance parameter R (i.e., the second parameter), and the Y-axis represents the capacitance parameter C (i.e., the third parameter), forming a 3D pattern. The first scan set may include an R set and an L set, and the second scan set may include a C set. For example, in at least one embodiment of the present disclosure, respective parameter values, such as inductance, resistance, and capacitance values, may be selected from these sets such that the multi-level CTLE achieves optimal performance.

For example, in at least one embodiment of the present disclosure, after the first parameter is set to the first calibration value, the second parameter is set to the second calibration value, and the third parameter is set to the third calibration value, the parameter setting method 20 may be repeated with the first calibration value, the second calibration value, and the third calibration value as initial values of the first parameter, the second parameter, and the third parameter, respectively, to obtain final first parameter, second parameter, and third parameter, so that the performance of the multi-level CTLE is optimal.

It should be noted that, in the parameter setting method 20 provided in at least one embodiment of the present disclosure, the inductance parameter and the resistance parameter are trained or adjusted first, and then the capacitance parameter is trained or adjusted after the inductance parameter and the resistance parameter are determined, but the embodiment of the present disclosure is not limited thereto, and the inductance parameter and the capacitance parameter may be trained or adjusted first, and then the resistance parameter is trained or adjusted, or the resistance parameter and the capacitance parameter are trained or adjusted first, and then the inductance parameter is trained or adjusted.

For example, in at least one embodiment of the present disclosure, before starting to train various parameters of the CTLE, the lock frequency of the multistage CTLE needs to be acquired. For example, in at least one embodiment of the present disclosure, acquiring the locking frequency of the multi-level CTLE includes: setting the first parameter to a first lock value, the second parameter to a second lock value, the third parameter to a third lock value, and inputting a reference data signal to the multi-stage CTLE to determine a lock frequency.

For example, in at least one embodiment of the present disclosure, the first lock value may be set to an intermediate value within the adjustable range of the first parameter, the second lock value may be set to an intermediate value within the adjustable range of the second parameter, and the third lock value may be set to an intermediate value within the adjustable range of the third parameter.

For example, in at least one embodiment of the present disclosure, the adjustable range of the first parameter is 0-10 nanohenries (nH), and the first parameter is set to 5 nH. The adjustable range of the second parameter is 0-10 kilo-ohms (K Ω), the second parameter is set to 5K Ω. The adjustable range of the third parameter is 0-10 picofarads (pF), and the third parameter is set to 5 pF. Then, a reference data signal, which may be a kind of clock signal with timing information, is input to the multi-stage CTLE. The frequency of the reference data signal may be set according to actual requirements. For example, in one example, the lock frequency of the multi-stage CTLE may be obtained by a Clock Data Recovery (CDR) circuit. In the subsequent training or adjusting process of each parameter in the CTLE, the data sequence is sampled and the like based on the locking frequency, so that the stability is improved.

It should be noted that, the embodiments of the present disclosure do not limit the values of the first lock value, the second lock value, and the third lock value, and may be set according to actual requirements. In an embodiment of the disclosure, the first lock value is used to indicate a set value of a first parameter during a frequency-locking phase, the second lock value is used to indicate a set value of a second parameter during a frequency-locking phase, and the third lock value is used to indicate a set value of a third parameter during a frequency-locking phase. The first, second and third locking values are not limited to a specific value or a specific sequence.

For example, in at least one embodiment of the present disclosure, the multi-stage continuous-time linear equalizer is a two-stage continuous-time linear equalizer. For example, in at least one embodiment of the present disclosure, after the inductance parameter, the resistance parameter, and the capacitance parameter in the CTLE structure are set by the parameter setting method 20, the performance of the CTLE is effectively improved, and the transmission rate of more than 10Gbps can be realized by using two stages of CTLEs.

In the embodiment of the present disclosure, by the parameter setting method 20, inductance parameters, capacitance parameters, and resistance parameters in the CTLE structure can be adaptively adjusted, so as to effectively improve the performance of the CTLE, enable the CTLE to achieve higher high-frequency gain, reduce power consumption, and reduce an occupied area.

It should also be noted that, in the various embodiments of the present disclosure, the execution sequence of the various steps of the parameter setting method 20 of the multi-level CTLE is not limited, and although the execution process of the various steps is described above in a specific sequence, this does not constitute a limitation to the embodiments of the present disclosure. The various steps in the parameter setting method 20 may be performed in series or in parallel, which may be based on actual requirements. For example, the parameter setting method 20 may also include more or fewer steps, and embodiments of the present disclosure are not limited in this respect.

At least one embodiment of the present disclosure further provides a parameter setting device, where the parameter setting device may adaptively adjust a plurality of parameters in the CTLE according to a comparison result between the first data sequence and the second data sequence, so as to effectively improve the performance of the CTLE, enable the CTLE to achieve higher high-frequency gain, reduce power consumption, and reduce an occupied area.

Fig. 7 is a schematic block diagram of a parameter setting apparatus according to at least one embodiment of the present disclosure.

For example, in at least one embodiment of the present disclosure, as shown in fig. 7, the parameter setting device 70 is communicatively coupled to a multi-stage continuous-time linear equalizer. The parameter setting apparatus 70 includes an initial module 701, an input module 702, an obtaining module 703 and a setting module 704. For example, the initialization module 701 is communicatively coupled to a multi-stage continuous-time linear equalizer, the input module 702 is communicatively coupled to a multi-stage continuous-time linear equalizer, the acquisition module 703 is communicatively coupled to a multi-stage continuous-time linear equalizer, and the setup module 704 is communicatively coupled to the input module 702, the acquisition module 703, and the multi-stage continuous-time linear equalizer. Each stage of the multi-stage continuous time linear equalizer includes a plurality of inductors.

For example, in at least one embodiment of the present disclosure, the initialization module 701 is configured to initialize a plurality of parameters of a multi-stage continuous-time linear equalizer. For example, the initial module 701 may implement step S201, and the specific implementation method may refer to the related description of step S201, which is not described herein again.

For example, in at least one embodiment of the present disclosure, the input module 702 is configured to input a first data sequence to a multi-stage continuous-time linear equalizer. For example, the input module 702 may implement step S202, and the specific implementation method thereof may refer to the related description of step S202, which is not described herein again.

For example, in at least one embodiment of the present disclosure, the obtaining module 703 is configured to obtain a second data sequence output from the multistage continuous-time linear equalizer. For example, the obtaining module 703 may implement step S203, and a specific implementation method thereof may refer to the related description of step S203, which is not described herein again.

For example, in at least one embodiment of the present disclosure, the setting module 704 is configured to set a plurality of parameters based on the first data sequence and the second data sequence. The plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors. For example, the setting module 704 may implement step S204, and the specific implementation method thereof may refer to the related description of step S204, which is not described herein again.

It should be noted that, these initial module 701, input module 702, obtaining module 703 and setting module 704 may be implemented by software, hardware, firmware or any combination thereof, for example, they may be implemented as the initial circuit 701, the input circuit 702, the obtaining circuit 703 and the setting circuit 704, respectively, and the embodiments of the present disclosure do not limit their specific implementation. The specific structure of the multistage continuous time linear equalizer is not limited in the embodiments of the present disclosure, and for example, the multistage continuous time linear equalizer may be a CTLE structure shown in fig. 1, or may be another structure, and may be set according to actual requirements.

For example, in at least one embodiment of the present disclosure, each stage of the multi-stage continuous time linear equalizer further includes a plurality of resistors and a plurality of capacitors, and the plurality of parameters further includes a second parameter and a third parameter. The second parameter indicates a resistance value of each of the plurality of resistors and the third parameter indicates a capacitance value of each of the plurality of capacitors.

For example, in at least one embodiment of the present disclosure, the setup module 704 may include a first sub-setup module, a second sub-setup module, and a third sub-setup module. The first sub-setting module is configured to adjust a value of the first parameter and/or the second parameter, and maintain the third parameter at a third preset value. The second sub-setup module is configured to store the respective first and second parameters to the first scan set in response to the first and second data sequences being identical. The third sub-setup module is configured to set the first parameter to a first calibration value and the second parameter to a second calibration value based on the first scan set. For example, the specific operations performed by the first sub-setting module, the second sub-setting module, and the third sub-setting module may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the first sub-setup module includes a first adjustment module. The first adjusting module is configured to increase the value of the first parameter from a first preset value in increments according to a first preset interval; or the value of the second parameter is increased progressively from the second preset value according to a second preset interval. For example, the specific operations performed by the first adjusting module may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the first calibration value is an average or median of at least one first parameter stored in the first scan set, and the second calibration value is an average or median of at least one second parameter stored in the first scan set.

For example, in at least one embodiment of the present disclosure, the setup module 704 may include a fourth setup submodule, a fifth setup submodule, and a sixth setup submodule. The fourth setting submodule is configured to maintain the first parameter at the first calibrated value, maintain the second parameter at the second calibrated value, and adjust the value of the third parameter. The fifth setup submodule is configured to store a corresponding third parameter to the second scan set in response to the first data sequence and the second data sequence being identical. The sixth setting submodule is configured to set the third parameter to a third calibration value based on the second scan set. For example, the specific operations performed by the fourth setting sub-module, the fifth setting sub-module, and the sixth setting sub-module may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the fourth setting submodule includes a second adjustment module. The second adjustment module is configured to increment a value of the third parameter from a third preset value at a third predetermined interval. For example, the specific operations performed by the second adjusting module may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the third calibration value is an average or median value of at least one third parameter stored in the second scan set.

For example, in at least one embodiment of the present disclosure, the parameter setting device 70 may further include a locking module. The locking module is configured to obtain a locking frequency of the multi-stage continuous-time linear equalizer. For example, the specific operations performed by the locking module may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the locking module includes a first locking submodule and a second locking submodule. The first lock sub-module is configured to set the first parameter to a first lock value, the second parameter to a second lock value, and the third parameter to a third lock value. The second lock submodule is configured to input a reference data signal to the multi-stage continuous-time linear equalizer to determine a lock frequency. For example, the specific operations performed by the first locking submodule and the second locking submodule may refer to the related description of the parameter setting method 20, and are not described herein again.

For example, in at least one embodiment of the present disclosure, the first data sequence is set based on the length and material of a transmission channel corresponding to the multi-stage continuous time linear equalizer.

It should be understood that, the parameter setting apparatus 70 provided in the embodiment of the present disclosure may implement the foregoing parameter setting method 20, and may also implement technical effects similar to those of the foregoing parameter setting method 20, which are not described herein again.

It should be noted that, these first sub-setting module, second sub-setting module, third sub-setting module, fourth setting sub-module, fifth setting sub-module, sixth setting sub-module, first adjusting module, second adjusting module, locking module, first locking sub-module, and second locking sub-module may be implemented by software, hardware, firmware, or any combination thereof, for example, may be implemented as a first sub-setting circuit, a second sub-setting circuit, a third sub-setting circuit, a fourth setting sub-circuit, a fifth setting sub-circuit, a sixth setting sub-circuit, a first adjusting circuit, a second adjusting circuit, a locking circuit, a first locking sub-circuit, and a second locking sub-circuit, respectively, and embodiments of the present disclosure do not limit specific implementation manners thereof. In addition, the first sub-setting module, the second sub-setting module, the third sub-setting module, the fourth setting sub-module, the fifth sub-setting sub-module, the first adjusting module, the second adjusting module, the first locking sub-module, and the second locking sub-module are used to refer to software, hardware, firmware, or a combination thereof for performing corresponding operations, and are not limited to a specific module or modules, nor a specific sequence.

It should also be noted that, in the embodiment of the present disclosure, the parameter setting device 70 may include more or less circuits or units, and the connection relationship between the respective circuits or units is not limited and may be determined according to actual requirements. The specific configuration of each circuit is not limited, and may be configured by an analog device, a digital chip, or other suitable configurations according to the circuit principle.

Fig. 8 is a schematic block diagram of another parameter setting apparatus provided in at least one embodiment of the present disclosure.

For example, in at least one embodiment of the present disclosure, as shown in fig. 8, a parameter setting apparatus 80 includes two stages of CTLE structures (CTLE _1 and CTLE _1) having capacitance-inductance-resistance. For example, the structure of each level of CTLE may be a CTLE structure as shown in fig. 1, or may be other CTLE structures, which is not limited in this disclosure. The parameter setting device 80 further includes a CDR module, a CTLE parameter control module, and a sequence check module. For example, the CDR module is configured to recover a clock timing signal (CK) from a received data signal, the sequence check module is configured to compare whether a data sequence (a first data sequence) input to the CTLE is identical to a data sequence (a second data sequence) output from the CTLE, and the CTLE parameter control module is configured to adjust/set various parameters of the CTLE, such as an inductance parameter, a resistance parameter, a capacitance parameter, and the like, based on a comparison result of the sequence check module.

It should be noted that, in fig. 8, each module may be implemented by software, hardware, firmware or any combination thereof, for example, may be implemented as a CTLE circuit, a CDR circuit, a sequence check circuit, a CTLE parameter control circuit, and the like, and the embodiments of the present disclosure do not limit the specific implementation manner thereof.

It should be understood that the parameter setting apparatus 80 provided in the embodiment of the present disclosure may implement the parameter setting method 20, and also may implement technical effects similar to those of the parameter setting method 20, which are not described herein again.

It should be noted that in the embodiment of the present disclosure, the parameter setting device 80 may include more or less circuits or units, and the connection relationship between the respective circuits or units is not limited and may be determined according to actual requirements. The specific configuration of each circuit is not limited, and may be configured by an analog device, a digital chip, or other suitable configurations according to the circuit principle.

Fig. 9 is a schematic block diagram of another parameter setting apparatus provided in at least one embodiment of the present disclosure.

At least one embodiment of the present disclosure also provides a parameter setting apparatus 90. As shown in fig. 9, the parameter setting apparatus 90 includes a processor 910 and a memory 920. Memory 920 includes one or more computer program modules 921. One or more computer program modules 921 are stored in the memory 920 and configured to be executed by the processor 910, and the one or more computer program modules 921 include instructions for executing the parameter setting method 20 for multi-level CTLE provided by at least one embodiment of the present disclosure, and when executed by the processor 910, may perform one or more steps of the parameter setting method 20 provided by at least one embodiment of the present disclosure. The memory 920 and the processor 910 may be interconnected by a bus system and/or other form of connection mechanism (not shown).

For example, the processor 910 may be a Central Processing Unit (CPU), a Digital Signal Processor (DSP), or other form of processing unit having data processing capabilities and/or program execution capabilities, such as a Field Programmable Gate Array (FPGA), or the like; for example, the Central Processing Unit (CPU) may be an X86 or ARM architecture or the like. The processor 910 may be a general-purpose processor or a special-purpose processor that may control other components in the parameter setting device 90 to perform desired functions.

For example, memory 920 may include any combination of one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. Volatile memory can include, for example, Random Access Memory (RAM), cache memory (or the like). The non-volatile memory may include, for example, Read Only Memory (ROM), a hard disk, an Erasable Programmable Read Only Memory (EPROM), a portable compact disc read only memory (CD-ROM), USB memory, flash memory, and the like. One or more computer program modules 921 can be stored on the computer-readable storage medium, and the processor 910 can execute the one or more computer program modules 921 to implement various functions of the parameter setting apparatus 90. Various applications and various data, as well as various data used and/or generated by the applications, and the like, may also be stored in the computer-readable storage medium. The detailed functions and technical effects of the parameter setting apparatus 90 can refer to the description of the parameter setting method 20, and are not described herein again.

Fig. 10 is a schematic block diagram of still another parameter setting apparatus 300 according to at least one embodiment of the present disclosure.

The parameter setting apparatus 300 shown in fig. 10 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure. For example, as shown in fig. 10, in some examples, the parameter setting apparatus 300 includes a processing apparatus (e.g., a central processing unit, a graphics processor, etc.) 301 that may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM)302 or a program loaded from a storage device 308 into a Random Access Memory (RAM) 303. In the RAM303, various programs and data necessary for the operation of the computer system are also stored. The processing device 301, the ROM 302, and the RAM303 are connected thereto via a bus 304. An input/output (I/O) interface 305 is also connected to bus 304.

For example, the following components may be connected to the I/O interface 305: input devices 306 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; an output device 307 including a display such as a Liquid Crystal Display (LCD), speaker, vibrator, etc.; storage devices 308 including, for example, magnetic tape, hard disk, etc.; and a communication device 309 including a network interface card such as a LAN card, modem, or the like. The communication means 309 may allow the parameter setting apparatus 300 to perform wireless or wired communication with other devices to exchange data, performing communication processing via a network such as the internet. A drive 310 is also connected to the I/O interface 305 as needed. A removable medium 311 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 310 as necessary, so that a computer program read out therefrom is mounted into the storage device 308 as necessary. While FIG. 10 illustrates a parameter setting device 300 comprising various means, it is to be understood that not all illustrated means are required to be implemented or included. More or fewer devices may be alternatively implemented or included.

For example, the parameter setting apparatus 300 may further include a peripheral interface (not shown in the figure) and the like. The peripheral interface may be various types of interfaces, such as a USB interface, a lightning (lighting) interface, and the like. The communication device 309 may communicate with networks such as the internet, intranets, and/or wireless networks such as cellular telephone networks, wireless Local Area Networks (LANs), and/or Metropolitan Area Networks (MANs) and other devices via wireless communication. The wireless communication may use any of a number of communication standards, protocols, and technologies, including, but not limited to, global system for mobile communications (GSM), Enhanced Data GSM Environment (EDGE), wideband code division multiple access (W-CDMA), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), bluetooth, Wi-Fi (e.g., based on IEEE 802.11a, IEEE 802.11b, IEEE 802.11g, and/or IEEE 802.11n standards), voice over internet protocol (VoIP), Wi-MAX, protocols for email, instant messaging, and/or Short Message Service (SMS), or any other suitable communication protocol.

For example, the parameter setting apparatus 300 may be any device such as a mobile phone, a tablet computer, a notebook computer, etc., or may be any combination of a data processing apparatus and hardware, which is not limited in this respect in the embodiments of the present disclosure.

For example, the processes described above with reference to the flowcharts may be implemented as computer software programs, according to embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a non-transitory computer readable medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network through the communication means 309, or installed from the storage means 308, or installed from the ROM 302. When the computer program is executed by the processing device 301, the parameter setting method 20 disclosed in the embodiment of the present disclosure is executed.

It should be noted that the computer readable medium in the present disclosure can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In embodiments of the disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In embodiments of the present disclosure, however, a computer readable signal medium may comprise a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.

The computer readable medium may be included in the parameter setting apparatus 300; or may be separate and not incorporated into the parameter setting device 300.

Fig. 11 is a schematic block diagram of a non-transitory readable storage medium provided in at least one embodiment of the present disclosure.

Embodiments of the present disclosure also provide a non-transitory readable storage medium. Fig. 11 is a schematic block diagram of a non-transitory readable storage medium in accordance with at least one embodiment of the present disclosure. As shown in fig. 11, the non-transitory readable storage medium 140 has stored thereon computer instructions 111, which computer instructions 111, when executed by a processor, perform one or more steps of the parameter setting method 20 as described above.

For example, the non-transitory readable storage medium 140 may be any combination of one or more computer readable storage media, for example, one computer readable storage medium containing computer readable program code for initializing a plurality of parameters of a multistage continuous-time linear equalizer, another computer readable storage medium containing computer readable program code for inputting a first data sequence to the multistage continuous-time linear equalizer, another computer readable storage medium containing computer readable program code for retrieving a second data sequence output from the multistage continuous-time linear equalizer, still another computer readable storage medium containing computer readable program code for setting the plurality of parameters based on the first data sequence and the second data sequence, the plurality of parameters includes a first parameter indicative of an inductance value of each of the plurality of inductors. Of course, the above program codes may also be stored in the same computer readable medium, and the embodiments of the present disclosure are not limited thereto.

For example, when the program code is read by a computer, the computer may execute the program code stored in the computer storage medium to perform, for example, the parameter setting method 20 provided by any of the embodiments of the present disclosure.

For example, the storage medium may include a memory card of a smart phone, a storage component of a tablet computer, a hard disk of a personal computer, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a portable compact disc read only memory (CD-ROM), a flash memory, or any combination of the above, as well as other suitable storage media. For example, the readable storage medium may also be the memory 920 in fig. 9, and reference may be made to the foregoing for related description, which is not described herein again.

The embodiment of the disclosure also provides an electronic device. Fig. 12 is a schematic block diagram of an electronic device in accordance with at least one embodiment of the present disclosure. As shown in fig. 12, the electronic device 120 may include a parameter setting device 80/90/300 as described above. For example, the electronic device 120 may implement the parameter setting method 20 provided in any embodiment of the present disclosure.

In the present disclosure, the term "plurality" means two or more unless explicitly defined otherwise.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A parameter setting apparatus communicatively coupled to a multi-stage continuous time linear equalizer, the parameter setting apparatus comprising an initialization module communicatively coupled to the multi-stage continuous time linear equalizer, an input module communicatively coupled to the multi-stage continuous time linear equalizer, an acquisition module communicatively coupled to the multi-stage continuous time linear equalizer, and a setting module communicatively coupled to the input module, the acquisition module, and the multi-stage continuous time linear equalizer, each stage of the multi-stage continuous time linear equalizer comprising a plurality of inductors,

the initialization module is configured to initialize a plurality of parameters of the multistage continuous-time linear equalizer;

the input module is configured to input a first data sequence to the multi-stage continuous-time linear equalizer;

the acquisition module is configured to acquire a second data sequence output from the multi-stage continuous-time linear equalizer;

the setting module is configured to set the plurality of parameters based on the first data sequence and the second data sequence,

wherein the plurality of parameters includes a first parameter indicating an inductance value of each of the plurality of inductors.

2. The apparatus of claim 1, wherein each stage of the multi-stage continuous-time linear equalizer further comprises a plurality of resistors and a plurality of capacitors, the plurality of parameters further comprising a second parameter and a third parameter, wherein the second parameter indicates a resistance value of each of the plurality of resistors and the third parameter indicates a capacitance value of each of the plurality of capacitors.

3. The apparatus of claim 2, wherein the setup module comprises:

the first sub-setting module is configured to adjust the value of the first parameter and/or the second parameter and keep the third parameter at a third preset value;

a second sub-setup module configured to store the respective first and second parameters to a first scan set in response to the first and second data sequences being the same;

a third sub-setting module configured to set the first parameter to a first calibrated value and the second parameter to a second calibrated value based on the first scan set.

4. The apparatus of claim 3, wherein the first sub-setup module comprises:

the first adjusting module is configured to increase the value of the first parameter from a first preset value in a first preset interval; or the value of the second parameter is increased from a second preset value according to a second preset interval.

5. The apparatus of claim 3, wherein the first calibration value is an average or median of at least one of the first parameters stored in the first scan set, and the second calibration value is an average or median of at least one of the second parameters stored in the first scan set.

6. The apparatus of claim 2, wherein the setup module comprises:

a fourth setting submodule configured to maintain the first parameter as a first corrected value, maintain the second parameter as a second corrected value, and adjust a value of the third parameter;

a fifth setting sub-module configured to store the corresponding third parameter to a second scan set in response to the first data sequence and the second data sequence being the same;

a sixth setting submodule configured to set the third parameter to a third collation value based on the second scan set.

7. The apparatus of claim 6, wherein the fourth setting submodule comprises a second adjustment module configured to increment a value of the third parameter from a third preset value at a third predetermined interval.

8. The apparatus of claim 6, wherein the third calibration value is a mean or median of at least one of the third parameters stored in the second scan set.

9. The apparatus of claim 2, further comprising a locking module configured to obtain a locking frequency of the multi-stage continuous-time linear equalizer.

10. The apparatus of claim 9, wherein the locking module comprises:

a first lock sub-module configured to set the first parameter to a first lock value, the second parameter to a second lock value, and the third parameter to a third lock value;

a second locking submodule configured to input a reference data signal to the multi-stage continuous-time linear equalizer to determine the locking frequency.

11. The apparatus of claim 10, wherein the first lock value is an intermediate value within an adjustable range of the first parameter, the second lock value is an intermediate value within an adjustable range of the second parameter, and the third lock value is an intermediate value within an adjustable range of the third parameter.

12. The apparatus according to any of claims 1-11, wherein the multi-stage continuous-time linear equalizer is a two-stage continuous-time linear equalizer.

13. A parameter setting method applied to a multi-stage continuous time linear equalizer, each stage of the multi-stage continuous time linear equalizer including a plurality of inductors, the parameter setting method comprising:

initializing a plurality of parameters of the multistage continuous-time linear equalizer;

inputting a first data sequence to the multi-stage continuous-time linear equalizer;

acquiring a second data sequence output from the multistage continuous time linear equalizer; and

setting the plurality of parameters based on the first data sequence and the second data sequence,

14. A parameter setting apparatus comprising:

a processor;

a memory including one or more computer program modules;

wherein the one or more computer program modules are stored in the memory and configured to be executed by the processor, the one or more computer program modules comprising instructions for performing the parameter setting method of claim 13.

15. A non-transitory readable storage medium having stored thereon computer instructions, wherein the computer instructions, when executed by a processor, perform the parameter setting method as recited in claim 13.