CN115021596A

CN115021596A - Constant-current switch power supply system and control circuit and control method thereof

Info

Publication number: CN115021596A
Application number: CN202210778591.XA
Authority: CN
Inventors: 朱力强; 周俊; 方烈义
Original assignee: On Bright Electronics Shanghai Co Ltd
Current assignee: On Bright Electronics Shanghai Co Ltd
Priority date: 2022-07-04
Filing date: 2022-07-04
Publication date: 2022-09-06
Also published as: TW202404237A

Abstract

Provided are a constant current switching power supply system, a control circuit and a control method thereof, wherein the constant current switching power supply system comprises an inductor and a power switch, and the control circuit is configured to: generating a current sampling signal associated with the current detection signal based on a pulse width modulation signal for controlling the turning on and off of the power switch and the current detection signal characterizing the inductor current flowing through the inductor; and generating a pulse width modulation signal based on the current sampling signal, a demagnetization detection signal representing the demagnetization condition of the inductor and a reference voltage, wherein the current sampling signal is the current detection signal when the pulse width modulation signal is at a first logic level, and is a sampling signal generated by sampling the current detection signal when the pulse width modulation signal is at a second logic level.

Description

Constant-current switch power supply system and control circuit and control method thereof

Technical Field

The invention relates to the field of circuits, in particular to a constant-current switch power supply system and a control circuit and a control method thereof.

Background

A switching power supply, also called switching power supply, is a kind of power supply. The function of the switching power supply is to convert a voltage of one level into a voltage or a current required by a user terminal through various types of architectures (e.g., a flyback (flyback) architecture, a BUCK (BUCK) architecture, or a BOOST (BOOST) architecture).

Disclosure of Invention

According to the embodiment of the invention, the control circuit for the constant current switch power supply system comprises an inductor and a power switch, and is configured to: generating a current sampling signal associated with the current detection signal based on a pulse width modulation signal for controlling the turning on and off of the power switch and the current detection signal characterizing the inductor current flowing through the inductor; and generating a pulse width modulation signal based on the current sampling signal, a demagnetization detection signal representing the demagnetization condition of the inductor and a reference voltage, wherein the current sampling signal is the current detection signal when the pulse width modulation signal is at a first logic level, and is a sampling signal generated by sampling the current detection signal when the pulse width modulation signal is at a second logic level.

The control method for the constant-current switching power supply system comprises an inductor and a power switch, and comprises the following steps: generating a current sampling signal associated with the current detection signal based on a pulse width modulation signal for controlling the turning on and off of the power switch and the current detection signal characterizing the inductor current flowing through the inductor; and generating a pulse width modulation signal based on the current sampling signal, a demagnetization detection signal representing the demagnetization condition of the inductor and a reference voltage, wherein the current sampling signal is the current detection signal when the pulse width modulation signal is at a first logic level, and is a sampling signal generated by sampling the current detection signal when the pulse width modulation signal is at a second logic level.

The constant-current switching power supply system comprises the control circuit.

Drawings

The invention may be better understood from the following description of specific embodiments thereof taken in conjunction with the accompanying drawings, in which:

fig. 1 shows an example circuit diagram of a constant current switching power supply system for LED lighting according to an embodiment of the present invention.

Fig. 2 shows a timing diagram of a plurality of signals of the constant current switching power supply system shown in fig. 1.

Fig. 3 shows a circuit diagram of an example circuit implementation of the constant current control unit shown in fig. 1.

Fig. 4 shows a timing diagram of a plurality of signals associated with the sampling control unit shown in fig. 3.

Fig. 5 shows a circuit diagram of another example circuit implementation of the constant current control unit shown in fig. 1.

Fig. 6 shows a timing diagram of a plurality of signals associated with the sampling control unit shown in fig. 5.

Fig. 7 shows a circuit diagram of an example circuit implementation of the error amplifier shown in fig. 5.

Detailed Description

Features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention. The present invention is in no way limited to any specific configuration and algorithm set forth below, but rather covers any modification, replacement or improvement of elements, components or algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

In recent years, Light Emitting Diodes (LEDs) have been widely used in various aspects of social production and life because of their advantages of long life, low cost, and small size, compared to conventional incandescent, halogen, or fluorescent lighting products, and the luminance of LEDs is mainly controlled by the current flowing through the LEDs, so high-precision constant current control is a key to designing a constant current switching power supply system for LED lighting.

Fig. 1 shows an example circuit diagram of a constant current switching power supply system 100 for LED lighting according to an embodiment of the invention. As shown in fig. 1, the constant current switching power supply system 100 adopts a BUCK architecture, and mainly includes a rectifier BD1, an input capacitor C1, a diode D1, an inductor L1, an output load capacitor C2, a power switch Q1, a current detection resistor R1, and a control chip U100, wherein: the system bus voltage VIN supplies power to the control chip U100 through the HV pin of the control chip U100; the control chip U100 outputs a Gate driving signal Gate for driving the power switch Q1 to turn on and off, based on a current detection signal CS representing an inductor current IL (not shown in the figure) flowing through the inductor L1.

As shown in fig. 1, the control chip U100 includes a low dropout regulator (LDO) module 102, a demagnetization detection module 104, a constant current control module 106, and a driver module 108, where: the low drop-out voltage regulator module 102 supplies power to an internal circuit of the control chip U100 based on the system bus voltage VIN; the demagnetization detection module 104 generates a demagnetization detection signal Dem representing the demagnetization of the inductor L1 based on the Gate driving signal Gate and outputs the demagnetization detection signal Dem to the constant current control module 106 (it should be understood that the way in which the demagnetization detection module 104 detects the demagnetization of the inductor L1 is not limited thereto, and the demagnetization detection module 104 may generate the demagnetization detection signal Dem based on a demagnetization detection related signal received from the outside via a chip pin); the constant current control module 106 generates a pulse width modulation signal PWM for controlling on and off of the power switch Q1 based on the reference voltage Vref, the demagnetization detection signal Dem, and the current detection signal CS, and outputs the pulse width modulation signal PWM to the driver module 108; the driver module 108 generates a Gate drive signal Gate based on the pulse width modulation signal PWM and outputs the Gate drive signal Gate to the Gate of the power switch Q1.

In the constant-current switching power supply system 100 shown in fig. 1, the power switch Q1 is in an on state when the pulse width modulation signal PWM is at a logic high level, and is in an off state when the pulse width modulation signal PWM is at a logic low level; the reference voltage Vref is used for controlling the magnitude of the system output current Iout of the constant current switch power supply system 100; the demagnetization detection signal Dem is used for controlling the constant current of the system and controlling the constant current switch power supply system 100 to work in a Discontinuous Conduction Mode (DCM) or a quasi-resonance (QR) mode; the current detection signal CS is used to implement closed-loop constant current control of the constant current switching power supply system 100.

Here, the design value of the system output current Iout may be represented by the following equation 1:

in the constant-current switching power supply system 100 shown in fig. 1, the inductor current IL flowing through the inductor L1 is mainly used to exhibit an approximately triangular waveform characteristic in one switching cycle of the power switch Q1, so as to realize constant-current control. However, since the common ground BUCK architecture is adopted, the current detection resistor R1 cannot detect the inductor current IL flowing through the inductor L1 during the time when the power switch Q1 is in the off state, so in the conventional constant current control scheme, the constant current control is realized by acquiring the peak voltage CS _ peak of the current detection signal CS before the power switch Q1 changes from the on state to the off state and the demagnetization time of the inductor L1 and performing the triangular area operation based on both of them.

Fig. 2 shows a timing diagram of a plurality of signals in the constant current switching power supply system 100 shown in fig. 1. As shown in fig. 2, the inductor current IL flowing through the inductor L1 exhibits an approximately triangular waveform characteristic in one switching cycle of the power switch Q1 (i.e., the duration Ton during which the Gate drive signal Gate is at a logic high level + the duration Toff during which the Gate drive signal Gate is at a logic low level); and during the time that the power switch Q1 is in the off state (i.e., during the duration Toff in which the Gate drive signal Gate is at the logic low level), the current detection signal CS is 0V.

Since the system bus voltage VIN is not an ideal dc voltage but has power frequency fluctuations, the inductor current IL flowing through the inductor L1 does not ideally increase linearly for the duration Ton of the on state of the power switch Q1. Specifically, the inductor current IL flowing through the inductor L1 when the power switch Q1 is in the on state may be represented by the following equation 2:

I _{L_Ton} ＝L×(Vin-Vout)×Ton <equation 2>

Wherein, I _{L_Ton} The inductor current flowing through the inductor L1 when the power switch Q1 is in the on state is shown, Vin represents the system bus voltage Vin, Vout represents the system output voltage, and L represents the inductance of the inductor L1. As can be seen from equation 2, the inductor current IL is distorted more with respect to linear variations when the system bus voltage VIN is low and close to the system output voltage.

Since the system output current Iout is the inductor current I flowing through the inductor L1 when the power switch Q1 is in the on state _{L_Ton} And inductor current I flowing through inductor L1 when power switch Q1 is in an off state _{L_Toff} The sum of the voltage values of the system bus and the voltage value of the system bus, therefore, a large deviation exists between the actual value and the designed value of the system output current Iout under the condition that the system bus voltage VIN is low, and the system output current Iout changes along with the change of the system bus voltage VIN. Particularly, under the condition that the power factor of the constant current switch power supply system 100 is high, the input bus voltage VIN changes in an M-wave shape, that is, the system bus voltage VIN changes in a range of approximately 0V to 1.4 times of the ac line voltage in one power frequency ac cycle, and the change of the ac line voltage has a greater influence on the accuracy of the system output current Iout, that is, the line voltage regulation capability of the constant current switch power supply system 100 is poor. Therefore, it is an urgent problem to improve the constant current control accuracy of the constant current switching power supply system 100, especially the line voltage regulation capability.

In view of the above-described circumstances, a constant current control scheme according to an embodiment of the present invention is proposed in which constant current control is performed in stages according to the on/off state of the power switch Q1 and the variation of the inductor current IL flowing through the inductor L1 to eliminate an error caused by distortion of the inductor current IL flowing through the inductor L1 and improve the constant current control accuracy.

As can be seen from fig. 2, the distortion of the inductor current IL flowing through the inductor L1 mainly occurs in the duration Ton of the on state of the power switch Q1, and the inductor current IL flowing through the inductor L1 and the demagnetization time of the inductor L1 are basically linear in the duration Toff of the off state of the power switch Q1, so that the staged constant current control is an optimized constant current control scheme, i.e. the current detection signal CS is not sampled when the power switch Q1 is in the on state but is directly integrated based on the current detection signal CS, and the peak sampling and integration operation mode is adopted when the power switch Q1 is in the off state, so that the main information of the inductor current IL is completely detected by the control chip U100 within one complete switching period of the power switch Q1 and participates in the operation equation of the system output current Iout, and the system output current Iout is more consistent with the ideal design 1, and hardly varies with the system bus voltage VIN.

The constant current control scheme according to the embodiment of the present invention is mainly implemented by the constant current control unit 106 shown in fig. 1. Specifically, the constant current control unit 106 may be configured to: generating a current sampling signal CS _ sample associated with the current detection signal CS based on a pulse width modulation signal PWM for controlling on and off of the power switch Q1 and the current detection signal CS indicative of an inductor current IL flowing through an inductor L1; and generating a pulse width modulation signal PWM based on the current sampling signal CS, the demagnetization detection signal Dem representing the demagnetization of the inductor L1, and the reference voltage Vref, wherein the current sampling signal CS _ sample is the current detection signal CS itself when the pulse width modulation signal PWM is at a first logic level (e.g., a logic high level), and is a sampling signal generated by sampling the current detection signal CS when the pulse width modulation signal PWM is at a second logic level (e.g., a logic low level).

In some embodiments, the constant current control unit 106 may be further configured to: based on the current sampling signal CS _ sample and the reference voltage Vref, an off control signal PWM _ off for controlling the power switch Q1 to change from the on state to the off state is generated.

In some embodiments, the constant current control unit 106 may be further configured to: the demagnetization detection signal Dem is used as an on control signal for controlling the power switch Q1 to change from the off state to the on state.

In some embodiments, the constant current control unit 106 may be further configured to: generating an error compensation signal CMP based on the current sampling signal CS _ sample and the reference voltage Vref; generating a Ramp signal Ramp based on the pulse width modulation signal PWM or the current detection signal CS; and generating a turn-off control signal PWM _ off based on the error compensation signal CMP and the Ramp signal Ramp.

Fig. 3 shows a circuit diagram of an example circuit implementation of the constant current control unit 106 shown in fig. 1. As shown in fig. 3, the constant current control unit 106 includes a sampling control unit U200, an error amplifier U201, a ramp generation unit U202, a comparator U203, an RS flip-flop U204, and a capacitor C203, where: the sampling control unit U200 receives the current detection signal CS, generates a current sampling signal CS _ sample based on the current detection signal CS, and outputs the current sampling signal CS _ sample to the error amplifier U201; two input ends of the error amplifier U201 respectively receive a reference voltage Vref and a current sampling signal CS _ sample, generate an error amplification signal by amplifying an error between the current sampling signal CS _ sample and the reference voltage Vref, and output the error amplification signal to the capacitor C203; the capacitor C203 generates an error compensation signal CMP by integrating the error amplification signal and outputs the error compensation signal CMP to the comparator U203; the Ramp generating unit U202 receives the pulse width modulation signal PWM or the current detection signal CS, generates a Ramp signal Ramp based on the pulse width modulation signal PWM or the current detection signal CS, and outputs the Ramp signal Ram to the comparator U203; two input ends of the comparator U203 respectively receive the error compensation signal CMP and the Ramp signal Ramp, generate a turn-off control signal PWM _ off based on the error compensation signal CMP and the Ramp signal Ramp, and output the turn-off control signal PWM _ off to the RS flip-flop U204; the two input terminals of the RS flip-flop U204 respectively receive the turn-off control signal PWM _ off and the demagnetization detection signal Dem, generate the pulse width modulation signal PWM based on the turn-off control signal PWM _ off and the demagnetization detection signal Dem, and output the pulse width modulation signal PWM to the driver module 1028, wherein the turn-off control signal PWM _ off controls the pulse width modulation signal PWM to change from a logic high level to a logic low level, and the demagnetization detection signal Dem controls the pulse width modulation signal PWM to change from a logic low level to a logic high level.

Further, as shown in fig. 3, the sampling control unit U200 includes switches K201, K202, and K203 and capacitors C201 and C202, wherein the capacitances of the capacitors C201 and C202 are the same, the on and off of the switches K201 and K203 are controlled by the pulse width modulation signal PWM, and the on and off of the switch K202 is controlled by the switch control signal SW 1. Here, the switches K201 and K203 are in an on state when the pulse width modulation signal PWM is at a logic high level, and are in an off state when the pulse width modulation signal PWM is at a logic low level; the switch K202 is turned on when the switch control signal SW1 is at a logic high level, and is turned off when the switch control signal SW1 is at a logic low level.

Fig. 4 shows a timing diagram of a plurality of signals associated with the sampling control unit U200 shown in fig. 3. As shown in fig. 4, a rising edge (a time point when the logic low level changes to the logic high level) of the switch control signal SW1 is delayed by a preset time (illustrated as t1 to t2) from a rising edge of the pulse width modulation signal PWM, and a falling edge (a time point when the logic high level changes to the logic low level) of the switch control signal SW1 coincides with the falling edge of the pulse width modulation signal PWM; through the sampling control circuit U200, when the pulse width modulation signal PWM is at a logic high level, the complete current detection signal CS can be input to the error amplifier U201 as the current sampling signal CS _ sample, and when the pulse width modulation signal PWM is at a logic low level, the peak voltage CS _ peak of the current detection signal CS is sampled and subjected to the operation of dividing by 2 to obtain the current sampling signal CS _ sample, which is input to the error amplifier U201.

Specifically, as shown in fig. 3 and 4, when the pulse width modulation signal PWM is at a logic high level (t0 to t1), the switches K201 and K203 are in an on state, the switch K202 is in an off state, the current detection signal CS is directly input to the capacitor C201 and the input end of the error amplifier U201, the voltage Vc202 across the capacitor C202 is 0V, and the voltage Vc201 across the capacitor C201 is Vcs _ sample; in a peak sampling stage (t 1-t 2) when the PWM signal PWM is at a logic low level, the switches K201, K202, and K203 are all in an off state, the peak voltage CS _ peak of the current detection signal CS is stored at the input ends of the capacitor C201 and the error amplifier U201, the voltage Vc202 across the capacitor C202 is 0V, and the voltage Vc201 across the capacitor C201 is Vcs _ sample which is Vcs _ peak; in the operation stage (t2 to t3) of "divide by 2" of the peak value when the PWM signal PWM is at a logic low level, the switches K201 and K203 are in an off state, the switch K202 is in an on state, the peak voltage CS _ peak stored in the capacitor C201 is regulated by the capacitor C202 through the switch K202, because the capacitance values of the capacitors C201 and C202 are equal, and the initial voltage of the capacitor C202 is 0V, the operation of "divide by 2" of the peak voltage CS _ peak can be realized, that is, Vc201 — Vc202 — Vcs _ sample — Vcs _ peak/2.

As can be seen, in the embodiments described in connection with fig. 3 and 4, the constant current control unit 106 may be further configured to: when the pulse width modulation signal PWM is at a logic low level, sampling the peak voltage CS _ peak of the current detection signal CS and performing the operation of dividing the sampling result by 2 to generate a current sampling signal CS _ sample; generating an error compensation signal CMP by carrying out error amplification on the current sampling signal CS _ sample and the reference voltage Vref; and generating a turn-off control signal PWM _ off by comparing the error compensation signal CMP and the Ramp signal Ramp.

Fig. 5 shows a circuit diagram of another example circuit implementation of the constant current control unit 106 shown in fig. 1. As shown in fig. 5, the constant current control unit 106 includes a sampling control unit U300, an error amplifier U301, a ramp generation unit U302, a comparator U303, an RS flip-flop U304, and a capacitor C303, wherein the sampling control unit U300 performs the same processing on the current detection signal CS as the sampling control unit U200 when the pulse width modulation signal PWM is at a logic high level, but samples only the peak voltage CS _ peak of the current detection signal CS without performing the operation of "dividing by 2" when the pulse width modulation signal PWM is at a logic low level, and the operation of "dividing by 2" on the peak voltage CS _ peak is realized by the error amplifier U301. In addition, the processing of the ramp generating unit U302, the comparator U303, the RS flip-flop U304, and the capacitor C303 is the same as that of the corresponding units shown in fig. 4, and therefore, the description thereof is omitted. Fig. 6 shows a timing diagram of a plurality of signals associated with the sampling control unit U300 shown in fig. 5.

Fig. 7 shows a circuit diagram of an example circuit implementation of the error amplifier U300 shown in fig. 6. As shown in fig. 7, the error amplifier U301 performs an operation of dividing "by 2" of the current sampling signal CS _ sample by two resistors R502 and R503 having equal resistance values, a switch K501, and a pulse width modulation signal PWM, and performs error amplification on the operation result of dividing "by 2" and a reference voltage Vref.

As can be seen, in the embodiments described in connection with fig. 5 to 7, the constant current control unit 106 may be further configured to: when the pulse width modulation signal PWM is at a logic low level, a current sampling signal CS _ sample is generated by sampling the peak voltage CS _ peak of the current detection signal CS; generating an error compensation signal CMP by performing a division operation of 'division by 2' on the current sampling signal CS _ sample and performing error amplification on an operation result and a reference voltage Vref; and generating a turn-off control signal PWM _ off by comparing the error compensation signal CMP and the Ramp signal Ramp.

As described in conjunction with fig. 1 to 7, the control method for the constant current switching power supply system 100 includes: generating a current sampling signal CS _ sample associated with the current detection signal CS based on a pulse width modulation signal PWM for controlling on and off of the power switch Q1 and the current detection signal CS indicative of an inductor current IL flowing through an inductor L1; and generating a pulse width modulation signal PWM based on the current sampling signal CS _ sample, the demagnetization detection signal Dem representing the demagnetization of the inductor L1, and the reference voltage Vref, wherein the current sampling signal CS _ sample is the current detection signal CS itself when the pulse width modulation signal PWM is at the first logic level, and is a sampling signal generated by sampling the current detection signal CS when the pulse width modulation signal PWM is at the second logic level.

In addition, the specific details of the control method according to the embodiment of the present invention are similar to the corresponding contents of the control chip U100 described with reference to fig. 1 to 7, and are not repeated herein.

In summary, according to the control circuit and the control method for the constant current switching power supply system according to the embodiments of the present invention, the constant current control is performed in stages according to the on/off state of the power switch Q1 and the variation of the inductor current IL flowing through the inductor L1, so that the error caused by the distortion of the inductor current IL flowing through the inductor L1 can be eliminated, and the constant current control accuracy can be improved.

The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. For example, the algorithms described in the specific embodiments may be modified without departing from the basic spirit of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. A control circuit for a constant current switching power supply system, wherein the constant current switching power supply system includes an inductor and a power switch, the control circuit configured to:

generating a current sampling signal associated with the current detection signal based on a pulse width modulation signal for controlling the turn-on and turn-off of the power switch and the current detection signal characterizing the inductor current flowing through the inductor; and

generating the pulse width modulation signal based on the current sampling signal, a demagnetization detection signal representing the demagnetization condition of the inductor, and a reference voltage, wherein

The current sampling signal is the current detection signal itself when the pulse width modulated signal is at a first logic level and is a sampling signal generated by sampling the current detection signal when the pulse width modulated signal is at a second logic level.

2. The control circuit of claim 1, further configured to:

and when the pulse width modulation signal is at the second logic level, generating the current sampling signal by sampling the peak voltage of the current detection signal.

3. The control circuit of claim 1, further configured to:

and when the pulse width modulation signal is at the second logic level, generating the current sampling signal by sampling the peak voltage of the current detection signal and performing the operation of dividing the sampling result by 2.

4. The control circuit of claim 1, further configured to:

and generating a turn-off control signal for controlling the power switch to change from an on state to an off state based on the current sampling signal and the reference voltage.

5. The control circuit of claim 4, further configured to:

generating an error compensation signal based on the current sampling signal and the reference voltage;

generating a ramp signal based on the pulse width modulation signal or the current detection signal; and

generating the turn-off control signal based on the error compensation signal and the ramp signal.

6. The control circuit of claim 5, further configured to:

generating the error compensation signal by error amplifying the current sampling signal and the reference voltage.

7. The control circuit of claim 5, further configured to:

and generating the error compensation signal by performing a division operation of dividing the current sampling signal by 2 and performing error amplification on an operation result and the reference voltage.

8. The control circuit of claim 5, further configured to:

generating the turn-off control signal by comparing the error compensation signal and the ramp signal.

9. The control circuit of claim 1, further configured to:

and utilizing the demagnetization detection signal as an on control signal for controlling the power switch to change from an off state to an on state.

10. A control method for a constant current switching power supply system, wherein the constant current switching power supply system comprises an inductor and a power switch, the control method comprising:

The current sampling signal is the current detection signal itself when the pulse width modulation signal is at a first logic level and is a sampling signal generated by sampling the current detection signal when the pulse width modulation signal is at a second logic level.

11. The control method according to claim 10, wherein the process of generating the current sampling signal includes:

12. The control method according to claim 10, wherein the process of generating the current sampling signal includes:

13. The control method according to claim 10, wherein the process of generating the pulse width modulation signal includes:

14. The control method according to claim 13, wherein the process of generating the shutdown control signal includes:

15. The control method of claim 14, wherein the error compensation signal is generated by error amplifying the current sample signal and the reference voltage.

16. The control method according to claim 14, wherein the error compensation signal is generated by performing a division by 2 operation on the current sampling signal and error-amplifying the operation result and the reference voltage.

17. The control method of claim 14, wherein the turn-off control signal is generated by comparing the error compensation signal and the ramp signal.

18. The control method according to claim 10, the process of generating the pulse width modulation signal comprising:

19. A constant current switching power supply system comprising the control circuit of any one of claims 1 to 9.