CN115019734A - Pixel compensation circuit, system and method - Google Patents
Pixel compensation circuit, system and method Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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Abstract
The invention provides a pixel compensation circuit, a system and a method.A first transistor is connected with a capacitor, a fourth transistor, a sixth transistor, a second transistor and a third transistor; the second transistor is connected with the first control signal and a power supply; the third transistor is connected with the second control signal and the data voltage; the fourth transistor is connected with the third control signal and the capacitor; the fifth transistor is connected with the fourth control signal, the capacitor and the reset voltage; the sixth transistor is connected with the fifth control signal and the light-emitting device; the seventh transistor is connected to the fourth control signal, the light emitting device, and the reset voltage. The circuit can control a plurality of control signals to form different loops, and improve short-term afterimage caused by hysteresis effect; before the light emitting device emits light, the threshold voltage of the first transistor is compensated, so that the current finally flowing through the light emitting device is independent of the threshold voltage of the first transistor, and the phenomena of uneven brightness, Mura and the like of the AMOLED display panel caused by threshold voltage drift are eliminated.
Description
Technical Field
The present invention relates to the field of integrated circuit technology, and in particular, to a pixel compensation circuit, system and method.
Background
The AMOLED (Active Matrix/Organic Light Emitting Diode) has the characteristics of fast response speed, high contrast, wide viewing angle, etc., and is now widely developed. The AMOLED display panel adopts an independent thin Film transistor TFT (thin Film transistor) to control each pixel, however, due to the hysteresis effect of the TFT, when the picture is switched from half black and half white to the full picture is a gray scale 48, the AMOLED display panel has short-term poor afterimage, namely, the afterimage phenomenon exists, and the display effect of the AMOLED display panel is reduced.
Disclosure of Invention
The invention aims to provide a pixel compensation circuit, a system and a method, which are used for improving the afterimage phenomenon and improving the display effect of an AMOLED display panel.
The invention provides a pixel compensation circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a capacitor, and a light emitting device; the first end of the first transistor is connected with the second end of the capacitor, the second end of the first transistor is respectively connected with the second end of the fourth transistor and the third end of the sixth transistor, and the third end of the first transistor is respectively connected with the second end of the second transistor and the second end of the third transistor; the first end of the capacitor is connected with the anode of the power supply; the first end of the second transistor is connected with the first control signal, and the third end of the second transistor is connected with the anode of the power supply; the first end of the third transistor is connected with the second control signal, and the third end of the third transistor is connected with the data voltage; the first end of the fourth transistor is connected with a third control signal, and the third end of the fourth transistor is connected with the second end of the capacitor; a first end of the fifth transistor is connected with the fourth control signal, a second end of the fifth transistor is connected with a second end of the capacitor, and a third end of the fifth transistor is connected with the reset voltage; a first end of the sixth transistor is connected with the fifth control signal, a second end of the sixth transistor is connected with an anode of the light-emitting device, and a cathode of the light-emitting device is connected with a cathode of the power supply; the first end of the seventh transistor is connected with the fourth control signal, the second end of the seventh transistor is connected with the anode of the light-emitting device, and the third end of the seventh transistor is connected with the reset voltage.
Furthermore, each transistor is a PMOS thin film transistor; the first end of each transistor is a grid electrode of the transistor, the second end of each transistor is a drain electrode of the transistor, and the third end of each transistor is a source electrode of the transistor; the light emitting device is a light emitting diode.
The invention provides a pixel compensation system, comprising: the pixel compensation circuit comprises a first control module, a second control module, a third control module, a fourth control module, a fifth control module, a reset module and any one of the pixel compensation circuits; the first control module, the second control module, the third control module, the fourth control module, the fifth control module and the reset module are respectively connected with the pixel compensation circuit; the first control module is used for outputting a first control signal for the pixel compensation circuit; the second control module is used for outputting a second control signal for the pixel compensation circuit; the third control module is used for outputting a third control signal for the pixel compensation circuit; the fourth control module is used for outputting a fourth control signal for the pixel compensation circuit; the fifth control module is used for outputting a fifth control signal for the pixel compensation circuit; the reset module is used for providing reset voltage for the pixel compensation circuit.
The invention provides a pixel compensation method, which is applied to any one of the pixel compensation circuits; the method comprises the following steps: when the circuit works in a reset stage, the first control signal, the fourth control signal and the reset voltage are controlled to be at a low level, and the second control signal, the third control signal and the fifth control signal are controlled to be at a high level, so that the first transistor, the second transistor, the fifth transistor and the seventh transistor are conducted, and the capacitor and the light-emitting device are reset.
Further, in the reset phase, the potentials of the second terminal of the capacitor and the anode of the light emitting device are both reset to the low-level reset voltage.
Further, the method further comprises: when the circuit works in an afterimage improvement stage, the first control signal and the third control signal are controlled to be at low level, and the second control signal, the fourth control signal and the fifth control signal are controlled to be at high level, so that the first transistor, the second transistor and the fourth transistor are conducted to charge the capacitor; when the potential of the second end of the capacitor reaches the first voltage, the first transistor is controlled to be turned off so as to stop charging the capacitor.
Further, the first voltage is a sum of a positive electrode potential of the power supply and a threshold voltage of the first transistor.
Further, the method further comprises: when the circuit works in the compensation stage, the second control signal and the third control signal are controlled to be at a low level, the first control signal, the fourth control signal and the fifth control signal are controlled to be at a high level, so that the first transistor, the third transistor and the fourth transistor are conducted to charge the reset capacitor, and when the potential of the second end of the capacitor reaches a second voltage, the first transistor is controlled to be turned off to stop charging the capacitor.
Further, the second voltage is calculated according to the following formula:
V 2 ＝Vdata+Vth；
wherein Vdata represents a data voltage; vth represents a threshold voltage of the first transistor.
Further, the method further comprises: when the circuit works in a light-emitting stage, the first control signal and the fifth control signal are controlled to be at a low level, and the second control signal, the third control signal and the fourth control signal are controlled to be at a high level, so that the first transistor, the second transistor and the sixth transistor are switched on, and the light-emitting device is controlled to emit light; wherein the current flowing through the light emitting device is calculated based on the data voltage and the positive potential of the power supply.
According to the pixel compensation circuit, the pixel compensation system and the pixel compensation method, the first end of the first transistor is connected with the second end of the capacitor, the second end of the first transistor is respectively connected with the second end of the fourth transistor and the third end of the sixth transistor, and the third end of the first transistor is respectively connected with the second end of the second transistor and the second end of the third transistor; the first end of the capacitor is connected with the anode of the power supply; the first end of the second transistor is connected with the first control signal, and the third end of the second transistor is connected with the anode of the power supply; the first end of the third transistor is connected with the second control signal, and the third end of the third transistor is connected with the data voltage; the first end of the fourth transistor is connected with a third control signal, and the third end of the fourth transistor is connected with the second end of the capacitor; a first end of the fifth transistor is connected with the fourth control signal, a second end of the fifth transistor is connected with a second end of the capacitor, and a third end of the fifth transistor is connected with the reset voltage; a first end of the sixth transistor is connected with the fifth control signal, a second end of the sixth transistor is connected with an anode of the light-emitting device, and a cathode of the light-emitting device is connected with a cathode of the power supply; the first end of the seventh transistor is connected with the fourth control signal, the second end of the seventh transistor is connected with the anode of the light-emitting device, and the third end of the seventh transistor is connected with the reset voltage. The circuit can control a plurality of control signals to form different loops, and improve short-term afterimage caused by hysteresis effect; before the light emitting device emits light, the threshold voltage of the first transistor is compensated, so that the current finally flowing through the light emitting device is independent of the threshold voltage of the first transistor, and the phenomena of uneven brightness, Mura and the like of the AMOLED display panel caused by threshold voltage drift are eliminated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a schematic diagram of a pixel compensation circuit according to an embodiment of the invention;
fig. 2 is a schematic circuit diagram of a reset phase according to an embodiment of the present invention;
FIG. 3 is a timing control diagram according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a loop of an image sticking improvement stage according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a compensation phase according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of a light emitting stage according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the following embodiments, and it should be understood that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Currently, the AMOLED display panel uses an independent thin Film transistor tft (thin Film transistor) to control each pixel, and a capacitor corresponding to each pixel for storing data to maintain each pixel in a light-emitting state, however, in the driving scheme of the AMOLED display panel, the OLED (Organic Light Emitting Diode) controls the luminance of Light emission based on the amount of current flowing through the OLED, and the electrical parameters of the tft used for driving directly affect the display effect of the display, for example, due to the influence of the manufacturing process, the threshold voltage Vth of the thin film transistor in each pixel may drift, causing the problem of non-uniform Vth of the AMOLED product, and at this time, the same data voltage is provided to the pixels, and the current flowing through the OLED of each pixel still has a difference, causing the phenomena of non-uniform brightness, Mura (moire) and the like of the AMOLED display panel. Meanwhile, due to the hysteresis effect of the TFT, the AMOLED has short-term poor residual image, namely when the picture (half black and half white) is switched to the full picture with the gray scale of 48, the residual image phenomenon occurs, and the picture can be restored to be normal within a certain time.
Based on this, embodiments of the present invention provide a pixel compensation circuit, system and method to solve the problems of brightness nonuniformity, Mura (Mura) and short-term image retention of an AMOLED display panel, and the technique can be applied to AMOLED products.
To facilitate understanding of the present embodiment, a detailed description is first given of a pixel compensation circuit disclosed in the present embodiment; as shown in fig. 1, includes: a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, a capacitor Cst, and a light emitting device;
a first terminal of the first transistor M1 is connected to the second terminal of the capacitor Cst, a second terminal of the first transistor M1 is connected to the second terminal of the fourth transistor M4 and the third terminal of the sixth transistor M6, respectively, and a third terminal of the first transistor M1 is connected to the second terminal of the second transistor M2 and the second terminal of the third transistor M3, respectively; the first terminal of the capacitor Cst is connected to the positive electrode of the power supply.
The transistor is generally a MOS transistor; as shown in fig. 1, the circuit includes 7 MOS transistors, which correspond to M1-M7, a storage capacitor Cst, and a light emitting device OLED; taking a transistor as an MOS transistor as an example, the first terminal refers to a gate (the same below) of the MOS transistor, the second terminal refers to a drain (the same below) of the MOS transistor, and the third terminal refers to a source (the same below) of the MOS transistor; specifically, as shown in fig. 1, the gate of the first transistor M1 is connected to the second terminal of the capacitor Cst, and the drain of the first transistor M1 is connected to the drain of the fourth transistor M4 and the source of the sixth transistor M6, respectively; the source of the first transistor M1 is connected to the drain of the second transistor M2 and the drain of the third transistor M3, respectively, and the first terminal of the capacitor Cst is connected to the power supply positive electrode ELVDD.
The first end of the second transistor is connected with the first control signal, and the third end of the second transistor is connected with the anode of the power supply; as shown in fig. 1, the gate of the second transistor M2 is connected to sn (n), i.e., the first control signal, and the source of the second transistor M2 is connected to the positive electrode ELVDD of the power supply.
The first end of the third transistor is connected with the second control signal, and the third end of the third transistor is connected with the data voltage; as shown in fig. 1, the gate of the third transistor M3 is connected to gate (n), i.e., the second control signal, and the source of the third transistor M3 is connected to the data voltage Vdata.
The first end of the fourth transistor is connected with a third control signal, and the third end of the fourth transistor is connected with the second end of the capacitor; as shown in fig. 1, the gate of the fourth transistor M4 is connected to com (n), which is the third control signal, and the source of the fourth transistor M4 is connected to the second terminal of the capacitor Cst, which is also connected to the gate of the first transistor M1.
A first end of the fifth transistor is connected with the fourth control signal, a second end of the fifth transistor is connected with a second end of the capacitor, and a third end of the fifth transistor is connected with the reset voltage; as shown in fig. 1, the Gate of the fifth transistor M5 is connected to Gate (n-1), i.e., the fourth control signal, and the drain of the fifth transistor M5 is connected to the second terminal of the capacitor Cst, i.e., to both the Gate of the first transistor M1 and the source of the fourth transistor M4.
A first end of the sixth transistor is connected with the fifth control signal, a second end of the sixth transistor is connected with an anode of the light-emitting device, and a cathode of the light-emitting device is connected with a cathode of the power supply; as shown in fig. 1, the gate of the sixth transistor M6 is connected to em (n), i.e., a fifth control signal, the drain of the sixth transistor M6 is connected to the anode of the light emitting device OLED, and the cathode of the light emitting device OLED is connected to the negative power supply ELVSS.
A first end of the seventh transistor is connected with the fourth control signal, a second end of the seventh transistor is connected with the anode of the light-emitting device, and a third end of the seventh transistor is connected with the reset voltage; the Gate of the seventh transistor M7 is connected to Gate (n-1), i.e., the fourth control signal, the drain of the seventh transistor M7 is connected to the anode of the light emitting device OLED, and the source of the seventh transistor M7 is connected to the reset voltage RES _ X.
In practical implementation, the gates of the 7 MOS transistors can be provided with respective corresponding control signals according to a time sequence to form different loops, and the short-term image retention phenomenon can be improved and the threshold voltage of the first transistor can be compensated by controlling the different loops.
In the pixel compensation circuit, the first end of the first transistor is connected to the second end of the capacitor, the second end of the first transistor is respectively connected to the second end of the fourth transistor and the third end of the sixth transistor, and the third end of the first transistor is respectively connected to the second end of the second transistor and the second end of the third transistor; the first end of the capacitor is connected with the anode of the power supply; the first end of the second transistor is connected with the first control signal, and the third end of the second transistor is connected with the anode of the power supply; the first end of the third transistor is connected with the second control signal, and the third end of the third transistor is connected with the data voltage; the first end of the fourth transistor is connected with a third control signal, and the third end of the fourth transistor is connected with the second end of the capacitor; a first end of the fifth transistor is connected with the fourth control signal, a second end of the fifth transistor is connected with a second end of the capacitor, and a third end of the fifth transistor is connected with the reset voltage; a first end of the sixth transistor is connected with the fifth control signal, a second end of the sixth transistor is connected with an anode of the light-emitting device, and a cathode of the light-emitting device is connected with a cathode of the power supply; the first end of the seventh transistor is connected with the fourth control signal, the second end of the seventh transistor is connected with the anode of the light-emitting device, and the third end of the seventh transistor is connected with the reset voltage. The circuit can control a plurality of control signals to form different loops, and improve short-term afterimage caused by hysteresis effect; before the light emitting device emits light, the threshold voltage of the first transistor is compensated, so that the current finally flowing through the light emitting device is independent of the threshold voltage of the first transistor, and the phenomena of uneven brightness, Mura and the like of the AMOLED display panel caused by threshold voltage drift are eliminated.
Further, each transistor is a PMOS thin film transistor. In the scheme, the 7 transistors are all P-channel MOS transistors, and each MOS transistor is a thin film transistor; the first end of each transistor is a grid electrode of the transistor, the second end of each transistor is a drain electrode of the transistor, and the third end of each transistor is a source electrode of the transistor, namely the first end, the second end and the third end respectively correspond to the grid electrode, the drain electrode and the source electrode of the MOS transistor. The light emitting device is typically a light emitting diode.
An embodiment of the present invention provides a pixel compensation system, including: the pixel compensation circuit comprises a first control module, a second control module, a third control module, a fourth control module, a fifth control module, a reset module and any one of the pixel compensation circuits; the first control module, the second control module, the third control module, the fourth control module, the fifth control module and the reset module are respectively connected with the pixel compensation circuit; the first control module is used for outputting a first control signal for the pixel compensation circuit; the second control module is used for outputting a second control signal for the pixel compensation circuit; the third control module is used for outputting a third control signal for the pixel compensation circuit; the fourth control module is used for outputting a fourth control signal for the pixel compensation circuit; the fifth control module is used for outputting a fifth control signal for the pixel compensation circuit; the reset module is used for providing reset voltage for the pixel compensation circuit.
In practical implementation, the output terminal of the first control module may be specifically connected to the gate of the second transistor M2 in the pixel compensation circuit, and the first control module may output the first control signal at a high level or a low level according to different timings to control the second transistor M2 to be turned on or off; the output end of the second control module may be specifically connected to the gate of the third transistor M3 in the pixel compensation circuit, and the second control module may output a second control signal with a high level or a low level according to different timings to control the third transistor M3 to be turned on or off; the output end of the third control module may be specifically connected to the gate of the fourth transistor M4 in the pixel compensation circuit, and the third control module may output a high-level or low-level third control signal according to different timings to control the fourth transistor M4 to be turned on or off; the output end of the fourth control module may be specifically connected to the gate of the fifth transistor M5 and the gate of the seventh transistor M7 in the pixel compensation circuit, and the fourth control module may output a high-level or low-level fourth control signal at different timings to control the on/off of the fifth transistor M5 and the seventh transistor M7; the output end of the fifth control module may be specifically connected to the gate of the sixth transistor M6 in the pixel compensation circuit, and the fifth control module may output a fifth control signal with a high level or a low level according to different timings to control the sixth transistor M6 to be turned on or off; the reset voltage is typically low.
An embodiment of the present invention provides a pixel compensation method, which is applied to any one of the pixel compensation circuits described above, and the method includes: when the circuit works in a reset stage, the first control signal, the fourth control signal and the reset voltage are controlled to be at low level, and the second control signal, the third control signal and the fifth control signal are controlled to be at high level, so that the first transistor, the second transistor, the fifth transistor and the seventh transistor are conducted, and the capacitor and the light-emitting device are reset.
Specifically, the first transistor, the second transistor, the fifth transistor, and the seventh transistor which are turned on form a first loop with the capacitor and the light emitting device, and the other transistors are turned off.
Referring to fig. 2, a circuit diagram of a reset phase and a timing control diagram of fig. 3 are shown; the stage corresponding to the first loop of the reset stage is a stage corresponding to time T1_1, and at time T1_1, Gate (N-1), sn (N), and RES _ X are at low level, and com (N), Gate (N), and em (N) are at high level, so that the first transistor M1, the second transistor M2, the fifth transistor M5, and the seventh transistor M7 are turned on, and the other transistors are turned off, at this time, the node N1, i.e., the second end of the capacitor Cst, and the first end of the first transistor M1 are reset to low level RES _ X, and the data in the capacitor Cst is reset; the node N3, i.e., the anode voltage of the light emitting device OLED, is reset to the low level RES _ X, the voltage of the node N2 is ELVDD, and as shown in table 1, the reset operation of the anode of the light emitting device OLED and the capacitor Cst is completed in the time period T1_1, which is the first period of the short-term afterimage improvement of the first transistor driving TFT.
TABLE 1
| ITEM | Voltage of |
| N1 | RES_X |
| N2 | ELVDD |
| N3 | RES_X |
In the reset stage, the grid electrode and the source electrode of the driving TFT are reset, so that the driving bias state of each pixel circuit before the charging of the current frame is ensured to be the same, namely VGS (voltage swing) RES (reduced voltage swing) X-ELVDD, and the phenomenon of short-term afterimage caused by hysteresis effect of the TFT, namely the phenomenon of different initial driving states of the pixel circuit caused by the display picture of the previous frame is improved.
The method further comprises the following steps: when the circuit works in an afterimage improvement stage, the first control signal and the third control signal are controlled to be at low level, and the second control signal, the fourth control signal and the fifth control signal are controlled to be at high level, so that the first transistor, the second transistor and the fourth transistor are conducted to charge the capacitor; when the potential of the second end of the capacitor reaches the first voltage, the first transistor is controlled to be turned off so as to stop charging the capacitor.
Specifically, the first transistor, the second transistor and the fourth transistor which are turned on form a second loop with the capacitor, and other transistors are turned off; through the afterimage improvement stage, the first voltage reached by the potential of the second end of the capacitor is the sum of the positive electrode potential of the power supply and the threshold voltage of the first transistor.
Referring to fig. 4, referring to fig. 3, the stage corresponding to the second loop of the afterimage improvement stage is a stage corresponding to time T2_1, during the time T2_1, com (n), sn (n) are at low level, and Gate (n-1), Gate (n), and em (n) are at high level, so that the first transistor M1, the second transistor M2, and the fourth transistor M4 are turned on, and the other transistors are turned off; during the time period T2_1, the positive electrode ELVDD of the power supply charges the capacitor Cst via the second transistor M2, the first transistor M1, and the fourth transistor M4 until the voltage at the second terminal of the capacitor Cst, i.e., the node N1 (i.e., the gate of the first transistor M1), charges to ELVDD + Vth _ M1, the first transistor M1 is turned off, and the charging of the capacitor Cst is stopped, wherein Vth _ M1 represents the threshold voltage of the first transistor M1; after this period, the voltage at the node N1 is ELVDD + Vth, and the voltage at the node N2 is ELVDD, as shown in Table 2.
TABLE 2
| ITEM | Voltage of |
| N1 | ELVDD+Vth |
| N2 | ELVDD |
As shown in fig. 3, the time period T1_2 corresponds to the first loop of the reset phase, i.e. the reset phase is repeatedly executed. The time period T2_2 corresponds to the second loop of the afterimage improvement phase, i.e., the afterimage improvement phase is repeatedly performed, and the time period T1_3 corresponds to the first loop of the reset phase, i.e., the reset phase is repeatedly performed again, so that the data of the capacitor Cst and the anode voltage of the light emitting device OLED are both in the reset state. By repeating the two stages, namely repeating the processes of resetting, charging and resetting, the effect of improving short-term afterimage can be enhanced, for example, the process can be repeated once or twice, and the hysteresis effect can be better eliminated by increasing the number of times of repetition theoretically, but the number of times of repetition is generally not too large, and the number of times of repetition needs to be set in combination with actual requirements.
The method further comprises the following steps: when the circuit works in the compensation stage, the second control signal and the third control signal are controlled to be at a low level, the first control signal, the fourth control signal and the fifth control signal are controlled to be at a high level, so that the first transistor, the third transistor and the fourth transistor are conducted to charge the reset capacitor, and when the potential of the second end of the capacitor reaches a second voltage, the first transistor is controlled to be turned off to stop charging the capacitor.
Specifically, the compensation phase may also be referred to as a data writing and threshold compensation phase, the turned-on first transistor, third transistor and fourth transistor and the capacitor form a third loop, and the other transistors are turned off.
Referring to fig. 5, with reference to fig. 3, a third loop of the compensation phase corresponds to a phase corresponding to time T3, during the time T3, com (n) and Gate (n) are at low level, sn (n), Gate (n-1) and em (n) are at high level, and therefore, the first transistor M1, the third transistor M3 and the fourth transistor M4 are turned on; in the time period T3, the data voltage Vdata charges the capacitor Cst through the third transistor M3, the first transistor M1 and the fourth transistor M4 until the voltage at the node N1 (i.e., the second end of the capacitor Cst and the gate of the first transistor M1) is charged to the sum of the preset data voltage and the threshold voltage of the first transistor, i.e., Vdata + Vth _ M1, the first transistor M1 is turned off, the charging of the capacitor Cst is stopped, and the data voltage writing and the Vth compensation are completed.
As shown in table 3, during the time period T3, i.e. after the third loop, the voltage at the node N2 is Vdata, and the voltage at the node N1, i.e. the second voltage, is calculated according to the following formula:
V 2 ＝Vdata+Vth；
wherein Vdata represents a data voltage; vth represents a threshold voltage of the first transistor.
TABLE 3
| ITEM | Voltage of |
| N1 | Vdata+Vth |
| N2 | Vdata |
The method further comprises the following steps: when the circuit works in a light-emitting stage, the first control signal and the fifth control signal are controlled to be at a low level, and the second control signal, the third control signal and the fourth control signal are controlled to be at a high level, so that the first transistor, the second transistor and the sixth transistor are switched on, and the light-emitting device is controlled to emit light; wherein the current flowing through the light emitting device is calculated based on the data voltage and the positive potential of the power supply.
Specifically, the turned-on first transistor, second transistor, and sixth transistor form a fourth loop with the light emitting device. Referring to fig. 6, referring to fig. 3, a fourth circuit of the light emitting stage corresponds to a stage corresponding to time T4, in the time T4, sn (n) and em (n) are at low level, Gate (n-1), com (n) and Gate (n) are at high level, the first transistor M1, the first transistor M2 and the first transistor M6 are turned on, the other transistors are turned off, and current flows through the light emitting device OLED to complete light emission, wherein the current flowing through the light emitting device OLED is related to the data voltage and the positive potential of the power supply, and is not related to the threshold voltage Vth of the transistor.
According to the current formula of the saturation region of the MOS transistor, the following results can be obtained:
I OLED ∝(Vgs-Vth) 2 ；
wherein Vgs represents the voltage of the gate with respect to the source of the first transistor; vth represents a threshold voltage of the first transistor.
I OLED ∝[Vdata+Vth-ELVDD-Vth] 2 ；
Specifically, the current flowing through the light emitting device is calculated according to the following formula:
I OLED ＝WC ox μ/2L*[Vdata-ELVDD] 2 ；
wherein, W represents the grid width of the thin film transistor; c ox Representing the unit capacitance of the grid oxide layer; μ represents a carrier mobility; l represents a gate length of the thin film transistor; ELVDD represents the positive pole potential of the power supply; vdata represents a data voltage.
As shown in Table 4, the voltages at node N1 and node N2 are as follows:
TABLE 4
| ITEM | Voltage of |
| N1 | Vdata+Vth |
| N2 | ELVDD |
As can be seen from the above results, the threshold voltage Vth of the first transistor is cancelled out, and the driving current flowing through the light emitting device OLED is independent of Vth, so that the display luminance and the picture unevenness of the light emitting device OLED due to the Vth inconsistency are eliminated, and the improvement work for the short-term afterimage defect is completed in the initialization stage.
The above are exemplary embodiments of the invention only, and are not intended to limit the scope of the invention, which is defined by the appended claims. The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present disclosure, "a plurality" means two or more unless specifically limited otherwise.
Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or improvements to the technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.
Claims (10)
1. A pixel compensation circuit, comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a capacitor, and a light emitting device;
a first end of the first transistor is connected to a second end of the capacitor, a second end of the first transistor is respectively connected to a second end of the fourth transistor and a third end of the sixth transistor, and a third end of the first transistor is respectively connected to a second end of the second transistor and a second end of the third transistor; the first end of the capacitor is connected with the anode of the power supply;
the first end of the second transistor is connected with a first control signal, and the third end of the second transistor is connected with the anode of the power supply;
the first end of the third transistor is connected with a second control signal, and the third end of the third transistor is connected with a data voltage;
a first end of the fourth transistor is connected with a third control signal, and a third end of the fourth transistor is connected with a second end of the capacitor;
a first end of the fifth transistor is connected with a fourth control signal, a second end of the fifth transistor is connected with a second end of the capacitor, and a third end of the fifth transistor is connected with a reset voltage;
a first end of the sixth transistor is connected with a fifth control signal, a second end of the sixth transistor is connected with an anode of the light-emitting device, and a cathode of the light-emitting device is connected with a cathode of the power supply;
a first end of the seventh transistor is connected to the fourth control signal, a second end of the seventh transistor is connected to an anode of the light emitting device, and a third end of the seventh transistor is connected to the reset voltage.
2. The circuit of claim 1, wherein each of the transistors is a PMOS thin film transistor; the first end of each transistor is a grid electrode of the transistor, the second end of each transistor is a drain electrode of the transistor, and the third end of each transistor is a source electrode of the transistor;
the light emitting device is a light emitting diode.
3. A pixel compensation system, comprising: a first control module, a second control module, a third control module, a fourth control module, a fifth control module, a reset module, and the pixel compensation circuit of any of claims 1-2; the first control module, the second control module, the third control module, the fourth control module, the fifth control module and the reset module are respectively connected with the pixel compensation circuit;
the first control module is used for outputting a first control signal for the pixel compensation circuit;
the second control module is used for outputting a second control signal for the pixel compensation circuit;
the third control module is used for outputting a third control signal for the pixel compensation circuit;
the fourth control module is used for outputting a fourth control signal for the pixel compensation circuit;
the fifth control module is used for outputting a fifth control signal for the pixel compensation circuit;
the reset module is used for providing reset voltage for the pixel compensation circuit.
4. A pixel compensation method, wherein the method is applied to the pixel compensation circuit according to any one of claims 1-2; the method comprises the following steps:
when the circuit works in a reset stage, the first control signal, the fourth control signal and the reset voltage are controlled to be at a low level, and the second control signal, the third control signal and the fifth control signal are controlled to be at a high level, so that the first transistor, the second transistor, the fifth transistor and the seventh transistor are turned on, and the capacitor and the light-emitting device are reset.
5. The method according to claim 4, wherein in the reset phase, the potentials of the second terminal of the capacitor and the anode of the light emitting device are both reset to the low level of the reset voltage.
6. The method of claim 4, further comprising: when the circuit works in an afterimage improvement stage, the first control signal and the third control signal are controlled to be at low level, and the second control signal, the fourth control signal and the fifth control signal are controlled to be at high level, so that the first transistor, the second transistor and the fourth transistor are conducted to charge the capacitor; and when the potential of the second end of the capacitor reaches a first voltage, controlling the first transistor to be switched off so as to stop charging the capacitor.
7. The method of claim 6, wherein the first voltage is a sum of a positive electrode potential of the power supply and a threshold voltage of the first transistor.
8. The method of claim 4, further comprising: when the circuit works in a compensation stage, the second control signal and the third control signal are controlled to be at a low level, the first control signal, the fourth control signal and the fifth control signal are at a high level, so that the first transistor, the third transistor and the fourth transistor are turned on to charge the reset capacitor, and when the potential of the second end of the capacitor reaches a second voltage, the first transistor is controlled to be turned off to stop charging the capacitor.
9. The method of claim 8, wherein the second voltage is calculated as:
V 2 ＝Vdata+Vth；
wherein Vdata represents the data voltage; vth represents a threshold voltage of the first transistor.
10. The method of claim 4, further comprising: when the circuit works in a light-emitting stage, the first control signal and the fifth control signal are controlled to be at a low level, and the second control signal, the third control signal and the fourth control signal are controlled to be at a high level, so that the first transistor, the second transistor and the sixth transistor are turned on, and the light-emitting device is controlled to emit light; wherein the current flowing through the light emitting device is calculated based on the data voltage and a positive potential of the power supply.
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