CN115002079B - Short address generation method, device, equipment and storage medium - Google Patents

Short address generation method, device, equipment and storage medium Download PDF

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CN115002079B
CN115002079B CN202210590917.6A CN202210590917A CN115002079B CN 115002079 B CN115002079 B CN 115002079B CN 202210590917 A CN202210590917 A CN 202210590917A CN 115002079 B CN115002079 B CN 115002079B
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address
information
target
short address
long
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CN115002079A (en
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罗子强
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Ping An Property and Casualty Insurance Company of China Ltd
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Ping An Property and Casualty Insurance Company of China Ltd
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Abstract

The application relates to the technical field of artificial intelligence and discloses a short address generation method, a device, equipment and a storage medium, wherein the method comprises the following steps: when an address processing instruction is received, constructing a long address collection array, acquiring address collection time and address conversion time, screening target time from the address collection time and the address conversion time to acquire timestamp information, and registering the target time in history processing record information; when the address collection time is reached, extracting a long address to be processed from the received request to store the long address into a long address collection array; when the address conversion time is reached, acquiring a target long address and sequence information of the target long address from a long address collection array; generating short address identification information according to the time stamp information, the number information and the sequence information; generating a target short address according to the domain name information and the short address identification information of the target long address; and establishing a mapping relation between the target short address and the target long address and storing the mapping relation.

Description

Short address generation method, device, equipment and storage medium
Technical Field
The present disclosure relates to the field of artificial intelligence, and in particular, to a method, an apparatus, a device, and a storage medium for generating a short address.
Background
With the rapid development of the internet, the use of jump addresses is more and more in scene. The conventional address is inconvenient to share and propagate due to the overlong length, such as a short message address, a two-dimensional code address, a public number WeChat address and the like. Short addresses are increasingly emerging to address the problem of excessive length. However, the existing short address generation method has a problem of generating repeated short addresses, resulting in incorrect positioning to the original long address using the generated short address.
Disclosure of Invention
The main purpose of the present application is to provide a short address generation method, device, apparatus and storage medium, which aims to solve the problem that the short address generation method in the prior art generates repeated short addresses.
In a first aspect, the present application provides a method for generating a short address, including:
when an address processing instruction is received, constructing a long address collection array, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information;
Acquiring time stamp information corresponding to the target time, and registering the target time in the history processing record information;
when the time reaches the address collection time, receiving a short address generation request, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array;
when the time reaches the address conversion moment, a target long address is obtained from the long address collection array, and the storage order of the target long address in the long address collection array is obtained as the sequence information of the target long address;
acquiring the serial number information of the server, and generating short address identification information according to the time stamp information, the serial number information and the sequence information;
acquiring domain name information according to the target long address, and generating a target short address according to the domain name information and the short address identification information;
and establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
In a second aspect, the present application further provides a short address generating apparatus, including:
the processing instruction receiving module is used for constructing a long address collection array when an address processing instruction is received, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information;
The time stamp obtaining module is used for obtaining time stamp information corresponding to the target time and registering the target time in the historical processing record information;
the long address collection module is used for receiving a short address generation request when the time reaches the address collection time, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array;
the sequence information determining module is used for acquiring a target long address from the long address collection array when the time reaches the address conversion moment, and acquiring the storage order of the target long address in the long address collection array as the sequence information of the target long address;
the identification information determining module is used for acquiring the number information of the server and generating short address identification information according to the time stamp information, the number information and the sequence information;
the short address generation module is used for acquiring domain name information according to the target long address and generating a target short address according to the domain name information and the short address identification information;
and the storage module is used for establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
In a third aspect, the present application also provides a computer device comprising a processor, a memory, and a computer program stored on the memory and executable by the processor, wherein the computer program when executed by the processor implements the steps of the short address generation method as described above.
In a fourth aspect, the present application also provides a storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the short address generation method as described above.
The application provides a short address generation method, a device, equipment and a storage medium, wherein when an address processing instruction received by a server can be identified according to timestamp information, long addresses to be processed are collected in batches to generate a processing batch of short addresses; according to the sequence information of the long addresses to be processed, each long address to be processed can be distinguished under the same processing batch; according to the serial number information of the servers, the server cluster environment can be used for further distinguishing which server to collect and process the long address to be processed; according to the method and the device, the short address identification information is generated according to the timestamp information, the number information and the sequence information, and then the short address identification information is utilized to generate the target short address, so that the generated target short address is unique, the situation that the short address is repeatedly generated is avoided, meanwhile, batch processing of the long address to be processed can be achieved by utilizing the technical scheme provided by the application, and the short address generation efficiency is high.
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In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of steps of a short address generating method according to an embodiment of the present application;
FIG. 2 is a schematic block diagram of a short address generating device according to an embodiment of the present application;
fig. 3 is a schematic block diagram of a structure of a computer device according to an embodiment of the present application.
The realization, functional characteristics and advantages of the present application will be further described with reference to the embodiments, referring to the attached drawings.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
The flow diagrams depicted in the figures are merely illustrative and not necessarily all of the elements and operations/steps are included or performed in the order described. For example, some operations/steps may be further divided, combined, or partially combined, so that the order of actual execution may be changed according to actual situations. In addition, although the division of the functional modules is performed in the apparatus schematic, in some cases, the division of the modules may be different from that in the apparatus schematic.
The embodiment of the application provides a short address generation method, a short address generation device, short address generation equipment and a storage medium. The short address generation method can be applied to a server, and the server can be a single server or a server cluster consisting of a plurality of servers.
Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.
Referring to fig. 1, fig. 1 is a schematic flow chart of steps of a short address generation method according to an embodiment of the present application.
As shown in fig. 1, the short address generation method includes steps S10 to S16.
And S10, when an address processing instruction is received, constructing a long address collection array, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information.
In some embodiments, the address processing instruction may be a network request received by the server, or may be a control instruction that may be identified by another server, which is not limited herein.
It will be appreciated that long address collection arrays are created by the server upon receipt of an address processing instruction, and that constructing arrays to collect long addresses allows long addresses to be stored in an ordered manner in arrays, as opposed to collections.
In addition, the address processing instruction carries address collection time and address conversion time, wherein the address collection time is greater than or equal to the current time point, and the address conversion time is greater than the address collection time; the target time is a time point not registered in the history information, and is between the address collection time and the address conversion time.
The history processing record information is record data stored in a server database, and the history processing record information records a history time point for generating a short address when each server in the server cluster receives an address processing instruction before the history processing record information.
Step S11, obtaining time stamp information corresponding to the target time, and registering the target time in the history processing record information.
It can be understood that the target time is a time point not registered in the history processing record information, and when the server receives the address processing instruction according to the timestamp information corresponding to the target time, the processing batches of the long addresses to be processed to generate the short addresses are collected in batches.
Registering the target time in the history information can avoid generating a short address using the same target time as this time in the future, so as to avoid the server generating a repeated short address.
And step S12, when the time reaches the address collection time, receiving a short address generation request, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array.
It can be understood that the address collection time is a time node when the server starts to collect the long address to be processed, and when the time reaches the address collection time, the server starts to collect the long address where the short address needs to be generated. And after the long address to be processed is extracted from the received short address generation request, the long address to be processed can be stored into a long address collection array which is built in advance.
In some embodiments, the short address generation request received by the server may be a network request sent from the terminal device, or may be a control instruction that may be identified by another server, which is not limited herein.
And step S13, when the time reaches the address conversion time, acquiring a target long address from the long address collection array, and acquiring the storage order of the target long address in the long address collection array as the sequence information of the target long address.
It can be understood that the address conversion time is a time node when the server stops collecting the long addresses to be processed, and when the time reaches the address conversion time, all the long addresses to be processed received by the server during the period from the address collection time to the address conversion time are already stored in the long address collection array.
That is, the number of long addresses to be processed in the long address collection array may be several, depending on the number of short address generation requests received by the server during the address collection time to the address translation time.
In addition, each long address to be processed stored in the long address collection array has a corresponding storage order, and it can be understood that the earlier the long address to be processed is stored in the long address collection array, the earlier the corresponding storage order is.
And sequentially acquiring the long addresses to be processed from the long address collection array to generate short addresses corresponding to the long addresses to be processed. The long address to be processed, which is obtained from the long address collection array at present and is used for generating the short address, is the target long address, and the storage order of the target long address in the long address collection array is the sequence information of the target long address.
For example, it is assumed that when the time reaches the address translation time, 20 long addresses to be processed are already stored in the long address collection array, and if the target long address is the 18 th long address to be processed stored in the long address collection array, the sequence information corresponding to the target long address is 18.
Step S14, obtaining the serial number information of the server, and generating short address identification information according to the time stamp information, the serial number information and the sequence information.
It will be appreciated that in a cluster of servers, each server has its corresponding numbering information identifying the identity of the server. The short address identification information is a character string generated from the time stamp information, the number information, and the sequence information.
When the address processing instruction received by the server can be identified according to the timestamp information, the long addresses to be processed are collected in batches to generate processing batches with short addresses, namely processing batches corresponding to the target long addresses; under the same processing batch, the target long address can be distinguished from other long addresses to be processed according to the sequence information of the target long address; in addition, the number information of the servers can further distinguish which server is collected and processed for the target long address in the server cluster environment.
The method and the device for generating the short address identification information by using the timestamp information, the number information and the sequence information can ensure that each generated short address identification information is unique, further ensure that the short address generated by using the short address identification information is also unique, and cannot be repeated.
In some embodiments, the generating short address identification information from the timestamp information, the numbering information, and the sequence information includes:
splicing the timestamp information, the number information and the sequence information to obtain splicing result information;
and generating a check code according to the splicing result information, and generating short address identification information according to the splicing result information and the check code.
It can be understood that the timestamp information, the number information and the sequence information are all of a numerical type, so that the spliced result information obtained by splicing is also of a numerical type.
In some embodiments, the check code corresponding to the splice result information may be obtained according to a CRC (Cyclic Redundancy Check ) algorithm, or may be obtained by other algorithms, which is not limited herein.
According to the technical scheme provided by the embodiment, the generated short address identification information is generated by the splicing result information and the check code, so that when the subsequent server receives the target short address access request, the target short address can be checked through the short address identification information in the target short address, and the safety of short address access can be improved.
In some embodiments, the concatenating the timestamp information, the number information, and the sequence information, obtaining concatenation result information includes:
and acquiring a random value with a preset length, and splicing the random value, the time stamp information, the number information and the sequence information to obtain splicing result information.
It will be appreciated that adding random values to the splice result information may further reduce the likelihood of generating duplicate short addresses.
In some embodiments, the generating a check code according to the splicing result information and generating short address identification information according to the splicing result information and the check code includes:
binary conversion is carried out on the splicing result information to obtain a first conversion code;
determining the character length of a preset numerical value as a first length, wherein the preset numerical value is a binary number;
subtracting one from the first length to obtain a second length;
zero adding processing is carried out at the tail position of the first conversion code according to the second length, so that a second conversion code is obtained;
dividing the preset numerical value by using the second conversion code according to the modulo-two division to obtain a first division result, and determining the remainder in the first division result as a check code;
Splicing the first conversion code and the check code to obtain a third conversion code;
and performing hexa-twelve-system conversion on the third conversion code to obtain short address identification information.
It can be understood that the splicing result information is of a numerical value type, and the splicing result information is converted into binary, so as to obtain a first conversion code.
The preset value is a binary value preset in the server and is used for acquiring the check code in cooperation with calculation. The character length of the preset value is the first length, and the value obtained by subtracting one from the first length is the second length.
And adding zero with a second length at the end position of the first conversion code to obtain a second conversion code. And dividing the preset value by using a second conversion code by using a modulo-two division method, wherein the remainder in the obtained first division result is the check code. And splicing the check code to the end position of the first conversion code to obtain a third conversion code. It can be understood that the third conversion code is also a binary value, and the short address identification information can be obtained by performing hexa-twelve-system conversion on the third conversion code.
In the technical scheme provided by the embodiment, the character length of the obtained short address identification information is far smaller than that of the third conversion code through sixty binary conversion, the short address is generated by utilizing the short address identification information, and the character length of the generated short address can be shortened. In addition, the check code is spliced in the short address identification information, so that the short address identification information can be used for subsequent short address check, and the safety of short address access is improved.
For example, assuming that the splicing result information is "1808", the obtained first conversion code is "11100010000" after binary conversion is performed on the splicing result information.
Assuming that the preset value is "1010", the first length is 4, the second length is 3, and after 3 0's are added to the end position of the first transcoding, the resulting second transcoding is "11100010000000".
The remainder of division of "1010" by "11100010000000" is "110", i.e., the check code is "110", according to modulo two division.
And splicing the first conversion code '11100010000' and the check code '110', obtaining a third conversion code '11100010000110', and performing sixty binary conversion on the third conversion code, wherein the finally obtained short address identification information is '3 Lo'.
And S15, obtaining domain name information according to the target long address, and generating a target short address according to the domain name information and the short address identification information.
It can be understood that the domain name information is a character string part used for identifying the domain name in the target long address, and the target short address is obtained by splicing according to the domain name information and the short address identification information.
In some embodiments, the short address type identifier string is further spliced in the target short address, so that when the server subsequently receives the short address access request, the server can identify that the address is a short address according to the short address type identifier string, and then perform corresponding processing.
And S16, establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
It can be understood that, when the server receives the access request of the target short address, the target long address corresponding to the target short address can be obtained from the database according to the mapping relationship to perform redirection access after the mapping relationship is established and stored in the database by taking the target short address as the key word and taking the target long address as the key value corresponding to the key word.
In some embodiments, the mapping and storing the target short address and the target long address includes:
obtaining a hash value corresponding to the target short address through a preset coding mode as first hash information, and obtaining a hash value corresponding to the target long address through the preset coding mode as second hash information;
determining an effective period according to a preset effective time length and the address conversion moment;
constructing target verification information according to the first hash information, the second hash information, the validity period and the target long address;
and establishing a mapping relation between the target short address and the target verification information and storing the mapping relation into a database.
It can be understood that the preset encoding mode is a hash algorithm capable of calculating a hash value corresponding to the character string. The hash value corresponding to the target short address is the first hash information, and the hash value corresponding to the target long address is the second hash information.
The preset effective time length is a time length preset in the server and used for setting the short address validity period, in some embodiments, the preset effective time length can be set to 30 minutes, 24 hours, 7 days or one month, etc., and specific applications can be adjusted and set in combination with the use scenario, which is not limited herein.
And after the address conversion time is delayed by a preset effective time length, the obtained time node is the effective period of the target short address.
After the first hash information, the second hash information, the validity period and the target long address are packaged into target verification information, when the server subsequently receives an access request corresponding to the target short address, the validity period can be extracted from the target verification information to verify whether the target short address is in the validity period, and the first hash information, the second hash information and the target long address are extracted from the target verification information to verify the validity of the target short address and the target long address.
In some embodiments, after the mapping relationship between the target short address and the target verification information is established and stored in a database, the method further includes:
when a short address access instruction is received, acquiring a target access short address according to the short address access instruction;
when verification information matched with the target access short address exists in the database, the verification information is obtained to serve as matched verification information;
and checking the target access short address by using the matching check information, acquiring a matching long address according to the matching check information when the target access short address passes the checking, and performing redirection access according to the matching long address.
It will be appreciated that the short address access instruction is a network request received by the server from the terminal device. When the server identifies that the request address corresponding to the network request is provided with a short address type identification character string, or when the server identifies that the request address corresponding to the network request accords with a preset format specification, the server determines that the network request is a short address access instruction, and determines that the request address is a target access short address.
At this time, the target access short address is used as a search key word to carry out matching on the database, and matching verification information is obtained when the matching is successful. It can be understood that the current network environment still has unsafe factors, and an lawbreaker may use the network security hole to access the database of the server and modify the data, so that even if there is matching verification information matching with the target access short address in the database, the target access short address needs to be verified by using the matching verification information. And when the target access short address passes the verification, carrying out redirection access according to the matched long address in the matched verification information.
In some embodiments, the verifying the target access short address using the matching verification information includes:
acquiring first hash check information, second hash check information, validity period check information and the matched long address according to the matched check information;
obtaining a hash value corresponding to the target access short address as a first hash value according to the preset coding mode, and obtaining a hash value corresponding to the matching long address as a second hash value according to the preset coding mode;
when the first hash value is successfully matched with the first hash check information and the second hash value is successfully matched with the second hash check information, judging whether the target access short address is in a valid period according to the valid period check information;
when the target access short address is in the validity period, extracting target access short address identification information from the target access short address:
binary conversion is carried out on the target access short address identification information to obtain second access identification information, and division processing is carried out on the preset value by using the second access identification information according to the modulo two division to obtain a second division result;
And when the remainder in the second division result is zero, the target access short address passes verification.
It can be understood that the matching check information stores the first hash check information, the second hash check information, the validity period check information and the matching long address.
According to the first hash value and the first hash check information, whether the target access short address and the first hash check information are tampered or not can be checked.
And according to the second hash value and the second hash check information, checking whether the matched long address and the second hash check information are tampered or not.
And judging whether the target access short address is in the validity period according to the validity period verification information.
The target access short address identification information is used to further verify whether the target access short address is generated for the server.
For example, assuming that the target access short address identification information is "3Lo", after the target access short address identification information is converted into binary, the obtained second access identification information is "11100010000110". Assuming that the preset value used by the server is "1010" when generating the short address, the "1010" is divided by "11100010000110" according to the modulo-two division, and the remainder is zero. At this time, the target access short address identification information of the target access short address is checked to pass.
In some embodiments, the method further comprises:
when the first hash value is failed to be matched with the first hash check information;
or when the second hash value fails to be matched with the second hash check information;
or when the target access short address is not within the validity period;
or when the remainder in the second division result is not zero, the target access short address verification is not passed, an exception log is generated according to the target access address and the matching verification information, and exception reminding is carried out according to the exception log.
It can be understood that when the first hash value fails to match with the first hash check information, it is indicated that the target access short address or the first hash check information is tampered;
when the second hash value and the second hash check information fail to be matched, the verification matching long address or the second hash check information is tampered;
when the target access short address is not in the validity period, the target access short address is expired, and the access should not be continued.
When the remainder in the second division result is not zero, it is indicated that the target access short address and the matching verification information may be created when the lawbreaker invades the server database, and there may be a risk of continuing access.
In the technical scheme provided by the embodiment, the target access short address is checked through a plurality of dimensions, and the matching long address is further acquired for redirection access only when the verification passes, so that the safety of short address access is greatly ensured.
In the application, when an address processing instruction received by a server can be identified according to the timestamp information, long addresses to be processed are collected in batches to generate a processing batch with short addresses; according to the sequence information of the long addresses to be processed, each long address to be processed can be distinguished under the same processing batch; according to the serial number information of the servers, the server cluster environment can be used for further distinguishing which server to collect and process the long address to be processed; according to the method and the device, the short address identification information is generated according to the timestamp information, the number information and the sequence information, and then the short address identification information is utilized to generate the target short address, so that the generated target short address is unique, the situation that the short address is repeatedly generated is avoided, meanwhile, batch processing of the long address to be processed can be achieved by utilizing the technical scheme provided by the application, and the short address generation efficiency is high.
Referring to fig. 2, fig. 2 is a schematic block diagram of a short address generating device according to an embodiment of the present application.
As shown in fig. 2, the short address generation apparatus 201 includes:
the processing instruction receiving module 2011 is configured to construct a long address collection array when an address processing instruction is received, obtain an address collection time and an address conversion time according to the address processing instruction, and screen a target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point not registered in the historical processing record information;
a timestamp obtaining module 2012 configured to obtain timestamp information corresponding to the target time, and register the target time in the history information;
a long address collection module 2013, configured to receive a short address generation request when the time reaches the address collection time, extract a long address to be processed from the short address generation request, and store the long address to be processed into the long address collection array;
a sequence information determining module 2014, configured to obtain a target long address from the long address collection array when the time reaches the address conversion time, and obtain a storage order of the target long address in the long address collection array as sequence information of the target long address;
An identification information determining module 2015, configured to obtain serial number information of the server, and generate short address identification information according to the timestamp information, the serial number information, and the sequence information;
a short address generation module 2016 for obtaining domain name information according to the target long address, and generating a target short address according to the domain name information and the short address identification information;
and a storage module 2017, configured to establish and store the mapping relationship between the target short address and the target long address.
In some embodiments, the identification information determining module 2015, when generating short address identification information according to the timestamp information, the number information, and the sequence information, includes:
splicing the timestamp information, the number information and the sequence information to obtain splicing result information;
and generating a check code according to the splicing result information, and generating short address identification information according to the splicing result information and the check code.
In some embodiments, the identification information determining module 2015, when generating a check code according to the splicing result information and generating short address identification information according to the splicing result information and the check code, includes:
Binary conversion is carried out on the splicing result information to obtain a first conversion code;
determining the character length of a preset numerical value as a first length, wherein the preset numerical value is a binary number;
subtracting one from the first length to obtain a second length;
zero adding processing is carried out at the tail position of the first conversion code according to the second length, so that a second conversion code is obtained;
dividing the preset numerical value by using the second conversion code according to the modulo-two division to obtain a first division result, and determining the remainder in the first division result as a check code;
splicing the first conversion code and the check code to obtain a third conversion code;
and performing hexa-twelve-system conversion on the third conversion code to obtain short address identification information.
In some embodiments, the storing module 2017 when establishing and storing the mapping relationship between the target short address and the target long address includes:
obtaining a hash value corresponding to the target short address through a preset coding mode as first hash information, and obtaining a hash value corresponding to the target long address through the preset coding mode as second hash information;
Determining an effective period according to a preset effective time length and the address conversion moment;
constructing target verification information according to the first hash information, the second hash information, the validity period and the target long address;
and establishing a mapping relation between the target short address and the target verification information and storing the mapping relation into a database.
In some embodiments, the short address generating apparatus 201 further includes a short address access processing module 2018, where after the storage module 2017 establishes a mapping relationship between the target short address and the target verification information and stores the mapping relationship in a database, the short address access processing module 2018 is configured to obtain a target access short address according to the short address access instruction when receiving the short address access instruction;
when verification information matched with the target access short address exists in the database, the verification information is obtained to serve as matched verification information;
and checking the target access short address by using the matching check information, acquiring a matching long address according to the matching check information when the target access short address passes the checking, and performing redirection access according to the matching long address.
In some embodiments, the short address access processing module 2018, when verifying the target access short address using the match verification information, includes:
acquiring first hash check information, second hash check information, validity period check information and the matched long address according to the matched check information;
obtaining a hash value corresponding to the target access short address as a first hash value according to the preset coding mode, and obtaining a hash value corresponding to the matching long address as a second hash value according to the preset coding mode;
when the first hash value is successfully matched with the first hash check information and the second hash value is successfully matched with the second hash check information, judging whether the target access short address is in a valid period according to the valid period check information;
when the target access short address is in the validity period, extracting target access short address identification information from the target access short address:
binary conversion is carried out on the target access short address identification information to obtain second access identification information, and division processing is carried out on the preset value by using the second access identification information according to the modulo two division to obtain a second division result;
And when the remainder in the second division result is zero, the target access short address passes verification.
In some embodiments, the short address generating apparatus 201 further includes a verification failure processing module 2019, configured to, when the first hash value fails to match the first hash verification information;
or when the second hash value fails to be matched with the second hash check information;
or when the target access short address is not within the validity period;
or when the remainder in the second division result is not zero, the target access short address verification is not passed, an exception log is generated according to the target access address and the matching verification information, and exception reminding is carried out according to the exception log.
It should be noted that, for convenience and brevity of description, specific working processes of the above-described apparatus and each module and unit may refer to corresponding processes in the foregoing embodiments of the short address generation method, which are not described herein again.
The apparatus provided by the above embodiments may be implemented in the form of a computer program which may be run on a computer device as shown in fig. 3.
Referring to fig. 3, fig. 3 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device includes, but is not limited to, a server.
As shown in fig. 3, the computer device 301 includes a processor 3011, a memory, and a network interface connected via a system bus, wherein the memory may include a storage medium 3012 and an internal memory 3015, and the storage medium 3012 may be non-volatile or volatile.
The storage medium 3012 may store an operating system and computer programs. The computer program comprises program instructions that, when executed, cause the processor 3011 to perform any of the short address generation methods.
The processor 3011 is used to provide computing and control capabilities to support the operation of the overall computer device.
The internal memory 3015 provides an environment for the execution of a computer program in the storage medium 3012 that, when executed by the processor 3011, causes the processor 3011 to perform any of the short address generation methods.
The network interface is used for network communication such as transmitting assigned tasks and the like. It will be appreciated by those skilled in the art that the structure shown in fig. 3 is merely a block diagram of some of the structures associated with the present application and is not limiting of the computer device to which the present application may be applied, and that a particular computer device may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.
It is to be appreciated that the processor 3011 can be a central processing unit (Central Processing Unit, CPU), and that the processor 3011 can also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. Wherein the general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
Wherein in some embodiments the processor 3011 is configured to run a computer program stored in a memory to implement the steps of:
when an address processing instruction is received, constructing a long address collection array, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information;
Acquiring time stamp information corresponding to the target time, and registering the target time in the history processing record information;
when the time reaches the address collection time, receiving a short address generation request, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array;
when the time reaches the address conversion moment, a target long address is obtained from the long address collection array, and the storage order of the target long address in the long address collection array is obtained as the sequence information of the target long address;
acquiring the serial number information of the server, and generating short address identification information according to the time stamp information, the serial number information and the sequence information;
acquiring domain name information according to the target long address, and generating a target short address according to the domain name information and the short address identification information;
and establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
In some embodiments, the processor 3011 is configured to, when generating short address identification information based on the timestamp information, the number information, and the sequence information, implement:
Splicing the timestamp information, the number information and the sequence information to obtain splicing result information;
and generating a check code according to the splicing result information, and generating short address identification information according to the splicing result information and the check code.
In some embodiments, the processor 3011 is configured to, when generating a check code according to the splice result information, and generating short address identification information according to the splice result information and the check code, implement:
binary conversion is carried out on the splicing result information to obtain a first conversion code;
determining the character length of a preset numerical value as a first length, wherein the preset numerical value is a binary number;
subtracting one from the first length to obtain a second length;
zero adding processing is carried out at the tail position of the first conversion code according to the second length, so that a second conversion code is obtained;
dividing the preset numerical value by using the second conversion code according to the modulo-two division to obtain a first division result, and determining the remainder in the first division result as a check code;
splicing the first conversion code and the check code to obtain a third conversion code;
And performing hexa-twelve-system conversion on the third conversion code to obtain short address identification information.
In some embodiments, the processor 3011 is configured to, when mapping and storing the target short address to the target long address, implement:
obtaining a hash value corresponding to the target short address through a preset coding mode as first hash information, and obtaining a hash value corresponding to the target long address through the preset coding mode as second hash information;
determining an effective period according to a preset effective time length and the address conversion moment;
constructing target verification information according to the first hash information, the second hash information, the validity period and the target long address;
and establishing a mapping relation between the target short address and the target verification information and storing the mapping relation into a database.
In some embodiments, after the storage module 2017 establishes a mapping relationship between the target short address and the target verification information and stores the mapping relationship in a database, the processor 3011 is further configured to implement:
when a short address access instruction is received, acquiring a target access short address according to the short address access instruction;
When verification information matched with the target access short address exists in the database, the verification information is obtained to serve as matched verification information;
and checking the target access short address by using the matching check information, acquiring a matching long address according to the matching check information when the target access short address passes the checking, and performing redirection access according to the matching long address.
In some embodiments, the processor 3011 is configured to, when verifying the target access short address using the match verification information, implement:
acquiring first hash check information, second hash check information, validity period check information and the matched long address according to the matched check information;
obtaining a hash value corresponding to the target access short address as a first hash value according to the preset coding mode, and obtaining a hash value corresponding to the matching long address as a second hash value according to the preset coding mode;
when the first hash value is successfully matched with the first hash check information and the second hash value is successfully matched with the second hash check information, judging whether the target access short address is in a valid period according to the valid period check information;
When the target access short address is in the validity period, extracting target access short address identification information from the target access short address:
binary conversion is carried out on the target access short address identification information to obtain second access identification information, and division processing is carried out on the preset value by using the second access identification information according to the modulo two division to obtain a second division result;
and when the remainder in the second division result is zero, the target access short address passes verification.
In some embodiments, the processor 3011 is further to implement:
when the first hash value is failed to be matched with the first hash check information;
or when the second hash value fails to be matched with the second hash check information;
or when the target access short address is not within the validity period;
or when the remainder in the second division result is not zero, the target access short address verification is not passed, an exception log is generated according to the target access address and the matching verification information, and exception reminding is carried out according to the exception log.
It should be noted that, for convenience and brevity of description, the specific working process of the computer device described above may refer to the corresponding process in the foregoing embodiment of the short address generation method, which is not described herein again.
The embodiment of the application also provides a storage medium, which is a computer readable storage medium, and the computer readable storage medium stores a computer program, wherein the computer program comprises program instructions, and a method implemented by the program instructions when being executed can refer to various embodiments of the short address generation method.
The computer readable storage medium may be an internal storage unit of the computer device according to the foregoing embodiment, for example, a hard disk or a memory of the computer device. The computer readable storage medium may also be an external storage device of the computer device, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), or the like, which are provided on the computer device.
It is to be understood that the terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations. It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The foregoing embodiment numbers of the present application are merely for describing, and do not represent advantages or disadvantages of the embodiments. While the invention has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the invention. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A short address generation method applied to a server, the method comprising:
when an address processing instruction is received, constructing a long address collection array, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information;
acquiring time stamp information corresponding to the target time, and registering the target time in the history processing record information;
when the time reaches the address collection time, receiving a short address generation request, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array;
when the time reaches the address conversion moment, a target long address is obtained from the long address collection array, and the storage order of the target long address in the long address collection array is obtained as the sequence information of the target long address;
acquiring the serial number information of the server, and generating short address identification information according to the time stamp information, the serial number information and the sequence information;
Acquiring domain name information according to the target long address, and generating a target short address according to the domain name information and the short address identification information;
and establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
2. The method of claim 1, wherein the generating short address identification information from the timestamp information, the number information, and the sequence information comprises:
splicing the timestamp information, the number information and the sequence information to obtain splicing result information;
and generating a check code according to the splicing result information, and generating short address identification information according to the splicing result information and the check code.
3. The method of claim 2, wherein generating a check code based on the splice result information and generating short address identification information based on the splice result information and the check code comprises:
binary conversion is carried out on the splicing result information to obtain a first conversion code;
determining the character length of a preset numerical value as a first length, wherein the preset numerical value is a binary number;
subtracting one from the first length to obtain a second length;
Zero adding processing is carried out at the tail position of the first conversion code according to the second length, so that a second conversion code is obtained;
dividing the preset numerical value by using the second conversion code according to the modulo-two division to obtain a first division result, and determining the remainder in the first division result as a check code;
splicing the first conversion code and the check code to obtain a third conversion code;
and performing hexa-twelve-system conversion on the third conversion code to obtain short address identification information.
4. A method according to claim 3, wherein said mapping and storing said target short address with said target long address comprises:
obtaining a hash value corresponding to the target short address through a preset coding mode as first hash information, and obtaining a hash value corresponding to the target long address through the preset coding mode as second hash information;
determining an effective period according to a preset effective time length and the address conversion moment;
constructing target verification information according to the first hash information, the second hash information, the validity period and the target long address;
And establishing a mapping relation between the target short address and the target verification information and storing the mapping relation into a database.
5. The method of claim 4, wherein after the mapping the target short address with the target verification information and storing the mapping in a database, the method further comprises:
when a short address access instruction is received, acquiring a target access short address according to the short address access instruction;
when verification information matched with the target access short address exists in the database, the verification information is obtained to serve as matched verification information;
and checking the target access short address by using the matching check information, acquiring a matching long address according to the matching check information when the target access short address passes the checking, and performing redirection access according to the matching long address.
6. The method of claim 5, wherein verifying the target access short address using the match verification information comprises:
acquiring first hash check information, second hash check information, validity period check information and the matched long address according to the matched check information;
Obtaining a hash value corresponding to the target access short address as a first hash value according to the preset coding mode, and obtaining a hash value corresponding to the matching long address as a second hash value according to the preset coding mode;
when the first hash value is successfully matched with the first hash check information and the second hash value is successfully matched with the second hash check information, judging whether the target access short address is in a valid period according to the valid period check information;
when the target access short address is in the validity period, extracting target access short address identification information from the target access short address:
binary conversion is carried out on the target access short address identification information to obtain second access identification information, and division processing is carried out on the preset value by using the second access identification information according to the modulo two division to obtain a second division result;
and when the remainder in the second division result is zero, the target access short address passes verification.
7. The method of claim 6, wherein the method further comprises:
when the first hash value is failed to be matched with the first hash check information;
Or when the second hash value fails to be matched with the second hash check information;
or when the target access short address is not within the validity period;
or when the remainder in the second division result is not zero, the target access short address verification is not passed, an exception log is generated according to the target access address and the matching verification information, and exception reminding is carried out according to the exception log.
8. A short address generation apparatus, comprising:
the processing instruction receiving module is used for constructing a long address collection array when an address processing instruction is received, acquiring address collection time and address conversion time according to the address processing instruction, and screening target time from the address collection time and the address conversion time according to historical processing record information, wherein the target time is a time point which is not registered in the historical processing record information;
the time stamp obtaining module is used for obtaining time stamp information corresponding to the target time and registering the target time in the historical processing record information;
the long address collection module is used for receiving a short address generation request when the time reaches the address collection time, extracting a long address to be processed from the short address generation request, and storing the long address to be processed into the long address collection array;
The sequence information determining module is used for acquiring a target long address from the long address collection array when the time reaches the address conversion moment, and acquiring the storage order of the target long address in the long address collection array as the sequence information of the target long address;
the identification information determining module is used for acquiring the number information of the server and generating short address identification information according to the time stamp information, the number information and the sequence information;
the short address generation module is used for acquiring domain name information according to the target long address and generating a target short address according to the domain name information and the short address identification information;
and the storage module is used for establishing a mapping relation between the target short address and the target long address and storing the mapping relation.
9. A computer device, characterized in that it comprises a processor, a memory, and a computer program stored on the memory and executable by the processor, wherein the computer program, when being executed by the processor, implements the steps of the short address generation method according to any of claims 1 to 7.
10. A computer-readable storage medium, on which a computer program is stored, wherein the computer program, when being executed by a processor, implements the steps of the short address generation method according to any of claims 1 to 7.
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