CN115001601A

CN115001601A - Design method for self-excitation self-adaptive processing of sub-array driving

Info

Publication number: CN115001601A
Application number: CN202210462857.XA
Authority: CN
Inventors: 孙军; 马福博
Original assignee: CETC 14 Research Institute
Current assignee: CETC 14 Research Institute
Priority date: 2022-04-28
Filing date: 2022-04-28
Publication date: 2022-09-02
Anticipated expiration: 2042-04-28
Also published as: CN115001601B

Abstract

The invention discloses a design method of self-excitation self-adaptive processing driven by a subarray, wherein an amplifying circuit is arranged on a transmitting-receiving channel and a transmitting-receiving port of a TR component, a directional coupler and a detector are arranged at a receiving and transmitting port to collect voltage, the voltage is input into a peak holding circuit, when self-excitation occurs, obtaining a voltage Vdet, inputting the voltage Vdet into a logic control circuit through an AD conversion circuit, if the voltage Vdet is larger than a set value, judging that the fault occurs, generating a power control enabling signal PEN, inputting the power control enabling signal PEN into an amplifying circuit, closing a fault channel, in the self-checking mode, judging whether the TR module connected with the sub-array driving TR module has self-excited fault by judging the corresponding relation between the coupling detected voltage Vdet and module receiving and transmitting control time sequence signals TR and SEL, and carrying out self-adaptive processing according to the judgment condition, the power supply of the assembly is shielded by the assembly power supply enabling signal PEN, so that the phased array can normally work.

Description

Design method for self-excitation adaptive processing of sub-array drive

Technical Field

The invention belongs to the technical field of microwave TR components, and particularly relates to a self-excitation coupling technology.

Background

In an active phased array, the number of antenna elements is relatively large, often several hundreds to thousands. The hardware equipment is many, and the hardware cost of system design is high, and the complexity is big. In order to reduce the cost and complexity of engineering implementation, the array surface unit is divided into a plurality of groups according to a certain rule, and each group comprises a plurality of antennas and active channels, namely a subarray unit. When the subarray unit is designed, the plurality of TR assemblies are driven by the subarray, so that the receiving, transmitting and amplifying of microwave signals and wave control relay forwarding are achieved.

The sub-array drive receives the control signal of the external control panel in a serial mode and then processes and distributes each TR component. The control signal data typically contains phase shift attenuation control information, and in addition to serial control data, a combination of the TR and SEL control signals is also distributed to the TR elements via sub-array drive.

In the implementation process of the phased array surface, TR channels of individual sub-arrays can be self-excited under rare conditions, so that the system is abnormal. When the situation occurs, the position of a fault channel is difficult to position on the array surface, and the fault channel is difficult to shield quickly. Therefore, there is a need for new design methods that enable fast location processing when such failures occur.

Disclosure of Invention

The invention aims to solve the problem of self-excitation of an active phased array surface TR channel in the prior art, provides a design method of self-excitation adaptive processing of a sub-array drive, quickly positions a fault component and shields the component through a self-inspection working mode of a drive component, and adopts the following technical scheme in order to achieve the purpose.

The method comprises the steps that amplifying circuits are arranged on a transmitting-receiving channel and a transmitting-receiving port of a TR component, a coupler and a detector are arranged on the transmitting-receiving port to collect voltage, a peak value holding circuit is input to obtain voltage Vset, the voltage Vset is input into a logic control circuit through an AD conversion circuit, if the Vset is larger than a set value, a fault is judged to occur, a power control enabling signal PEN is generated, the power control enabling signal PEN is input into the amplifying circuit, and a fault channel is closed.

The coupler is a directional coupler in the receiving direction, couples the microwave signal in the receiving direction, and generates a waveform when self-excitation occurs.

The peak holding circuit controls the beat by an external clock, adjusts the pulse width and the duty ratio of Vdet, and calibrates the waveform coupled to be consistent with the time sequence of TR and SEL signals.

And if the TR and SEL signals are high level, the signals are a transmitting time zone, and the TR and SEL signals are low level, the signals are a receiving time zone, and if Vset appears in the receiving time zone, the self-excitation is judged to occur.

And setting an algorithm corresponding to PEN 1 to PEN n enable signals of the logic control circuit, and controlling the on-off of the n transmitting and receiving channels through PEN 1 to PEN n until Vset is smaller than a set value.

The algorithm comprises an elimination method, wherein the receiving and transmitting channels corresponding to PEN 2 to PEN n are closed, if self-excitation does not disappear, the channel 1 is judged to be in fault, the channel 1 is closed, the channels 2 to n are opened in sequence, and the fault channel is eliminated.

The invention has the beneficial effects that: under the self-checking working mode, whether the TR component connected with the sub-array driving TR component has self-excitation faults or not is judged by judging the corresponding relation between the voltage Vdet obtained by coupling detection and the component receiving and sending control time sequence signals TR and SEL, self-adaptive processing is carried out according to the judgment condition, and power supply of the component is shielded through a component power supply enabling signal PEN, so that the phased array can normally work.

Drawings

Fig. 1 is a schematic circuit diagram, and fig. 2 is a waveform diagram.

Detailed Description

The technical scheme of the invention is specifically explained in the following by combining the attached drawings.

An amplifying circuit is arranged at a transmitting-receiving channel and a transmitting-receiving port of a TR component, as shown in figure 1, a directional coupler and a detector in a receiving direction are arranged at the transmitting-receiving port for collecting voltage, microwave signals in the receiving direction are coupled, when self-excitation occurs, waveforms are generated, a peak holding circuit is input to obtain voltage Vset, the beat is controlled by an external clock, the pulse width and the duty ratio of the Vset are adjusted, the coupled waveforms are calibrated to be consistent with the time sequence of TR and SEL signals, the signals are input to a logic control circuit through an AD conversion circuit, the TR and SEL signals are transmitting time zones when the signals are high level, the TR and SEL signals are receiving time zones when the signals are low level, as shown in figure 2, if the Vset occurs in the receiving time zones and is larger than a set value, self-excitation occurs, faults occur, the TR component which generates self-excitation is provided with n transmitting-receiving channels, PEN 1 to PEN enabling signals corresponding to the logic control circuit are set, and the transmitting-receiving channels corresponding to PEN 2 to PEN are closed, if the self-excitation does not disappear, judging that the channel 1 has a fault, closing the channel 1, sequentially opening the channels 2 to n, removing the fault channel, generating a power control enabling signal PEN, inputting the power control enabling signal PEN into an amplifying circuit, and closing the fault channel.

The above-described embodiments are not intended to limit the present invention, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present invention are included in the scope of the present invention.

Claims

1. A design method for self-excitation adaptive processing driven by a subarray is characterized by comprising the following steps: the method comprises the steps that amplifying circuits are arranged on a transmitting-receiving channel and a transmitting-receiving port of a TR component, a coupler and a detector are arranged on the transmitting-receiving port to collect voltage, a peak value holding circuit is input to obtain voltage Vset, the voltage Vset is input into a logic control circuit through an AD conversion circuit, if the Vset is larger than a set value, a fault is judged to occur, a power control enabling signal PEN is generated, the power control enabling signal PEN is input into the amplifying circuit, and a fault channel is closed.

2. A design method for subarray driven self-adaptive processing according to claim 1, wherein the coupler is a directional coupler in a receive direction, the coupler couples microwave signals in the receive direction, and when self-excitation occurs, a waveform is generated.

3. The method of claim 1, wherein the peak-hold circuit controls beat by an external clock, adjusts pulse width and duty cycle of Vdet, and calibrates the waveform coupled to be consistent with the timing of TR, SEL signals.

4. The method of designing a subarray driven self-adaptive process according to claim 3, further comprising: and if the TR and SEL signals are high level, the signals are a transmitting time zone, and the TR and SEL signals are low level, the signals are a receiving time zone, and if Vset appears in the receiving time zone, the self-excitation is judged to occur.

5. The method of designing a subarray driven self-adaptive process according to claim 1, further comprising: and setting an algorithm by setting n transmitting and receiving channels of the TR component generating self excitation corresponding to PEN 1-PEN n enable signals of the logic control circuit, and controlling the on-off of the n transmitting and receiving channels through PEN 1-PEN n until Vdet is smaller than a set value.

6. The method of claim 5, wherein the algorithm comprises an elimination method: and closing the receiving and transmitting channels corresponding to PEN 2 to PEN n, if the self excitation does not disappear, judging that the channel 1 has a fault, closing the channel 1, sequentially opening the channels 2 to n, and removing the fault channel.