CN115001412A - Self-adaptive bias circuit - Google Patents

Self-adaptive bias circuit Download PDF

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Publication number
CN115001412A
CN115001412A CN202210749975.9A CN202210749975A CN115001412A CN 115001412 A CN115001412 A CN 115001412A CN 202210749975 A CN202210749975 A CN 202210749975A CN 115001412 A CN115001412 A CN 115001412A
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China
Prior art keywords
transistor
resistor
circuit
power
base
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CN202210749975.9A
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樊龙
张宗楠
李一虎
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IPGoal Microelectronics Sichuan Co Ltd
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IPGoal Microelectronics Sichuan Co Ltd
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Priority to CN202210749975.9A priority Critical patent/CN115001412A/en
Publication of CN115001412A publication Critical patent/CN115001412A/en
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses a self-adaptive bias circuit, which comprises a linear compensation sub-circuit and a voltage stabilization sub-circuit, wherein the voltage stabilization sub-circuit comprises a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor, one end of the first resistor is connected with a power transistor of a power amplification circuit, and the other end of the first resistor is connected with a base electrode of the first transistor; a collector of the first transistor is commonly connected with one end of the second resistor, one end of the fourth resistor and a base of the second transistor, and the other end of the second resistor is connected with a reference voltage source; the base electrode of the second transistor is also connected with the linear compensation sub-circuit, the base electrode of the second transistor is also connected with the linear compensation sub-circuit power amplification circuit, the collector electrode of the second transistor is connected with one end of a third resistor, and the other end of the third resistor is connected with a reference voltage source. The self-adaptive bias circuit has small sensitivity to the fluctuation of the reference voltage and has linearization compensation capability, so that the radio frequency power amplifier can stably and linearly work in a complex application environment.

Description

Self-adaptive bias circuit
Technical Field
The invention relates to the field of radio frequency microwaves, in particular to an adaptive bias circuit for adjusting the bias state of a power amplification circuit.
Background
The bias state of the power tube is used for determining the working state of the power amplifier, so that for any radio frequency amplifier, a proper direct current bias network can inhibit the influence of external voltage change and temperature change and provide a proper static working point to ensure the stability of the working characteristic of the power amplifier.
As shown in fig. 1, the bias circuit in the prior art mainly includes transistors Q1, Q2, and Q3, resistors R1, R2, R3, and R4, and a capacitor C1. Q0 is a radio frequency power transistor, Cblock is an input blocking capacitor, and Lchock is a choke inductor. The bias current of the power transistor Q0 is provided by a current mirror formed by the transistors Q1 and Q2, wherein the resistor R1, the transistor Q1 and the capacitor C1 form a linearization circuit, and the presence of the capacitor C1 reduces the impedance of the bias circuit, which is equivalent to introducing a radio frequency path while short-circuiting the leaked radio frequency signal to ground, so that the base voltage of the transistor Q1 is kept constant. With the increase of the input power, the radio frequency signal leaked into the bias circuit enables the voltage Vbe1 of the base-emitter junction of the Q1 to be reduced, so that the reduction of the voltage Vbe0 of the base-emitter junction of the Q0 of the power tube is compensated, and the nonlinear distortion of the Q0 of the power tube is restrained. In addition, transistors Q2 and Q3 and resistors R3 and R4, which are used as diodes by connecting their bases and collectors, constitute a temperature compensation circuit, and the base-emitter voltage drops of the transistors have the same tendency to change when the temperature changes, thereby performing the function of temperature compensation.
The transistor Q1 in the above-mentioned prior art bias circuit provides a dc bias voltage to its base through the series resistors R3 and R4 and the diode-connected transistors Q2 and Q3, wherein the equivalent resistors RQ of the transistors Q2 and Q3 in the on state are 1/GQ2+1/GQ3 (the transconductance of the transistors Q2 and Q3 are GQ2 and GQ3, respectively). At this time, the base voltage Vb1 of the transistor Q1 is: vb1 ≈ Vref (RQ + R4)/(R3+ R4+ RQ). And the input characteristic expression of the transistor is: ic1 ≈ Is exp (Vbe1/VT) (where Is the saturation current of the transistor, VT Is the voltage equivalent of temperature, and VT ═ 26mV at room temperature), so the output current Ic1 ≈ Is exp (Vref (RQ + R4)/(2 ≈ R3+ R4+ RQ) _ VT) at the collector of the Q1 transistor). As can be seen from the above equation, a small change in the reference voltage Vref causes a large change in the collector current of the transistor due to exponential dependency, and this variable, amplified by the power transistor Q0, causes a large shift in the quiescent operating point.
Therefore, although the circuit structure of the above-mentioned bias circuit of the prior art is simple, it is very sensitive to the fluctuation change of the reference voltage, and the small change of the reference voltage Vref is displayed by the amplification of the transistor Q2 in the amplified state by several tens or hundreds times, so that the static operating point of the power transistor Q0 is changed, and the stability of the operating characteristic is affected.
Therefore, there is a need to provide an improved adaptive bias circuit for adjusting the bias state of a power amplifier circuit to overcome the above-mentioned drawbacks.
Disclosure of Invention
The invention aims to provide a self-adaptive bias circuit which has low sensitivity to the fluctuation of reference voltage and has linearization compensation capability, so that a radio frequency power amplifier can stably and linearly work in a complex application environment.
In order to achieve the above object, the present invention provides an adaptive bias circuit for adjusting a bias state of a power amplifier circuit, which includes a linear compensation sub-circuit and a voltage stabilization sub-circuit, wherein the voltage stabilization sub-circuit and the linear compensation sub-circuit are connected to each other and are respectively connected to the power amplifier circuit, the linear compensation sub-circuit is configured to adjust a linearity of a power transistor of the power amplifier circuit, and the voltage stabilization sub-circuit is configured to suppress an influence of a reference voltage fluctuation on a quiescent operating point of the power amplifier circuit; the voltage stabilizing sub-circuit comprises a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor, wherein one end of the first resistor is connected with the power transistor of the power amplifying circuit, and the other end of the first resistor is connected with the base electrode of the first transistor; the emitter of the first transistor is grounded, the collector of the first transistor is commonly connected with one end of a second resistor, one end of a fourth resistor and the base of the second transistor, the other end of the fourth resistor is grounded, and the other end of the second resistor is connected with a reference voltage source; the emitter of the second transistor is grounded, the base of the second transistor is also connected with the linear compensation sub-circuit power amplification circuit, the collector of the second transistor is connected with one end of the third resistor, and the other end of the third resistor is connected with a reference voltage source.
Preferably, the voltage regulator sub-circuit further includes a first capacitor, one end of the first capacitor is connected to the base of the second transistor, and the other end of the first capacitor is grounded.
Preferably, the second resistor, the third resistor, the fourth resistor and the second transistor together form a negative feedback loop to suppress the offset of the reference voltage fluctuation to the static bias point of the power transistor.
Preferably, the linearity compensation sub-circuit comprises a third transistor, a fourth transistor and a fifth resistor, wherein an emitter of the third transistor is connected with the power transistor of the power amplification circuit, a base of the third transistor is commonly connected with a base of the fourth transistor and a collector of the second transistor, and an emitter of the fourth transistor is commonly connected with a base of the second transistor and one end of the fourth resistor; and the collector electrode of the fourth transistor is commonly connected with the collector electrode of the third transistor and one end of a fifth resistor, and the other end of the fifth resistor is connected with an external power supply.
Preferably, the linearity compensation sub-circuit further comprises a second capacitor, one end of the second capacitor is connected to the base of the third transistor, and the other end of the second capacitor is grounded.
Compared with the prior art, the self-adaptive bias circuit of the invention can effectively inhibit the influence of the fluctuation change of the reference voltage on the collector current of the power transistor in the power amplifying circuit in the working process by arranging the negative feedback loop in the voltage stabilizing sub-circuit, thereby ensuring that the power amplifying circuit can normally, stably and continuously work; in addition, the self-adaptive bias circuit is also provided with a linear compensation sub-circuit, so that the gain compression and phase distortion of the power transistor can be effectively inhibited, and the linear compensation effect of the self-adaptive bias circuit on the power amplification circuit is enhanced.
The invention will become more apparent from the following description when taken in conjunction with the accompanying drawings, which illustrate embodiments of the invention.
Drawings
Fig. 1 is a schematic structural diagram of a connection between an adaptive bias circuit and a power amplifier circuit in the prior art.
Fig. 2 is a schematic structural diagram of the connection between the adaptive bias circuit and the power amplifier circuit of the present invention.
Fig. 3 is a graph comparing the collector output current of the power transistor with the reference voltage according to the present invention and the prior art.
Fig. 4 is a graph comparing gain distortion for the inventive and prior art solutions.
Detailed Description
Embodiments of the present invention will now be described with reference to the drawings, wherein like element numerals represent like elements. As described above, the present invention provides an adaptive bias circuit for adjusting the bias state of a power amplifier circuit, which has low sensitivity to the fluctuation of a reference voltage and has a linearization compensation capability, so that a radio frequency power amplifier can stably and linearly operate in a complex application environment.
Referring to fig. 2, fig. 2 is a schematic structural diagram of the connection between the adaptive bias circuit and the power amplifier circuit according to the present invention. As shown in fig. 2, the adaptive bias circuit of the present invention is connected to a power amplifier circuit, which includes a power transistor Q0, an input blocking capacitor Cblock, and a choke inductor Lchock, and the specific connection is as shown in fig. 2. The self-adaptive bias circuit comprises a linear compensation sub-circuit and a voltage stabilization sub-circuit, wherein the voltage stabilization sub-circuit and the linear compensation sub-circuit are mutually connected and are respectively connected with a power amplification circuit, the linear compensation sub-circuit is used for adjusting the linearity of a power transistor of the power amplification circuit, and the voltage stabilization sub-circuit is used for inhibiting the influence of reference voltage fluctuation on a static working point of the power amplification circuit.
Specifically, the voltage-stabilizing sub-circuit comprises a first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4, wherein one end of the first resistor R1 is connected with a power transistor Q0 of the power amplification circuit, and the other end of the first resistor R1 is connected with a base electrode of the first transistor Q1; the emitter of the first transistor Q1 is grounded, the collector of the first transistor Q1 is commonly connected with one end of a second resistor R2, one end of a fourth resistor R4 and the base of the second transistor Q2, the other end of the fourth resistor R4 is grounded, and the other end of the second resistor R2 is connected with a reference voltage source VREF; the emitter of the second transistor Q2 is grounded, the base thereof is further connected with the linearity compensation sub-circuit, the collector thereof is connected with one end of the third resistor R3, the other end of the third resistor R3 is connected with a reference voltage source Vref, so that the reference voltage source Vref provides reference voltages for the first transistor Q1 and the second transistor Q2 through the second resistor R2 and the third resistor R3 respectively; the second resistor R2, the third resistor R3, the fourth resistor R4 and the second transistor Q2 together form a negative feedback loop to suppress the deviation of the reference voltage fluctuation output by the reference voltage source Vref to the static bias point of the power transistor Q0 of the power amplification circuit.
In addition, the voltage-stabilizing sub-circuit further comprises a first capacitor C1, one end of the first capacitor C1 is connected with the base electrode of the second transistor Q2, and the other end of the first capacitor C1 is grounded; the first capacitor C1 is used for bypassing the rf signal leaked from the power amplifier circuit and amplified by the first transistor Q1, so as to reduce the influence of the rf signal on the voltage regulator circuit, and ensure that the voltage regulator sub-circuit suppresses the influence of the reference voltage fluctuation on the quiescent operating point of the power amplifier circuit.
As a preferred embodiment of the present invention, the linearity compensation sub-circuit specifically includes a third transistor Q3, a fourth transistor Q4, and a fifth resistor R5, wherein an emitter of the third transistor Q3 is connected to the power transistor Q0 of the power amplification circuit, a base thereof is commonly connected to a base of the fourth transistor Q4 and a collector of the second transistor Q2, and an emitter of the fourth transistor Q4 is commonly connected to a base of the second transistor Q2 and one end of the fourth resistor R4; a collector of the fourth transistor Q4 is commonly connected to a collector of the third transistor Q3 and one end of a fifth resistor R5, and the other end of the fifth resistor R5 is connected to an external power source Vccb; the external power source Vccb supplies an operating voltage to the third transistor Q3 and the fourth transistor Q4 through the fifth resistor R5.
Furthermore, the linearity compensation sub-circuit further includes a second capacitor C2, wherein one end of the second capacitor C2 is connected to the base of the third transistor Q3, and the other end is grounded. In the invention, the radio frequency signal flowing into the linear compensation sub-circuit is short-circuited to the ground through the second capacitor C2, so that the third transistor Q3 has a fixed base voltage, and the collector current of the power transistor Q0 is relatively constant, thereby ensuring that the linear compensation of the power amplification circuit is realized.
The working principle of the adaptive bias circuit of the present invention is described below with reference to fig. 2:
when the reference voltage Vref increases, it generates a varying voltage Δ V at the node P2 of the adaptive bias circuit, which increases the base bias voltage of the second transistor Q2, and the increased base current Δ Ib2 is amplified by the second transistor Q2, so that the current Ic3 flowing through the third resistor R3 increases. Since the base voltage (voltage of the node P1) Vb3 of the third transistor Q3 is equal to Vref-R3 Ic3, an increase in the current Ic3 results in a decrease in the voltage Vb3, and the voltage Vb3 obtains the voltage Vb0 of the node P0 through an emitter follower composed of the third transistor Q3 and a fourth resistor R4, while the amount of change in the voltage Vb0 is in phase with the amount of change in the voltage Vb3, so that the voltage of the voltage Vb0 decreases, and the decrease in the voltage Vb0 suppresses the collector current of the power transistor Q0 from increasing with the increase in the reference voltage Vref. Conversely, when the reference voltage Vref decreases, the feedback loop may suppress a decrease in the collector current of the power transistor Q0, so that the collector current of the power transistor Q0 may maintain a relatively constant value as the reference voltage Vref fluctuates.
In addition, the adaptive bias circuit of the present invention can also enhance the linearization compensation effect, when the input power of the whole circuit increases, due to the rectification characteristic of the bjt, the collector current of the power transistor Q0 increases, the voltage Vbe0 at the bjt thereof decreases, meanwhile, part of the rf signal of the power amplifier circuit leaks into the bias circuit through the third transistor Q3 and the second capacitor C2, the dc current rectified by the bjt of the third transistor Q3 increases, and the dc voltage Vbe3 at the bjt decreases. Due to the existence of the second capacitor C2, the radio frequency signal flowing into the bias circuit is short-circuited to the ground, so that the third transistor Q3 has a fixed base voltage; while the decrease in the voltage Vbe3 across the base-emitter junction of the third transistor Q3 compensates for the voltage across the base-emitter junction of the power transistor Q0, thereby suppressing gain compression and phase distortion of the power transistor Q0. Meanwhile, as the input power increases, a part of the rf signal flows into the first resistor R1 and the first transistor Q1, the collector current of the first transistor Q1 increases under the rectification action of the bjd, and the rf signal amplified by the first transistor Q1 is bypassed by the first capacitor C1, thereby preventing the rf signal from flowing into the second transistor Q2. The increased collector current of the first transistor Q1 is reduced by the action of the second resistor R2, so that the base voltage of the second transistor Q2 is reduced, the collector current is also reduced, and the base voltage Vb3 of the third transistor Q3 is increased by the action of the third resistor R3, thereby realizing adaptive linear compensation.
Please refer to fig. 3 and fig. 4 in combination; by means of ADS simulation software, comparing the output current of the collector of the power transistor Q0 in the prior art with the output current of the collector of the power transistor Q0 in the invention, the output current is shown in FIG. 3 along with the change of the reference voltage, when the reference voltage Vref is increased from 2.9V to 3.3V, the collector current of the power transistor in the prior art fluctuates within the range of 68-104 mA, and the maximum change of the current is 36 mA; in the scheme of the invention, the collector current of the power transistor fluctuates within the range of 85-89 mA, and the maximum current variation is 4 mA. As is well known, the linearity of the power amplifier can be reflected by the gain distortion, and referring to fig. 4, compared with the prior art, the output 1dB compression point of the adaptive bias circuit in the technical solution of the present invention is increased from 24dBm to 27.5dBm, and the gain distortion is significantly optimized. Therefore, compared with the prior art, the adaptive bias circuit insensitive to the reference voltage fluctuation greatly reduces the drift of the static working point of the power transistor when the reference voltage fluctuates, and simultaneously enhances the linear compensation of the bias circuit on the power transistor, so that the power amplification circuit can work stably and linearly in a complex application environment.
In summary, the adaptive bias circuit of the present invention, by providing the negative feedback loop in the voltage regulator sub-circuit, can effectively suppress the influence of the fluctuation of the reference voltage on the collector current of the power transistor in the power amplifier circuit during the operation process, thereby ensuring that the power amplifier circuit can normally, stably and continuously operate; in addition, the self-adaptive bias circuit is also provided with a linear compensation sub-circuit, so that the gain compression and phase distortion of the power transistor can be effectively inhibited, and the linear compensation effect of the self-adaptive bias circuit on the power amplification circuit is enhanced.
The present invention has been described in connection with the preferred embodiments, but the present invention is not limited to the embodiments disclosed above, and is intended to cover various modifications, equivalent combinations, which are made in accordance with the spirit of the present invention.

Claims (5)

1. A self-adaptive bias circuit is used for adjusting the bias state of a power amplification circuit and comprises a linear compensation sub-circuit and a voltage stabilization sub-circuit, wherein the voltage stabilization sub-circuit and the linear compensation sub-circuit are connected with each other and are respectively connected with the power amplification circuit, the linear compensation sub-circuit is used for adjusting the linearity of a power transistor of the power amplification circuit, and the voltage stabilization sub-circuit is used for inhibiting the influence of reference voltage fluctuation on the static working point of the power amplification circuit; the voltage stabilizing sub-circuit is characterized by comprising a first transistor, a second transistor, a first resistor, a second resistor, a third resistor and a fourth resistor, wherein one end of the first resistor is connected with the power transistor of the power amplifying circuit, and the other end of the first resistor is connected with the base electrode of the first transistor; the emitter of the first transistor is grounded, the collector of the first transistor is connected with one end of a second resistor, one end of a fourth resistor and the base of the second transistor, the other end of the fourth resistor is grounded, and the other end of the second resistor is connected with a reference voltage source; the emitter of the second transistor is grounded, the base of the second transistor is also connected with the linear compensation sub-circuit, the collector of the second transistor is connected with one end of the third resistor, and the other end of the third resistor is connected with a reference voltage source.
2. The adaptive bias circuit of claim 1, wherein the regulator sub-circuit further comprises a first capacitor having one end connected to the base of the second transistor and the other end connected to ground.
3. The adaptive bias circuit of claim 2, wherein the second resistor, the third resistor, the fourth resistor, and the second transistor together form a negative feedback loop to suppress a shift of a reference voltage ripple to a quiescent bias point of the power transistor.
4. The adaptive bias circuit according to claim 1, wherein the linearity compensation sub-circuit includes a third transistor, a fourth transistor and a fifth resistor, an emitter of the third transistor is connected to the power transistor of the power amplification circuit, a base of the third transistor is commonly connected to a base of the fourth transistor and a collector of the second transistor, and an emitter of the fourth transistor is commonly connected to a base of the second transistor and one end of the fourth resistor; and the collector electrode of the fourth transistor is commonly connected with the collector electrode of the third transistor and one end of a fifth resistor, and the other end of the fifth resistor is connected with an external power supply.
5. The adaptive biasing circuit of claim 4, wherein the linearity compensation subcircuit further comprises a second capacitor having one end connected to the base of the third transistor and another end connected to ground.
CN202210749975.9A 2022-06-28 2022-06-28 Self-adaptive bias circuit Pending CN115001412A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210749975.9A CN115001412A (en) 2022-06-28 2022-06-28 Self-adaptive bias circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210749975.9A CN115001412A (en) 2022-06-28 2022-06-28 Self-adaptive bias circuit

Publications (1)

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CN115001412A true CN115001412A (en) 2022-09-02

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