CN114974358A - Novel three-order charge control memristor equivalent circuit and memristor testing method - Google Patents
Novel three-order charge control memristor equivalent circuit and memristor testing method Download PDFInfo
- Publication number
- CN114974358A CN114974358A CN202210555023.3A CN202210555023A CN114974358A CN 114974358 A CN114974358 A CN 114974358A CN 202210555023 A CN202210555023 A CN 202210555023A CN 114974358 A CN114974358 A CN 114974358A
- Authority
- CN
- China
- Prior art keywords
- resistor
- voltage
- output end
- memristor
- multiplier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Amplifiers (AREA)
Abstract
The invention provides a novel three-order charge control memristor equivalent circuit and a memristor testing method, and particularly relates to the technical field of power electronics. The novel three-order charge-controlled memristor equivalent circuit comprises an amplifier, an integrator, an in-phase adder, a multiplier U4, a multiplier U5, a multiplier U6, a circuit output end B, a circuit output end C and a circuit output end D; the circuit output end B is used for outputting a first voltage, the first voltage is used for determining the third nonlinear characteristic of the third-order charge-controlled memristor, the circuit output end C is used for outputting a second voltage, the second voltage is used for determining the second nonlinear characteristic of the third-order charge-controlled memristor, the circuit output end D is used for outputting a third voltage, and the third voltage is used for determining the current-voltage characteristic of the third-order charge-controlled memristor. The novel three-order charge control memristor equivalent circuit can simultaneously realize the voltage-current characteristics of three kinds of charge control memristors, and can widely replace the actual three-order charge control memristors to carry out experimental tests and application researches.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a novel three-order charge control memristor equivalent circuit and a memristor testing method.
Background
The memristor is a 4 th basic electronic component discovered except for a resistor, a capacitor and an inductor, is a nonlinear device with memory characteristics, and is widely applied to the fields of dynamics analysis and realization, artificial neural networks, artificial intelligence, memory logic gate operation and the like based on a memristor chaotic circuit by people. Since the memristor is not put into commercial production at present, the memristor cannot be bought in the market, and the two-port volt-ampere characteristic identical to that of the memristor is realized only by an active equivalent circuit. However, most of the existing equivalent models of the magnetic control memristors are researched, and the novel equivalent model of the charge control memristor can only realize the same two-port voltage-current characteristic as one memristor.
Therefore, it is an urgent need to solve the problem of providing a novel equivalent circuit of a simple, stable and widely-applied charge control memristor.
Disclosure of Invention
The invention aims to provide a novel three-order charge control memristor equivalent circuit and a memristor testing method, which can be widely used for carrying out experimental tests and application researches on the three-order charge control memristor and has small occupied area in the practical application process.
In order to achieve the purpose, the invention provides the following scheme:
a novel three-order charge control memristor equivalent circuit comprises an amplifier, an integrator, an in-phase adder, a multiplier U4, a multiplier U5, a multiplier U6, a circuit output end B, a circuit output end C and a circuit output end D; the input end of the amplifier is used for inputting current, and the output end of the amplifier is respectively connected with the input end of the integrator, a first input end of a multiplier U5 and a first input end of a multiplier U6; the output end of the integrator is respectively connected with the first input end and the second input end of the multiplier U4 and the second input end of the multiplier U5; the output end of the multiplier U4 is connected with the second input end of the multiplier U6, the output end of the multiplier U6 is connected with the input end of the in-phase adder, the output end of the multiplier U6 is also connected with the circuit output end B, the circuit output end B is used for outputting a first voltage, and the first voltage is used for determining the third nonlinear characteristic of the third-order charge-controlled memristor; the output end of the multiplier U5 is connected with the circuit output end C, the circuit output end C is used for outputting a second voltage, the second voltage is used for determining the second-order nonlinear characteristic of a third-order charge control memristor, and the output end of the multiplier U5 is further connected with the input end of the in-phase adder; the output end of the in-phase adder is connected with the circuit output end D, the circuit output end D is used for outputting a third voltage, and the third voltage is used for determining the volt-ampere characteristic of the third-order charge-control memristor.
Optionally, the amplifier includes an operational amplifier U1, a resistor R1, a resistor R2, and a resistor R5; one end of the resistor R1 is used for inputting current; the other end of the resistor R1 is connected with the negative input end of an operational amplifier U1; one end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R2 is grounded; the negative end of the operational amplifier U1 is connected with the other end of the resistor R1, and the positive input end of the operational amplifier U1 is grounded; two ends of the resistor R5 are respectively connected with the negative end and the output end of the operational amplifier U1.
Optionally, the integrator includes an operational amplifier U2, a capacitor C1, a resistor R7, and a diode D; one end of the resistor R7 is connected with the output end of the amplifier; the other end of the resistor R7 is connected with the negative end of the operational amplifier U2, and the positive end of the operational amplifier U2 is grounded; two ends of the capacitor are respectively connected with the negative end and the output end of the operational amplifier U2; the anode end of the diode D is connected with the negative end of the operational amplifier U2, and the cathode end of the diode D is connected with the output end of the operational amplifier U2.
Optionally, the in-phase adder includes an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10, a resistor R11, and a resistor R12; one end of the resistor R8, one end of the resistor R9 and one end of the resistor R10 are connected with the positive end of the operational amplifier U3, and one end of the resistor R11 is connected with the negative end of the operational amplifier U3; the other end of the resistor R8 and the other end of the resistor R11 are grounded, the other end of the resistor R9 is connected with the output end of the multiplier U6, and the other end of the resistor R10 is connected with the output end of the multiplier U5; the output end of the operational amplifier U3 is connected with the circuit output end D; two ends of the resistor R12 are respectively connected with the negative end and the output end of the operational amplifier U3.
Optionally, a formula for determining the cubic nonlinear characteristic of the third-order charge-controlled memristor is as follows:
in the formula, M AB Is the memristance corresponding to the first voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
Optionally, the formula for determining the second-order nonlinear characteristic of the third-order charge control memristor is as follows:
in the formula, M AC Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
Optionally, the formula for determining the current-voltage characteristic of the third-order charge-controlled memristor is as follows:
in the formula, M AD Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 For electricity in integratorsThe capacitance value of the container.
A memristor testing method, the method comprising the steps of:
acquiring the output voltage of the novel three-order charge control memristor equivalent circuit; the output voltage is one or more of a first voltage, a second voltage and a third voltage, and the first voltage is used for determining a third-order nonlinear characteristic of a third-order charge-controlled memristor; the second voltage is used for determining a quadratic nonlinear characteristic of the third-order charge-controlled memristor, and the third voltage is used for determining a current-voltage characteristic of the third-order charge-controlled memristor;
and carrying out a test of a third-order charge control memristor by using the output voltage.
Optionally, the formula for determining the third-order nonlinear characteristic of the third-order charge control memristor is as follows:
in the formula, M AB Is the memristance corresponding to the first voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
determining the secondary nonlinear characteristics of the third-order charge control memristor as follows:
in the formula, M AC Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
the volt-ampere characteristic of the third-order charge-controlled memristor is determined as follows:
in the formula, M AD Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects:
a novel three-order charge-control memristor equivalent circuit comprises an amplifier, an integrator, an in-phase adder, a multiplier U4, a multiplier U5, a multiplier U6, a circuit output end B, a circuit output end C and a circuit output end D; the input end of the amplifier is used for inputting current, and the output end of the amplifier is respectively connected with the input end of the integrator, a first input end of a multiplier U5 and a first input end of a multiplier U6; the output end of the integrator is respectively connected with the first input end and the second input end of the multiplier U4 and the second input end of the multiplier U5; the output end of the multiplier U4 is connected with the second input end of the multiplier U6, the output end of the multiplier U6 is connected with the input end of the in-phase adder, the output end of the multiplier U6 is also connected with the circuit output end B, the circuit output end B is used for outputting a first voltage, and the first voltage is used for determining the third nonlinear characteristic of the third-order charge-controlled memristor; the output end of the multiplier U5 is connected with the circuit output end C, the circuit output end C is used for outputting a second voltage, the second voltage is used for determining the second-order nonlinear characteristic of a third-order charge control memristor, and the output end of the multiplier U5 is further connected with the input end of the in-phase adder; the output end of the in-phase adder is connected with the circuit output end D, the circuit output end D is used for outputting a third voltage, and the third voltage is used for determining the volt-ampere characteristic of the third-order charge-control memristor. The novel three-order charge control memristor equivalent circuit can simultaneously realize the volt-ampere characteristics of three kinds of charge control memristors, can widely replace the actual three-order charge control memristors to carry out experimental tests and application researches, and adopts fewer active components to construct the three-order charge control memristor equivalent circuit, so that the volume of the three-order charge control memristor equivalent circuit is reduced in actual application, and the use stability of the whole circuit and a system is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a novel three-order charge-controlled memristor equivalent circuit according to the present invention;
FIG. 2 is a circuit equivalent diagram when a third order nonlinear characteristic of a third order charge-controlled memristor is determined using a first voltage;
FIG. 3 is a circuit equivalent diagram when a second voltage is used to determine a second order nonlinear characteristic of a third order charge-controlled memristor.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention aims to provide a novel three-order charge control memristor equivalent circuit which can be widely used for carrying out experimental tests and application researches on the three-order charge control memristor instead of the actual three-order charge control memristor.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
The invention depends on the charge quantity q and the magnetic flux
A novel three-order charge control memristor equivalent circuit is constructed by Taylor series expansion of relationship
Where the quadratic terms in the model are not 0, where α, β, γ are the coefficients of the respective quadratic terms, the memristors are known
Then the corresponding memristor is M AD (q)＝α+2βq+3γq 2 。
When beta is 0, the formula for determining the third-order nonlinear characteristic of the third-order charge control memristor is as
And when gamma is 0, the formula for determining the second-order nonlinear characteristic of the third-order charge control memristor is as follows
As shown in fig. 1, the novel third-order charge-controlled memristor equivalent circuit provided by the invention comprises an amplifier, an integrator, an in-phase adder, a multiplier U4, a multiplier U5, a multiplier U6, a circuit output terminal B, a circuit output terminal C, and a circuit output terminal D.
The input end of the amplifier is used for inputting current, and the output end of the amplifier is respectively connected with the input end of the integrator, the first input end of the multiplier U5 and the first input end of the multiplier U6.
Further, the amplifier comprises an operational amplifier U1, a resistor R1, a resistor R2 and a resistor R5; one end of the resistor R1 is used for inputting current; the other end of the resistor R1 is connected with the negative input end of an operational amplifier U1; one end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R2 is connected withA ground; the negative end of the operational amplifier U1 is connected with the other end of the resistor R1, and the positive input end of the operational amplifier U1 is grounded; two ends of the resistor R5 are respectively connected with the negative end and the output end of the operational amplifier U1. The relation between the output voltage V1 of the amplifier and the resistor R2 is as follows: v1 ═ R 5 /R 1 )R 2 i (t), i (t) is the amplifier input current.
The output of the integrator is connected to the first and second inputs of the multiplier U4, and the second input of the multiplier U5, respectively.
Further, the integrator comprises an operational amplifier U2, a capacitor C1, a resistor R7 and a diode D; one end of the resistor R7 is connected with the output end of the amplifier; the other end of the resistor R7 is connected with the negative end of the operational amplifier U2, and the positive end of the operational amplifier U2 is grounded; two ends of the capacitor are respectively connected with the negative end and the output end of the operational amplifier U2; the anode end of the diode D is connected with the negative end of the operational amplifier U2, and the cathode end of the diode D is connected with the output end of the operational amplifier U2. The relation between the output voltage V2 and the voltage V1 of the integrator is as follows:
the output end of the multiplier U4 is connected with the second input end of the multiplier U6, the output end of the multiplier U6 is connected with the input end of the non-inverting adder, the output end of the multiplier U6 is further connected with the circuit output end B, the circuit output end B is used for outputting a first voltage V5, and the first voltage V5 is used for determining the third-order nonlinear characteristic of the third-order charge-controlled memristor. The relation between the output voltage V3 and the voltage V2 of the multiplier U4 is V3-V2 2 10; the relation between the output voltage V5 of the multiplier U6 and the voltages V1 and V3 is V5 ═ V1V3/10, i.e. the first voltage
Specifically, the third-order charge control is determined when the first voltage V5 is adoptedWhen the third nonlinear characteristic of the memristor is recalled, the circuit is equivalent to the graph 2, V AB ＝V5+V R1 Memory resistance value of
Memory resistance value M AB And the charge amount q is in a three-time nonlinear relationship, and in this case, β is 0.
The output end of the multiplier U5 is connected with the circuit output end C, the circuit output end C is used for outputting a second voltage V4, the second voltage V4 is used for determining the second-order nonlinear characteristic of the third-order charge-controlled memristor, and the output end of the multiplier U5 is also connected with the input end of the in-phase adder. The relation between the output voltage V4 of the multiplier U5 and the voltages V1 and V2 is V4 ═ V1V2/10, i.e. the second voltage
Specifically, when the second voltage V4 is used to determine the second-order nonlinear characteristic of the third-order charge-controlled memristor, the circuit is equivalent to fig. 3, V AC ＝V5+V R1 Memory resistance value of
Memory resistance value M AC And the charge amount q is in a quadratic nonlinear relationship, where γ is 0.
The output end of the in-phase adder is connected with the circuit output end D, the circuit output end D is used for outputting a third voltage V6, and the third voltage V6 is used for determining the current-voltage characteristic of the third-order charge-controlled memristor.
Further, the in-phase adder includes an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10, a resistor R11, and a resistor R12; one end of the resistor R8, one end of the resistor R9 and one end of the resistor R10 are connected with the positive end of the operational amplifier U3, and one end of the resistor R11 is connected with the negative end of the operational amplifier U3; the other end of the resistor R8 and the other end of the resistor R11 are grounded, the other end of the resistor R9 is connected with the output end of the multiplier U6, and the other end of the resistor R10 is connected with the output end of the multiplier U5; the output end of the operational amplifier U3 is connected with the circuit output end D; two ends of the resistor R12 are respectively connected with the negative end and the output end of the operational amplifier U3. The output voltage V6 of the in-phase adder is related to the voltage V4 and the voltage V5 by the following formula: v6 ═ V4+ V5, i.e. the third voltage
Specifically, when the third voltage V6 is used for determining the current-voltage characteristic of the third-order charge-controlled memristor, V AD ＝V6+V R1 Memory resistance value of
Example 2
A memristor testing method, the method comprising the steps of:
s1, obtaining the output voltage of the novel three-order charge-controlled memristor equivalent circuit in the embodiment 1;
s2 the output voltage is one or more of a first voltage V5, a second voltage V4 and a third voltage V6, and the first voltage V5 is used for determining the third-order nonlinear characteristic of the third-order charge-controlled memristor; the second voltage V4 is used for determining a quadratic nonlinear characteristic of the third-order charge-controlled memristor, and the third voltage V6 is used for determining a current-voltage characteristic of the third-order charge-controlled memristor;
s3 tests a third-order charge-controlled memristor by using the output voltage.
Further, the formula for determining the third-order nonlinear characteristic of the third-order charge control memristor is as follows:
in the formula, M AB Is the memristance corresponding to the first voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance of a resistor, R, in an amplifier 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
determining the secondary nonlinear characteristics of the third-order charge control memristor as follows:
in the formula, M AC A memristance corresponding to the second voltage, q (t) is a charge amount, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
the volt-ampere characteristic of the third-order charge-controlled memristor is determined as follows:
in the formula, M AD Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.
Claims (9)
1. A novel three-order charge-controlled memristor equivalent circuit is characterized by comprising an amplifier, an integrator, an in-phase adder, a multiplier U4, a multiplier U5, a multiplier U6, a circuit output end B, a circuit output end C and a circuit output end D;
the input end of the amplifier is used for inputting current, and the output end of the amplifier is respectively connected with the input end of the integrator, a first input end of a multiplier U5 and a first input end of a multiplier U6;
the output end of the integrator is respectively connected with the first input end and the second input end of the multiplier U4 and the second input end of the multiplier U5;
the output end of the multiplier U4 is connected with the second input end of the multiplier U6, the output end of the multiplier U6 is connected with the input end of the in-phase adder, the output end of the multiplier U6 is also connected with the circuit output end B, the circuit output end B is used for outputting a first voltage, and the first voltage is used for determining the third nonlinear characteristic of the third-order charge-controlled memristor;
the output end of the multiplier U5 is connected with the circuit output end C, the circuit output end C is used for outputting a second voltage, the second voltage is used for determining the second-order nonlinear characteristic of a third-order charge control memristor, and the output end of the multiplier U5 is further connected with the input end of the in-phase adder;
the output end of the in-phase adder is connected with the circuit output end D, the circuit output end D is used for outputting a third voltage, and the third voltage is used for determining the volt-ampere characteristic of the third-order charge-control memristor.
2. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein the amplifier comprises an operational amplifier U1, a resistor R1, a resistor R2, a resistor R5;
one end of the resistor R1 is used for inputting current; the other end of the resistor R1 is connected with the negative input end of an operational amplifier U1;
one end of the resistor R2 is connected with one end of the resistor R1, and the other end of the resistor R2 is grounded;
the negative end of the operational amplifier U1 is connected with the other end of the resistor R1, and the positive input end of the operational amplifier U1 is grounded;
two ends of the resistor R5 are respectively connected with the negative end and the output end of the operational amplifier U1.
3. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein the integrator comprises an operational amplifier U2, a capacitor C1, a resistor R7 and a diode D;
one end of the resistor R7 is connected with the output end of the amplifier;
the other end of the resistor R7 is connected with the negative end of the operational amplifier U2, and the positive end of the operational amplifier U2 is grounded;
two ends of the capacitor are respectively connected with the negative end and the output end of the operational amplifier U2;
the anode end of the diode D is connected with the negative end of the operational amplifier U2, and the cathode end of the diode D is connected with the output end of the operational amplifier U2.
4. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein the in-phase adder comprises an operational amplifier U3, a resistor R8, a resistor R9, a resistor R10, a resistor R11 and a resistor R12;
one end of the resistor R8, one end of the resistor R9 and one end of the resistor R10 are connected with the positive end of the operational amplifier U3, and one end of the resistor R11 is connected with the negative end of the operational amplifier U3;
the other end of the resistor R8 and the other end of the resistor R11 are grounded, the other end of the resistor R9 is connected with the output end of the multiplier U6, and the other end of the resistor R10 is connected with the output end of the multiplier U5;
the output end of the operational amplifier U3 is connected with the circuit output end D;
two ends of the resistor R12 are respectively connected with the negative end and the output end of the operational amplifier U3.
5. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein a formula for determining the third-order nonlinear characteristic of the third-order charge-controlled memristor is:
in the formula, M AB A memristance corresponding to the first voltage, q (t) is a charge amount, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
6. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein a formula for determining the second order nonlinear characteristic of the third-order charge-controlled memristor is:
in the formula, M AC Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance of a resistor, R, in an amplifier 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
7. The novel third-order charge-controlled memristor equivalent circuit according to claim 1, wherein a formula for determining a current-voltage characteristic of the third-order charge-controlled memristor is:
in the formula, M AD Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
8. A memristor testing method is characterized by comprising the following steps:
obtaining an output voltage of the equivalent circuit of any one of claims 1-7; the output voltage is one or more of a first voltage, a second voltage and a third voltage, and the first voltage is used for determining a third-order nonlinear characteristic of a third-order charge-controlled memristor; the second voltage is used for determining a quadratic nonlinear characteristic of the third-order charge-controlled memristor, and the third voltage is used for determining a current-voltage characteristic of the third-order charge-controlled memristor;
and carrying out a test of a third-order charge control memristor by using the output voltage.
9. The memristor testing method according to claim 8, wherein a formula for determining the third-order nonlinear characteristic of a third-order charge-controlled memristor is:
in the formula, M AB Is the memristance corresponding to the first voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance of a resistor, R, in an amplifier 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
determining the secondary nonlinear characteristics of the third-order charge control memristor as follows:
in the formula, M AC Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator;
the volt-ampere characteristic of the third-order charge-controlled memristor is determined as follows:
in the formula, M AD Is the memristance corresponding to the second voltage, q (t) is the charge quantity, R 1 、R 2 And R 5 Is the resistance value of a resistor in an amplifier, R 7 Is the resistance value of a resistor in an integrator, C 1 Is the capacitance value of the capacitor in the integrator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210555023.3A CN114974358B (en) | 2022-05-19 | 2022-05-19 | Novel third-order charge-controlled memristor equivalent circuit and memristor testing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210555023.3A CN114974358B (en) | 2022-05-19 | 2022-05-19 | Novel third-order charge-controlled memristor equivalent circuit and memristor testing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114974358A true CN114974358A (en) | 2022-08-30 |
| CN114974358B CN114974358B (en) | 2023-04-28 |
Family
ID=82986224
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210555023.3A Active CN114974358B (en) | 2022-05-19 | 2022-05-19 | Novel third-order charge-controlled memristor equivalent circuit and memristor testing method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114974358B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707514A (en) * | 2023-08-09 | 2023-09-05 | 苏州浪潮智能科技有限公司 | Multi-output memristor equivalent circuit, application system and control method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101447140A (en) * | 2008-12-31 | 2009-06-03 | 张新国 | Chaotic circuit of cascade reversed-phase integrator |
| CN203289397U (en) * | 2013-05-29 | 2013-11-13 | 广州大学 | Double-end active equivalent circuit of magnetic memristor |
| CN108696274A (en) * | 2018-04-24 | 2018-10-23 | 杭州电子科技大学 | A kind of circuit model of exponential type flow control memristor |
| CN110198164A (en) * | 2019-05-17 | 2019-09-03 | 山东科技大学 | A kind of absolute value flow control memristor analog circuit |
-
2022
- 2022-05-19 CN CN202210555023.3A patent/CN114974358B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101447140A (en) * | 2008-12-31 | 2009-06-03 | 张新国 | Chaotic circuit of cascade reversed-phase integrator |
| CN203289397U (en) * | 2013-05-29 | 2013-11-13 | 广州大学 | Double-end active equivalent circuit of magnetic memristor |
| CN108696274A (en) * | 2018-04-24 | 2018-10-23 | 杭州电子科技大学 | A kind of circuit model of exponential type flow control memristor |
| CN110198164A (en) * | 2019-05-17 | 2019-09-03 | 山东科技大学 | A kind of absolute value flow control memristor analog circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116707514A (en) * | 2023-08-09 | 2023-09-05 | 苏州浪潮智能科技有限公司 | Multi-output memristor equivalent circuit, application system and control method |
| CN116707514B (en) * | 2023-08-09 | 2023-11-03 | 苏州浪潮智能科技有限公司 | Multi-output memristor equivalent circuit, application system and control method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114974358B (en) | 2023-04-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Radwan et al. | Modeling and analysis of fractional order DC-DC converter | |
| Berkowitz | Conditions for network-element-value solvability | |
| Zubieta et al. | Characterization of double-layer capacitors (DLCs) for power electronics applications | |
| CN109829194B (en) | Absolute value magnetic control memristor equivalent simulation circuit | |
| CN101534094B (en) | Compensating circuit | |
| Salam et al. | Fundamentals of electrical circuit analysis | |
| Yang | Circuit systems with MATLAB and PSpice | |
| CN114974358A (en) | Novel three-order charge control memristor equivalent circuit and memristor testing method | |
| CN101465599B (en) | Step-down circuit and method for charge pump | |
| Agarwal et al. | Order reduction of zeta converter using direct truncation and routh approximation method | |
| CN108833073B (en) | Recall container and memory inductor-based equivalent circuit model of chaotic oscillator | |
| Khayamy et al. | Development of an equivalent circuit for batteries based on a distributed impedance network | |
| CN109347616A (en) | A kind of chaos circuit based on fractional order memristor | |
| CN103295628A (en) | Double-end active equivalent circuit of charge-control memristor | |
| Bartiromo et al. | Electrical measurements in the laboratory practice | |
| CN205232190U (en) | Analog circuit of sensilla characteristic is recalled in realization | |
| CN204331729U (en) | Recall the realizing circuit of container | |
| Kories et al. | Electrical engineering: a pocket reference | |
| Fritts | An analysis of electrochemical capacitors | |
| CN110147597B (en) | Multi-stable-state magnetic control memristor equivalent simulation circuit | |
| CN109766643B (en) | Circuit model of three-value memristor | |
| CN112285423B (en) | Method and system for rapidly calculating insulation resistance between anode and cathode and ground through fitting | |
| CN110110460B (en) | Diode bridge generalized fractional order memristor based on fractional order inductance | |
| CN113054947A (en) | ReLU type memristor simulator | |
| CN113505559B (en) | Three-value ideal universal voltage-controlled memristor circuit model |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |