CN114974054A - Laser projection system and control method - Google Patents

Abstract

The embodiment of the application discloses a laser projection system and a control method, and belongs to the technical field of laser projection. The method comprises the following steps: an AND gate logic circuit is added in the laser projection system, as long as the mainboard and the display panel determine that the mainboard and the display panel have the optical engine starting condition, two input ends of the AND gate logic circuit detect high level signals, and therefore the output end of the AND gate logic circuit can output the high level signals to supply power to the optical engine, and the optical engine is started in the starting process. Compared with the method for judging the starting condition of the optical engine on the mainboard through the USB protocol interactive information, the laser projection system provided by the embodiment of the application reduces the steps required for starting the optical engine, and further improves the starting speed of the laser projection system.

Description

Laser projection system and control method

Technical Field

The embodiment of the application relates to the technical field of laser projection, in particular to a laser projection system and a control method.

Background

The laser projection system comprises a main board, a display board, an optical engine and a projection screen. The main board is used for sending image signals to the display board, and the display board is used for controlling the optical engine to project the image signals onto the projection screen. How to control the laser projection system to complete the start-up process is a hot spot of current research.

Fig. 1 and 2 provide a related art startup process of a laser projection system. As shown in fig. 1 and 2, the main board and the display board communicate with each other based on a USB (universal serial bus) protocol. When the mainboard detects the start-up instruction, the mainboard control power supplies power to the display panel to start the display panel. After the display panel is started, if the display panel is determined to have the optical engine starting condition (namely, the lighting condition), a first notification message is sent to the main board through the USB protocol, and the first notification message indicates that the display panel currently has the optical engine starting condition. After receiving a first notification message sent by the display panel, the main board judges whether the main board and the display panel both have optical engine starting conditions. And if the main board determines that the main board and the display board both have the optical engine starting condition, sending a second notification message to the display board through the USB protocol, wherein the second notification message indicates that the main board and the display board both have the optical engine starting condition currently. And after receiving the second notification message, the display panel controls the power panel to supply power to the optical engine by lighting a laser signal so as to start a laser in the optical engine, thereby completing the starting process of the laser projection system.

The starting process of the laser projection system is complicated, so that the time required for starting the optical engine is prolonged, and further the starting speed is slow.

Disclosure of Invention

The embodiment of the application provides a laser projection system and a control method, which can improve the starting speed of the laser projection system. The technical scheme is as follows:

in one aspect, a laser projection system is provided, which includes a main board, a display panel, an and gate logic circuit, and an optical engine:

the first end of the main board is connected with the first input end of the AND logic circuit, the first end of the display board is connected with the second input end of the AND logic circuit, and the output end of the AND logic circuit is connected with the first end of the optical engine;

the mainboard is used for: after a starting-up instruction is received, if the current self has an optical engine starting condition, controlling a first end of the mainboard to output a high-level signal;

the display panel is used for: if the current self optical engine starting condition is detected, controlling a first end of the display panel to output a high level signal;

the AND gate logic circuit is configured to: and if the first input end and the second input end of the AND gate logic circuit both receive high level signals, controlling the output end of the AND gate logic circuit to output the high level signals so as to supply power to the optical engine.

Optionally, the display panel comprises a digital light processing, DLP, system circuit, a first terminal of the DLP system circuit being connected to a second input terminal of the and logic circuit, the DLP system circuit being configured to: if the current self optical engine starting condition is detected, controlling a first end of the DLP system circuit to output a high level signal;

the AND gate logic circuit is integrated on the display panel.

Optionally, the motherboard includes an SOC circuit, a first end of the SOC circuit is connected to a first input end of the and gate logic circuit, and the SOC circuit is configured to: if the current optical engine starting condition is detected, controlling a first end of the SOC to output a high-level signal;

and the AND gate logic circuit is integrated on the mainboard.

Optionally, the and gate logic circuit is further configured to: and if any one of the first input end and the second input end of the AND gate logic circuit receives a low level signal, controlling the output end of the AND gate logic circuit to output the low level signal so as to stop supplying power to the optical engine.

Optionally, the display panel is further configured to: and controlling the first end of the display panel to output a low level signal if the laser projection system is detected to have a fault.

Optionally, the main board is further configured to: and if the laser projection system is detected to have a fault, controlling the first end of the main board to output a low level signal.

Optionally, the laser projection system further comprises a power supply board;

the output end of the AND gate logic circuit is connected with the first input end of the power panel, and the first output end of the power panel is connected with the first end of the optical engine;

the power panel is used for: when the first input end of the power panel is detected to receive a high level signal, power is supplied to the optical engine through the first output end of the power panel.

Optionally, the main board further comprises a second end, the display panel further comprises a second end, and the second end of the main board is connected with the second end of the display panel;

the second end of the mainboard and the second end of the display panel are Universal Serial Bus (USB) interfaces.

On the other hand, a control method of a laser projection system is provided, wherein the laser projection system is any one of the laser projection systems; the method comprises the following steps:

after the mainboard receives a starting instruction, if the mainboard detects that the mainboard has an optical engine starting condition at present, the first end of the mainboard is controlled to output a high-level signal;

if the display panel detects that the display panel has the optical engine starting condition at present, controlling a first end of the display panel to output a high-level signal;

and if the AND gate logic circuit detects that the first input end and the second input end of the AND gate logic circuit receive high level signals, the AND gate logic circuit is controlled to output the high level signals to supply power to the optical engine.

Optionally, the display panel comprises a digital light processing, DLP, system circuit, a first terminal of the DLP system circuit being connected to a second input terminal of the and logic circuit, the DLP system circuit being configured to: if the current self optical engine starting condition is detected, controlling a first end of the DLP system circuit to output a high level signal;

the AND gate logic circuit is integrated on the display panel.

Optionally, the motherboard includes an SOC circuit, a first end of the SOC circuit is connected to a first input end of the and gate logic circuit, and the SOC circuit is configured to: if the current optical engine starting condition is detected, controlling a first end of the SOC to output a high-level signal;

and the AND gate logic circuit is integrated on the mainboard.

Optionally, the method further comprises:

and if any one of the first input end and the second input end of the AND gate logic circuit receives a low level signal, controlling the output end of the AND gate logic circuit to output the low level signal so as to stop supplying power to the optical engine.

Optionally, the method further comprises:

and controlling a first end of the display panel to output a low level signal if the display panel detects that the laser projection system has a fault.

Optionally, the method further comprises:

and if the main board detects that the laser projection system has a fault, controlling the first end of the main board to output a low level signal.

Optionally, the laser projection system further comprises a power supply board;

the output end of the AND gate logic circuit is connected with the first input end of the power panel, and the first output end of the power panel is connected with the first end of the optical engine;

the AND gate logic circuit controls the output end of the AND gate logic circuit to output a high level signal so as to start the optical engine, and the AND gate logic circuit comprises:

when the power panel detects that the first input end of the power panel receives a high level signal, the power panel supplies power to the optical engine through the first output end of the power panel.

Optionally, the main board further comprises a second end, the display panel further comprises a second end, and the second end of the main board is connected with the second end of the display panel;

the second end of the mainboard and the second end of the display panel are Universal Serial Bus (USB) interfaces.

The beneficial effects brought by the technical scheme provided by the embodiment of the application at least comprise:

in the embodiment of the application, the AND gate logic circuit is added in the laser projection system, as long as the main board and the display board determine that the main board and the display board have the optical engine starting condition, the two input ends of the AND gate logic circuit detect the high level signal, so that the output end of the AND gate logic circuit can output the high level signal to supply power to the optical engine, and the optical engine is started in the starting process. Compared with the method for judging the starting condition of the optical engine on the mainboard through the USB protocol interactive information, the laser projection system provided by the embodiment of the application reduces the steps required for starting the optical engine, and further improves the starting speed of the laser projection system.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 provides a related art startup process for a laser projection system;

FIG. 2 provides a startup process for a related art laser projection system consistent with FIG. 1;

FIG. 3 is a schematic diagram of a laser projection system according to an embodiment of the present disclosure;

FIG. 4 is a schematic diagram of another laser projection system provided in an embodiment of the present application;

FIG. 5 is a schematic structural diagram of an optical engine according to an embodiment of the present disclosure;

FIG. 6 is a schematic diagram of another laser projection system provided in an embodiment of the present application;

fig. 7 is a schematic diagram of an operation process of an and logic circuit according to an embodiment of the present disclosure;

FIG. 8 is a schematic diagram of another laser projection system provided in an embodiment of the present application;

fig. 9 is a flowchart of a control method of a laser projection system according to an embodiment of the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the embodiments of the present application more clear, the embodiments of the present application will be further described in detail with reference to the accompanying drawings.

Before the embodiments of the present application are explained in detail, an application scenario of the embodiments of the present application is introduced.

Laser projection systems, also known as laser televisions, typically include two parts, a projection screen and a laser projection host. The laser projection host is used for projecting images to a projection screen, so that the functions of video playing and the like are realized.

The laser projection host comprises a plurality of components such as a main board, a display panel and an optical engine, and the projection of images to the projection screen can be realized through the linkage of the plurality of components. The linkage between these multiple components usually affects the operating efficiency of the laser projection system, such as the power-on speed, the fault response speed (i.e., the error response speed), and so on.

Based on this, the embodiment of the application provides a laser projection system and a control method, which can improve the starting-up speed and the fault response speed of the laser projection system.

Fig. 3 is a schematic structural diagram of a laser projection system according to an embodiment of the present disclosure. As shown in fig. 3, the laser projection system 00 includes a main board 10, a display panel 20, an and logic circuit 30, and an optical engine 40.

The first terminal of the main board 10 is connected to the first input terminal of the and logic circuit 30, the first terminal of the display panel 20 is connected to the second input terminal of the and logic circuit 30, and the output terminal of the and logic circuit is connected to the first terminal of the optical engine 40. That is, the laser projection system provided in the embodiment of the present application adds the and logic circuit 30 between the main board 10 and the display panel 20.

The main board 10 is used for: after receiving the power-on command, if it is detected that the current host has the optical engine starting condition, the first end of the main board 10 is controlled to output a high-level signal. The display panel 20 is used to: and controlling the first terminal of the display panel 20 to output a high level signal if the current self optical engine starting condition is detected. And logic circuit 30 is configured to: if the first input terminal and the second input terminal of the and logic circuit 30 both receive the high level signal, the output terminal of the and logic circuit 30 is controlled to output the high level signal to supply power to the optical engine 40.

The and logic circuit 30 includes two input terminals (a first input terminal, a second input terminal) and an output terminal. The and logic circuit 30 functions as: the output of the and logic circuit 30 outputs a high signal only if both inputs of the and logic circuit 30 receive a high signal, and the output of the and logic circuit 30 outputs a low signal if either of the two inputs of the and logic circuit 30 receives a low signal.

Therefore, as long as the main board 10 and the display panel 20 both determine that they have the optical engine starting condition, both input ends of the and logic circuit 30 detect the high level signal, so that the output end of the and logic circuit 30 can output the high level signal to supply power to the optical engine 40, thereby realizing the starting of the optical engine 40 in the starting process. Compared with the method for judging the starting condition of the optical engine on the mainboard 10 through the USB protocol interactive information, the laser projection system 00 provided by the embodiment of the application reduces the steps required for starting the optical engine 40, and further improves the starting speed of the laser projection system 00.

It should be noted that, starting the optical engine in the embodiment of the present application specifically means turning on a light source (also referred to as a laser) in the optical engine, and thus the above-mentioned supplying power to the optical engine 40 specifically means powering on the light source. The details of the light source will be described later, and will not be expanded.

In the embodiment of the present application, the signal received at the Input terminal of the and logic circuit 30 and the signal Output at the Output terminal may be a General Purpose Input Output (GPIO) signal. In this scenario, the first terminal of the motherboard 10, the first terminal of the display panel 20, the two input terminals and the one output terminal of the and logic circuit may all be referred to as GPIO interfaces.

The GPIO signal is a flexible software controlled digital signal. The GPIO signal has two states: a low level signal (denoted as 0) and a high level signal (denoted as 1). Based on the method, data interaction can be carried out between the GPIO interface and hardware, or hardware operation is controlled, or an operation state signal of the hardware is read.

Based on the function of the GPIO signal, in the embodiment of the present application, the execution logic of the main board 10, the display board 20 and the optical engine 40 may be configured in advance to implement the function of the laser projection system provided by the embodiment of the present application.

Specifically, it is pre-configured that: after the main board 10 receives the boot instruction, if it is detected that the main board 10 has the optical engine start condition, the first end of the main board 10 is controlled to output a high-level GPIO signal, and the high-level GPIO signal is input to the first input end of the and logic circuit 30. Pre-configuring: the display panel 20 controls the first terminal of the display panel 20 to output a high-level GPIO signal if it detects that the display panel 20 currently has the optical engine starting condition, and the high-level GPIO signal is input to the first input terminal of the and logic circuit 30. Pre-configuring: when the optical engine 40 receives the high-level GPIO signal output from the and logic circuit 30, the optical engine is started. After the configuration is completed, the laser projection system can implement the boot process provided by the embodiment of the application, so as to improve the boot speed.

For the convenience of the following description, the internal structures of the main board 10, the display panel 20, and the optical engine 40 are explained herein.

(1) Main board

As shown in fig. 4, in some embodiments, the main board 10 includes a SOC (system on chip) circuit 101, where the SOC circuit 101 is configured to receive the video stream, parse the decoded video stream to obtain decoded video data and audio data, and transmit the video data to the display panel 20, so that the display panel 20 drives the optical engine 40 to display the video data, and transmit the audio data to the speaker, so that the speaker plays the audio data.

Illustratively, the SOC circuit 101 may include one or more processing cores, such as a 4-core processor, an 8-core processor, and the like. The SOC circuit 101 may be implemented in at least one hardware form of a DSP (Digital Signal Processing), an FPGA (Field-Programmable Gate Array), and a PLA (Programmable Logic Array). The SOC circuit 101 may also include a main processor and a coprocessor, where the main processor is a processor for Processing data in an awake state, and is also referred to as a Central Processing Unit (CPU); a coprocessor is a low power processor for processing data in a standby state.

As shown in fig. 4, in other embodiments, the main board 10 may further include a power amplifier module 102, where the power amplifier module 102 is used to drive a device such as a sound box.

As shown in fig. 4, in other embodiments, the main board 10 may further include a first storage module 103, where the first storage module 103 is used for storing data processed by the SOC circuit 101. Illustratively, the first storage module 103 may include one or more computer-readable storage media, which may be non-transitory. The first storage module 103 may also include high speed random access memory, as well as non-volatile memory, such as one or more magnetic disk storage devices, flash memory storage devices.

Among other things, the non-transitory computer readable storage medium in the first storage module 103 may be used to store at least one instruction for execution by the SOC circuit 101 to implement the functions of the motherboard 10 in the embodiments of the present application.

(2) Display panel and optical engine

As shown in fig. 4, in some embodiments, the display panel 20 may include a DLP (digital light processing) system circuit 201. The DLP system circuit 201 is configured to perform a digital processing on the video data, and control the optical engine 40 to display an image based on the digital processed video data.

Illustratively, the DLP system circuit 201 includes a DMD (digital micromirror device) chip, which operates by controlling the reflection direction of light by means of a plurality of micromirrors.

Specifically, as shown in fig. 5, the optical engine 40 includes hardware such as a light source, a lens, a color wheel, and a projection lens. The light emitted by the light source is irradiated onto each micro-mirror of the DMD chip of the DLP system circuit 201 after passing through the lens and the color wheel, and when the micro-mirror is in an open position, the light is reflected to the projection lens, so that the light is irradiated onto the projection screen through the projection lens for imaging. The starting of the optical engine specifically means turning on the light source (powering on the light source), and therefore the high level signal output by the and logic circuit may also be referred to as a lighting signal. In addition, the light source may be a laser as an example, and the high level signal output by the and logic circuit may also be referred to as a lighting laser signal at this time.

In addition, as shown in fig. 4, the display panel 20 may further include a driving circuit 202, which may be, for example, a driving circuit for driving a fan within the host.

In addition, as shown in fig. 4, the display panel 20 may further include a second storage module 203, and the second storage module 203 is used for storing data processed by the DLP system circuit 201. The related content of the second storage module 203 may refer to the related content of the first storage module 103, and is not described herein again.

It should be noted that the internal structures of the motherboard 10, the display panel 20, and the optical engine 40 are used for illustration, and the embodiments of the present application do not limit the internal structures of the motherboard 10, the display panel 20, and the optical engine 40.

Based on the above description of the internal structure of the main board and the display panel, the and logic circuit 30 may be integrated on the display panel 20 or the main board 10 for product integration.

In some embodiments, the and logic circuit 30 is integrated on the display panel 20, as shown in fig. 6. At this time, the display panel 20 includes a DLP system circuit 201, a first terminal of the DLP system circuit 201 is connected to a second input terminal of the and logic circuit 30, and the DLP system circuit 201 is configured to: and controlling the first end of the DLP system circuit 201 to output a high-level signal if the optical engine starting condition is detected to be possessed by the first end at present.

Therefore, when the laser projection system provided by the embodiment of the application is implemented, only one and gate logic circuit needs to be added on the display panel, and the operation is easy to implement. And the and gate logic circuit 30 and the DLP system circuit 201 are both used for controlling the optical engine 40, and the arrangement of the two circuits on one board is more beneficial to the subsequent maintenance of the laser projection system.

In the scenario where the and logic circuit 30 is integrated in the display panel 20, the operating principle of the and logic circuit 30 is illustrated in fig. 7. As shown in fig. 7, the main board inputs a signal (i.e., whether the main board has the optical engine start condition) to the and logic circuit, where the signal indicates whether the main board has the light condition, for example, when the main board has the light condition, the signal is a high level signal, and when the main board does not have the light condition, the signal is a low level signal.

As shown in fig. 7, the display panel inputs a signal (i.e., whether or not the display panel has the optical engine start condition) to the and logic circuit, and the signal is a high level signal when the display panel has the light condition, and the signal is a low level signal when the display panel does not have the light condition, for example.

And the AND gate logic circuit outputs a laser lightening signal through the display panel to start the laser in the optical engine when detecting that the two input ends both receive the high level signal. The ignition laser signal may be, for example, a high level signal.

In other embodiments, and logic circuit 30 is integrated on motherboard 10, as shown in fig. 8. At this time, the main board 10 includes a system on chip SOC circuit 101, a first end of the SOC circuit 101 is connected to a first input end of the and logic circuit, and the SOC circuit is configured to: and controlling the first end of the SOC to output a high-level signal if the current optical engine starting condition is detected.

Therefore, when the laser projection system provided by the embodiment of the application is realized, only one AND gate logic circuit needs to be added on the mainboard, and the operation is also easy to realize.

Optionally, in other embodiments, the and logic circuit 30 may also be integrated on another chip of the laser projection host, or the and logic circuit 30 is a chip independent from another chip of the laser projection host, which is not limited in this embodiment of the present application.

In addition, the embodiment of the present application realizes starting the optical engine by controlling the power supply to the optical engine 40. Based on this, in some embodiments, as shown in fig. 3, 4, 6, and 8, the laser projection system 00 further includes a power supply board 50. At this time, the output terminal of the and logic circuit 30 and the first terminal of the optical engine 40 are connected as follows: the output of the and logic circuit 30 is connected to a first input of the power board 50, and a first output of the power board 50 is connected to a first terminal of the optical engine 40. The power panel 50 is used for: when the first input end of the power supply board 50 receives a high level signal, power is supplied to the optical engine through the first output end of the power supply board 50.

That is, when the power board 50 detects that the and logic circuit 30 outputs a high level signal, power is supplied to the optical engine to start the optical engine.

The power board 50 supplies power to the optical engine 40 through the first output end, which can be understood as supplying power to a light source (i.e., a laser) in the optical engine 40.

In addition, as shown in fig. 3, 4, 6 and 8, the power board 50 further includes a second output terminal, and the second output terminal of the power board 50 is connected to a third terminal of the main board 10 to supply power to the main board 10. That is, the power supply board 50 is also used to supply power to the main board 10.

In addition, as shown in fig. 3, 4, 6 and 8, the power supply board 50 further includes a third output terminal, and the third output terminal of the power supply board 50 is connected to a third terminal of the display panel 20 to supply power to the display panel 20. That is, the power supply board 50 is also used to supply power to the display panel 20.

It should be noted that, in order to reduce power consumption, after the power board 50 is powered on, the power board 50 may only supply power to the motherboard 10, and then the power board 50 is controlled to supply power to the display panel 20 after the subsequent motherboard 10 detects a power-on command.

In addition, in the embodiment of the present application, after the main board 10 detects the power-on command, it may detect whether the main board 10 has the optical engine starting condition, where whether the main board 10 has the optical engine starting condition may be understood as: whether the main board 10 is ready to transmit the decoded video data to the display panel 20. Specifically, the main board 10 may determine whether it has cached video data related to an image displayed on the projection screen after the start-up, and if it has cached video data related to the image, it may determine that it has the optical engine start condition.

The starting instruction can be triggered by a user through a preset operation, and the preset operation can be clicking a starting button of a remote controller and the like.

In addition, in the embodiment of the present application, whether the display panel 20 has the optical engine start condition or not may be understood as follows: whether the display panel 20 is ready to project video data through the optical engine 40 to the projection screen. Specifically, the display panel 20 may determine whether the color wheel in the optical engine 50 is ready to be completed, such as whether the color wheel is powered up.

In addition, as shown in fig. 4, fig. 6 and fig. 8, in the embodiment of the present application, the main board 10 may further include a second end, the display panel 20 may further include a second end, and the second end of the main board 10 is connected to the second end of the display panel 20, wherein the second end of the main board 10 and the second end of the display panel 20 are USB interfaces.

That is, the motherboard 10 and the display panel 20 may communicate with each other via USB protocol, so as to facilitate the communication between the motherboard 10 and the display panel 20. Such as video data to be displayed, etc.

Specifically, as shown in fig. 4, 6 and 8, the second end of the main board 10 may be a second end of the SOC circuit 101, and the second end of the display panel 20 may be a second end of the DLP system circuit 201. At this time, communication between the SOC circuit 101 and the DLP system circuit 201 may also be performed through the USB protocol, so as to facilitate the transfer of other information between the SOC circuit 101 and the DLP system circuit 201. Such as video data to be displayed, etc.

Optionally, the second end of the motherboard 10 and the second end of the display panel 20 may also be interfaces based on other data transmission protocols, such as other types of bus interfaces, which is not limited in this embodiment of the application.

In addition, as shown in fig. 4, 6 and 8, in the embodiment of the present application, the display panel 20 further includes a fourth end, the optical engine 40 further includes a second end, and the fourth end of the display panel 20 is connected to the second end of the optical engine 40. The fourth end of the display panel 20 and the second end of the optical engine 40 are HSSI (high-speed serial interface).

That is, the motherboard 10 and the optical engine 40 may also communicate with each other via HSSI protocol, so that the display panel 20 transmits some control information to the color wheel and other components in the optical engine 40.

It should be noted that the structures of the laser projection systems shown in fig. 3, 4, 6, and 8 are used for illustration, and do not limit the structures of the laser projection systems provided in the embodiments of the present application.

Based on the laser projection systems shown in fig. 3, 4, 6, and 8, the time period required for lighting the light source (i.e., the laser) at startup can be shortened, thereby increasing the startup speed. Alternatively, based on the laser projection system shown in fig. 3, 4, 6 and 8, the time period for turning off the light source (i.e., the laser) after the display panel 20 reports an error can be shortened, thereby reducing the power consumption of the laser projection system. I.e., to increase the fault response speed (or error response speed).

Based on this, if any one of the first input terminal and the second input terminal of the and logic circuit 30 receives the low level signal, the output terminal of the and logic circuit 30 is controlled to output the low level signal to stop supplying power to the optical engine, so as to turn off the light source in the optical engine 40, so that the light source does not project light to the DMD in the display panel any more, thereby reducing power consumption.

The main board 10 and the display panel 20 may be preset in which scenes the corresponding first terminals need to be controlled to output low-level signals to turn off the optical engine.

In some embodiments, the display panel 20 is further configured to: the first terminal of the display panel 20 is controlled to output a low level signal if a malfunction of the laser projection system is detected.

Thus, when the display panel 20 detects that the laser projection system has a fault, it can directly stop supplying power to the light source through the and logic circuit 30 without reporting an error to the main board 10, so as to turn off the light source, thereby improving the response speed of the laser projection system after error reporting.

Additionally, the detection of a failure of the laser projection system by the display panel 20 may include a variety of failure conditions. For example, a color wheel or a lens in the optical engine 40 is detected to be faulty, or a DLP system circuit is detected to be unable to communicate with the motherboard.

Optionally, in other embodiments, the main board 10 is further configured to: and controlling the first end of the main board 10 to output a low level signal if the laser projection system is detected to have a fault.

Therefore, when the main board 10 detects that the laser projection system has a fault, the power supply to the light source can be stopped directly through the and logic circuit 30 to turn off the light source, so that the response speed of the laser projection system after error reporting is improved.

In addition, the detection of the laser projection system by the main board 10 may include various fault conditions. For example, a failure of a module on the motherboard is detected, or the SOC circuit is detected to be unable to communicate with the display panel 20.

It should be noted that, the above-mentioned scenario that the first end corresponding to the main board 10 and the display panel 20 outputs the low level signal is used for illustration, and when the laser projection system provided in the embodiment of the present application is applied, the trigger signal of the low level signal output by the first end corresponding to the main board 10 and the display panel 20 may be set according to a requirement, so as to achieve a purpose of stopping power supply to the optical engine 40 in a specific scenario.

To sum up, this application embodiment provides a scheme, can solve the slow problem of boot speed that brings through USB communication between mainboard and the display panel, can also optimize simultaneously and report wrong response flow to it is more timely to make to report wrong response, can more effectually play the guard action when guaranteeing laser television work unusual.

In addition, the embodiment of the application also provides a control method of the laser projection system, and the laser projection system is any one of the laser projection systems. As shown in fig. 9, the method includes the following steps.

Step 901: after the mainboard receives the starting instruction, if the mainboard detects that the mainboard has the optical engine starting condition at present, the first end of the mainboard is controlled to output a high-level signal.

Step 902: and controlling the first end of the display panel to output a high level signal if the display panel detects that the display panel currently has the optical engine starting condition.

Step 903: and if the AND gate logic circuit detects that the first input end and the second input end of the AND gate logic circuit receive the high level signal, the output end of the AND gate logic circuit is controlled to output the high level signal so as to supply power to the optical engine.

Optionally, in the method, if either one of the first input terminal and the second input terminal of the and logic circuit receives a low level signal, the output terminal of the and logic circuit is controlled to output the low level signal to stop supplying power to the optical engine.

Alternatively, the display panel controls the first terminal of the display panel to output a low level signal if the laser projection system is detected to have a malfunction.

Optionally, the main board controls the first end of the main board to output a low level signal if it detects that the laser projection system has a fault.

The detailed implementation manner and corresponding technical effects of the steps in the embodiment of fig. 9 can refer to the foregoing embodiments related to the laser projection system, and are not described in detail herein.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

The above description is only a preferred embodiment of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (10)

1. A laser projection system, comprising a motherboard, a display panel, and gate logic, and an optical engine:

the first end of the main board is connected with the first input end of the AND logic circuit, the first end of the display board is connected with the second input end of the AND logic circuit, and the output end of the AND logic circuit is connected with the first end of the optical engine;

the main board is used for: after a starting-up instruction is received, if the current self has an optical engine starting condition, controlling a first end of the mainboard to output a high-level signal;

the display panel is used for: if the current self optical engine starting condition is detected, controlling a first end of the display panel to output a high level signal;

the AND gate logic circuit is configured to: and if the first input end and the second input end of the AND gate logic circuit both receive high level signals, controlling the output end of the AND gate logic circuit to output the high level signals so as to supply power to the optical engine.

2. The laser projection system of claim 1, wherein the display panel comprises a Digital Light Processing (DLP) system circuit, a first terminal of the DLP system circuit being connected to a second input terminal of the AND logic circuit, the DLP system circuit being configured to: if the current self optical engine starting condition is detected, controlling a first end of the DLP system circuit to output a high level signal;

the AND gate logic circuit is integrated on the display panel.

3. The laser projection system of claim 1, wherein the motherboard comprises a system-on-chip (SOC) circuit, a first terminal of the SOC circuit connected to a first input of the AND logic circuit, the SOC circuit to: if the current optical engine starting condition is detected, controlling a first end of the SOC to output a high-level signal;

and the AND gate logic circuit is integrated on the mainboard.

4. The laser projection system of claim 1,

the AND logic circuit is further configured to: and if any one of the first input end and the second input end of the AND gate logic circuit receives a low level signal, controlling the output end of the AND gate logic circuit to output the low level signal so as to stop supplying power to the optical engine.

5. A laser projection system as claimed in claim 4,

the display panel is further configured to: and controlling the first end of the display panel to output a low level signal if the laser projection system is detected to have a fault.

6. The laser projection system of claim 4,

the main board is further configured to: and if the laser projection system is detected to have a fault, controlling the first end of the main board to output a low level signal.

7. The laser projection system of claim 1, wherein the laser projection system further comprises a power supply board;

the output end of the AND gate logic circuit is connected with the first input end of the power panel, and the first output end of the power panel is connected with the first end of the optical engine;

the power panel is used for: when the first input end of the power panel is detected to receive a high level signal, power is supplied to the optical engine through the first output end of the power panel.

8. The laser projection system of claim 1, wherein the main board further comprises a second end, the display panel further comprises a second end, and the second end of the main board is connected to the second end of the display panel;

the second end of the mainboard and the second end of the display panel are Universal Serial Bus (USB) interfaces.

9. A method of controlling a laser projection system, wherein the laser projection system is a laser projection system according to any one of claims 1 to 9; the method comprises the following steps:

after the mainboard receives a starting instruction, if the mainboard detects that the mainboard has an optical engine starting condition at present, the first end of the mainboard is controlled to output a high-level signal;

if the display panel detects that the display panel has the optical engine starting condition at present, controlling a first end of the display panel to output a high-level signal;

and if the AND gate logic circuit detects that the first input end and the second input end of the AND gate logic circuit receive high level signals, the AND gate logic circuit is controlled to output the high level signals to supply power to the optical engine.

10. The method of claim 9, wherein the method further comprises:

and if any one of the first input end and the second input end of the AND gate logic circuit receives a low level signal, controlling the output end of the AND gate logic circuit to output the low level signal so as to stop supplying power to the optical engine.

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