CN114968853A

CN114968853A - Power chip management method and system and electronic equipment

Info

Publication number: CN114968853A
Application number: CN202110198792.8A
Authority: CN
Inventors: 李其一; 刘晨
Original assignee: Honor Device Co Ltd
Current assignee: Honor Device Co Ltd
Priority date: 2021-02-22
Filing date: 2021-02-22
Publication date: 2022-08-30
Anticipated expiration: 2041-02-22
Also published as: CN114968853B

Abstract

The application discloses a power supply chip management method, which is applied to electronic equipment, wherein the electronic equipment comprises a control device, a power supply chip and a device to be adjusted, and the power supply chip is respectively connected with the control device and the device to be adjusted; the method comprises the following steps: the control device determines a first signal for indicating a first operation of the power supply chip and sends the first signal to the power supply chip, wherein the first operation is to adjust a first working parameter of the device to be adjusted to be a first target working parameter and/or adjust a first function of the power supply chip to be a first target function; the power supply chip receives the first signal and executes a first operation according to the first signal. The electronic equipment can realize the adjustment of the working parameters of the device to be adjusted and the adjustment of the functions of the power supply chip through the power supply chip. The production cost of the electronic equipment can be reduced, the hardware layout space can be saved, and the management cost can be saved. The application also discloses a power chip management system.

Description

Power chip management method and system and electronic equipment

Technical Field

The present disclosure relates to the field of electronic technologies, and in particular, to a power chip management method, a power chip management system, and an electronic device.

Background

Electronic devices such as mobile phones and computers generally include a Display device for displaying images, and the Display device may be a Liquid Crystal Display (LCD) or an Organic Light Emitting Diode (OLED) Display screen. The display device is usually operated by a Power Management Integrated Circuit (PMIC) as a Power supply chip in the electronic device, and different kinds of display devices usually have different requirements for the PMIC chip. When electronic equipment can use different types of display devices, different PMIC chips are generally required to be respectively configured for different display devices when hardware design of the electronic equipment is performed, and problems that production cost of the electronic equipment is high, layout space of the electronic equipment is affected, and the like exist.

With the development of electronic equipment, the types of devices in the electronic equipment are more and more abundant, and the requirements of other devices in the electronic equipment on power supply chips also have the problems.

Disclosure of Invention

The application provides a power chip management method, a power chip management system and electronic equipment, which can solve the problems that in the prior art, the electronic equipment needs to be respectively configured with different power chips for different devices to be adjusted, the production cost of the electronic equipment is high, the layout space of the electronic equipment is influenced, and the like. The power supply chip can directly control the power supply chip to adjust the working parameters and other aspects of the parts to be adjusted through the control part, the adjustment requirements of different kinds of parts to be adjusted on the working parameters and other aspects can be met through one power supply chip, the production cost of the electronic equipment can be reduced, and the hardware layout space of the electronic equipment can be saved.

In order to solve the above technical problem, in a first aspect, an embodiment of the present application provides a power chip management method, which is applied to an electronic device, where the electronic device includes a control device, a power chip and a device to be adjusted, and the power chip is connected to the control device and the device to be adjusted respectively; the method comprises the following steps: the control device determines a first signal for indicating a first operation of the power supply chip and sends the first signal to the power supply chip, wherein the first operation is to adjust a first working parameter of the device to be adjusted to be a first target working parameter and/or adjust a first function of the power supply chip to be a first target function; the power supply chip receives the first signal and executes a first operation according to the first signal.

The power supply chip can directly control the power supply chip to adjust the working parameters and other aspects of the parts to be adjusted through the control part, the adjustment requirements of different kinds of parts to be adjusted on the working parameters and other aspects can be met through one power supply chip, the production cost of the electronic equipment can be reduced, the hardware layout space of the electronic equipment can be saved, and the management cost of the electronic equipment can be saved.

In one possible implementation of the first aspect, the device to be adjusted may be a display device, a fingerprint module, a camera, or the like.

In a possible implementation of the first aspect, the method further includes: the device to be adjusted determines a second signal used for indicating second operation, different from the first operation, of the power supply chip and sends the second signal to the power supply chip, wherein the second operation is to adjust second working parameters, different from the first working parameters, of the device to be adjusted to be second target working parameters and/or adjust second functions, different from the first functions, of the power supply chip to be second target functions; the power supply chip receives the second signal and executes a second operation according to the second signal.

In this implementation manner, the control device and the device to be adjusted may cooperate to adjust the first working parameter, the second working parameter, the first function, the second function, and other contents.

In a possible implementation of the first aspect, the power chip includes a first control pin and a second control pin, the control device is connected to the first control pin of the power chip, and the device to be adjusted is connected to the second control pin of the power chip, and the method further includes: the control device sends a first signal to the power supply chip through a first control pin; the to-be-adjusted device sends a second signal to the power chip through the second control pin.

The control device and the to-be-adjusted device respectively send signals for indicating the operation of the power chip to the power chip through different control pins of the power chip, and the power chip can be conveniently and accurately controlled.

In a possible implementation of the first aspect, the method further includes: the control device determines a second signal used for indicating second operation of the power supply chip, which is different from the first operation, and sends the second signal to the power supply chip, wherein the second operation is to adjust a second working parameter of the device to be adjusted, which is different from the first working parameter, to a second target working parameter and/or adjust a second function of the power supply chip, which is different from the first function, to a second target function; the power supply chip receives the second signal and executes a second operation according to the second signal.

In this implementation manner, the control device may directly implement the adjustment of the first operating parameter, the second operating parameter, the first function, the second function, and other contents.

In a possible implementation of the first aspect, the power chip includes a first control pin and a second control pin, the control device is connected to the first control pin and the second control pin of the power chip, respectively, and the method further includes: the control device sends a first signal to the power supply chip through the first control pin and sends a second signal to the power supply chip through the second control pin.

The control device sends signals for indicating different operations of the power supply chip to the power supply chip through different control pins of the power supply chip, and the power supply chip can be conveniently and accurately controlled.

In a possible implementation of the first aspect, the control device is connected to the control pin of the power chip through a serial peripheral interface.

In a possible implementation of the first aspect, the control device includes an application processor and a serial peripheral interface controller, and the serial peripheral interface controller is connected to the application processor and the power chip respectively; the control device determines and transmits to the power supply chip a signal indicating an operation of the power supply chip, including: the application processor determines working parameters according to the requirement information of the device to be adjusted, determines signal quantity information according to the corresponding relation between the working parameters and the preset working parameters and the output signal quantity, sends the signal quantity information to the serial peripheral interface controller, and controls the serial peripheral interface controller to generate a signal for indicating the operation of the power supply chip according to the signal quantity information and the preset signal output configuration information; the serial peripheral interface controller transmits a signal for instructing an operation of the power supply chip to the power supply chip.

In one possible implementation of the first aspect, the signal output configuration information may be clock information and mode information of the serial peripheral interface controller, and information such as voltage and frequency of the output signal and timing information of the output signal.

In the implementation mode, the signal for indicating the operation of the power supply chip is sent through the serial peripheral interface, the signal sending rate supported by the serial peripheral interface protocol is high, the power supply chip is not required to respond, the transmission rate of the signal can be effectively adjusted, and the adjustment of a device to be adjusted and the like can be realized more quickly and better.

In one possible implementation of the first aspect, the signal for indicating the operation of the power supply chip is a preset number of square wave signals, and the number of square waves of the first signal and the second signal is different. Of course, the signal may be other types of pulse signals or other information.

In a possible implementation of the first aspect described above, the first operating parameter and/or the second operating parameter comprises at least one of the following information: the voltage of the device to be regulated; the current of the device to be regulated; the function of the device to be adjusted.

In a possible implementation of the first aspect, the device to be adjusted is a display device, the first operating parameter is an analog device voltage of the display device, and the second operating parameter is an electroluminescence positive voltage and/or an electroluminescence negative voltage of the display device.

In a possible implementation of the first aspect, the device to be adjusted is a display device, the display device includes a display driver chip, and the power chip is connected to the display driver chip; the device to be adjusted sends a second signal to the control device, including: the display driving chip sends a second signal to the control device.

In this implementation manner, the display driver chip in the display device sends the second signal to the power chip, so as to control the content such as the working parameter of the display device through the power chip.

In a second aspect, an embodiment of the present application provides a power chip management system, which is applied to an electronic device, and includes a control device, a power chip, and a device to be adjusted, where the power chip is connected to the control device and the device to be adjusted respectively; the control device is used for determining a first signal for indicating a first operation of the power supply chip and sending the first signal to the power supply chip, wherein the first operation is to adjust a first working parameter of the device to be adjusted to be a first target working parameter and/or adjust a first function of the power supply chip to be a first target function; the power supply chip is used for receiving the first signal and executing a first operation according to the first signal.

In a possible implementation of the second aspect, the to-be-adjusted device is further configured to determine a second signal for indicating a second operation of the power chip, which is different from the first operation, and send the second signal to the power chip, where the second operation is to adjust a second operating parameter of the to-be-adjusted device, which is different from the first operating parameter, to a second target operating parameter and/or adjust a second function of the power chip, which is different from the first function, to a second target function; the power supply chip is also used for receiving a second signal and executing a second operation according to the second signal.

In a possible implementation of the second aspect, the power chip includes a first control pin and a second control pin, the control device is connected to the first control pin of the power chip, and the control device is configured to send a first signal to the power chip through the first control pin; the device to be adjusted is connected with a second control pin of the power supply chip, and the control device is used for sending a second signal to the power supply chip through the second control pin.

In a possible implementation of the second aspect, the control device is further configured to determine a second signal for indicating a second operation of the power chip, which is different from the first operation, and send the second signal to the power chip, where the second operation is to adjust a second operating parameter of the device to be adjusted, which is different from the first operating parameter, to a second target operating parameter and/or adjust a second function of the power chip, which is different from the first function, to a second target function; the power supply chip is also used for receiving a second signal and executing a second operation according to the second signal.

In a possible implementation of the second aspect, the power chip includes a first control pin and a second control pin, the control device is connected to the first control pin and the second control pin of the power chip, and the control device is configured to send a first signal to the power chip through the first control pin and send a second signal to the power chip through the second control pin.

In a possible implementation of the second aspect, the control device is connected to the control pin of the power chip through a serial peripheral interface.

In a possible implementation of the second aspect, the control device includes an application processor and a serial peripheral interface controller, and the serial peripheral interface controller is connected to the application processor and the power chip respectively; the application processor is used for determining working parameters according to the requirement information of the device to be adjusted, determining signal quantity information according to the corresponding relation between the working parameters and the preset working parameters and the output signal quantity, sending the signal quantity information to the serial peripheral interface controller, and controlling the serial peripheral interface controller to generate a signal for indicating the operation of the power supply chip according to the signal quantity information and the preset signal output configuration information; the serial peripheral interface controller is also used for sending a signal for indicating the operation of the power supply chip to the power supply chip.

In a possible implementation of the second aspect, the device to be adjusted is a display device, the display device includes a display driver chip, the power chip is connected to the display driver chip, and the display driver chip is configured to send the second signal to the control device.

The power chip management system provided by the present application is configured to execute the power chip management method provided by the first aspect and/or any one of the possible implementation manners of the first aspect, so that the beneficial effects (or advantages) of the power chip management method provided by the first aspect can also be achieved.

In a third aspect, an embodiment of the present application provides an electronic device, including: a memory for storing a computer program, the computer program comprising program instructions; a control unit, configured to execute program instructions to enable an electronic device to perform the power chip management method according to the first aspect and/or any one of the possible implementation manners of the first aspect.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program, where the computer program includes program instructions that are executed by a computer to cause the computer to execute the power chip management method provided in the foregoing first aspect and/or any one of the possible implementation manners of the first aspect.

It is understood that the beneficial effects of the second to fourth aspects can be seen from the description of the first aspect, and are not described herein again.

Drawings

In order to more clearly explain the technical solution of the present application, the drawings used in the description of the embodiments will be briefly introduced below.

1A-1C are some schematic diagrams illustrating the structure of a prior art power chip management system and a power chip management method, according to some embodiments of the present application;

FIG. 2 is some schematic diagrams illustrating the structure of a power chip management system and a power chip management method according to some embodiments of the present application;

FIG. 3 is a schematic diagram illustrating the structure of a handset 100, according to some embodiments of the present application;

FIG. 4 is some schematic diagrams illustrating the structure of a power chip management system and a power chip management method according to some embodiments of the present application;

fig. 5A is a schematic diagram illustrating the timing and process for adjusting AVDD and turning on FD functionality during power-up according to some embodiments of the present application;

FIG. 5B is a schematic diagram illustrating waveforms captured on SPI data lines in an actual single board simulation of the power chip management system and method provided herein, according to some embodiments of the present disclosure;

fig. 5C is a schematic diagram illustrating another waveform captured on an SPI data line in an actual board simulation according to some embodiments of the present application for a power chip management method provided by the present application;

FIG. 6 is a schematic diagram illustrating another power chip management system architecture and power chip management method according to some embodiments of the present application;

FIG. 7 is a schematic diagram illustrating another power chip management system architecture and power chip management method according to some embodiments of the present application;

FIG. 8 is a schematic diagram illustrating another power chip management system architecture and power chip management method according to some embodiments of the present application;

FIG. 9 is a schematic diagram illustrating another power chip management system configuration and power chip management method according to some embodiments of the present application;

FIG. 10 is a schematic diagram illustrating another power chip management system architecture and power chip management method according to some embodiments of the present application;

FIG. 11 is a schematic diagram illustrating an electronic device, according to some embodiments of the present application;

fig. 12 is a schematic diagram illustrating a structure of a system on a chip (SoC), according to some embodiments of the present application.

Detailed Description

The technical solution of the present application will be further clearly and completely described below with reference to the accompanying drawings.

Referring to fig. 1A, the application scenario of the solution of the present application is described by taking an electronic device as a mobile phone 100 as an example. The mobile phone 100 includes a PMIC chip 210 (as an example of a power supply chip), a control device 220 and a Display device 300 (as an example of a device to be adjusted), the control device 220 may be, for example, an Application Processor (AP), and the Display device 300 includes a Display Driver Integrated Circuit (DDIC) 310 and an OLED board 320.

During the usage of the mobile phone 100, for example, during the display Device 300 is woken up to be powered on or during the display Device 300 is used by a user, the mobile phone 100 needs to set or adjust voltages such as an Analog Voltage Device Drain (AVDD), an Electro luminescence positive Voltage Drain (AVDD), and an Electro luminescence negative Voltage Source Supply (ELVSS) of the display Device 300. The mobile phone 100 also generally needs to set or adjust a function such as a Fast Discharge (FD) function for turning on the PMIC chip 210, and set or adjust a current or a function of the display device 300. The voltage, the current and the function of the display device 300 may be referred to as the operating parameters of the display device 300, that is, the mobile phone 100 needs to set or adjust the operating parameters of the display device 300 and set or adjust the function of the PMIC chip 210 during the use of the mobile phone 100.

Taking a process of adjusting the voltage of the display device 300 by the mobile phone 100 as an example in a normal situation, please continue to refer to fig. 1A, in an implementation manner of adjusting the voltage of the display device 300 by the mobile phone 100, the control device 220 is connected to the DDIC chip 310, and the control device 220 sends, for example, status information that the display device 300 needs to be powered on to the DDIC chip 310. The DDIC chip determines the required voltage of the display device 300 in the power-on process according to the state information that is sent by the control device 220 and that the display device 300 needs to be powered on. And the DDIC chip 310 is connected to the PMIC chip 210, the DDIC chip 310 transmits a switch signal indicating a voltage required by the display device 300 to the PMIC chip 210, typically through a control bit single line (switch) interface, to transmit the required voltage to the PMIC chip 210. The PMIC chip 210 is connected to the display device 300, and the PMIC chip 210 supplies a voltage to the display device 300 according to the demand voltage transmitted from the DDIC chip 310, so that the display device 300 is powered up by the voltage supplied from the PMIC chip 210. In this implementation, the voltage output from PMIC chip 210 to display device 300 is adjusted by controlling PMIC chip 210 from DDIC chip 310 in display device 300.

However, the display device 300 and the PMIC chip 210 are usually provided by different manufacturers, and the display devices 300 (i.e., different types or types of display devices 300) provided by different manufacturers have differences in the structure of the PMIC chip 210, the connection manner between the display device 300 and the PMIC chip 210, and the adjustment manner or control logic of the operating voltages of the display device 300, such as AVDD, ELVDD, and ELVSS voltages. The difference will be described below by taking two different kinds of display devices 300 of the a-type and the B-type as examples.

For example, referring to fig. 1B, a display device 300 of type a needs to be matched with a PMIC chip 210 having two switch control pins, an a-switch control pin and an E-switch control pin, which are control bit single line (switch) interfaces of the PMIC chip 210, for receiving control signals sent to the PMIC chip 210 by other devices. The DDIC chip 310 in the class A display device 300 is connected to the PMIC chip 210 through an A-Swire control pin and an E-Swire control pin of the PMIC chip 210, respectively. And DDIC chip 310 in type a display device 300 controls the adjustment of display device 300's AVDD by PMIC chip 210 using a-Swire (a: AVDD) signals and display device 300's ELVDD and ELVSS by PMIC chip 210 using E-Swire (E: ELVDD, ELVSS) signals.

Referring to fig. 1C, as another type of display device 300, the display device 300 of the type B only needs to be matched with the PMIC chip 210 having a Swire control pin, which is a control bit single line (Swire) interface of the PMIC chip 210 as described above, for receiving control signals sent to the PMIC chip 210 by other devices. The DDIC chip 310 of the display device 300 of the B category is connected to the PMIC chip 210 through a Swire control pin, and the display device 300 of the B category controls the PMIC chip 210 to adjust three types of voltages of AVDD, ELVDD, and ELVSS of the display device 300 using only one Swire signal.

Different types of display devices 300 have different voltage adjustment methods, so that different types of display devices 300 have different requirements on the structure of the PMIC chip 210, the connection relationship between the display device 300 and the PMIC chip 210, the voltage adjustment logic of the display device 300, and the like. When the mobile phone 100 simultaneously uses the display devices 300 with different voltage-adjusting modes, different PMIC chips 210 need to be configured for different display devices 300 when the hardware of the mobile phone 100 is designed, so that different display devices 300 can use different PMIC chips 210 in a matching manner.

In manufacturing the cellular phone 100, a part of the cellular phone 100 may need to be provided with the type a display device 300, a part of the cellular phone 100 may need to be provided with the type B display device 300, or the cellular phone 100 may need to be a multi-screen device, and two different types a and B display devices 300 may need to be provided at the same time. In order to make the PMIC chip 210 on the SOC side of the mobile phone 100 meet the requirements of different kinds of display devices 300, different PMIC chips 210 are usually configured on the SOC side for different display devices 300. There are two common ways to configure the PMIC chip 210:

first, two single boards are configured on the System On Chip (SOC) side of the mobile phone 100, where the single Board may be a Printed Circuit Board (PCB), and different PMIC chips 210 are arranged on the two single boards and respectively cooperate with corresponding display devices 300 to operate. The problem with this method is that, by providing two boards and two PMIC chips 210, on one hand, the production cost of the mobile phone 100 is high, and on the other hand, the layout space of the mobile phone 100 is affected. In addition, when the display device 300 operates, the mobile phone 100 needs to distinguish the PMIC chips 210 on different boards to control the display devices 300 of different manufacturers, which may double the management cost of the mobile phone 100 and affect the management cost of the mobile phone 100.

Secondly, two PMIC chips 210 are mounted on a single board, and when the display device 300 operates, the mobile phone 100 switches the designated PMIC chip 210 to be dynamically connected to the operating display device 300 by controlling a switch or the like through a General Purpose input/output port (GPIO) according to the identified display device 300. In this way, although the two PMIC chips 210 share a single board design, the setting space of the mobile phone 100 is saved to a certain extent, but only one PMIC chip 210 is used in actual use, and the other PMIC chip 210 is not used, which causes waste of the PMIC chip 210.

The application provides a power chip management system, which can be applied to a mobile phone 100. Referring to fig. 2, the power chip management system includes a PMIC chip 210 (as an example of a power chip), a control device 220, and a display device 300 (as an example of a device to be regulated), the display device 300 including a DDIC chip 310 and an OLED panel 320. The PMIC chip 210 includes two Swire control pins, an a-Swire control pin (as an example of a first control pin) and an E-Swire control pin (as an example of a second control pin), and an output pin D. The PMIC chip 210 provided by the present application can be compatible with the aforementioned a-type and B-type display devices 300, and can satisfy the requirements of different types of display devices 300 for the PMIC chip 210.

If the display device 300 is of the type B described above, as shown in fig. 2, unlike the connection relationship among the display device 300, the control device 220, and the PMIC chip 210 of the type B shown in fig. 1C described above, the PMIC chip 210 in this implementation is connected to the control device 220 through the a-Swire control pin, to the DDIC chip 310 through the E-Swire control pin, and to the display device 300 through the output pin D.

The present application further provides a power chip management method based on the power chip management system shown in fig. 2, which can adjust the operating parameters such as the voltage of the aforementioned B-type display device 300. The power chip management method includes, during use of the mobile phone 100, the control device 220 determining requirement information of the display device 300 for AVDD (as an example of a first operating parameter), and determining a first number of square wave signals (as an example of a first signal, or may be referred to as an AVDD adjustment signal) for indicating the AVDD of the display device 300 according to the requirement information. For example, if the control device 220 determines that the AVDD demand of the display device 300 is 6.70V, the control device 220 determines that the first number of square wave signals corresponding to the AVDD of 6.70V is 25, i.e., the control device 220 determines that 25 square wave signals need to be sent to the PMIC chip 210 to instruct the PMIC chip 210 to adjust the AVDD of the display device 300 to 6.70V. The control device 220 sends 25 square wave signals to the PMIC chip 210 through the a-Swire control pin of the PMIC chip 210. The PMIC chip 210 receives the 25 square wave signals, and determines that the AVDD of the display device 300 needs to be adjusted to 6.70V according to the 25 square wave signals, then the PMIC chip 210 adjusts the AVDD of the display device 300 to 6.70V through the output pin D (as an example of the first operation).

In addition, the DDIC chip 310 may determine the requirement information of the display device 300 for ELVDD and ELVSS (as an example of the second operating parameter) through the state information such as the state of power-on transmitted from the control device 220 as described above, and determine the second number of square wave signals (as an example of the second signal, or may be referred to as ELVDD and ELVSS adjustment signals) indicating ELVDD or ELVSS of the display device 300 according to the requirement information.

For example, if DDIC chip 310 determines that display device 300 has a demand for ELVDD of 6.00V, DDIC chip 310 outputs 64 square wave signals as the second signal to PMIC chip 210. The DDIC chip 310 sends 64 square wave signals to the PMIC chip 210 through the E-Swire control pin of the PMIC chip 210. The PMIC chip 210 receives the 64 square wave signals, determines that it is necessary to adjust the ELVDD of the display device 300 to 6.00V from the 64 square wave signals, and then the PMIC chip 210 adjusts the ELVDD of the display device 300 to 6.00V through the output pin D (as an example of the second operation).

If DDIC chip 310 determines that the ELVSS requirement of display device 300 is-5.80V, DDIC chip 310 outputs 82 square wave signals as the second signal to PMIC chip 210. The DDIC chip 310 sends 82 square wave signals to the PMIC chip 210 through the E-Swire control pin of the PMIC chip 210. The PMIC chip 210 receives the 82 square wave signals, determines that the ELVSS of the display device 300 needs to be adjusted to-5.80V from the 82 square wave signals, and then the PMIC chip 210 adjusts the ELVSS of the display device 300 to-5.80V through the output pin D (as an example of the second operation).

In this implementation, for the aforementioned display device 300 of the type B, compared to the prior art in which the DDIC chip 310 in the display device 300 adjusts the voltage output by the PMIC chip 210 to the display device 300 by controlling the PMIC chip 210, the control component 220 may determine an AVDD adjustment signal for indicating the AVDD of the display device 300, and send the AVDD adjustment signal to the PMIC chip 210 through the a-Swire control pin, so as to control the adjustment of the AVDD of the display device 300 by the PMIC chip 210 through the AVDD adjustment signal. And determining ELVDD and ELVSS adjustment signals indicating ELVDD and ELVSS of the display device 300 by the DDIC chip 310 and transmitting the ELVDD and ELVSS adjustment signals to the PMIC chip 210 through the E-Swire control pin to control adjustment of ELVDD and ELVSS of the display device 300 by the PMIC chip 210 through the ELVDD and ELVSS adjustment signals. That is, compared to the manner in which the DDIC chip 310 controls the pairs AVDD, ELVDD, and ELVSS of the PMIC chip 210 shown in fig. 1. In this implementation, for the display device 300 of type B, the control unit 220 takes over or replaces the DDIC chip 310, the adjustment of AVDD is implemented by controlling the PMIC chip 210, and the adjustment of ELVDD and ELVSS is still implemented by controlling the PMIC chip 210 by the DDIC chip 310. That is, the control device 220, the PMIC chip 210, and the DDIC chip 310 may cooperate with each other to achieve the purpose of adjusting the operating parameters, such as the voltage of the display device of type B, through one Swire signal as shown in fig. 1C.

If the display device 300 is of type a, as shown in fig. 1B, in this implementation, for the type a display device 300, the connection relationship and the voltage adjustment method of the PMIC chip 210, the control device 220 and the display device 300 may be set as shown in fig. 1B. That is, the PMIC chip 210 is connected to the DDIC chip 310 through the A-Swire control pin and the E-Swire control pin, respectively, and to the display device 300 through the output pin D. The display device 300 controls the adjustment of AVDD using the a-switch signal (as an example of a first signal) and the adjustments of ELVDD and ELVSS using the E-switch signal (as an example of a second signal), and the process will not be described here. The a-Swire signal and the E-Swire signal are also a certain number of square wave signals corresponding to the respective voltages.

In addition, in the present implementation, by providing the PMIC chip 210 including two Swire control pins, an a-Swire control pin and an E-Swire control pin, different kinds of display devices 300 can be connected to the PMIC chip 210 in different ways. Therefore, the mobile phone 100 can be compatible with the display devices 300 of the types a and B only by configuring one PMIC chip 210, so as to meet the requirements of the display devices 300 of different types on the PMIC chip 210 and the requirements on voltage adjustment, reduce the production cost of the mobile phone 100, save the hardware layout space of the mobile phone 100, and effectively save the management cost of the mobile phone 100.

In this implementation, the number of the square wave signals uniquely corresponds to the required voltage of the display device 300, i.e., the number of the square wave signals can determine which type of voltage the PMIC chip 210 needs to adjust and the value of the voltage that needs to be adjusted. The adjustment of the voltage of the display device 300 may be conveniently achieved by a square wave signal.

The present application further provides a power chip management system, wherein the control device 220 is connected to the PMIC chip 210, and the control device 220 directly and completely controls the adjustment of the PMIC chip 210 to various operating parameters of the display device 300, and the adjustment of the functions of the PMIC chip 210 (for a specific implementation process, details will be described later). In the production process of the mobile phone 100, only the SOC200 including one PMIC chip 210 needs to be provided, so that the different types of display devices 300 can be compatible, and the adjustment requirement for the operating parameters of the different types of display devices 300 can be met, without allocating and configuring different PMIC chips 210 for the different types of display devices as in the prior art. The production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 can be saved, and the management cost of the mobile phone 100 can be effectively saved.

Fig. 3 shows a schematic diagram of a structure of the mobile phone 100.

The mobile phone 100 may include a processor 110, an external memory interface 120, an internal memory 121, a Universal Serial Bus (USB) connector 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, a Subscriber Identity Module (SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.

It is to be understood that the illustrated structure of the embodiment of the present invention does not specifically limit the mobile phone 100. In other embodiments of the present application, the handset 100 may include more or fewer components than shown, or some components may be combined, some components may be separated, or a different arrangement of components may be used. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

Processor 110 may include one or more processing units, such as: the processor 110 may include an Application Processor (AP), a modem processor, a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a controller, a video codec, a Digital Signal Processor (DSP), a baseband processor, and/or a neural-Network Processing Unit (NPU), etc. Wherein, the different processing units may be independent devices or may be integrated in one or more processors.

The processor can generate an operation control signal according to the instruction operation code and the timing signal to complete the control of instruction fetching and instruction execution.

A memory may also be provided in processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that have just been used or recycled by the processor 110. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Avoiding repeated accesses reduces the latency of the processor 110, thereby increasing the efficiency of the system.

In some embodiments, processor 110 may include one or more interfaces. The interface may include an integrated circuit (I2C) interface, an integrated circuit built-in audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a Mobile Industry Processor Interface (MIPI), a general-purpose input/output (GPIO) interface, and a Subscriber Identity Module (SIM) interface.

The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charging management module 140, and supplies power to the processor 110, the internal memory 121, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be used to monitor parameters such as battery capacity, battery cycle count, battery state of health (leakage, impedance), etc. In other embodiments, the power management module 141 may be disposed in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 may also be disposed in the same device. In this application, the aforementioned power chip may be implemented by the power management module 141 and the battery 142.

The wireless communication function of the mobile phone 100 can be realized by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor, the baseband processor, and the like.

The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the handset 100 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.

The mobile communication module 150 may provide a solution including wireless communication of 2G/3G/4G/5G, etc. applied to the handset 100.

The wireless communication module 160 may provide solutions for wireless communication applied to the mobile phone 100, including Wireless Local Area Networks (WLANs) (e.g., wireless fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), Infrared (IR), and the like.

In some embodiments, the antenna 1 of the handset 100 is coupled to the mobile communication module 150 and the antenna 2 is coupled to the wireless communication module 160 so that the handset 100 can communicate with networks and other devices through wireless communication techniques.

The mobile phone 100 implements the display function through the GPU, the display screen 194, and the application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or alter display information.

The display screen 194 is used to display images, video, and the like. The display screen 194 includes a display panel. The display panel may be a Liquid Crystal Display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (active-matrix organic light-emitting diode, AMOLED), a flexible light-emitting diode (FLED), a miniature, a Micro-oeld, a quantum dot light-emitting diode (QLED), or the like. In some embodiments, the cell phone 100 may include 1 or N display screens 194, with N being a positive integer greater than 1. In the present application, the aforementioned display device 300 may be referred to as a display screen 194.

The internal memory 121 may be used to store computer-executable program code, which includes instructions. The internal memory 121 may include a program storage area and a data storage area. The storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required by at least one function, and the like. The data storage area may store data (e.g., audio data, a phonebook, etc.) created during use of the handset 100, and the like. In addition, the internal memory 121 may include a high speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, a Universal Flash Storage (UFS), and the like. The processor 110 executes various functional applications of the cellular phone 100 and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor. For example, the power chip management method provided by the present application is performed.

The pressure sensor 180A is used for sensing a pressure signal, and converting the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194.

The touch sensor 180K is also called a "touch device". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is used to detect a touch operation applied thereto or nearby. The touch sensor can communicate the detected touch operation to the application processor to determine the touch event type. Visual output associated with the touch operation may be provided through the display screen 194. In other embodiments, the touch sensor 180K may be disposed on the surface of the mobile phone 100, different from the position of the display 194.

The keys 190 include a power-on key, a volume key, and the like. The keys 190 may be mechanical keys. Or may be touch keys. The cellular phone 100 may receive a key input, and generate a key signal input related to user setting and function control of the cellular phone 100.

The power management system and method provided by the present application will be further described in detail and fully with reference to the accompanying drawings.

Referring to fig. 4, in an implementation manner of the present application, the aforementioned control device 220 includes an application processor 221 and a Serial Peripheral Interface (SPI) controller 222. The SPI controller 222 is connected to the application processor 221 and the PMIC chip 210, respectively. Also, the SPI controller 222 is connected to the PMIC chip 210 through an a-switch control pin for transmitting the aforementioned AVDD adjustment signal (as an example of the first signal); the DDIC chip 310 is connected to the PMIC chip 210 through an E-Swire control pin for transmitting the aforementioned ELVDD and ELVSS adjustment signals (as an example of the second signal). The number of square wave signals determines which type of voltage the PMIC chip 210 needs to adjust, and the value of the voltage that needs to be adjusted.

During power-up of display device 300, application processor 221, through SPI controller 222, may control PMIC chip 210 to adjust AVDD (as an example of a first operating parameter) of display device 300 and turn on FD function of PMIC chip 210 (as an example of a first function).

In this implementation manner, the application processor 221 stores a corresponding relationship between the AVDD of the display device 300 and the number of square wave signals that the SPI controller 222 needs to output, where the corresponding relationship is shown in table 1a below:

TABLE 1a

In the process of powering on the display device 300, the application processor 221 may determine the information of the requirement of the display device 300 for the AVDD in the power-on process according to the power-on state information, and determine the number of square waves that the SPI controller 222 needs to output according to the requirement information and the corresponding relationship between the AVDD and the number of square waves shown in table 1, where the number of square waves indicates the AVDD of the display device 300. For example, if the AVDD requirement of display device 300 during power-up is 6.70V, it may be determined that SPI controller 222 needs to output 25 square waves. If the AVDD requirement of display device 300 during power-up is 7.00V, it can be determined that the number of square waves that need to be output by SPI controller 222 is 10.

The application processor 221 transmits the square wave number to the SPI controller 222, and the application processor 221 controls the SPI controller 222 to generate a square wave signal corresponding to the square wave number as an AVDD adjustment signal for indicating AVDD. Then, the application processor 221 controls the SPI controller 222 to send an AVDD adjustment signal to the a-Swire control pin of the PMIC chip 210 through the SPI data line.

It should be noted that, the application processor 221 stores in advance timing information of power-on of the display device 300, voltage information and frequency information of the square wave signal output by the SPI controller 222, and signal output configuration information such as SPI Clock Signal (SCLK) and mode of the SPI controller 222. For example, the signal output configuration information may be the SPI clock signal configuration of the SPI controller 222 of 100K, the SPI Mode configuration of Mode 3: the Clock Polarity (CPOL) is 1 and the Clock Phase (CPHA) is 1. In addition, the voltage of the square wave signal output by the SPI controller 222 is U0, U0 > 1.2V; the frequency of the square wave signal is f0, and 50K is less than or equal to f 0. The timing of the power-up of the display device 300 is 8 seconds after the user is detected to wake up the screen, etc. The application processor 221 controls the SPI controller 222 to determine the voltage, frequency, and other information of the output square wave signal according to the output signal configuration information, and to generate an AVDD adjustment signal according to the power-on timing information, and to send the AVDD adjustment signal to the PMIC chip 210 through the SPI data line.

PMIC chip 210 receives the AVDD adjustment signal, may determine the AVDD required by display device 300 according to the mapping relationship between the number of square wave signals and the AVDD pre-stored in PMIC chip 210, and then PMIC chip 210 outputs the AVDD to display device 300.

Corresponding to the foregoing table 1a, the correspondence relationship between the number of square wave signals stored in the PMIC chip 210 and AVDD is shown in the following table 1 b:

TABLE 1b

The PMIC chip 210 determines the number of square wave signals by the received AVDD adjustment signal, and then may determine the AVDD required for the display device 300 according to the number of square wave signals and table 1b, thereby outputting the required voltage to the display device 300. For example, if the number of square wave signals sent by the PMIC chip 210 by receiving the SPI data line is 25, the PMIC chip 210 may determine that the AVDD required by the display device 300 is 6.70V, and the PMIC chip 210 adjusts the AVDD of the display device 300 to be 6.70V. If the number of the square wave signals sent by the PMIC chip 210 through the received SPI data line is 10, the PMIC chip 210 may determine that the AVDD required by the display device 300 is 7.00V, and the PMIC chip 210 adjusts the AVDD of the display device 300 to be 7.00V.

The application processor 221 further stores a corresponding relationship between the function of the PMIC chip 210 and the number of square wave signals, which is shown in the following table 2 a:

TABLE 2a

In the process of powering on the display device 300, the application processor 221 may determine the requirement information of the display device 300 for the function of the PMIC chip 210 according to the power-on state information of the display device 300, and the application processor 221 may determine the number of square waves that the SPI controller 222 needs to output according to the requirement information and the corresponding relationship between the function of the PMIC chip 210 and the number of square wave signals shown in table 2a, where the number of square waves indicates the function of the PMIC chip 210. For example, if the display device 300 requires the PMIC chip 210 to be powered on FD during power-up, it may be determined that the SPI controller 222 needs to output 55 square waves. In addition, certain functions of the PMIC chip 210 may also be turned off.

The application processor 221 transmits the square wave number to the SPI controller 222, and the application processor 221 controls the SPI controller 222 to generate a square wave signal corresponding to the square wave number as a function adjustment signal for instructing the PMIC chip 210 to turn on the FD function according to the square wave number and the aforementioned output signal configuration information. The application processor 221 then controls the SPI controller 222 to send a function adjust signal to the a-Swire control pin of the PMIC chip 210 through the SPI data line.

Corresponding to the above table 2a, the PMIC chip 210 stores the corresponding relationship between the number of square wave signals and the function of the PMIC chip 210, which is shown in the following table 2 b:

TABLE 2b

The PMIC chip 210 receives the square wave signals as the function adjusting signals, and the number of the received square wave signals can determine the function requirement of the PMIC chip 210, so as to adjust the function of the PMIC chip 210. For example, if the number of square wave signals received by the PMIC chip 210 is 55, the PMIC chip 210 may determine that the functional requirement of the PMIC chip 210 is Func1, that is, the requirement for the FD function (as an example of the first function) is to turn on the FD function (as an example of the first target function), and the PMIC chip 210 turns on the FD function of the PMIC chip 210. The number of square wave signals determines which type of function the PMIC chip 210 needs to adjust, etc.

In one implementation of the present application, during power-up of the display device 300, the AVDD requirement of the display device 300 is 6.7V, and the PMIC chip 210 needs to turn on the FD function. Referring to fig. 5A, the timing and process of PMIC chip 210 adjusting AVDD and turning on FD function during power-up of display device 300 includes:

the application Processor 221 may use a set of data 0x11 sent to the display device 300 through the acquired Mobile Industry Processor Interface (MIPI) as a reference for starting the power-up process, that is, if the application Processor 221 acquires the MIPI and sends a set of data 0x11 to the display device 300, it is determined that the display device 300 needs to be powered up.

Further, after 6ms, the application processor 221 sends a set of data 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x40 to the a-Swire control pin of the PMIC chip 210 through the MIPI control SPI controller 222 via the SPI data line, and the SPI controller 222 sends 25 square wave signals via the SPI data line. After the PMIC chip 210 receives the 25 square wave signals, it may be determined that the AVDD of the display device 300 needs to be adjusted to 6.70V according to the stored correspondence table between the number of the square wave signals and the AVDD of the display device 300. The PMIC chip 210 outputs AVDD of 6.70V to the display device 300 and adjusts AVDD of the display device 300 to 6.70V to complete power-up adjustment of AVDD.

Further, after 2ms, the application processor 221 sends another set of data 0x55, 0x55, 0x55, 0x40 to the PMIC chip 210 through the MIPI control SPI controller 222 via the SPI data line, and then the SPI data line sends out 13 square wave signals. After the PMIC chip 210 receives the 13 square wave signals, it may be determined according to the stored mapping table between the number of the square wave signals and the function of the PMIC chip 210 that the FD function of the PMIC chip 210 needs to be turned on, and then the PMIC chip 210 turns on the FD function of the PMIC chip 210.

In addition, the control modes of VDDIO, VCI, RESET and other signals when the display device 300 is powered on may be the same as those in the prior art or may be set as needed, and are not described herein again.

In this implementation manner, by configuring the power-on timing sequence of the display device 300 in the application processor 221, the sending time of the square wave signal can be accurately controlled, and by configuring the clock frequency of the SPI controller 222 and the number of the sent square wave signals, the SPI controller 222 can stably and accurately send the square wave signal that is expected to need to be sent, so as to ensure the correctness of the sent square wave signal, and achieve the purpose of adjusting the AVDD and turning on the FD function in the power-on process of the display device 300.

Referring to fig. 5B, fig. 5B is a schematic diagram of waveforms captured on an SPI data line in an actual single board simulation using the power chip management system and method provided in this implementation. The waveform (ii) is a square wave signal output by the SPI controller 222 through the SPI data line (the waveform (i) is hardware-reversed), and it can be seen that the square wave signal output by the SPI controller 222 can be accurately configured and correctly identified by the PMIC chip 210 by the power chip management system and method provided by this implementation.

Referring to fig. 5C, fig. 5C is another actual simulation diagram of a board using the power chip management system and method provided by the present implementation. The waveform (c) is a square wave signal (i.e., output data) output by the SPI controller 222 through the SPI data line, the waveform (c) is a hardware inversion, and the waveform (c) is AVDD. It can be seen that AVDD is adjusted to the desired voltage value of 6.70V with the square wave signal output from the SPI data line.

In the using process of the display device 300, the application processor 221 may also determine the real-time requirement of the display device for the AVDD according to the information such as the display brightness of the display device 300, and control the PMIC chip 210 to adjust the AVDD; or determining the requirements of the display device 300 on other working parameters of the display device 300, such as voltage, current, functions and the like, and controlling the PMIC chip 210 to adjust the working parameters; or determining the requirement information such as the function requirement of the PMIC chip 210, and adjusting the function of the PMIC chip 210.

As described above, in the present implementation, the DDIC chip 310 determines the requirement information of the display device 300 for ELVDD and ELVSS by the state information such as the state in which the display device 300 is powered on, and determines ELVDD and ELVSS adjustment signals for indicating ELVDD and ELVSS of the display device 300, which are the second number of square wave signals, according to the requirement information. DDIC chip 310 sends the ELVDD and ELVSS adjustment signals to PMIC chip 210 through the E-Swire control pin of PMIC chip 210. The PMIC chip 210 receives the ELVDD and ELVSS adjustment signals, determines the ELVDD and ELVSS of the display device 300 according to the ELVDD and ELVSS adjustment signals, and then the PMIC chip 210 adjusts the ELVDD and ELVSS of the display device 300 through the output pin D.

The DDIC chip 310 stores the corresponding relationship between ELVDD, ELVSS and the number of square wave signals, which is shown in the following table 3 a:

TABLE 3a

For example, if DDIC chip 310 determines that display device 300 requires ELVDD at 6.00V, DDIC chip 310 outputs 64 square wave signals to PMIC chip 210 as ELVDD and ELVSS adjustment signals. If DDIC chip 310 determines that display device 300 requires-5.80V for ELVSS, DDIC chip 310 outputs 82 square wave signals to PMIC chip 210 as ELVDD and ELVSS adjustment signals.

Corresponding to the above table 3a, the PMIC chip 210 stores the corresponding relationship between the number of square wave signals and ELVDD and ELVSS, which is shown in the following table 3 b:

TABLE 3b

For example, if PMIC chip 210 receives 64 square waves, PMIC chip 210 determines that display device 300 requires 6.00V for ELVDD, and PMIC chip 210 adjusts the ELVDD of display device 300 to 6.00V. If the PMIC chip 210 receives 82 square waves, the PMIC chip 210 determines that the ELVSS requirement of the display device 300 is-5.80V, and the PMIC chip 210 adjusts the ELVSS of the display device 300 to-5.80V.

In other implementations of the present application, if the application processor 221 detects that the user wakes up the display device 300, and then determines that the display device 300 needs to be powered on, the application processor 221 and the SPI controller 222 cooperate with each other to control the PMIC chip 210 to perform the operations of adjusting the AVDD of the display device 300 and turning on the FD function.

In other implementations of the application, during the use of the display device 300, the DDIC chip 310 may also determine real-time requirements of the display device for ELVDD and ELVSS according to information such as display brightness of the display device 300, and adjust ELVDD and ELVSS; or determining the requirements of the display device 300 on other working parameters of the display device 300, such as voltage, current, functions and the like, and adjusting the working parameters; or determining the requirement information of the PMIC chip 210 for the function of the PMIC chip 210 (which may be a basic function of the PMIC chip 210 as an example of a second function, which is not described in detail herein) during the use of the display device 300, and adjusting the function of the PMIC chip 210.

In this implementation, for the display device 300 of type B, the application processor 221 is connected to the a-switch control pin of the PMIC chip 210 through the SPI controller 222, and the application processor 221 controls the SPI controller 222 to output a certain number of square wave signals (i.e., SPI data) to the PMIC chip 210 at an appropriate timing to adjust the functions of AVDD, turning on FD, and the like, that is, the application processor 221 controls the SPI controller 222 to output the a-switch signal to the PMIC chip 210 through software simulation to adjust the functions of AVDD, turning on FD, and the like. In addition, a square wave signal is output to the PMIC chip 210 at an appropriate timing to adjust ELVDD and/or ELVSS by being connected to an E-Swire control pin of the PMIC chip 210 through the DDIC 310. That is, in the present implementation, the software simulation of the a-Swire signal by the application processor 221 and the SPI controller 222 replaces the manner of outputting the adjustment AVDD by the DDIC chip 310 shown in fig. 1C, so that the same effect as that shown in fig. 1C can be achieved. Moreover, the purpose that one PMIC chip 210 is compatible with different display devices 300 can be achieved, so that two single boards are prevented from being distinguished in hardware design of the mobile phone 100, or one single board is prevented from carrying two PMIC chips 210. The production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 can be saved, and the management cost of the mobile phone 100 can be effectively saved.

In an implementation manner, in the correspondence table between each operating parameter/function and the number of square wave signals stored in the application processor 221 and the PMIC chip 210, each operating parameter/function and the number of square wave signals are uniquely corresponding, that is, different numbers of square wave signals correspond to different types of operating parameters/functions such as voltage, current, and the like. The purpose of sending a certain number of square wave signals to PMIC chip 210 to indicate to control PMIC chip 210 to adjust an operating parameter of display device 300 or a function of PMIC chip 210 may be achieved.

Referring to fig. 6, in some implementations of the present application, the output port D of the PMIC chip 210 may include D1, D2, and D3, wherein the PMIC chip 210 is connected to the DDIC chip 310 through D1 for adjusting AVDD of the DDIC chip 310 through D1; the PMIC chip 210 is connected to the OLED panel 320 through D2 and D3 for adjusting ELVDD of the OLED panel 320 through D2 and ELVSS of the OLED panel 320 through D3. The adjustment of the voltage of the display device 300 can be conveniently and accurately achieved.

In this implementation, the PMIC chip 210 may further adjust some functions of the DDIC chip 310 through D1, and the PMIC chip 210 may adjust operating parameters such as the current of the OLED panel 320 through D2 and D3, which may be set as required. Adjustment of other operating parameters of the display device 300 may be conveniently and accurately achieved.

In other implementations of the present application, the output port D of the PMIC chip 210 may also include more or less output ports, which may be set as needed to achieve adjustment of the operating parameters of the display device 300.

In other implementations of the present application, the application processor 221 may also control the operating current of the display device 300 through the SPI controller 222. The implementation process is similar to the aforementioned adjustment process of voltage and function, and is not described herein again.

Referring to fig. 7, in other implementations of the present application, the aforementioned control device 220 and PMIC chip 210 are both disposed on the SOC200 side of the mobile phone 100, i.e., disposed as internal components on the SOC200 side through the main PCB board on the SOC200 side. The device 300 is shown as an external component of the SOC 200. In this embodiment, one control unit 210 and PMIC chip 210 are disposed on the SOC200 side, and the operating parameters of the display device 300, which is an external component of the SOC200, are adjusted by controlling the PMIC chip 210 by the control unit 210. In the production process of the mobile phone 100, only the SOC200 including one PMIC chip 210 needs to be provided, so that the different types of display devices 300 can be compatible, and the adjustment requirements for the operating parameters of the different types of display devices 300 can be met, without allocating and configuring different PMIC chips 210 for the different types of display devices as in the prior art. The production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 can be saved, and the management cost of the mobile phone 100 can be effectively saved.

Referring to fig. 8, in another implementation manner of the present application, the control device 220 may also be connected to only the PMIC chip 210, and the control device 220 directly controls the PMIC chip 210 to adjust various operating parameters of the display device 300, and to adjust functions of the PMIC chip 210. In the production process of the mobile phone 100, only the SOC200 including one PMIC chip 210 needs to be provided, so that the different types of display devices 300 can be compatible, and the adjustment requirement for the operating parameters of the different types of display devices 300 can be met, without allocating and configuring different PMIC chips 210 for the different types of display devices as in the prior art. The production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 can be saved, and the management cost of the mobile phone 100 can be effectively saved.

Referring to fig. 9, in one implementation of the present application, the SPI controller 222 may be connected to the PMIC chip 210 via an a-Swire control pin and an E-Swire control pin, respectively. The SPI controller 222 transmits an AVDD adjustment signal indicating AVDD (as an example of a first operating parameter) to the PMIC chip 210 through the a-Swire control pin, and transmits ELVDD and ELVSS adjustment signals indicating ELVDD and ELVSS (as an example of a second operating parameter) to the PMIC chip 210 through the E-Swire control pin. The control device 220 directly controls the PMIC chip 210 to adjust various working parameters of the display device 300. The purpose that one PMIC chip 210 is compatible with different display devices 300 can be achieved, so that the problem that two single boards are arranged or one single board carries two PMIC chips 210 during hardware design of the mobile phone 100 is avoided, the production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 is saved, and the management cost of the mobile phone 100 can be effectively saved.

Referring to fig. 10, in another implementation of the present application, the PMIC chip 210 includes a Swire control pin and an output port D, and the control device 220 may be connected to the PMIC chip 210 only through the Swire control pin.

The present application also provides a power chip management system method based on the power chip management system shown in fig. 10. In an implementation, during the use of the display device 300, the control device 220 may directly determine requirement information of the display device 300 for operation parameters such as AVDD, ELVDD, and ELVSS (all as examples of the first operation parameters), respectively, and determine square wave signals indicating AVDD, ELVDD, and ELVSS of the display device 300, respectively, as the first signals according to the requirement information. The control device 220 transmits a first signal to the PMIC chip 210, and the PMIC chip 210 receives the first signal and adjusts the AVDD, ELVDD, and ELVSS voltages of the display device 300 according to the first signal.

In this implementation, determining, by the control device 220, a first signal indicating each operating parameter of the display device 300 and sending the first signal to the PMIC chip 210 may be implemented to control, by the first signal, the PMIC chip 210 to adjust the operating parameter of the display device 300. Therefore, the mobile phone 100 only needs to configure one PMIC chip 210 to meet the adjustment requirements of the working parameters of different types of display devices 300, that is, the mobile phone 100 directly adjusts the working parameters of the display devices 300 through the PMIC chip 210 regardless of the types of the display devices 300, so that the production cost of the mobile phone 100 can be reduced, the hardware layout space of the mobile phone 100 can be saved, and the management cost of the mobile phone 100 can be effectively saved.

In this implementation, the control device 220 may also directly determine the function of the PMIC chip 210, and control and adjust the function of the PMIC chip 210, so that the PMIC chip 210 may turn on and off the corresponding function.

In the present application, during the use of the display device 300, the aforementioned AVDD, or ELVDD and ELVSS voltages of the display device 300 may be adjusted during the power-up of the display device 300, and the operating parameters such as FD function of the PMIC chip 210 may be adjusted. During other use processes of the screen, the operating parameters of the display device 300 may also be adjusted, for example, during the use process of the screen, the application processor 221 may determine each required voltage of the display device 300 according to required information such as display brightness, display image, power consumption information, and the like of the display device 300. And the application processor 221 sends a first signal to the PMIC chip 210 through the SPI controller 222 to adjust various required voltages of the display device 300. So that the display device 300 can work normally and achieve the corresponding display brightness, etc. In other implementations of the present application, the OLED panel 320 in the display device 300 may also be other types of display screens such as an LCD, an Active-matrix organic light emitting diode (AMOLED), and the like.

In other implementations of the present application, the aforementioned Swire control pin may also be another type of communication interface for transmitting signals.

In other implementations of the present application, the aforementioned SPI controller 222 may also be another type of controller for outputting square wave signals, for example, the analog square wave signal is controlled to be transmitted by pulling high and low GPIO, or the square wave signal is transmitted by transmitting data through I2C bus.

In other implementations of the present application, the aforementioned square wave signal may also be other types of pulse signals. Such as a pulse width modulated waveform (PWM), etc.

In other implementations of the present application, the first signal and the second signal may also be signals including string information, for example, signals including strings such as "0 x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x 40", "0 x55, 0x55, 0x55, and 0x 40" described above. Or may be other signals indicative of operating parameters of the display device 300.

In other implementations of the present application, the application processor 221 and the PMIC chip 210 may also only store a corresponding relationship table between each operating parameter of the display device 300 and the number of the square-wave signals, where each operating parameter uniquely corresponds to the number of the square-wave signals, that is, different numbers of the square-wave signals correspond to different types of operating parameters such as voltage, current, and function. The purpose of sending a certain number of square wave signals to the PMIC chip 210 to instruct the PMIC chip 210 to adjust the operating parameters of the display device 300 may be achieved.

In other implementations of the present application, the display device 300 may also be a device that needs to adjust an operating parameter in other types of mobile phones 100, such as a camera, a fingerprint module, and the like. DDIC chip 310 may also be a corresponding other type of driver chip. The PMIC chip 210 may also be other types of power chips. The power chip management system and the power chip management method can be used in the scenes that the voltage regulation is required to be carried out on devices except the main board power chip of the electronic equipment, or the current is regulated, and the working parameters such as the functions of the electronic unit chip are adjusted.

In another implementation manner of the present application, the mobile phone 100 may be an electronic device such as a tablet computer, a television, a sound box, a notebook computer, an ultra-mobile personal computer (UMPC), a handheld computer, a netbook, a Personal Digital Assistant (PDA), a wearable device (e.g., a bracelet), a virtual reality device, and a smart home device.

Referring to fig. 11, fig. 11 is a schematic structural diagram of an electronic device 900 according to an embodiment of the present application. The electronic device 900 may include one or more processors 901 coupled to a controller hub 904. For at least one embodiment, the controller hub 904 communicates with the processor 901 via a multi-drop Bus such as a Front Side Bus (FSB), a point-to-point interface such as a QuickPath Interconnect (QPI), or similar connection. Processor 901 executes instructions that control general types of data processing operations. In one embodiment, the controller hub 904 includes, but is not limited to, a Graphics Memory Controller Hub (GMCH) (not shown) and an input/output hub (IOH) (which may be on a separate chip) (not shown), where the GMCH includes a Memory and a Graphics controller and is coupled to the IOH.

The electronic device 900 may also include a coprocessor 906 and memory 902 coupled to the controller hub 904. Alternatively, one or both of the memory 902 and GMCH may be integrated within the processor 901 (as described herein), with the memory 902 and coprocessor 906 coupled directly to the processor 901 and to the controller hub 904, with the controller hub 904 and IOH in a single chip.

The Memory 902 may be, for example, a Dynamic Random Access Memory (DRAM), a Phase Change Memory (PCM), or a combination of the two.

In one embodiment, coprocessor 906 is a special-Purpose processor, such as, for example, a high-throughput Many Core (MIC) processor, a network or communication processor, compression engine, Graphics processor, General Purpose Graphics Processing Unit (GPGPU), embedded processor, or the like. The optional nature of coprocessor 906 is represented in FIG. 11 by dashed lines.

In one embodiment, electronic device 900 may further include a Network Interface Card (NIC) 903. The network interface 903 may include a transceiver to provide a radio interface for the electronic device 900 to communicate with any other suitable device (e.g., front end module, antenna, etc.). In various embodiments, the network interface 903 may be integrated with other components of the electronic device 900. The network interface 903 may implement the function of the communication unit in the above-described embodiments.

The electronic device 900 may further include input/output (I/O) devices 905. Input/output (I/O) devices 905 may include: a user interface designed to enable a user to interact with the electronic device 900; the design of the peripheral component interface enables peripheral components to also interact with the electronic device 900; and/or sensors are designed to determine environmental conditions and/or location information associated with electronic device 900.

It is noted that fig. 11 is merely exemplary. That is, although fig. 11 shows that the electronic apparatus 900 includes a plurality of devices, such as a processor 901, a controller hub 904 and a memory 902, in practical applications, an apparatus using the methods of the present application may include only a part of the devices of the electronic apparatus 900, for example, may include only the processor 901 and the NIC 903. The nature of the alternative device in fig. 11 is shown in dashed lines.

One or more tangible, non-transitory computer-readable media for storing data and/or instructions may be included in the memory of the electronic device 900. A computer-readable storage medium has stored therein instructions, and in particular, temporary and permanent copies of the instructions.

In the present application, the electronic device 900 may be a terminal device such as a mobile phone, a tablet computer, a Personal Digital Assistant (PDA), or a desktop computer. The instructions stored in the memory of the electronic device may include: instructions that, when executed by at least one unit in the processor, cause the electronic device to implement the power chip management method as mentioned above.

Referring to fig. 12, fig. 12 is a schematic structural diagram of a System on Chip (SoC) 1000 according to an embodiment of the present disclosure. In fig. 12, like parts have the same reference numerals. In addition, the dashed box is an optional feature of the more advanced SoC 1000. The SoC1000 may be used for any electronic device according to the present application, and may implement corresponding functions according to different devices in which the electronic device is located and different instructions stored in the electronic device.

In fig. 12, the SoC1000 includes: an interconnect unit 1002 coupled to the processor 1001; a system agent unit 1006; a bus controller unit 1005; an integrated memory controller unit 1003; a set or one or more coprocessors 1007 which may include integrated graphics logic, an image processor, an audio processor, and a video processor; a Static Random-Access Memory (SRAM) unit 1008; a Direct Memory Access (DMA) unit 1004. In one embodiment, the coprocessor 1007 comprises a special-purpose processor, such as, for example, a network or communication processor, compression engine, GPGPU, a high-throughput MIC processor, embedded processor, or the like.

Included in SRAM cell 1008 may be one or more computer-readable media for storing data and/or instructions. A computer-readable storage medium may have stored therein instructions, in particular, temporary and permanent copies of the instructions. The instructions may include: instructions that when executed by at least one unit of the processor 1001 cause the electronic device to implement the power chip management method as mentioned above.

It should be noted that the terms "first," "second," and the like are used merely to distinguish one description from another, and are not intended to indicate or imply relative importance.

It should be noted that in the accompanying drawings, some structural or methodical features may be shown in a particular arrangement and/or order. However, it is to be understood that such specific arrangement and/or ordering may not be required. Rather, in some embodiments, the features may be arranged in a manner and/or order different from that shown in the illustrative figures. In addition, the inclusion of a structural or methodical feature in a particular figure is not meant to imply that such feature is required in all embodiments, and in some embodiments, may not be included or may be combined with other features.

While the present application has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing is a more detailed description of the present application, and the present application is not intended to be limited to these details. Various changes in form and detail, including simple deductions or substitutions, may be made by those skilled in the art without departing from the spirit and scope of the present application.

Claims

1. A power chip management method is characterized by being applied to electronic equipment, wherein the electronic equipment comprises a control device, a power chip and a device to be adjusted, and the power chip is respectively connected with the control device and the device to be adjusted; the method comprises the following steps:

the control device determines a first signal used for indicating a first operation of the power supply chip and sends the first signal to the power supply chip, wherein the first operation is to adjust a first working parameter of the device to be adjusted to be a first target working parameter and/or adjust a first function of the power supply chip to be a first target function;

the power supply chip receives the first signal and executes the first operation according to the first signal.

2. The power chip management method of claim 1, further comprising:

the device to be adjusted determines a second signal used for indicating a second operation of the power supply chip, which is different from the first operation, and sends the second signal to the power supply chip, wherein the second operation is to adjust a second working parameter of the device to be adjusted, which is different from the first working parameter, to be a second target working parameter and/or adjust a second function of the power supply chip, which is different from the first function, to be a second target function;

and the power supply chip receives the second signal and executes the second operation according to the second signal.

3. The power chip management method of claim 2, wherein the power chip comprises a first control pin and a second control pin, the control device is connected to the first control pin of the power chip, and the device to be regulated is connected to the second control pin of the power chip, the method further comprising:

the control device sends the first signal to the power supply chip through the first control pin;

and the device to be adjusted sends the second signal to the power supply chip through the second control pin.

4. The power chip management method of claim 1, further comprising:

the control device determines a second signal used for indicating second operation, different from the first operation, of the power supply chip and sends the second signal to the power supply chip, wherein the second operation is to adjust second working parameters, different from the first working parameters, of the device to be adjusted into second target working parameters and/or adjust second functions, different from the first functions, of the power supply chip into second target functions;

5. The power chip management method of claim 4, wherein the power chip comprises a first control pin and a second control pin, and the control device is connected to the first control pin and the second control pin of the power chip, respectively, the method further comprising:

the control device sends the first signal to the power chip through the first control pin and sends the second signal to the power chip through the second control pin.

6. The power chip management method according to claim 3 or 5, wherein the control device is connected with the control pin of the power chip through a serial peripheral interface.

7. The power chip management method according to any one of claims 1 to 6, wherein the control device comprises an application processor and a serial peripheral interface controller, and the serial peripheral interface controller is respectively connected with the application processor and the power chip; the control device determines and transmits to the power supply chip a signal indicating an operation of the power supply chip, including:

the application processor determines working parameters according to the requirement information of the device to be adjusted, determines signal quantity information according to the corresponding relation between the working parameters and the preset working parameters and the output signal quantity,

the application processor sends the signal quantity information to the serial peripheral interface controller and controls the serial peripheral interface controller to generate a signal for indicating the operation of the power supply chip according to the signal quantity information and preset signal output configuration information;

the serial peripheral interface controller transmits a signal for indicating an operation of the power chip to the power chip.

8. The power chip management method according to any one of claims 1 to 7, wherein the signal for indicating the operation of the power chip is a preset number of square wave signals, and the number of square waves of the first signal and the second signal is different.

9. The power chip management method according to any one of claims 2 to 6, wherein the first operating parameter and/or the second operating parameter comprises at least one of the following information:

the voltage of the device to be regulated;

the current of the device to be adjusted;

the function of the device to be adjusted.

10. The power chip management method according to claim 9, wherein the device to be adjusted is a display device, the first operating parameter is an analog device voltage of the display device, and the second operating parameter is a positive and/or negative electroluminescence voltage of the display device.

11. The power supply chip management method according to claim 2 or 3, wherein the device to be adjusted is a display device, the display device includes a display driving chip, and the power supply chip is connected with the display driving chip; the sending of the second signal by the device to be adjusted to the control device includes:

and the display driving chip sends the second signal to the control device.

12. A power chip management system is characterized in that the power chip management system is applied to electronic equipment and comprises a control device, a power chip and a device to be adjusted, wherein the power chip is respectively connected with the control device and the device to be adjusted; wherein the content of the first and second substances,

the control device is used for determining a first signal for indicating a first operation of the power supply chip and sending the first signal to the power supply chip, wherein the first operation is to adjust a first working parameter of the device to be adjusted to a first target working parameter and/or adjust a first function of the power supply chip to a first target function;

the power supply chip is used for receiving the first signal and executing the first operation according to the first signal.

13. The power chip management system of claim 12,

the device to be adjusted is further configured to determine a second signal indicating a second operation of the power chip, which is different from the first operation, and send the second signal to the power chip, where the second operation is to adjust a second operating parameter of the device to be adjusted, which is different from the first operating parameter, to a second target operating parameter and/or adjust a second function of the power chip, which is different from the first function, to a second target function;

the power supply chip is also used for receiving the second signal and executing the second operation according to the second signal.

14. The power chip management system according to claim 13, wherein the power chip comprises a first control pin and a second control pin, the control device is connected to the first control pin of the power chip, and the control device is configured to send the first signal to the power chip through the first control pin; the device to be adjusted is connected with the second control pin of the power chip, and the control device is used for sending the second signal to the power chip through the second control pin.

15. The power chip management system of claim 12,

the control device is further configured to determine a second signal for indicating a second operation of the power chip, which is different from the first operation, and send the second signal to the power chip, where the second operation is to adjust a second operating parameter of the device to be adjusted, which is different from the first operating parameter, to a second target operating parameter and/or adjust a second function of the power chip, which is different from the first function, to a second target function;

16. The power chip management system according to claim 15, wherein the power chip comprises a first control pin and a second control pin, the control device is connected to the first control pin and the second control pin of the power chip, respectively, and the control device is configured to send the first signal to the power chip through the first control pin and send the second signal to the power chip through the second control pin.

17. The power chip management system according to claim 12 or 16, wherein the control device is connected to the control pin of the power chip through a serial peripheral interface.

18. The power chip management system according to any one of claims 12-17, wherein the control device comprises an application processor and a serial peripheral interface controller, the serial peripheral interface controller being connected to the application processor and the power chip, respectively; wherein

The application processor is used for determining working parameters according to the requirement information of the device to be adjusted and determining signal quantity information according to the corresponding relation between the working parameters and the preset working parameters and the output signal quantity,

the application processor is further configured to send the signal quantity information to the serial peripheral interface controller, and control the serial peripheral interface controller to generate a signal for indicating an operation of the power supply chip according to the signal quantity information and preset signal output configuration information;

the serial peripheral interface controller is further configured to send a signal to the power chip indicating operation of the power chip.

19. The power chip management system according to claim 13 or 14, wherein the device to be adjusted is a display device, the display device includes a display driver chip, the power chip is connected to the display driver chip, and the display driver chip is configured to send the second signal to the control device.

20. An electronic device, comprising:

a memory for storing a computer program, the computer program comprising program instructions;

control means for executing the program instructions to cause the electronic device to perform the power chip management method of any one of claims 1-11.

21. A computer-readable storage medium storing a computer program comprising program instructions that are executed by a computer to cause an electronic device to execute the power chip management method according to any one of claims 1 to 11.