CN114944138B - Driving method, driving circuit and display device of display panel - Google Patents
Driving method, driving circuit and display device of display panel Download PDFInfo
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- CN114944138B CN114944138B CN202210674369.5A CN202210674369A CN114944138B CN 114944138 B CN114944138 B CN 114944138B CN 202210674369 A CN202210674369 A CN 202210674369A CN 114944138 B CN114944138 B CN 114944138B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The present disclosure provides a driving method, a driving circuit and a display device for a display panel. In the method, when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, a first effective voltage is provided for any multiplexing control line; when the data lead corresponding to the transistor connected with any multiplexing control line provides a second polarity data voltage, providing a second effective voltage for any multiplexing control line; the first effective voltage and the second effective voltage are not equal, so that the current driving capability of the transistor connected with any multiplexing control line tends to be consistent when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted.
Description
Technical Field
The disclosure belongs to the technical field of display, and more particularly relates to a driving method, a driving circuit and a display device of a display panel.
Background
This section is intended to provide a background or context for the embodiments recited in the claims. The description herein is not admitted to be prior art by inclusion in this section.
A multiplexer may be provided in the display panel so that one pin of the driving chip can write data voltages to a plurality of data lines in a time-sharing manner. This can save wiring space in the display panel, but also introduce some display anomalies.
Disclosure of Invention
The present disclosure provides a driving method, a driving circuit and a display device for a display panel.
The technical scheme adopted by the present disclosure is as follows: a driving method of a display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers in one-to-one correspondence with the plurality of data leads, each of the multiplexers including a plurality of transistors, control poles of the plurality of transistors of a same multiplexer being connected in one-to-one correspondence with the plurality of multiplexing control lines, first poles of the plurality of transistors of the same multiplexer being electrically connected with the data leads of the same multiplexer, second poles of the plurality of transistors of the same multiplexer being respectively connected with one of the data lines, the driving method comprising:
when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, providing a first effective voltage for any multiplexing control line;
when the data lead corresponding to the transistor connected with any multiplexing control line provides a second polarity data voltage, providing a second effective voltage for any multiplexing control line;
the first effective voltage and the second effective voltage are not equal, so that the current driving capability of the transistor connected with any multiplexing control line tends to be consistent when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted.
In some embodiments, the plurality of transistors of the multiplexer are all N-type transistors or all P-type transistors, the first polarity data voltage corresponding to a non-0 gray scale is higher than a common voltage, the second polarity data voltage corresponding to a non-0 gray scale is lower than the common voltage, and the first effective voltage is higher than the second effective voltage.
In some embodiments, the difference between the first effective voltage and the second effective voltage is denoted as V1, and the maximum value of the difference between the first polarity data voltage and the common voltage and the difference between the second polarity data voltage and the common voltage is denoted as V2, satisfying: v1 > 0.5 x V2.
In some embodiments of the present invention, in some embodiments,
in some embodiments, V1 < V2.
In some embodiments, the display panel includes: a liquid crystal display panel.
The technical scheme adopted by the present disclosure is as follows: a driving circuit of a display panel, the display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers in one-to-one correspondence with the plurality of data leads, each of the multiplexers including a plurality of transistors, control poles of the plurality of transistors of a same multiplexer being connected in one-to-one correspondence with the plurality of multiplexing control lines, first poles of the plurality of transistors of the same multiplexer being electrically connected with the data leads of the same multiplexer, second poles of the plurality of transistors of the same multiplexer being respectively connected with one of the data lines, the driving circuit comprising: a source driving circuit and a control line driving circuit,
the source driving circuit is configured to: providing a first polarity data voltage or a second polarity data voltage to each data lead so as to realize polarity inversion of the data voltage;
the control line drive circuit is configured to: providing a first effective voltage to any multiplexing control line when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, and providing a second effective voltage to any multiplexing control line when a data lead corresponding to a transistor connected with any multiplexing control line provides a second polarity data voltage;
the first effective voltage and the second effective voltage of the same gray scale are not equal, so that the current driving capability of the transistor connected with any multiplexing control line for transmitting the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale tends to be consistent.
In some embodiments, the plurality of transistors of the multiplexer are all N-type transistors or all P-type transistors, the first polarity data voltage corresponding to a non-0 gray scale is higher than a common voltage, the second polarity data voltage corresponding to a non-0 gray scale is lower than the common voltage, and the first effective voltage is higher than the second effective voltage.
In some embodiments, the difference between the first effective voltage and the second effective voltage is denoted as V1, and the maximum value of the difference between the first polarity data voltage and the common voltage and the difference between the second polarity data voltage and the common voltage is denoted as V2, satisfying: v1 > 0.5 x V2.
In some embodiments of the present invention, in some embodiments,
in some embodiments, V1 < V2.
In some embodiments, the display panel includes: a liquid crystal display panel.
The technical scheme adopted by the present disclosure is as follows: the utility model provides a display device, includes display panel, display panel include a plurality of multiplexing control line, a plurality of data lead and with a plurality of multiplexers of a plurality of data lead one-to-one, every multiplexer include a plurality of transistors, the control pole of a plurality of transistors of same multiplexer with a plurality of multiplexing control line one-to-one ground is connected, the first pole of a plurality of transistors of same multiplexer all with the data lead electricity that same multiplexer corresponds is connected, a plurality of data line is connected respectively to the second pole of a plurality of transistors of same multiplexer, display device still includes aforesaid drive circuit.
Drawings
Fig. 1 is a circuit diagram of a display device provided by an embodiment of the present disclosure.
Fig. 2 is a timing chart of a driving method of a display panel provided by a comparative example of the present disclosure.
Fig. 3 is a graph of the gate-source voltage difference versus the source-drain circuit of a transistor.
Fig. 4 is a flowchart illustrating a driving method of a display panel according to an embodiment of the disclosure.
Fig. 5 is a timing chart of a driving method of a display panel provided in an embodiment of the present disclosure.
Fig. 6 is a timing chart of a driving method of a display panel according to another embodiment of the disclosure.
Detailed Description
The disclosure is further described below with reference to the embodiments shown in the drawings.
The display panel provided by the embodiment of the disclosure comprises a plurality of multiplexing control lines, a plurality of data leads and a plurality of multiplexers corresponding to the data leads one by one, wherein each multiplexer comprises a plurality of transistors, the control poles of the transistors of the same multiplexer are connected with the multiplexing control lines one by one, the first poles of the transistors of the same multiplexer are electrically connected with the data leads corresponding to the same multiplexer, and the second poles of the transistors of the same multiplexer are respectively connected with one data line.
Fig. 1 is a circuit diagram of a display device provided in an embodiment of the present disclosure, in which a partial structure of a display panel and a partial structure of a driving circuit are shown. The display panel includes a plurality of gate lines GL1, GL2, a plurality of data lines DL1, DL2, DL3, DL4, and a plurality of data leads L1, L2. The display panel further includes a plurality of pixel circuits distributed in an array, wherein one of the pixel circuits includes a transistor T0 and a storage capacitor C0. The storage capacitor C0 is used to store the data voltage. When the gate line GL1 provides an effective voltage (the effective voltage is a high level voltage for the N-type transistor T0), the transistor T0 is turned on, and the data line DL1 can write a data voltage into the storage capacitor C0. The display panel is, for example, a liquid crystal display panel. A common electrode (not shown) for supplying a common voltage is also provided in the display panel. The difference between the data voltage stored in the storage capacitor C0 and the common voltage supplied from the common electrode determines the brightness of the display area controlled by the pixel circuit.
The data leads L1, L2 are connected to one data output pin (not shown) of the source driving circuit 21, respectively. The data output pins are, for example, pad-shaped, and are fixed on the display panel by a binding process. The source driving circuit 21 supplies data voltages required for the data lines DL1 and DL2 at a time-sharing manner to a data output pin connected to the data line L1. The source driving circuit 21 supplies data voltages required for the data lines DL3 and DL4 at a time-sharing manner to a data output pin connected to the data line L2.
The display panel further includes a plurality of multiplexing control lines MUX1, MUX2 and a plurality of multiplexers M1, M2. The multiplexers M1 and M2 are in one-to-one correspondence with the data leads L1 and L2. The multiplexer M1 includes transistors T1, T2. The control electrode of the transistor T1 is connected to the multiplexing control line MUX1, and the control electrode of the transistor T2 is connected to the multiplexing control line MUX2. The first poles of the transistor T1 and the transistor T2 are both connected to the data lead L1 (corresponding to the same data output pins each connected to the source driving circuit). The second pole of the transistor T1 is connected to the data line DL2, and the second pole of the transistor T2 is connected to the data line DL1. The multiplexer M2 comprises transistors T3, T4. The control electrode of the transistor T3 is connected to the multiplexing control line MUX1, and the control electrode of the transistor T4 is connected to the multiplexing control line MUX2. The first poles of the transistor T3 and the transistor T4 are both connected to the data lead L2 (corresponding to the same data output pins both connected to the source driving circuit). The second pole of the transistor T3 is connected to the data line DL4, and the second pole of the transistor T4 is connected to the data line DL3.
The control line driving circuit 22 controls voltages of the multiplexing control lines MUX1, MUX2 such that the multiplexing control lines MUX1, MUX2 alternately supply effective voltages.
The display panel shown in fig. 1 includes 2 multiplexing control lines. In other embodiments, the display panel includes 3 multiplexing control lines or more multiplexing control lines.
The source driving circuit 21 shown in fig. 1 is, for example, a separate chip, and the control line driving circuit 22 is, for example, integrated in the display panel. Of course, in other embodiments, the control line driver circuit 22 is integrated within the same chip as the source driver circuit 21.
Fig. 2 is a timing chart of a driving method of a display panel provided by a comparative example of the present disclosure. The display panel is flipped, for example, in a frame flip. Illustratively, the data voltages received by the pixel circuits in the timing diagram of fig. 2 are equal in the positive frame and equal in the negative frame. The multiplexing control lines MUX1, MUX2 alternately supply the high-level voltage Vgh. In the positive frame, the data voltages Vd supplied from the data lines DL1, DL2, DL3, DL4 are all greater than or equal to the common voltage. Referring to fig. 1, the N-type transistors T1, T2, T3, and T4 have a first electrode as a drain and a second electrode as a source. The source voltage is set to the common voltage before the data voltage writing is performed. The maximum value of the gate-source voltage difference vgs+ of the transistors T1, T2, T3, T4 is denoted Vgh-Vcom. In the negative frame, the data voltages Vd supplied from the data lines DL1, DL2, DL3, DL4 are all less than or equal to the common voltage. Referring to fig. 1, the second poles of the N-type transistors T1, T2, T3, T4 are drain electrodes, and the first poles are source electrodes. The maximum value of the gate-source voltage difference Vgs-of the transistors T1, T2, T3, T4 is denoted Vgh-Vd. Referring to fig. 3, the gate-source voltage differences of the transistors T1, T2, T3, T4 are different in the negative frame and the positive frame, and the current driving is different, which easily causes the brightness of the negative frame and the positive frame to be different, resulting in abnormal display.
Based on the above analysis, referring to fig. 4, an embodiment of the present disclosure provides a driving method of driving the aforementioned display panel, including the following steps.
Step 101, when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, providing a first effective voltage for any multiplexing control line;
102, when a data lead corresponding to a transistor connected with any multiplexing control line provides a second polarity data voltage, providing a second effective voltage for any multiplexing control line;
the first effective voltage and the second effective voltage are not equal, so that the current driving capability of a transistor connected with any multiplexing control line tends to be consistent when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted.
Fig. 5 is a timing chart of a driving method of a display panel provided in an embodiment of the present disclosure. In this embodiment, the transistors of the multiplexer are N-type transistors, the first polarity data voltage Vd corresponding to the non-0 gray level is higher than the common voltage Vcom, the second polarity data voltage Vd corresponding to the non-0 gray level is lower than the common voltage Vcom, and the first effective voltage vgh+ is higher than the second effective voltage Vgh-.
In this embodiment, the high level voltage supplied from the multiplexing control line at the positive frame is higher than the high level voltage supplied from the multiplexing control line at the negative frame, thereby improving the current driving capability of the transistor in the multiplexer at the positive frame.
In some embodiments, the difference between the first effective voltage vgh+ and the second effective voltage Vgh-is denoted as V1, and the maximum value among the difference between the first polarity data voltage Vd and the common voltage Vcom and the difference between the second polarity data voltage Vd and the common voltage Vcom is denoted as V2, satisfying: v1 > 0.5 x V2.
The values of the data voltages Vd corresponding to different gray scales are also different, and the lower limit of the voltage difference V1 is determined by a statistical method. The first effective voltage vgh+ is higher than the second effective voltage Vgh-by a value sufficient to effectively reduce the difference in driving capability of transistors in the multiplexer between the positive frame and the negative frame.
In some embodiments of the present invention, in some embodiments,
the difference between the first effective voltage vgh+ and the second effective voltage Vgh-if too large, may cause the driving capability of the transistor in the multiplexer at the positive frame to be larger than the driving capability of the transistor in the multiplexer at the negative frame. An upper limit is set for the difference between the first effective voltage vgh+ and the second effective voltage Vgh-. In some embodiments, V1 < V2.
Fig. 6 is a timing chart of a driving method of a display panel provided in an embodiment of the present disclosure. In this embodiment, the multiple transistors of the multiplexer shown in fig. 1 are replaced with P-type transistors. For a P-type tube, the effective voltage of its control electrode is a low level voltage. The first polarity data voltage Vd is higher than the common voltage Vcom, the second polarity data voltage Vd is lower than the common voltage Vcom, and the first effective voltage vgl+ is higher than the second effective voltage Vgl-.
In this embodiment, the low level voltage supplied from the multiplexing control line at the positive frame is higher than the low level voltage supplied from the multiplexing control line at the negative frame, thereby improving the current driving capability of the transistor in the multiplexer at the negative frame.
In some embodiments, the difference between the first effective voltage vgl+ and the second effective voltage Vgl-is denoted as V1, and the maximum value among the difference between the first polarity data voltage Vd and the common voltage Vcom and the difference between the second polarity data voltage Vd and the common voltage Vcom is denoted as V2, satisfying: v1 > 0.5 x V2.
The values of the data voltages Vd corresponding to different gray scales are also different, and the lower limit of the voltage difference V1 is determined by a statistical method. The first effective voltage vgl+ is of a value greater than the second effective voltage Vgl-to effectively reduce the difference in driving capability of the transistors in the multiplexer between the positive and negative frames.
In some embodiments of the present invention, in some embodiments,
the difference between the first effective voltage vgl+ and the second effective voltage Vgl-if too large, will make the driving capability of the transistors in the multiplexer at the positive frame smaller than the driving capability of the transistors in the multiplexer at the negative frame. An upper limit is set for the difference between the first effective voltage vgl+ and the second effective voltage Vgl-. In some embodiments, V1 < V2.
It should be noted that the present disclosure does not limit the polarity inversion method. The polarity of the data voltage received by the pixel circuits connected with the same multiplexing control line in the same row of pixel circuits at the same time is only required to be the same.
Based on the same inventive concept, embodiments of the present disclosure provide a driving circuit of a display panel, the display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers corresponding to the plurality of data leads one by one, each multiplexer including a plurality of transistors, control poles of the plurality of transistors of the same multiplexer being connected to the plurality of multiplexing control lines one by one, first poles of the plurality of transistors of the same multiplexer being electrically connected to the data lead corresponding to the same multiplexer, and second poles of the plurality of transistors of the same multiplexer being respectively connected to one data line.
Referring to fig. 1, the driving circuit includes: a source driving circuit, 21 and a control line driving circuit 22,
the source driving circuit 21 is configured to: providing a first polarity data voltage or a second polarity data voltage to each data lead so as to realize polarity inversion of the data voltages;
the control line driving circuit 22 is configured to: when the data lead corresponding to the transistor connected with any multiplexing control line provides a first polarity data voltage, providing a first effective voltage for any multiplexing control line, and when the data lead corresponding to the transistor connected with any multiplexing control line provides a second polarity data voltage, providing a second effective voltage for any multiplexing control line;
the first effective voltage and the second effective voltage are not equal, so that the current driving capability of a transistor connected with any multiplexing control line tends to be close when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted.
In some embodiments, the plurality of transistors of the multiplexer are N-type transistors or P-type transistors, the first polarity data voltage corresponding to the non-0 gray scale is higher than the common voltage, the second polarity data voltage corresponding to the non-0 gray scale is lower than the common voltage, and the first effective voltage is higher than the second effective voltage.
In some embodiments, the difference between the first effective voltage and the second effective voltage is denoted as V1, the maximum value of the difference between the data voltage and the common voltage is denoted as V2, and the following is satisfied: v1 > 0.5 x V2.
In some embodiments of the present invention, in some embodiments,
in some embodiments, V1 < V2.
In some embodiments, a display panel includes: a liquid crystal display panel.
Based on the same inventive concept, the embodiments of the present disclosure further provide a display device including a display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers corresponding to the plurality of data leads one by one, each multiplexer including a plurality of transistors, control poles of the plurality of transistors of the same multiplexer being connected to the plurality of multiplexing control lines one by one, first poles of the plurality of transistors of the same multiplexer being electrically connected to the data leads corresponding to the same multiplexer, second poles of the plurality of transistors of the same multiplexer being respectively connected to the one data line, and the display device further including the aforementioned driving circuit.
The display device is any device or product with display function, such as a liquid crystal display module, a mobile phone, a display, a tablet personal computer, an electronic billboard and the like.
The various embodiments in this disclosure are described in a progressive manner, and identical and similar parts of the various embodiments are all referred to each other, and each embodiment is mainly described as different from other embodiments.
The scope of the present disclosure is not limited to the above-described embodiments, and it is apparent that various modifications and variations can be made to the present disclosure by those skilled in the art without departing from the scope and spirit of the disclosure. Such modifications and variations are intended to be included herein within the scope of the following claims and their equivalents.
Claims (11)
1. A driving method of a display panel, the display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers in one-to-one correspondence with the plurality of data leads, each of the multiplexers including a plurality of transistors, control poles of the plurality of transistors of a same multiplexer being connected in one-to-one correspondence with the plurality of multiplexing control lines, first poles of the plurality of transistors of the same multiplexer being electrically connected with the data leads of the same multiplexer, second poles of the plurality of transistors of the same multiplexer being respectively connected with one of the data lines, the driving method comprising:
when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, providing a first effective voltage for any multiplexing control line;
when the data lead corresponding to the transistor connected with any multiplexing control line provides a second polarity data voltage, providing a second effective voltage for any multiplexing control line;
the first effective voltage and the second effective voltage are not equal, so that the current driving capability of a transistor connected with any multiplexing control line tends to be consistent when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted; the transistors of the multiplexer are N-type transistors or P-type transistors, the first polarity data voltage corresponding to non-0 gray scale is higher than a common voltage, the second polarity data voltage corresponding to non-0 gray scale is lower than the common voltage, and the first effective voltage is higher than the second effective voltage.
2. The driving method according to claim 1, wherein a difference between the first effective voltage and the second effective voltage is denoted as V1, and a maximum value among a difference between the first polarity data voltage and the common voltage and a difference between the second polarity data voltage and the common voltage is denoted as V2, satisfies: v1 > 0.5 x V2.
3. The driving method according to claim 2, wherein,
4. the driving method according to claim 1, wherein V1 < V2.
5. The driving method according to claim 1, wherein the display panel includes: a liquid crystal display panel.
6. A driving circuit of a display panel, the display panel including a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers in one-to-one correspondence with the plurality of data leads, each of the multiplexers including a plurality of transistors, control poles of the plurality of transistors of a same multiplexer being connected in one-to-one correspondence with the plurality of multiplexing control lines, first poles of the plurality of transistors of the same multiplexer being electrically connected with the data leads corresponding to the same multiplexer, second poles of the plurality of transistors of the same multiplexer being respectively connected with one of the data lines, the driving circuit comprising: a source driving circuit and a control line driving circuit,
the source driving circuit is configured to: providing a first polarity data voltage or a second polarity data voltage to each data lead so as to realize polarity inversion of the data voltage;
the control line drive circuit is configured to: providing a first effective voltage to any multiplexing control line when a data lead corresponding to a transistor connected with any multiplexing control line provides a first polarity data voltage, and providing a second effective voltage to any multiplexing control line when a data lead corresponding to a transistor connected with any multiplexing control line provides a second polarity data voltage;
the first effective voltage and the second effective voltage are not equal, so that the current driving capability of a transistor connected with any multiplexing control line tends to be consistent when the first polarity data voltage and the second polarity data voltage corresponding to the same non-0 gray scale are transmitted;
the transistors of the multiplexer are N-type transistors or P-type transistors, the first polarity data voltage corresponding to non-0 gray scale is higher than a common voltage, the second polarity data voltage corresponding to non-0 gray scale is lower than the common voltage, and the first effective voltage is higher than the second effective voltage.
7. The driver circuit of claim 6, wherein the difference between the first effective voltage and the second effective voltage is denoted as V1, and the maximum value of the difference between the first polarity data voltage and the common voltage and the difference between the second polarity data voltage and the common voltage is denoted as V2, satisfying: v1 > 0.5 x V2.
8. The driving circuit according to claim 7, wherein,
9. the drive circuit of claim 6, wherein V1 < V2.
10. The driving circuit according to claim 6, wherein the display panel includes: a liquid crystal display panel.
11. A display device comprising a display panel, the display panel comprising a plurality of multiplexing control lines, a plurality of data leads, and a plurality of multiplexers in one-to-one correspondence with the plurality of data leads, each of the multiplexers comprising a plurality of transistors, the control poles of the plurality of transistors of a same multiplexer being connected in one-to-one correspondence with the plurality of multiplexing control lines, first poles of the plurality of transistors of a same multiplexer being electrically connected with the data leads of a same multiplexer, second poles of the plurality of transistors of a same multiplexer being respectively connected with one of the data lines, the display device further comprising a drive circuit according to any one of claims 6 to 10.
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| CN107240374A (en) * | 2017-07-21 | 2017-10-10 | 京东方科技集团股份有限公司 | A kind of source electrode drive circuit, display device and its driving method |
| CN107993629A (en) * | 2018-01-31 | 2018-05-04 | 武汉华星光电技术有限公司 | The driving method of liquid crystal display device |
| CN110058466A (en) * | 2019-04-22 | 2019-07-26 | 深圳市华星光电技术有限公司 | Display device and its driving method |
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| CN114944138A (en) | 2022-08-26 |
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