CN114938440A - Microsurgery image pickup system with switchable imaging modes, microsurgery image pickup method and switching circuit - Google Patents

Microsurgery image pickup system with switchable imaging modes, microsurgery image pickup method and switching circuit Download PDF

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Publication number
CN114938440A
CN114938440A CN202210266705.2A CN202210266705A CN114938440A CN 114938440 A CN114938440 A CN 114938440A CN 202210266705 A CN202210266705 A CN 202210266705A CN 114938440 A CN114938440 A CN 114938440A
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pin
latch
imaging mode
clock frequency
imaging
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王华峰
张新
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Jiaxing Zhitong Technology Co ltd
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Jiaxing Zhitong Technology Co ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/18—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast
    • H04N7/181—Closed-circuit television [CCTV] systems, i.e. systems in which the video signal is not broadcast for receiving images from a plurality of remote sources
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B90/00—Instruments, implements or accessories specially adapted for surgery or diagnosis and not covered by any of the groups A61B1/00 - A61B50/00, e.g. for luxation treatment or for protecting wound edges
    • A61B90/36—Image-producing devices or illumination devices not otherwise provided for
    • A61B90/361—Image-producing devices, e.g. surgical cameras
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/265—Mixing

Abstract

The invention discloses a microsurgery camera shooting system with switchable imaging modes, a microsurgery camera shooting method and a switching circuit, wherein the switching circuit comprises an input unit, a video acquisition unit and an imaging processing unit, the video acquisition unit comprises a 2D visible light imaging mode image sensor, a 3D visible light imaging mode image sensor and a fluorescence imaging mode image sensor, the imaging processing unit comprises an imaging mode determining module, a switching circuit, a main imaging mode control module and an auxiliary imaging mode control module, and the switching circuit is used for switching the main imaging mode to work on a main clock frequency and switching the auxiliary imaging mode to work on the main clock frequency; the main imaging mode module is used for operating a main imaging mode at a determined main clock frequency; the auxiliary imaging mode module is used for operating the auxiliary imaging mode at the determined main clock frequency. The invention realizes that various imaging can realize free master-slave switching, and has small volume and light weight.

Description

Microsurgery image pickup system with switchable imaging modes, method and switching circuit
Technical Field
The invention relates to a microsurgery camera shooting system and a microsurgery camera shooting method capable of realizing free switching in multiple imaging modes, and belongs to the technical field of camera shooting control.
Background
At present, some departments of domestic hospitals such as otolaryngology department, neurosurgery department, stomatology department and the like adopt a microscope to carry out microsurgery on patients, and the microsurgery is usually completed based on the microscope. Microscopes manufactured by foreign factories are usually only matched with eyepieces for direct observation of human eyes, only a doctor who is a main knife can carefully observe and operate a focus part in the operation process, and other doctors cannot observe pictures under the microscope, so that the microscope is not beneficial to learning of young doctors, communication and case study of experts and doctors, and remote guidance of the doctors.
The above problems are improved with the recent development of digital imaging technology for medical operation, and the new operation microscope in hospital is accompanied by some simple imaging system, such as single 2D imaging function. Still other medical equipment vendors have attempted to provide single 3D imaging or single fluoroscopic imaging systems. The devices are all effective in helping doctors to acquire illness state information of patients to a certain extent. However, due to the single function of the above-mentioned devices, doctors cannot quickly and comprehensively obtain information of interest from different imaging modes, and doctors may need to use various devices to switch back and forth and finally obtain desired patient information through synthesis, thereby reducing the work efficiency virtually, prolonging the time for patients to see a doctor and wasting precious medical resources.
Disclosure of Invention
The purpose of the invention is as follows: in order to overcome the defects in the prior art, the invention provides a microsurgery camera system with switchable imaging modes, a microsurgery camera method and a switching circuit. The invention can not only carry out simultaneous imaging of a plurality of modes, but also can freely switch according to requirements, and takes the application scene of the microsurgery into consideration, makes the camera small and light, and perfectly solves the problem of pain points in the actual work of doctors. A microsurgery camera circuit is realized, images in three different imaging modes can be fused into a secondary picture for a user to watch in real time, and the three imaging modes can be freely switched from master to slave. The camera needs to be small, portable, clear in picture and free of interference.
The technical scheme is as follows: in order to realize the purpose, the invention adopts the technical scheme that:
a microsurgical camera system with 2D, 3D and fluorescence imaging, comprising an input unit, a video acquisition unit, an imaging processing unit, wherein:
the input unit is used for inputting a required imaging mode.
The video acquisition unit comprises a 2D visible light imaging mode image sensor, a 3D visible light imaging mode image sensor and a fluorescence imaging mode image sensor, wherein the 2D visible light imaging mode image sensor is used for acquiring operation pictures through a 2D visible light imaging mode to form 2D visible light images under the control of the imaging processing unit, the 3D visible light imaging mode image sensor is used for acquiring the operation pictures through the 3D visible light imaging mode to form 3D visible light images under the control of the imaging processing unit, and the fluorescence imaging mode image sensor is used for acquiring the operation pictures through a fluorescence imaging mode to form fluorescence images under the control of the imaging processing unit.
The imaging processing unit comprises an imaging mode determining module, a switching circuit, a main imaging mode control module and an auxiliary imaging mode control module,
the imaging mode determining module is used for determining which imaging mode of the three imaging modes of the 2D visible light imaging mode, the 3D visible light imaging mode and the fluorescence imaging mode is used as a main imaging mode according to the imaging mode required by input, and simultaneously determining the main clock frequency of the main imaging mode, and using the other two imaging modes as auxiliary imaging modes.
The switching circuit is used for switching the main imaging mode to work at the main clock frequency and switching the auxiliary imaging mode to work at the main clock frequency.
The main imaging mode module is used for operating the imaging mode at the determined main clock frequency according to the determined main imaging mode.
The auxiliary imaging mode module is used for operating the auxiliary imaging mode at the determined main clock frequency.
Preferably: the optimal working clock frequency of the 2D visible light imaging mode image sensor is recorded as a first working clock frequency fp1, the optimal working clock frequency of the 3D visible light imaging mode image sensor is recorded as a second working clock frequency fp2, and the optimal working clock frequency of the fluorescence imaging mode image sensor is recorded as a third working clock frequency fp 3.
The clock frequency points of the 2D visible light imaging mode image sensor comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3.
The clock frequency points of the 3D visible light imaging mode image sensor comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3.
The clock frequency points of the fluorescence imaging mode image sensor comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3.
Preferably: the master clock frequency is the optimal operating frequency for determining which imaging mode is the master imaging mode.
Preferably: the switching circuit comprises a first switching module, a second switching module and a third switching module, wherein:
the first switching module comprises a first trigger DFF1, a zero trigger DFF0, a first inverter, a first latch, a second latch, a third latch, a fourth latch and a fifth latch, wherein a first pin of the first latch is connected with a SELECT interface, a second pin of the first latch is connected with a second pin of the second latch through the first inverter, a second pin of the first latch is connected with a QN pin of the zero trigger DFF0, and a third pin of the first latch is connected with an S pin of the first trigger DFF 1. The R pin of the first flip-flop DFF1 is connected to the CLK1 interface and the second pin of the first latch three, the Q pin of the first flip-flop DFF1 is connected to the first pin of the first latch three, and the QN pin of the first flip-flop DFF1 is connected to the first pin of the first latch two. The pin S of the zero flip-flop DFF0 is connected with the pin III of the first latch II, the pin R of the zero flip-flop DFF0 is respectively connected with the interface CLK0 and the pin II of the first latch IV, and the pin Q of the zero flip-flop DFF0 is connected with the pin I of the first latch IV. And a pin III of the first latch is connected with a pin I of a first latch, and a pin III of the first latch is connected with a pin II of the first latch.
The second switching module comprises a third trigger DFF3, a second trigger DFF2, a second inverter, a first second latch, a second latch, a third second latch, a fourth second latch and a fifth second latch, wherein a first pin of the first second latch is connected with a SELECT interface, a first pin of the first second latch is connected with a second pin of the second latch through the second inverter, a second pin of the first second latch is connected with a QN pin of the second trigger DFF2, and a third pin of the first second latch is connected with an S pin of the third trigger DFF 3. The R pin of the third flip-flop DFF3 is connected to the CLK3 interface and the second pin of the second latch three, the Q pin of the third flip-flop DFF3 is connected to the first pin of the second latch three, and the QN pin of the third flip-flop DFF3 is connected to the first pin of the second latch two. The S pin of the second flip-flop DFF2 is connected to the third pin of the second latch two, the R pin of the second flip-flop DFF2 is connected to the CLK2 interface and the second pin of the second latch four, respectively, and the Q pin of the second flip-flop DFF2 is connected to the first pin of the second latch four. And a third pin of the second latch III is connected with a first pin of the second latch V, and a third pin of the second latch IV is connected with a second pin of the second latch V.
The third switching module comprises a fifth flip-flop DFF5, a fourth flip-flop DFF4, a third inverter, a first third latch, a second third latch, a fourth third latch, and a fifth third latch, wherein a first pin of the first third latch is connected to a SELECT interface, a first pin of the first third latch is connected to a second pin of the second third latch through the third inverter, a second pin of the first third latch is connected to a QN pin of the fourth flip-flop DFF4, and a third pin of the first third latch is connected to an S pin of the fifth flip-flop DFF 5. The pin R of the fifth flip-flop DFF5 is connected to the pin one of the first latch and the pin two of the third latch, respectively, the pin Q of the fifth flip-flop DFF5 is connected to the pin one of the third latch, and the pin QN of the fifth flip-flop DFF5 is connected to the pin one of the third latch. An S pin of the fourth flip-flop DFF4 is connected to a third pin of a third latch two, an R pin of the fourth flip-flop DFF4 is connected to a first pin of a second latch five and a second pin of a third latch four, respectively, and a Q pin of the fourth flip-flop DFF4 is connected to a first pin of the third latch four. And a third pin of the third latch is connected with a first pin of the third latch, a third pin of the fourth latch is connected with a second pin of the third latch, and a third pin of the fifth latch is connected with an output interface.
Preferably: the power supply device comprises a unified power supply unit, wherein the unified power supply unit comprises an AC-DC conversion circuit, a first DC-DC conversion circuit, a first filtering unit, a second DC-DC conversion circuit, a second filtering unit, a third DC-DC conversion circuit, an analog power output circuit and a digital power output circuit, one end of the first DC-DC conversion circuit is connected with the AC-DC conversion circuit, the other end of the first DC-DC conversion circuit is respectively connected with the first filtering unit and the second filtering unit, one end of the second DC-DC conversion circuit is connected with the first filtering unit, the other end of the second DC-DC conversion circuit is connected with the digital power output circuit, one end of the third DC-DC conversion circuit is connected with the second filtering unit, and the other end of the third DC-DC conversion circuit is connected with the analog power output circuit.
Preferably, the following components: including unified power supply unit, unified power supply unit includes power conversion circuit, analog power output circuit, digital power output circuit, wherein:
the power conversion circuit is used for converting alternating current into direct current and outputting the direct current.
The analog power supply output circuit is used for transmitting the output direct current to an analog circuit in the video acquisition unit.
And the digital power supply output circuit is used for transmitting the output direct current to the digital circuits in the video acquisition unit and the imaging processing unit.
Preferably: the power conversion circuit comprises an alternating current input stage, a power conversion stage and a direct current output stage which are connected in sequence.
The alternating current input stage comprises a power interface, a safety module, a high-frequency filtering module and a rectifying module which are connected in sequence.
The power supply conversion stage comprises an isolation transformer, a primary side electronic switch, a chip control module, a photoelectric isolation module and an overvoltage protection module, wherein the primary side of the isolation transformer, the primary side electronic switch, the chip control module, the photoelectric isolation module, the overvoltage protection module and the secondary side of the isolation transformer are sequentially connected, the primary side of the isolation transformer is connected with a rectification module, and the secondary side of the isolation transformer is connected with a direct current output stage.
The direct current output stage comprises a power output module and an overcurrent protection module, one end of the overcurrent protection module is connected with the power output module, the other end of the overcurrent protection module is connected with the photoelectric isolation module, one end of the power output module is connected with the secondary side of the isolation transformer, and the other end of the power output module is connected with the analog power output circuit and the digital power output circuit respectively.
An imaging method for a microsurgical camera system with 2D, 3D and fluorescence imaging, comprising the steps of:
step 1, a user inputs one of a 2D visible light imaging mode, a 3D visible light imaging mode and a fluorescence imaging mode as a required imaging mode.
And 2, determining which imaging mode of the three imaging modes of the 2D visible light imaging mode, the 3D visible light imaging mode and the fluorescence imaging mode is used as a main imaging mode according to the required imaging mode input by the user, simultaneously determining the main clock frequency of the main imaging mode, and using the other two imaging modes as auxiliary imaging modes.
And 3, switching the main imaging mode to work on the main clock frequency and switching the auxiliary imaging mode to work on the main clock frequency by the switching circuit.
And 4, operating the imaging mode at the determined main clock frequency according to the determined main imaging mode.
And 5, operating the auxiliary imaging mode at the determined main clock frequency.
Preferably, the following components: the master clock frequency is the optimal operating frequency for determining which imaging mode is the master imaging mode.
A switching circuit comprises a first switching module, a second switching module and a third switching module, wherein:
the first switching module comprises a first trigger DFF1, a zero trigger DFF0, a first inverter, a first latch, a second latch, a third latch, a fourth latch and a fifth latch, wherein a first pin of the first latch is connected with a SELECT interface, a second pin of the first latch is connected with a second pin of the second latch through the first inverter, a second pin of the first latch is connected with a QN pin of the zero trigger DFF0, and a third pin of the first latch is connected with an S pin of the first trigger DFF 1. The R pin of the first flip-flop DFF1 is connected to the CLK1 interface and the second pin of the first latch three, the Q pin of the first flip-flop DFF1 is connected to the first pin of the first latch three, and the QN pin of the first flip-flop DFF1 is connected to the first pin of the first latch two. The pin S of the zero flip-flop DFF0 is connected with the pin III of the first latch II, the pin R of the zero flip-flop DFF0 is respectively connected with the interface CLK0 and the pin II of the first latch IV, and the pin Q of the zero flip-flop DFF0 is connected with the pin I of the first latch IV. And a third pin of the first latch is connected with a first pin of the first latch, and a third pin of the first latch is connected with a second pin of the first latch.
The second switching module comprises a third trigger DFF3, a second trigger DFF2, a second inverter, a first second latch, a second latch, a third second latch, a fourth second latch and a fifth second latch, wherein a first pin of the first second latch is connected with a SELECT interface, a first pin of the first second latch is connected with a second pin of the second latch through the second inverter, a second pin of the first second latch is connected with a QN pin of the second trigger DFF2, and a third pin of the first second latch is connected with an S pin of the third trigger DFF 3. The R pin of the third flip-flop DFF3 is connected to the CLK3 interface and the second pin of the second latch three, the Q pin of the third flip-flop DFF3 is connected to the first pin of the second latch three, and the QN pin of the third flip-flop DFF3 is connected to the first pin of the second latch two. The S pin of the second flip-flop DFF2 is connected to the third pin of the second latch two, the R pin of the second flip-flop DFF2 is connected to the CLK2 interface and the second pin of the second latch four, respectively, and the Q pin of the second flip-flop DFF2 is connected to the first pin of the second latch four. And a third pin of the second latch III is connected with a first pin of the second latch V, and a third pin of the second latch IV is connected with a second pin of the second latch V.
The third switching module comprises a fifth flip-flop DFF5, a fourth flip-flop DFF4, a third inverter, a first third latch, a second third latch, a fourth third latch, and a fifth third latch, wherein a first pin of the first third latch is connected to a SELECT interface, a first pin of the first third latch is connected to a second pin of the second third latch through the third inverter, a second pin of the first third latch is connected to a QN pin of the fourth flip-flop DFF4, and a third pin of the first third latch is connected to an S pin of the fifth flip-flop DFF 5. The pin R of the fifth flip-flop DFF5 is connected to the pin one of the first latch and the pin two of the third latch, respectively, the pin Q of the fifth flip-flop DFF5 is connected to the pin one of the third latch, and the pin QN of the fifth flip-flop DFF5 is connected to the pin one of the third latch. An S pin of the fourth flip-flop DFF4 is connected to a third pin of the third latch two, an R pin of the fourth flip-flop DFF4 is connected to a first pin of the second latch five and a second pin of the third latch four, respectively, and a Q pin of the fourth flip-flop DFF4 is connected to a first pin of the third latch four. And a third pin of the third latch is connected with a first pin of the third latch, a third pin of the fourth latch is connected with a second pin of the third latch, and a third pin of the fifth latch is connected with an output interface.
Compared with the prior art, the invention has the following beneficial effects:
the invention can be applied to the microsurgery imaging of various departments of a hospital, and can fuse images in various modes into a sub-picture for the user to watch in real time, thereby perceiving different information in an operation scene.
Drawings
FIG. 1 is a block diagram of a camera circuitry of the present invention;
FIG. 2 is a block diagram of three image sensors of the present invention;
FIG. 3 is a block diagram of a circuit for freely switching between three imaging modes according to the present invention;
FIG. 4 is a block diagram of the AC-DC power supply of the present invention;
FIG. 5 is a block diagram of the DC-DC power supply of the present invention;
FIG. 6 is a schematic diagram of a circuit structure of one layer of the image sensor PCB according to the present invention;
FIG. 7 is a schematic diagram of another layer of circuit structure of the image sensor PCB of the present invention;
FIG. 8 is a schematic diagram of a multi-clock switching circuit according to the present invention.
The image sensor comprises a 1-2D visible light imaging mode image sensor, a 2-3D visible light imaging mode image sensor, a 3-fluorescence imaging mode image sensor, a 10-digital ground, a 20-analog ground, a 50-digital power supply and a 60-analog power supply.
Detailed Description
The present invention is further illustrated by the following description in conjunction with the accompanying drawings and the specific embodiments, it is to be understood that these examples are given solely for the purpose of illustration and are not intended as a definition of the limits of the invention, since various equivalent modifications will occur to those skilled in the art upon reading the present invention and fall within the limits of the appended claims.
A microsurgical camera system with 2D, 3D and fluorescence imaging, as shown in fig. 1, comprising an input unit, a video acquisition unit, an imaging processing unit, wherein:
the input unit is used for inputting a required imaging mode.
The video acquisition unit is composed of video acquisition modules taking 3 different types of image sensors as cores, and acquires doctor operation pictures under a microscope through the image sensors. As shown in fig. 2, the system comprises a 2D visible light imaging mode image sensor 1, a 3D visible light imaging mode image sensor 2, and a fluorescence imaging mode image sensor 3, wherein the 2D visible light imaging mode image sensor 1 is used for collecting operation pictures through a 2D visible light imaging mode under the control of an imaging processing unit to form a 2D visible light image, the 3D visible light imaging mode image sensor 2 is used for collecting operation pictures through a 3D visible light imaging mode under the control of the imaging processing unit to form a 3D visible light image, and the fluorescence imaging mode image sensor 3 is used for collecting operation pictures through a fluorescence imaging mode under the control of the imaging processing unit to form a fluorescence image. The 3 image sensors form the physical basis of the three imaging modes of the camera.
The imaging processing unit carries out digital processing on the picture data acquired by the three image sensors according to a specific imaging mode and forms video stream output data according to a selected mode; the video data display module completes the picture output of the required imaging mode. The imaging processing unit switches imaging pictures according to user input, so that the image quality is improved and promoted, and the optimal viewing experience is finally realized. The imaging processing unit is internally controlled by signals of a multi-clock-source seamless switching circuit, and is used for completing the switching of a main clock of a corresponding image sensor when the imaging mode of the camera is changed, so as to complete the switching of pictures. The imaging processing unit comprises an imaging mode determining module, a switching circuit, a main imaging mode control module and an auxiliary imaging mode control module,
the imaging mode determining module is used for determining which imaging mode of the three imaging modes of the 2D visible light imaging mode, the 3D visible light imaging mode and the fluorescence imaging mode is used as a main imaging mode according to the imaging mode required by input, and simultaneously determining a main clock frequency of the main imaging mode, wherein the main clock frequency is an optimal working frequency of the imaging mode determined as the main imaging mode, and the other two imaging modes are used as auxiliary imaging modes.
The imaging system comprises 3 imaging modes, when one imaging mode is selected as the main imaging mode, the image sensor corresponding to the mode is the main image sensor, and the image sensors corresponding to the other auxiliary imaging modes are the auxiliary image sensors. Similarly, when the main mode is switched, the corresponding image sensor is also switched: that is, the original main image sensor is switched to the subsidiary image sensor, and the original subsidiary image sensor may be switched to the main image sensor. All image sensors not selected as the main image sensor operate as the auxiliary image sensor, and only one image sensor operates as the main image sensor at any time.
The 3 image sensors each have an optimal operating clock frequency, for example, the optimal operating clock frequency of the 2D visible light imaging mode image sensor 1 is denoted as a first operating clock frequency fp1, the optimal operating clock frequency of the 3D visible light imaging mode image sensor 2 is denoted as a second operating clock frequency fp2, and the optimal operating clock frequency of the fluorescence imaging mode image sensor 3 is denoted as a third operating clock frequency fp 3. When each image sensor works under the respective optimal working clock frequency, the optimal image effect can be obtained.
The 3 kinds of image sensors can also work at other clock frequencies than the optimal clock frequency, for example:
the clock frequency points at which the 2D visible light imaging mode image sensor 1 operates include a first operating clock frequency fp1, a second operating clock frequency fp2, and a third operating clock frequency fp 3. That is, the 2D visible imaging mode image sensor 1 can also operate at fp2, fp3 clock frequency points.
The clock frequency points at which the 3D visible light imaging mode image sensor 2 operates include a first operating clock frequency fp1, a second operating clock frequency fp2, and a third operating clock frequency fp 3. That is, the 3D visible imaging mode image sensor 2 can also operate at fp1, fp3 clock frequency points.
The clock frequency points at which the fluorescence imaging mode image sensor 3 operates include a first operating clock frequency fp1, a second operating clock frequency fp2, and a third operating clock frequency fp 3. That is, the fluorescence imaging mode image sensor 3 can also operate at fp1, fp2 clock frequency points.
Namely, the 3 image sensors can work at fp1, fp2 and fp3 clock frequency points. The characteristic ensures that the camera can normally image in various imaging modes, and provides various imaging information for users.
When the user switches the main mode as required, the selected imaging mode becomes a new main mode, and the optimal working frequency of the corresponding image sensor is the main clock frequency; and the operating clock of the image sensor in the auxiliary imaging mode needs to be seamlessly switched to the master clock frequency. When the user selects a new master mode next time, the master clock is switched through the clock switching circuit, and each image sensor works at the new master clock frequency.
That is, when one imaging mode is selected as the main imaging mode, the image sensor corresponding to the imaging mode is the main image sensor, and the image sensors corresponding to the other auxiliary imaging modes are the auxiliary image sensors. Similarly, when the main mode is switched, the corresponding image sensor is also switched: that is, the original main image sensor is switched to the subsidiary image sensor, and the original subsidiary image sensor may be switched to the main image sensor. All image sensors not selected as the main image sensor operate as the auxiliary image sensor, and only one image sensor operates as the main image sensor at any time.
As shown in fig. 3, the switching circuit is a clock switching circuit, and the switching circuit is configured to switch the auxiliary imaging mode to operate at the main clock frequency according to the switching of the main imaging mode to operate at the main clock frequency.
The main imaging mode module is used for operating the imaging mode at the determined main clock frequency according to the determined main imaging mode.
The auxiliary imaging mode module is used for operating the auxiliary imaging mode at the determined main clock frequency.
The camera adopts the unified power supply of the multi-image sensor to replace the conventional multi-image respective power supply mode, so that the circuit can be effectively simplified, and the volume of the camera is greatly reduced. In addition, due to the adoption of a uniform power supply mode, the problem of power supply interference is easy to occur, and the problem of unacceptable viewing is influenced by the appearance of horizontal stripes and the like on an image picture in serious cases. Therefore, a plurality of anti-interference measures are adopted during circuit design, and the interference problem is solved. The unified power supply unit is used for converting alternating current into direct current for output, and further subdividing the direct current for output into an analog power supply and a digital power supply; the analog power supply is connected with an analog circuit part of the image sensor circuit in an analog mode; the digital power supply is connected with a digital circuit part of the image sensor circuit and an imaging processing unit in a digital mode.
As shown in fig. 4, the unified power supply unit includes a power conversion circuit, an analog power output circuit, and a digital power output circuit, wherein:
the power conversion circuit is used for converting alternating current into direct current and outputting the direct current.
The analog power supply output circuit is used for transmitting the output direct current to an analog circuit in the video acquisition unit.
And the digital power supply output circuit is used for transmitting the output direct current to the digital circuits in the video acquisition unit and the imaging processing unit.
The power conversion circuit comprises an alternating current input stage, a power conversion stage and a direct current output stage which are connected in sequence.
The alternating current input stage comprises a power interface, a safety module, a high-frequency filtering module and a rectifying module which are connected in sequence. The three modules are connected in sequence to convert alternating current into direct current containing pulsating components.
The power supply conversion stage comprises an isolation transformer, a primary side electronic switch, a chip control module, a photoelectric isolation module and an overvoltage protection module, wherein the primary side of the isolation transformer, the primary side electronic switch, the chip control module, the photoelectric isolation module, the overvoltage protection module and the secondary side of the isolation transformer are sequentially connected, the primary side of the isolation transformer is connected with a rectification module, and the secondary side of the isolation transformer is connected with a direct current output stage. The stage realizes the functions of voltage reduction and current conversion through high-frequency chopping and voltage conversion of pulsating direct current, and is a key link for converting alternating current into direct current. The DC output provides 12V DC with less ripple and noise for the back-end circuit load. Until the AC-DC output is presented.
The direct current output stage comprises a power output module and an overcurrent protection module, one end of the overcurrent protection module is connected with the power output module, the other end of the overcurrent protection module is connected with the photoelectric isolation module, one end of the power output module is connected with the secondary side of the isolation transformer, and the other end of the power output module is connected with the analog power output circuit and the digital power output circuit respectively.
The analog power supply and the analog ground are connected with an analog circuit part of the A/D sampling circuit of the image sensor module;
the digital power supply is connected with a digital circuit part of the A/D sampling circuit of the image sensor module and an imaging processing unit in a digital mode.
As shown in fig. 5, the power supply unit is a schematic block diagram of a DC-DC power circuit, and the unified power supply unit includes an AC-DC conversion circuit, a first DC-DC conversion circuit, a first filter unit, a second DC-DC conversion circuit, a second filter unit, a third DC-DC conversion circuit, an analog power output circuit, and a digital power output circuit, where one end of the first DC-DC conversion circuit is connected to the AC-DC conversion circuit, the other end of the first DC-DC conversion circuit is connected to the first filter unit and the second filter unit, one end of the second DC-DC conversion circuit is connected to the first filter unit, the other end of the second DC-DC conversion circuit is connected to the digital power output circuit, and one end of the third DC-DC conversion circuit is connected to the second filter unit and the other end of the third DC-DC conversion circuit is connected to the analog power output circuit. The input of the first DC-DC conversion circuit is 12VDC, the output is 3.3VDC, and the output is subdivided into a digital power supply and an analog power supply. The first DC-DC conversion circuit outputs digital power supplies 1.2VDC and 1.8VDC and digital ground through the first filtering unit and the second DC-DC conversion circuit; the first DC-DC conversion circuit outputs 2.9VDC of an analog power supply and analog ground through the second filtering unit and the third DC-DC conversion circuit.
As shown in fig. 8, the switching circuit is a clock switching circuit, and the clock switching circuit includes a first switching module, a second switching module, and a third switching module, where:
the first switching module comprises a first trigger DFF1, a zero trigger DFF0, a first inverter, a first latch, a second latch, a third latch, a fourth latch and a fifth latch, wherein a first pin of the first latch is connected with a SELECT interface, a second pin of the first latch is connected with a second pin of the second latch through the first inverter, a second pin of the first latch is connected with a QN pin of the zero trigger DFF0, and a third pin of the first latch is connected with an S pin of the first trigger DFF 1. The R pin of the first flip-flop DFF1 is connected to the CLK1 interface and the second pin of the first latch three, the Q pin of the first flip-flop DFF1 is connected to the first pin of the first latch three, and the QN pin of the first flip-flop DFF1 is connected to the first pin of the first latch two. The pin S of the zero flip-flop DFF0 is connected with the pin III of the first latch II, the pin R of the zero flip-flop DFF0 is respectively connected with the interface CLK0 and the pin II of the first latch IV, and the pin Q of the zero flip-flop DFF0 is connected with the pin I of the first latch IV. And a third pin of the first latch is connected with a first pin of the first latch, and a third pin of the first latch is connected with a second pin of the first latch.
The second switching module comprises a third trigger DFF3, a second trigger DFF2, a second inverter, a first second latch, a third second latch, a fourth second latch and a fifth second latch, wherein a first pin of the first second latch is connected with a SELECT interface, a first pin of the first second latch is connected with a second pin of the second latch through the second inverter, a second pin of the first second latch is connected with a QN pin of the second trigger DFF2, and a third pin of the first second latch is connected with an S pin of the third trigger DFF 3. The pin R of the third flip-flop DFF3 is connected to the interface CLK3 and the pin two of the second latch three, the pin Q of the third flip-flop DFF3 is connected to the pin one of the second latch three, and the pin QN of the third flip-flop DFF3 is connected to the pin one of the second latch two. The S pin of the second flip-flop DFF2 is connected to the third pin of the second latch two, the R pin of the second flip-flop DFF2 is connected to the CLK2 interface and the second pin of the second latch four, respectively, and the Q pin of the second flip-flop DFF2 is connected to the first pin of the second latch four. And a third pin of the second latch III is connected with a first pin of the second latch V, and a third pin of the second latch IV is connected with a second pin of the second latch V.
The third switching module comprises a fifth flip-flop DFF5, a fourth flip-flop DFF4, a third inverter, a first third latch, a second third latch, a fourth third latch, and a fifth third latch, wherein a first pin of the first third latch is connected to a SELECT interface, a first pin of the first third latch is connected to a second pin of the second third latch through the third inverter, a second pin of the first third latch is connected to a QN pin of the fourth flip-flop DFF4, and a third pin of the first third latch is connected to an S pin of the fifth flip-flop DFF 5. The pin R of the fifth flip-flop DFF5 is connected to the pin one of the first latch and the pin two of the third latch, respectively, the pin Q of the fifth flip-flop DFF5 is connected to the pin one of the third latch, and the pin QN of the fifth flip-flop DFF5 is connected to the pin one of the third latch. An S pin of the fourth flip-flop DFF4 is connected to a third pin of a third latch two, an R pin of the fourth flip-flop DFF4 is connected to a first pin of a second latch five and a second pin of a third latch four, respectively, and a Q pin of the fourth flip-flop DFF4 is connected to a first pin of the third latch four. And a third pin of the third latch is connected with a first pin of the third latch, a third pin of the fourth latch is connected with a second pin of the third latch, and a third pin of the fifth latch is connected with an output interface.
The clock switching circuit adopts a seamless switching circuit of three clock sources, which is used for realizing the switching of the main clock and ensuring the optimal watching effect of a user.
The imaging capability of the microsurgical imaging system with 2D, 3D and fluorescence imaging is benefited by adopting 3 image sensor chips, namely: the three sensors provide imaging pictures for doctors in a main and auxiliary working mode, and the working efficiency of the doctors is greatly improved.
Due to the fact that the three image sensors can work at multiple clock frequencies, when a doctor needs a certain imaging mode, a good main mode is needed firstly, the clock switching circuit naturally adapts the optimal clock frequency for the selected image sensor, and then other image sensors work at the optimal clock frequency with the frequency as a reference. The clock switching circuit can ensure seamless switching of the clock, and is a circuit basis for realizing free switching of the imaging modes of the three image sensors.
A method of circuit design for a microsurgical imaging system with 2D, 3D and fluorescence imaging, comprising:
adopting a multilayer PCB board;
the power supply output of the power supply system is divided into an analog power supply, an analog ground, a digital power supply and a digital ground independently;
setting a digital ground and an analog ground on the surface of one layer of the PCB in a blocking manner;
arranging a digital power supply and an analog power supply on the surface of the other layer of PCB in blocks, and arranging a chamfer at the edge of the power supply;
processing important digital video signal packet;
a step of performing 100 ohm impedance matching on the important differential signal;
filtering and decoupling a power supply pin of the image sensor by using patch capacitors with different capacitance values;
fig. 6 shows the distribution diagram of the digital power supply and the analog power supply area of a certain layer of the PCB.
In the above, the analog power supply 60 and the digital power supply 50 are arranged on the surface of one layer of the multilayer PCB at intervals, and the analog power supply is connected to the analog power supply pin of the image sensor module a/D sampling circuit; the digital power supply is connected with a digital power supply pin of the A/D sampling circuit of the image sensor module and the imaging processing unit.
Figure 7 shows the digital and analog ground area distribution map of another layer of the PCB.
The other layer surface of the multilayer PCB board is provided with a block-shaped analog ground 20 and a block-shaped digital ground 10 at intervals, and the analog ground is connected with an analog ground pin of an A/D sampling circuit of the image sensor module; and the digital ground pin of the A/D sampling circuit of the image sensor module is connected with the core video processing system module digitally. The ground plane division also takes care of the chamfer design at the corners of the area, eliminating sharp corners and thereby reducing the occurrence of interference.
The camera circuit design method solves the problems that a plurality of image sensors are complex in power supply, interference is easy to generate and the like, and has the advantages of small size and small interference.
An imaging method for a microsurgical camera system with 2D, 3D and fluorescence imaging, comprising the steps of:
step 1, a user inputs one of a 2D visible light imaging mode, a 3D visible light imaging mode and a fluorescence imaging mode as a required imaging mode.
And 2, determining which imaging mode of the three imaging modes of the 2D visible light imaging mode, the 3D visible light imaging mode and the fluorescence imaging mode is used as a main imaging mode according to the required imaging mode input by the user, and simultaneously determining the main clock frequency of the main imaging mode, wherein the main clock frequency is the optimal working frequency of the imaging mode determined as the main imaging mode. The other two imaging modes serve as auxiliary imaging modes.
And 3, switching the main imaging mode to work at the main clock frequency and switching the auxiliary imaging mode to work at the main clock frequency by the switching circuit.
And 4, working the imaging mode at the determined main clock frequency according to the determined main imaging mode.
And 5, operating the auxiliary imaging mode at the determined main clock frequency.
The invention has multiple imaging modes, such as 2D ultrahigh-definition imaging, 3D ultrahigh-definition imaging, fluorescence imaging and other functions, has 4K ultrahigh-definition performance and is suitable for different operation scenes. When the system is used, images of multiple modes are fused into a secondary picture for a user to watch in real time, so that different information in a surgical scene is sensed.
The camera system has a main and auxiliary operating mode. Generally, a user uses a certain mode as a main mode, and the other modes are auxiliary modes. For example, when the fluorescence mode is the main mode, the 2D and 3D visible light imaging modes are the auxiliary modes. For example, when visible light imaging such as 2D and 3D is used as the main mode, the fluorescence mode is the auxiliary mode.
In general, the 2D and 3D visible light imaging modes and the fluorescence imaging mode of the camera can be switched between the main mode and the auxiliary mode according to the requirements of users. For example, the current camera uses a 2D and 3D visible light imaging mode as a main mode and a fluorescence imaging mode as an auxiliary mode; at the next moment, the fluorescence imaging mode can be used as a main mode, and the 2D and 3D visible light imaging modes can be used as auxiliary modes.
The invention solves the problem that the prior medical operation digital imaging application has the requirements of simultaneous imaging of a plurality of imaging modes, and the plurality of imaging modes can be switched between master and slave freely.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.

Claims (10)

1. A microsurgical imaging system with 2D, 3D and fluorescence imaging, characterized by: including input unit, video acquisition unit, formation of image processing unit, wherein:
the input unit is used for inputting a required imaging mode;
the video acquisition unit comprises a 2D visible light imaging mode image sensor (1), a 3D visible light imaging mode image sensor (2) and a fluorescence imaging mode image sensor (3), wherein the 2D visible light imaging mode image sensor (1) is used for acquiring operation pictures through a 2D visible light imaging mode under the control of an imaging processing unit to form a 2D visible light image, the 3D visible light imaging mode image sensor (2) is used for acquiring operation pictures through a 3D visible light imaging mode under the control of the imaging processing unit to form a 3D visible light image, and the fluorescence imaging mode image sensor (3) is used for acquiring the operation pictures through a fluorescence imaging mode under the control of the imaging processing unit to form a fluorescence image;
the imaging processing unit comprises an imaging mode determining module, a switching circuit, a main imaging mode control module and an auxiliary imaging mode control module,
the imaging mode determining module is used for determining which imaging mode of three imaging modes, namely a 2D visible light imaging mode, a 3D visible light imaging mode and a fluorescence imaging mode is used as a main imaging mode according to an imaging mode required by input, and simultaneously determining a main clock frequency of the main imaging mode, and using the other two imaging modes as auxiliary imaging modes;
the switching circuit is used for switching the main imaging mode to work on the main clock frequency and switching the auxiliary imaging mode to work on the main clock frequency;
the main imaging mode module is used for operating the imaging mode at the determined main clock frequency according to the determined main imaging mode;
the auxiliary imaging mode module is configured to operate an auxiliary imaging mode at the determined master clock frequency.
2. A microsurgical camera system with 2D, 3D and fluorescence imaging as claimed in claim 1, wherein: the optimal working clock frequency of the 2D visible light imaging mode image sensor (1) is recorded as a first working clock frequency fp1, the optimal working clock frequency of the 3D visible light imaging mode image sensor (2) is recorded as a second working clock frequency fp2, and the optimal working clock frequency of the fluorescence imaging mode image sensor (3) is recorded as a third working clock frequency fp 3;
the clock frequency points of the 2D visible light imaging mode image sensor (1) comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3;
the clock frequency points of the 3D visible light imaging mode image sensor (2) comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3;
the clock frequency points of the fluorescence imaging mode image sensor (3) comprise a first working clock frequency fp1, a second working clock frequency fp2 and a third working clock frequency fp 3.
3. A microsurgical imaging system with 2D, 3D and fluorescence imaging as claimed in claim 2, wherein: the master clock frequency is the optimal operating frequency for determining which imaging mode is the master imaging mode.
4. A microsurgical imaging system with 2D, 3D and fluorescence imaging as claimed in claim 3, wherein: the switching circuit comprises a first switching module, a second switching module and a third switching module, wherein:
the first switching module comprises a first trigger DFF1, a zero trigger DFF0, a first inverter, a first latch, a second latch, a third latch, a fourth latch and a fifth latch, wherein a first pin of the first latch is connected with a SELECT interface, a second pin of the first latch is connected with a second pin of the second latch through the first inverter, a second pin of the first latch is connected with a QN pin of the zero trigger DFF0, and a third pin of the first latch is connected with an S pin of the first trigger DFF 1; the R pin of the first trigger DFF1 is respectively connected with the CLK1 interface and the second pin of the first latch, the Q pin of the first trigger DFF1 is connected with the first pin of the first latch, and the QN pin of the first trigger DFF1 is connected with the first pin of the second latch; an S pin of the zero trigger DFF0 is connected with a third pin of a first latch, an R pin of the zero trigger DFF0 is respectively connected with a CLK0 interface and a second pin of a first latch, and a Q pin of the zero trigger DFF0 is connected with a first pin of the first latch; a pin III of the first latch III is connected with a pin I of the first latch V, and a pin III of the first latch IV is connected with a pin II of the first latch V;
the second switching module comprises a third trigger DFF3, a second trigger DFF2, a second inverter, a first second latch, a second latch, a third second latch, a fourth second latch and a fifth second latch, wherein a first pin of the first second latch is connected with a SELECT interface, a first pin of the first second latch is connected with a second pin of the second latch through the second inverter, a second pin of the first second latch is connected with a QN pin of the second trigger DFF2, and a third pin of the first second latch is connected with an S pin of the third trigger DFF 3; the pin R of the third flip-flop DFF3 is respectively connected with the interface CLK3 and the pin II of the second latch III, the pin Q of the third flip-flop DFF3 is connected with the pin I of the second latch III, and the pin QN of the third flip-flop DFF3 is connected with the pin I of the second latch II; the S pin of the second trigger DFF2 is connected with the third pin of the second latch II, the R pin of the second trigger DFF2 is respectively connected with the CLK2 interface and the second pin of the second latch IV, and the Q pin of the second trigger DFF2 is connected with the first pin of the second latch IV; a pin III of the second latch III is connected with a pin I of the second latch V, and a pin III of the second latch IV is connected with a pin II of the second latch V;
the third switching module comprises a fifth flip-flop DFF5, a fourth flip-flop DFF4, a third inverter, a first third latch, a second third latch, a fourth third latch and a fifth third latch, wherein a first pin of the first third latch is connected with a SELECT interface, a first pin of the first third latch is connected with a second pin of the second third latch through the third inverter, a second pin of the first third latch is connected with a QN pin of the fourth flip-flop DFF4, and a third pin of the first third latch is connected with an S pin of the fifth flip-flop DFF 5; an R pin of the fifth flip-flop DFF5 is connected to a first pin of a first latch and a second pin of a third latch, respectively, a Q pin of the fifth flip-flop DFF5 is connected to a first pin of the third latch, and a QN pin of the fifth flip-flop DFF5 is connected to a first pin of the third latch; an S pin of the fourth flip-flop DFF4 is connected with a third pin of a third latch II, an R pin of the fourth flip-flop DFF4 is respectively connected with a first pin of a second latch fifth and a second pin of a third latch fourth, and a Q pin of the fourth flip-flop DFF4 is connected with a first pin of the third latch fourth; and a third pin of the third latch is connected with a first pin of the third latch, a third pin of the fourth latch is connected with a second pin of the third latch, and a third pin of the fifth latch is connected with an output interface.
5. The microsurgical imaging system with 2D, 3D and fluorescence imaging of claim 4, wherein: the power supply device comprises a unified power supply unit, wherein the unified power supply unit comprises an AC-DC conversion circuit, a first DC-DC conversion circuit, a first filtering unit, a second DC-DC conversion circuit, a second filtering unit, a third DC-DC conversion circuit, an analog power output circuit and a digital power output circuit, one end of the first DC-DC conversion circuit is connected with the AC-DC conversion circuit, the other end of the first DC-DC conversion circuit is respectively connected with the first filtering unit and the second filtering unit, one end of the second DC-DC conversion circuit is connected with the first filtering unit, the other end of the second DC-DC conversion circuit is connected with the digital power output circuit, one end of the third DC-DC conversion circuit is connected with the second filtering unit, and the other end of the third DC-DC conversion circuit is connected with the analog power output circuit.
6. The microsurgical imaging system with 2D, 3D and fluorescence imaging of claim 4, wherein: including unified power supply unit, unified power supply unit includes power conversion circuit, analog power output circuit, digital power output circuit, wherein:
the power supply conversion circuit is used for converting alternating current into direct current and outputting the direct current;
the analog power supply output circuit is used for transmitting the output direct current to an analog circuit in the video acquisition unit;
and the digital power supply output circuit is used for transmitting the output direct current to the digital circuits in the video acquisition unit and the imaging processing unit.
7. The microsurgical imaging system with 2D, 3D and fluorescence imaging of claim 6, wherein: the power conversion circuit comprises an alternating current input stage, a power conversion stage and a direct current output stage which are connected in sequence;
the alternating current input stage comprises a power interface, a safety module, a high-frequency filtering module and a rectifying module which are connected in sequence;
the power supply conversion stage comprises an isolation transformer, a primary side electronic switch, a chip control module, a photoelectric isolation module and an overvoltage protection module, wherein the primary side of the isolation transformer, the primary side electronic switch, the chip control module, the photoelectric isolation module, the overvoltage protection module and the secondary side of the isolation transformer are sequentially connected, the primary side of the isolation transformer is connected with the rectification module, and the secondary side of the isolation transformer is connected with the direct current output stage;
the direct current output stage comprises a power output module and an overcurrent protection module, one end of the overcurrent protection module is connected with the power output module, the other end of the overcurrent protection module is connected with the photoelectric isolation module, one end of the power output module is connected with the secondary side of the isolation transformer, and the other end of the power output module is connected with the analog power output circuit and the digital power output circuit respectively.
8. An imaging method based on the microsurgical imaging system with 2D, 3D and fluorescence imaging of claim 1, characterized in that it comprises the following steps:
step 1, a user inputs one of a 2D visible light imaging mode, a 3D visible light imaging mode and a fluorescence imaging mode as a required imaging mode;
step 2, determining which imaging mode of three imaging modes, namely a 2D visible light imaging mode, a 3D visible light imaging mode and a fluorescence imaging mode, is used as a main imaging mode according to a required imaging mode input by a user, simultaneously determining the main clock frequency of the main imaging mode, and using the other two imaging modes as auxiliary imaging modes;
step 3, the switching circuit switches the main imaging mode to work on the main clock frequency and switches the auxiliary imaging mode to work on the main clock frequency;
step 4, working the imaging mode on the determined main clock frequency according to the determined main imaging mode;
and 5, operating the auxiliary imaging mode at the determined main clock frequency.
9. The imaging method according to claim 8, characterized in that: the master clock frequency is the optimal operating frequency for determining which imaging mode is the master imaging mode.
10. A switching circuit, characterized by: including first switching module, second switching module, third switching module, wherein:
the first switching module comprises a first trigger DFF1, a zero trigger DFF0, a first inverter, a first latch I, a second latch I, a third latch I, a fourth latch I and a fifth latch I, wherein a first pin I of the first latch I is connected with a SELECT interface, a first pin I of the first latch I is connected with a second pin of the first latch II through the first inverter, a second pin of the first latch I is connected with a QN pin of the zero trigger DFF0, and a third pin of the first latch I is connected with an S pin of the first trigger DFF 1; the R pin of the first trigger DFF1 is respectively connected with the CLK1 interface and the second pin of the first latch, the Q pin of the first trigger DFF1 is connected with the first pin of the first latch, and the QN pin of the first trigger DFF1 is connected with the first pin of the second latch; an S pin of the zero trigger DFF0 is connected with a third pin of a first latch, an R pin of the zero trigger DFF0 is respectively connected with a CLK0 interface and a second pin of a first latch, and a Q pin of the zero trigger DFF0 is connected with a first pin of the first latch; a pin III of the first latch III is connected with a pin I of the first latch V, and a pin III of the first latch IV is connected with a pin II of the first latch V;
the second switching module comprises a third trigger DFF3, a second trigger DFF2, a second inverter, a first second latch, a second latch, a third second latch, a fourth second latch and a fifth second latch, wherein a first pin of the first second latch is connected with a SELECT interface, a first pin of the first second latch is connected with a second pin of the second latch through the second inverter, a second pin of the first second latch is connected with a QN pin of the second trigger DFF2, and a third pin of the first second latch is connected with an S pin of the third trigger DFF 3; the pin R of the third flip-flop DFF3 is respectively connected with the interface CLK3 and the pin II of the second latch III, the pin Q of the third flip-flop DFF3 is connected with the pin I of the second latch III, and the pin QN of the third flip-flop DFF3 is connected with the pin I of the second latch II; the S pin of the second trigger DFF2 is connected with the third pin of the second latch II, the R pin of the second trigger DFF2 is respectively connected with the CLK2 interface and the second pin of the second latch IV, and the Q pin of the second trigger DFF2 is connected with the first pin of the second latch IV; a pin III of the second latch III is connected with a pin I of the second latch V, and a pin III of the second latch IV is connected with a pin II of the second latch V;
the third switching module comprises a fifth flip-flop DFF5, a fourth flip-flop DFF4, a third inverter, a first third latch, a second third latch, a fourth third latch and a fifth third latch, wherein a first pin of the first third latch is connected with a SELECT interface, a first pin of the first third latch is connected with a second pin of the second third latch through the third inverter, a second pin of the first third latch is connected with a QN pin of the fourth flip-flop DFF4, and a third pin of the first third latch is connected with an S pin of the fifth flip-flop DFF 5; an R pin of the fifth flip-flop DFF5 is connected to a first pin of a first latch and a second pin of a third latch, respectively, a Q pin of the fifth flip-flop DFF5 is connected to a first pin of the third latch, and a QN pin of the fifth flip-flop DFF5 is connected to a first pin of the third latch; an S pin of the fourth flip-flop DFF4 is connected with a third pin of a third latch II, an R pin of the fourth flip-flop DFF4 is respectively connected with a first pin of a second latch fifth and a second pin of a third latch fourth, and a Q pin of the fourth flip-flop DFF4 is connected with a first pin of the third latch fourth; and a pin III of the third latch III is connected with a pin I of the third latch V, a pin III of the third latch IV is connected with a pin II of the third latch V, and a pin III of the second latch V is connected with an output interface.
CN202210266705.2A 2022-03-18 2022-03-18 Microsurgery image pickup system with switchable imaging modes, microsurgery image pickup method and switching circuit Pending CN114938440A (en)

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CN101135921A (en) * 2007-10-10 2008-03-05 威盛电子股份有限公司 Multiple clock switching mechanism and switch method thereof
CN108233894A (en) * 2018-01-24 2018-06-29 合肥工业大学 A kind of low-power consumption dual-edge trigger based on duplication redundancy
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