CN114935681A - Load current detection circuit, step-down converter, and load current detection method - Google Patents
Load current detection circuit, step-down converter, and load current detection method Download PDFInfo
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R19/0092—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring current only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0009—Devices or circuits for detecting current in a converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a load current detection circuit, which is used for carrying out load current detection on a switching power supply buck converter circuit, wherein the switching power supply buck converter circuit comprises a switching power tube; the switching power tube comprises an upper tube and a lower tube; the method comprises the following steps: the device comprises a current detection module, a current sampling module, a signal input module, a sampling time generation module and a driving module; the output of signal input module is connected the input of sampling time generation module, the output of sampling time generation module is connected the input of current sampling module, the output of signal input module still is connected the input of drive module, the output of drive module is connected the grid of low tube, the drain electrode and the source electrode of low tube are connected respectively the first input and the second input of current detection module, the output of current detection module is connected the input of current sampling module.
Description
Technical Field
The present invention relates to the field of circuit control, and in particular, to a load current detection circuit, a buck converter, and a load current detection method.
Background
At present, most of buck converters requiring a multiphase mode generally supply power to a core of a CPU and an MCU, and the current is large and the voltage is small, so the duty ratio of a general switching power tube is small, and no matter in a control method such as voltage mode control, current mode control or COT, if the current is detected when an upper tube is conducted, the detection time may be insufficient, and the detected current is an inductive current with ripples, and the magnitude of the load current cannot be directly detected.
Disclosure of Invention
The invention provides a load current detection method and a load current detection circuit, which are used for solving the problems that the detection time is not enough and the magnitude of the load current cannot be directly detected due to the fact that the current is detected when a top tube is conducted.
According to a first aspect of the present invention, there is provided a load current detection circuit for performing load current detection on a switching power supply buck converter circuit, wherein the switching power supply buck converter circuit comprises a switching power transistor; the switching power tube comprises an upper tube and a lower tube; the method comprises the following steps: the device comprises a current detection module, a current sampling module, a signal input module, a sampling time generation module and a driving module;
the output end of the signal input module is connected with the input end of the sampling time generation module, the output end of the sampling time generation module is connected with the input end of the current sampling module, the output end of the signal input module is also connected with the input end of the driving module, the output end of the driving module is connected with the grid electrode of the lower tube, the drain electrode and the source electrode of the lower tube are respectively connected with the first input end and the second input end of the current detection module, and the output end of the current detection module is connected with the input end of the current sampling module;
the sampling time generation module is used for determining a sampling time point of the load current;
the driving module is used for controlling the on-off of a lower tube of the switching power tube;
the current detection module is used for detecting inductive current information on the lower tube of the switching power tube in a preset period in the process of conducting the lower tube; the inductive current information is presented in a triangular waveform;
the current sampling module is used for sampling the detected inductive current information at the load current sampling time point to obtain the required load current information; wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
Optionally, the sampling time generation module includes: the first current source, the second current source, the third current source, the first capacitor, the second capacitor, the comparator, the first NOR gate, the second NOR gate, or the OR gate; the first NOR gate is used as a signal output end and used for outputting an output signal;
the input end of the first current source is connected with a power supply voltage, the output end of the first current source is connected with the first end of the first switch, the second end of the first switch is connected with the first end of the second switch, the control end of the first switch is connected with the output end of the first AND gate, the first input end of the first AND gate is connected with the first logic signal after phase inversion, the second input end of the first AND gate is connected with the output signal after phase inversion, the second end of the second switch is connected with the input end of the second current source, the output end of the second current source is grounded, the control end of the second switch is connected with the output end of the second AND gate, and the first input end of the second AND gate is connected with the first logic signal after phase inversion; the second input end of the second and gate is connected to the output signal, the second end of the first switch is further connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the second end of the first switch is further connected to the positive phase end of the comparator, the negative phase input end of the comparator is connected to the output end of the third current source, the input end of the third current source is connected to the power supply voltage, the output end of the third current source is further connected to the first end of the second capacitor, the second end of the second capacitor is grounded, the first end and the second end of the third switch are respectively connected to the first end and the second end of the second capacitor, the control end of the third switch is connected to the output end of the or gate, the second input end of the or gate is connected to the first input end of the first nor gate and the output end of the second nor gate, and the first input end of the or gate is connected to the first logic signal, the first input end of the OR gate is connected with the first input end of the second NOR gate, and the second input end of the second NOR gate is connected with the output signal; and the second input end of the first NOR gate is connected with the output end of the comparator.
Optionally, the current sampling module includes: the third AND gate, the NOT gate, the fourth switch, the fifth switch, the third capacitor and the fourth capacitor;
the first input end of the third and gate is connected with the inverted first logic signal, the second input end of the third and gate is connected with the output signal, the second input end of the third and gate is further connected with the input end of the not gate, the output end of the third and gate is connected with the control end of the fourth switch, the first end of the fourth switch is used for receiving inductive current information, the second end of the fourth switch is connected with the first end of the third capacitor, the second end of the third capacitor is grounded, the second end of the fourth switch is further connected with the first end of the fifth switch, the control end of the fifth switch is connected with the output end of the not gate, the second end of the fifth switch is connected with the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, and the second end of the fifth switch is further used for outputting load current information.
According to a second aspect of the present invention, there is provided a buck converter comprising the first aspect and optionally the load current detection circuit.
According to a third aspect of the present invention, there is provided a load current detection method, using the first aspect and the optional load current detection circuit thereof, for detecting load current information of a switching power supply buck converter circuit of a switching power transistor operating in a continuous conduction mode; the method comprises the following steps:
s1: determining a load current sampling time point;
s2: detecting inductor current information during the lower tube conduction period of the switching power tube; the inductor current information represents current information flowing through the inductor, and the inductor current information is presented in a triangular waveform;
s3: sampling the inductive current information at the load current sampling time point, and taking the obtained current information as the required load current information; wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
Optionally, step S1 includes:
s11: acquiring sampling waveforms, wherein the sampling waveforms comprise triangular waveforms of inductive current, sampling waveforms of high-side conduction signals and sampling waveforms of low-side conduction signals of a switching power tube;
s12: and acquiring a middle point when the sampling waveform of the high-side conduction signal is at a low level, and determining the middle point as the sampling time point of the load current.
Optionally, the obtaining of the midpoint when the sampling waveform of the high-side conduction signal in step S12 is at the low level includes:
s121: acquiring a sampling waveform of a signal output end in the sampling time generation module; the sampling time generation module is used for determining a load current sampling time point;
s122: and determining the falling edge of the sampling waveform of the signal output end as the load current sampling time point.
Optionally, step S3 includes:
s31: dividing the falling edge of the sampling waveform of the signal output end into a first falling edge and a second falling edge equally;
s32: and sampling the load current information onto the third capacitor in the first falling edge, wherein the third capacitor is used for storing the signal of the load current information.
Optionally, step S32 is followed by:
s33: and stopping sampling the load current information at the terminal of the first falling edge so as to retain the load current information on the third capacitor.
Optionally, step S33 is followed by:
s34: and in the second falling edge, sending the load current information on the third capacitor to the fourth capacitor, wherein the fourth capacitor is used for storing a stable signal of the load current information.
According to the load current detection circuit, the buck converter and the load current detection method, the current on the lower tube of the switching power tube is detected, so that the detection time is prolonged, the detection accuracy is improved, and the inductive current can be further obtained; in addition, the current on the lower tube of the switching power tube is detected, and an additional device does not need to be inserted into an original load current detection circuit.
And in a preferred embodiment, since the detected current is an inductor current with ripple, the present invention can realize that the inductor current with ripple is converted into a magnitude capable of representing the load current.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a load current detection circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a sampling time generation module in the load current detection circuit according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a current sampling module in the load current detection circuit according to an embodiment of the present invention;
FIG. 4 is a first flowchart of a load current detection method according to an embodiment of the present invention;
FIG. 5 is a second flowchart of a load current detection method according to an embodiment of the present invention;
FIG. 6 is a third flowchart of a load current detection method according to an embodiment of the present invention;
FIG. 7 is a fourth flowchart of a load current detection method according to an embodiment of the present invention;
FIG. 8 is a first exemplary sampling waveform according to an embodiment of the present invention;
FIG. 9 is a second exemplary sampling waveform of the present invention;
description of the reference numerals:
101-upper pipe;
102-a lower tube;
2-a current detection module;
3-a current sampling module;
301-third and gate;
302-not gate;
303-a fourth switch;
304-a fifth switch;
305-a third capacitance;
306-a fourth capacitance;
4-a signal input module;
5-a sampling time generation module;
501-a first and gate;
502-second and gate;
503-a first switch;
504-a second switch;
505-a third switch;
506-a first current source;
507-a second current source;
508-a third current source;
509 — a first capacitance;
510-a second capacitance;
511-a comparator;
512-a first nor gate;
513-a second nor gate;
514-or gate;
6-driving the module.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Moreover, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Referring to fig. 1, the present invention provides a load current detection circuit for detecting a load current of a switching power supply buck converter circuit, wherein the switching power supply buck converter circuit includes a switching power transistor; the switching power tube includes an upper tube 101 and a lower tube 102; the method comprises the following steps: the device comprises a current detection module 2, a current sampling module 3, a signal input module 4, a sampling time generation module 5 and a driving module 6;
the output end of the signal input module 4 is connected to the input end of the sampling time generation module 5, the output end of the sampling time generation module 5 is connected to the input end of the current sampling module 3, the output end of the signal input module 4 is further connected to the input end of the driving module 6, the output end of the driving module 6 is connected to the gate of the lower tube 102, the drain and the source of the lower tube 102 are respectively connected to the first input end and the second input end of the current detection module 2, and the output end of the current detection module 2 is connected to the input end of the current sampling module 3;
the sampling time generation module 5 is used for determining a sampling time point of the load current;
the driving module 6 is used for controlling the on-off of a lower tube of the switching power tube;
the current detection module 2 is configured to detect inductive current information on the lower tube of the switching power tube in a preset period in a process of conducting the lower tube; the inductive current information is presented in a triangular waveform;
the current sampling module 3 is configured to sample the detected inductor current information at the load current sampling time point to obtain required load current information; wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
Referring to fig. 2, regarding the sampling time generation module 5, the sampling time generation module 5 includes: a first and gate 501, a second and gate 502, a first switch 503, a second switch 504, a third switch 505, a first current source 506, a second current source 507, a third current source 508, a first capacitor 509, a second capacitor 510, a comparator 511, a first nor gate 512, a second nor gate 513, or a gate 514; the first nor gate 512 serves as a signal output terminal for outputting an output signal;
the input end of the first current source 506 is connected with a power supply voltage, the output end of the first current source 506 is connected with the first end of the first switch 503, the second end of the first switch 503 is connected with the first end of the second switch 504, the control end of the first switch 503 is connected with the output end of the first and gate 501, the first input end of the first and gate 501 is connected with the inverted first logic signal, the second input end of the first and gate 501 is connected with the inverted output signal, the second end of the second switch 504 is connected with the input end of the second current source 507, the output end of the second current source 507 is grounded, the control end of the second switch 504 is connected with the output end of the second and gate 502, and the first input end of the second and gate 502 is connected with the inverted first logic signal; the second input end of the second and gate 502 is connected to the output signal, the second end of the first switch 503 is further connected to the first end of the first capacitor 509, the second end of the first capacitor 509 is grounded, the second end of the first switch 503 is further connected to the non-inverting end of the comparator 511, the inverting input end of the comparator 511 is connected to the output end of the third current source 508, the input end of the third current source 508 is connected to the power supply voltage, the output end of the third current source 508 is further connected to the first end of the second capacitor 510, the second end of the second capacitor 510 is grounded, the first end and the second end of the third switch 505 are respectively connected to the first end and the second end of the second capacitor 510, the control end of the third switch 505 is connected to the output end of the or gate 514, the second input end of the or gate 514 is connected to the first input end of the first nor gate 512 and the output end of the second nor gate 513, a first input terminal of the or gate 514 is connected to a first logic signal, a first input terminal of the or gate 514 is connected to a first input terminal of the second nor gate 513, and a second input terminal of the second nor gate 513 is connected to an output signal; a second input of the first nor gate 512 is connected to the output of the comparator 511.
In a specific embodiment, please refer to fig. 2 and 9, fig. 9 is a waveform of the sampling time generation module during a sampling process, the sampling time generation module has a negative feedback control, and an input signal in is an upper tube conduction control signal of the buck converter; when the input signal in is high, ramp is pulled low, the output signal out goes high, pd and pu signals are both low, and the comp voltage is maintained; when the input signal goes low, ramp starts to be charged, and if the ramp signal cannot be higher than the comp signal during the period when the input signal is low, the out signal output is always high, so that the pd signal is always high, the pu signal is always low, and the comp signal starts to go low. When the loop in the sampling time generation module needs to be balanced, the time when the pu signal and the pd signal are high needs to be the same, that is, rst becomes high at the middle point when the input signal is low, and the output signal out becomes low; the falling edge of the output signal out is thus the required midpoint information.
In the above scheme, when the signal is high, the waveform is a rising edge, and when the signal is low, the waveform is a falling edge.
Referring to fig. 3, the current sampling module 3 includes: a third and gate 301, a not gate 302, a fourth switch 303, a fifth switch 304, a third capacitor 305, and a fourth capacitor 306;
a first input end of the third and gate 301 is connected to the inverted first logic signal, a second input end of the third and gate 301 is connected to the output signal, the second input terminal of the third and gate 301 is further connected to the input terminal of the not gate 302, the output terminal of the third and gate 301 is connected to the control terminal of the fourth switch 303, a first terminal of the fourth switch 303 is configured to receive inductor current information, a second terminal of the fourth switch 303 is connected to a first terminal of the third capacitor 305, a second terminal of the third capacitor 305 is connected to ground, a second terminal of the fourth switch 303 is further connected to a first terminal of the fifth switch 304, a control terminal of the fifth switch 304 is connected to the output terminal of the not-gate 302, a second terminal of the fifth switch 304 is connected to a first terminal of the fourth capacitor 306, a second terminal of the fourth capacitor 306 is grounded, and a second terminal of the fifth switch 304 is further used for outputting load current information.
The invention also provides a buck converter which comprises the load current detection circuit.
Referring to fig. 4, the present invention provides a load current detection method, which utilizes the above-mentioned load current detection circuit to detect load current information of the switching power supply buck converter circuit of the switching power tube operating in the continuous conduction mode; the method comprises the following steps:
s1: determining a load current sampling time point;
s2: detecting inductor current information during the lower tube conduction period of the switching power tube;
the inductor current information represents current information flowing through the inductor, and the inductor current information is presented in a triangular waveform;
s3: sampling the inductive current information at the load current sampling time point, and taking the obtained current information as the required load current information;
wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
In the above scheme, most of buck converters requiring a multiphase mode supply power to a core of a CPU or an MCU, and since the current and voltage of the buck converters are large, the duty ratio of a general switch is small, and thus no matter the control method of voltage mode control, current mode control, or COT, if the current is detected when an upper tube is turned on, the detection time may be insufficient, the detection time is extended, the detection accuracy is improved, and further, an inductive current can be obtained by detecting the current on a lower tube of a switching power tube; in addition, the current on the lower tube of the switching power tube is detected, and an additional device does not need to be inserted into an original load current detection circuit.
Referring to fig. 5, step S1 includes:
s11: acquiring sampling waveforms, wherein the sampling waveforms comprise triangular waveforms of inductive current, sampling waveforms of high-side conduction signals and sampling waveforms of low-side conduction signals of a switching power tube;
s12: and acquiring a middle point when the sampling waveform of the high-side conduction signal is at a low level, and determining the middle point as the sampling time point of the load current.
Referring to fig. 8, fig. 8 is a sampling waveform diagram, in the buck converter, since the inductor is always connected to the output, that is, the average value of the inductor current is the output current, and since the inductor current is a triangular wave, the output current can be represented by the information as long as the inductor current is at the midpoint of the falling slope of the sampling triangular wave; since the inductor is outside the load detection circuit and cannot be directly detected, the current of the inductor is represented by detecting the current of the lower tube, namely the middle point of the falling slope of the triangular wave is the middle point when the high-side conduction signal is low.
The high-side conduction signal is represented as a conduction signal of a lower tube of the switching power tube, and the low-side conduction signal is represented as a conduction signal of an upper tube of the switching power tube.
Referring to fig. 6, the obtaining of the midpoint when the sampling waveform of the high-side on signal in step S12 is at the low level includes:
s121: acquiring a sampling waveform of a signal output end in the sampling time generation module;
the sampling time generation module is used for determining a load current sampling time point;
s122: and determining the falling edge of the sampling waveform of the signal output end as the load current sampling time point.
Referring to fig. 7, step S3 includes:
s31: dividing the falling edge of the sampling waveform of the signal output end into a first falling edge and a second falling edge equally;
s32: and sampling the load current information onto the third capacitor in the first falling edge, wherein the third capacitor is used for storing the signal of the load current information.
In one embodiment, please continue to refer to fig. 7, after step S32, the method further includes:
s33: and stopping sampling the load current information at the terminal of the first falling edge so as to retain the load current information on the third capacitor.
In other embodiments, please continue to refer to fig. 7, after step S33, the method further includes:
s34: sending the load current information on the third capacitor to the fourth capacitor within the second falling edge;
wherein the fourth capacitor is used for storing a stable signal of load current information.
The accuracy of the load current detection method in the scheme can be ensured only when the buck converter works in a continuous conduction mode CCM; if in the discontinuous conduction mode DCM, the down tube is turned off when the inductor current is zero, and the inductor current detected at this time cannot completely represent the load current.
In a specific embodiment, the above detection accuracy when the buck converter has entered the discontinuous conduction mode DCM has no requirement, and it is only necessary to enable the buck converter to switch from the PFM operation mode to the PWM operation mode when the load current increases next time.
And when this switching needs to occur, the buck converter is already operating in continuous conduction mode CCM; in addition, even when the PWM controller operates in the discontinuous conduction mode DCM, the detected current value is higher than the predetermined switching threshold, which means that the PWM controller needs to switch to the PWM mode.
In other embodiments, the detected current of each phase in the multi-phase buck converter may be summarized in an analog manner, or may be converted into digital signals by an ADC for addition, and when a channel is cut off, the detected current information of the channel is set to zero, and when a channel is added, the detected current information of the channel is added.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A load current detection circuit is used for carrying out load current detection on a switching power supply buck converter circuit, wherein the switching power supply buck converter circuit comprises a switching power tube; the switching power tube comprises an upper tube and a lower tube; it is characterized by comprising: the device comprises a current detection module, a current sampling module, a signal input module, a sampling time generation module and a driving module;
the output end of the signal input module is connected with the input end of the sampling time generation module, the output end of the sampling time generation module is connected with the input end of the current sampling module, the output end of the signal input module is also connected with the input end of the driving module, the output end of the driving module is connected with the grid electrode of the lower tube, the drain electrode and the source electrode of the lower tube are respectively connected with the first input end and the second input end of the current detection module, and the output end of the current detection module is connected with the input end of the current sampling module;
the sampling time generation module is used for determining a sampling time point of the load current;
the driving module is used for controlling the on-off of a lower tube of the switching power tube;
the current detection module is used for detecting inductive current information on the lower tube of the switching power tube in a preset period in the process of conducting the lower tube; the inductive current information is presented in a triangular waveform;
the current sampling module is used for sampling the detected inductive current information at the load current sampling time point to obtain the required load current information; wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
2. The load current detection circuit of claim 1, wherein the sampling time generation module comprises: the first current source, the second current source, the third current source, the first capacitor, the second capacitor, the comparator, the first NOR gate, the second NOR gate, or the OR gate; the first NOR gate is used as a signal output end and used for outputting an output signal;
the input end of the first current source is connected with a power supply voltage, the output end of the first current source is connected with the first end of the first switch, the second end of the first switch is connected with the first end of the second switch, the control end of the first switch is connected with the output end of the first AND gate, the first input end of the first AND gate is connected with the first logic signal after phase inversion, the second input end of the first AND gate is connected with the output signal after phase inversion, the second end of the second switch is connected with the input end of the second current source, the output end of the second current source is grounded, the control end of the second switch is connected with the output end of the second AND gate, and the first input end of the second AND gate is connected with the first logic signal after phase inversion; the second input end of the second and gate is connected to the output signal, the second end of the first switch is further connected to the first end of the first capacitor, the second end of the first capacitor is grounded, the second end of the first switch is further connected to the positive phase end of the comparator, the negative phase input end of the comparator is connected to the output end of the third current source, the input end of the third current source is connected to the power supply voltage, the output end of the third current source is further connected to the first end of the second capacitor, the second end of the second capacitor is grounded, the first end and the second end of the third switch are respectively connected to the first end and the second end of the second capacitor, the control end of the third switch is connected to the output end of the or gate, the second input end of the or gate is connected to the first input end of the first nor gate and the output end of the second nor gate, and the first input end of the or gate is connected to the first logic signal, the first input end of the OR gate is connected with the first input end of the second NOR gate, and the second input end of the second NOR gate is connected with the output signal; and the second input end of the first NOR gate is connected with the output end of the comparator.
3. The load current detection circuit of claim 2, wherein the current sampling module comprises: the first switch is connected with the first and gate;
the first input end of the third and gate is connected with the inverted first logic signal, the second input end of the third and gate is connected with the output signal, the second input end of the third and gate is further connected with the input end of the not gate, the output end of the third and gate is connected with the control end of the fourth switch, the first end of the fourth switch is used for receiving inductive current information, the second end of the fourth switch is connected with the first end of the third capacitor, the second end of the third capacitor is grounded, the second end of the fourth switch is further connected with the first end of the fifth switch, the control end of the fifth switch is connected with the output end of the not gate, the second end of the fifth switch is connected with the first end of the fourth capacitor, the second end of the fourth capacitor is grounded, and the second end of the fifth switch is further used for outputting load current information.
4. A buck converter comprising the load current detection circuit of any one of claims 1 to 3.
5. A load current detection method, characterized in that, the load current detection circuit of any one of claims 1-3 is used to detect the load current information of the switching power supply buck converter circuit of the switching power tube working in the continuous conduction mode; the method comprises the following steps:
s1: determining a load current sampling time point;
s2: detecting inductor current information during the lower tube conduction period of the switching power tube; the inductor current information represents current information flowing through the inductor, and the inductor current information is presented in a triangular waveform;
s3: sampling the inductive current information at the load current sampling time point, and taking the obtained current information as the required load current information; wherein the load current sampling time point is characterized as a midpoint of a falling edge of the triangular waveform.
6. The load current detection method according to claim 5, wherein step S1 includes:
s11: acquiring sampling waveforms, wherein the sampling waveforms comprise triangular waveforms of inductive current, sampling waveforms of high-side conduction signals and sampling waveforms of low-side conduction signals of a switching power tube;
s12: and acquiring a middle point when the sampling waveform of the high-side conduction signal is at a low level, and determining the middle point as the sampling time point of the load current.
7. The load current detection method according to claim 6, wherein the obtaining of the midpoint when the sampled waveform of the high-side conduction signal is at the low level in step S12 includes:
s121: acquiring a sampling waveform of a signal output end in the sampling time generation module; the sampling time generation module is used for determining a load current sampling time point;
s122: and determining the falling edge of the sampling waveform of the signal output end as the load current sampling time point.
8. The load current detection method according to claim 7, wherein step S3 includes:
s31: dividing the falling edge of the sampling waveform of the signal output end into a first falling edge and a second falling edge;
s32: and sampling the load current information onto the third capacitor in the first falling edge, wherein the third capacitor is used for storing a signal of the load current information.
9. The load current detection method according to claim 8, further comprising, after step S32:
s33: and stopping sampling the load current information at the terminal of the first falling edge so as to retain the load current information on the third capacitor.
10. The load current detection method according to claim 9, further comprising, after step S33:
s34: and in the second falling edge, sending the load current information on the third capacitor to the fourth capacitor, wherein the fourth capacitor is used for storing a stable signal of the load current information.
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