CN114927158A - Memristor state detection method and memristor read-write device - Google Patents

Memristor state detection method and memristor read-write device Download PDF

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Publication number
CN114927158A
CN114927158A CN202210674740.8A CN202210674740A CN114927158A CN 114927158 A CN114927158 A CN 114927158A CN 202210674740 A CN202210674740 A CN 202210674740A CN 114927158 A CN114927158 A CN 114927158A
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Prior art keywords
memristor
state
read
module
resistance
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CN202210674740.8A
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Inventor
王浩
郑卓成
沈谅平
马国坤
万厚钊
饶毅恒
桃李
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Hubei University
Hubei Jiangcheng Laboratory
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Hubei University
Hubei Jiangcheng Laboratory
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Priority to CN202210674740.8A priority Critical patent/CN114927158A/en
Publication of CN114927158A publication Critical patent/CN114927158A/en
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0097—Erasing, e.g. resetting, circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5006—Current
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The invention provides a state detection and read-write device of a memristor, belonging to the technical field of application of memristors; the apparatus of the present invention comprises: the circuit comprises an analog module, a digital module, a memristor module and a detection circuit; by analyzing and comparing several types of window function models of the memristor, the electrical characteristics of the memristor are consistent with the resistance change conversion characteristics of the resistance change memory unit; and the state detection read-write circuit is subjected to simulation verification, and the state detection circuit is optimized.

Description

Memristor state detection method and memristor read-write device
Technical Field
The invention belongs to the application technology of memristors, and particularly relates to a memristor state detection method and a reading and writing device thereof.
Background
Resistive Access Memory (Random Resistive Access Memory) has the advantages of low voltage, high speed, low power consumption, simple structure, compatibility with the conventional CMOS process, low cost, high density and the like, and is more and more widely concerned, and is considered to be a mainstream storage product in the future most likely to replace the conventional DRAM, SRAM, FLASH Memory and other products. Meanwhile, due to the development of nano electronics, new opportunities are brought to the development of integrated circuits, and the resistive random access memory as a novel memory with strong technical potential is expected to be widely applied in various fields.
The current nonvolatile memory is mainly developed by a phase change memory (PcRAM), a Magnetoresistive Random Access Memory (MRAM), a ferroelectric random access memory (FeRAM), and a Resistive Random Access Memory (RRAM). MRAM utilizes different magnetic field directions of ferromagnets to store data information, usually adopts a three-layer structure that two ferromagnets sandwich a metal conductor, if the direction of the ferromagnet changes, the current of the conductor changes, therefore judge the current and then can confirm the magnetic field direction of the magnet, MRAM has advantages such as high speed, high integration level, but the magnetoresistive random access memory has the problems such as relatively high power consumption, relatively long read-write time and non-compatibility with CMOS; the FeRAM uses a layer of ferroelectric material to replace the original dielectric medium, so that the FeRAM also has the function of a non-volatile memory, realizes data storage by utilizing the ferroelectric effect of a ferroelectric crystal, and can be divided into two categories of destructive reading and destructive reading according to a reading mode; the advantage is that the access speed is fast, and because of the specific polarization characteristic of the ferromagnetic material, and the characteristic is irrelevant to the electromagnetic action, the data information stored by the storage device is not influenced by external factors, but the problems that after reaching a certain number of read-write cycles, the FeRAM loses durability, relatively high power consumption, long read-write time and the like exist; the PcRAM utilizes electric energy (heat) to change the structure of a material so that the material has a double-resistance steady state (crystalline state and amorphous state), the writing and erasing of data information are realized by depending on the change of the state, the amorphous state and the polycrystalline state can be utilized to store 0 and 1 data information, when in writing and erasing, the phase change memory unit can be switched between a high resistance value and a low resistance value by applying signal pulses with different amplitudes and widths, the stored information is identified by the resistance, the phase change memory has the advantages of more erasable times, simple structure, higher storage density, high storage performance and the like, because of the advantages, the phase change memory can possibly replace the current FLASH, the DRAM becomes the mainstream of future nonvolatile storage, but the PcRAM has the defect of large writing operation current, the PcRAM needs to be driven by large-size transistors, and the scale of a peripheral circuit is overlarge, the area of the memory chip is high. The RRAM has a structure similar to that of a phase change memory, and is different from the phase change memory in that the resistive random access memory uses metal oxide as a storage medium instead of a phase change material, the metal oxide can be switched back and forth between a high resistance state and a low resistance state under the action of an electric signal, and the purpose of storing '0' and '1' information can be achieved by using the two resistance states.
Disclosure of Invention
In view of the problems in the prior art, the invention provides a state detection and read-write device of a memristor, which is characterized in that: the device comprises: the circuit comprises an analog module, a digital module, a memristor module and a detection circuit;
the analog part is used for generating mirror currents for reading, writing and erasing respectively;
the digital module controls the analog module using a digital signal;
the memristor module is of a bipolar structure, namely a memristor RRAM is connected with an NMOS tube to form a storage unit, and different read-write functions at each moment are completed through the gating of the NMOS tube;
the detection circuit is used for detecting a read data detection circuit of the memristor RRAM state in the reading process.
Preferably, the analog module generates mirror currents for reading, writing and erasing respectively by currents emitted by the reference current source through a PMOS tube for a mirror circuit.
Preferably, the detection circuit includes a chip selection control signal terminal, and when the chip selection control signal is set to a high level, the memory cell is in a start operating state, and when the chip selection control signal is set to a low level, the memory cell is in a stop state.
Preferably, the digital module is an MCU, and the MCU controls three clock signals with different pulse widths respectively used for reading, writing, and erasing the pulse signal.
Preferably, the memory unit comprises an R/W port, and when the R/W port is set to be 1, the resistance change unit writes data; when the R/W port is set to be 0, the resistance change unit is in a data reading state; and selecting a specific pulse voltage signal with low amplitude which does not cause the resistance value of the memory unit to change to be used for representing the erasing function of the memory unit.
Preferably, the current limit of the memory unit is 1 to 100mA, and the high-resistance state resistance value of the resistive switching unit of the memory unit is 10 5 ～10 6 And the resistance value of the resistance change unit of the memory unit in the high resistance state is 5-20% higher than that in the low resistance state.
Compared with the prior art, the invention at least has the following beneficial effects:
1) the invention provides a memristor state detection method and a reading and writing device thereof, wherein several window function models of a memristor are analyzed and compared, so that the memristor can be consistent with the resistance change conversion characteristic of a resistance change memory unit in the aspect of electrical characteristic;
2) the device provided by the invention can be used for completing read-write operation on the real-time current and voltage characteristics of the memristor device by constructing an entity circuit according to the manufactured negative feedback circuit and the manufactured sequential logic circuit in combination with an actual device. Carrying out simulation verification on the state detection read-write circuit, and optimizing the state detection circuit;
3) the current limit of the memory unit of the invention is generally controlled between 1 mA and 100mA, and the high-resistance state is generally 10 5 ～10 6 The window (namely the low resistance on the high resistance ratio) of the resistive unit is generally selected to be 10, the low resistance can be set according to the high resistance, and the disorder of the read-write state of the memory can be avoided.
Drawings
FIG. 1 shows a change in memristor port voltage during data reading;
FIG. 2 is an input waveform of an input Control signal in sequence, an Erase voltage Control signal needs to be set to a voltage which has a short action time and cannot generate obvious change to the resistance value of a memristor, and pulse widths are respectively Read Control signal end Read Control 40ms, Write Control signal end Write Control 50ms, and Erase Control signal end Erase Control 30 ms;
fig. 3 shows that when CS is 1 and R/W is 1, the memory is in the write mode RE is 0 and WE is 1, I/O is used as input, the set current pulse is injected into the memory cell to write "1", the reset current pulse is injected into the memory cell to write "0";
fig. 4 shows that when CS is 1 and R/W is 0, the memory is in the read mode RE is 1 and WE is 0, the memory cell generates a voltage drop under the action of the read data current, and when the memory cell is in the high-impedance state, the voltage drop generated by the comparator is high and is greater than the reference voltage, and the comparator outputs a high level;
FIG. 5 is a schematic diagram of the design of the device state detection and read/write circuit;
FIG. 6 is a functional block diagram of a state detection of a memristor and its read-write apparatus of the present invention.
The present invention is described in further detail below. The following examples are merely illustrative of the present invention and do not represent or limit the scope of the claims, which are defined by the claims.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
The technical scheme of the invention is further explained by the specific implementation mode in combination with the attached drawings.
The model of the memristor is optimized, so that the model of the memristor is closer to the characteristics presented by the actual memristor, and a more actual simulation model is provided for the design simulation of the peripheral circuit related to the memristor. The memristor is modeled based on the Candense platform, the resistance value, the initial resistance value and the film thickness corresponding to the high-low resistance state of the memristor and a window function influencing the nonlinear characteristic of the memristor are set, then the influences of all parameters in the improved model on the electrical characteristic of the memristor model are compared, the voltage threshold and the expandability of the model of the memristor are improved aiming at the defects of the memristor model, and finally the influences of all parameters in the improved model on the characteristic of the memristor are researched.
The designed state detection and read-write circuit is divided into three major parts, the first part is an analog circuit part which is used for generating a pulse signal for specific read-write, and the second part is a digital circuit part which controls the analog circuit part, and the digital signal is used for controlling the analog circuit part to apply a corresponding digital signal to the resistance change unit so as to control the read, write and erase functions of the resistance change unit. The third part is a read data detection circuit used for detecting the state of the resistance change unit in the reading process. The first analog circuit part generates mirror currents Iset, Ireset and Iread which are used for reading, writing and erasing respectively through currents emitted by a designed reference current source through a PMOS tube for a mirror circuit.
The digital circuit controls the state of the resistive random access memory device, controls the output or input state of the I/O port, controls the read-write erasing enabling end of the memory unit, and manages three pulse signals to enable the three pulse signals to enter the memristor through a corresponding signal at each moment; the reading data circuit for monitoring the state of the memristor is designed according to the resistance difference of the high-low resistance state of the memristor, a smaller pulse signal is given to the memristor, the voltage of the output end of the resistance changing unit can generate a larger difference due to the size difference of the resistance, the output voltage value is compared with the reference voltage of the comparator, then the state condition of the memristor at a certain moment is reflected according to the size of the output value of the comparator, and the information data stored in the current state of the memristor can be obtained.
A voltage signal with small pulse width and large amplitude is defined to represent the process of writing '0' by the resistance change of the memristor; a voltage control signal with a large pulse width and a small amplitude represents the process of writing '1' in the resistance change of the memristor.
The CS terminal is a chip selection control signal terminal of the state detection circuit, when the chip selection control signal is set to be at a high level, the storage device is in a working starting state, when the port of the storage device is set to be at a low level, the storage device is in a stop state, and the reading and writing working state of the device is determined through the output signal of the R/W reading and writing control port.
Example 1
As shown in fig. 6, the invention relates to a state detection and read-write apparatus of a memristor, wherein an input end of a resistive random access memory unit is connected with an output end of a current control output module and a detection protection module, and an output end of the resistive random access memory unit is connected with a data read-out module. The reference current source provides corresponding read-write current pulses to the resistive random access memory unit under the action of the mirror circuit, the MCU is used for controlling and respectively writing, erasing and reading clock signals with three different pulse widths of the pulse signals, the input end of the pulse selection read-write module is connected to the resistive random access memory unit and respectively used for controlling and generating data signals for writing '0' and '1', and real-time current-voltage characteristics of the memristor device are matched with actual devices to build an entity circuit to complete read-write operation according to the manufactured negative feedback circuit and the time sequence logic circuit. And performing simulation verification on the state detection read-write circuit.
The memristor is of a bipolar structure, one memristor RRAM is connected with one NMOS tube to form a storage unit, and different reading and writing functions at each moment are completed through gating of the MOS tube. The read-write operation method comprises the following steps:
(1) initializing before writing, setting a read enable signal RE to set a high level, and setting a write enable signal WE to set a low level;
(2) the written data signals are given, and the storage state of the memristor unit is read out through a data reading module;
(3) the consistency of the written data and the storage state of the resistive random access memory unit is judged through the state detection module, and if the written data and the storage state of the resistive random access memory unit are consistent, the writing process is ended;
(4) giving a write data signal, setting a read-write enable signal RE to be 0 and WE to be 1, performing a write process, and writing corresponding data into a storage unit;
(5) the write data signal is given, the read/write enable signal RE is set to 1, and WE is set to 0, and the read process is performed to read the state of the memory cell.
As shown in fig. 3, when the R/W port is set to "1", the resistive switching unit writes data, the I/O port is used as an input port for data, the control signal port sets a corresponding read/write enable signal, the read enable port is set to "0", the write enable port is set to "1", and the enable signal controls an Iset current generated by the read/write control module and the write pulse signal selection mirror circuit to be input to the resistive switching unit through the MOS transistor, so that the resistance value of the memory unit changes. As shown in fig. 2, a voltage control signal with a smaller pulse width and a larger amplitude is designed to represent a RESET process of resistance change of a memristor; a voltage control signal with larger pulse width and smaller amplitude represents the SET process of resistance change of the memristor; a specific pulse voltage signal with a low amplitude value and without causing obvious change of the resistance value of the resistance change unit is designed to represent the ERASE function of the memristor, so that the value at each moment is allowed to act by a corresponding instruction signal.
As shown in fig. 5, when the R/W port is set to "0", the resistive switching unit is in a data reading state, the I/O port is used as an output port of data, the read enable port is set to "1", the write enable port is set to "0", currents generated by the enable signal control module and the read-write circuit are selected by the read-write pulse signal and input to the resistive switching unit through the MOS transistor, so that the memory unit generates a corresponding voltage change under the action of the input current, as shown in fig. 4, the output voltage of the memory unit is compared with a reference voltage of a comparator, when the resistance state is high, the voltage drop is large and larger than the reference voltage, and at this time, the comparator outputs a high level; otherwise, when the reference voltage is smaller than the reference voltage, the comparator outputs a low level.
Designing a read-write circuit of a memristor, performing read-write operation and optimization thereof aiming at actual devices (a read-write circuit based on negative feedback self-adaptation and a sequential logic operation circuit based on an embedded system), controlling three signals with different pulse widths respectively used for writing, erasing and reading pulse signals through codes, wherein main input signals comprise read-write enabling signals and clock signals generating different pulse widths, the read-write enabling signals are used for controlling and generating data signals written with '0' and '1', and the real-time current-voltage characteristics of the memristor are controlled according to the manufactured negative feedback circuit and the manufactured timeThe sequential logic circuit is matched with an actual device to build a physical circuit to complete read-write operation. Secondly, for the resistive random access memory device, the memristor has a process of generating high-low resistance state mutual conversion by applying bias voltages in different directions, and the process and the state are monitored in real time. In the process of completing read-write operation, an intermediate non-safety area is involved, namely the problem of crosstalk and noise injection is possible to occur, so that in order to avoid disorder of the read-write state of the memory in the area, the performance parameters of the device are extremely important, the current limit is generally controlled between 1 and 100mA, and the high-impedance state is generally 10 mA 5 ～10 6 The window (i.e. low resistance in high resistance ratio) of the resistive unit is generally selected to be 10, and the low resistance can be set according to the high resistance. The conversion voltage is related to the material used for preparing the resistive switching device, and is generally between 1V and 2V. The invention improves and optimizes the model of the device, and simultaneously selects a material which is ideal and plays the advantages of the resistive random access memory as the medium of the resistive random access memory, so that the performance of the device is more stable, the read-write service life of the memory is longer, and the power consumption is lower.
The preferred embodiments of the present invention have been described in detail, however, the present invention is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present invention within the technical idea of the present invention, and these simple modifications are within the protective scope of the present invention.
It should be noted that the various technical features described in the above embodiments can be combined in any suitable manner without contradiction, and the invention is not described in any way for the possible combinations in order to avoid unnecessary repetition.
In addition, any combination of the various embodiments of the present invention is also possible, and the same should be considered as the disclosure of the present invention as long as it does not depart from the spirit of the present invention.

Claims (6)

1. The utility model provides a state of memristor detects and readwrite device which characterized in that: the device comprises: the circuit comprises an analog module, a digital module, a memristor module and a detection circuit;
the analog part is used for generating mirror currents for reading, writing and erasing respectively;
the digital module controls the analog module using a digital signal;
the memristor module is of a bipolar structure, namely a memristor RRAM is connected with an NMOS tube to form a storage unit, and different read-write functions at each moment are completed through the gating of the NMOS tube;
the detection circuit is used for detecting a read data detection circuit of the memristor RRAM state in the reading process.
2. The apparatus of claim 1, wherein: the analog module generates mirror currents for reading, writing and erasing through currents sent by the reference current source and through a PMOS tube for a mirror circuit.
3. The apparatus of claim 1, wherein: the detection circuit comprises a chip selection control signal end, when the chip selection control signal is set to be at a high level, the storage unit is in a working state, and when the chip selection control signal is set to be at a low level, the storage unit is in a stop state.
4. The apparatus of claim 1, wherein: the digital module is an MCU, and the MCU controls three clock signals with different pulse widths respectively used for reading, writing and erasing pulse signals.
5. The apparatus of claim 1, wherein: the memory unit comprises an R/W port, and when the R/W port is set to be 1, the resistance change unit writes data; when the R/W port is set to be 0, the resistance change unit is in a data reading state; and selecting a specific pulse voltage signal with low amplitude which does not cause the resistance value of the memory cell to change to represent that the memory cell is subjected to an erasing function.
6. The apparatus of claim 1, wherein: the current limiting of the memory unit is 1-100 mA, and the resistance value of the resistance change unit of the memory unit is 10 5 ～10 6 And the resistance value of the resistance change unit of the memory unit in the high resistance state is 5-20% higher than that in the low resistance state.
CN202210674740.8A 2022-06-15 2022-06-15 Memristor state detection method and memristor read-write device Pending CN114927158A (en)

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