CN114914093A

CN114914093A - Electronic component packaging structure, manufacturing method thereof and semi-finished product assembly

Info

Publication number: CN114914093A
Application number: CN202210119318.6A
Authority: CN
Inventors: 钟宇鹏; 李家伟; 曹哲之
Original assignee: Zowie Technology Corp
Current assignee: Zowie Technology Corp
Priority date: 2021-02-09
Filing date: 2022-02-08
Publication date: 2022-08-16
Also published as: CN217214477U; TW202232612A

Abstract

The invention discloses an electronic component packaging structure, a manufacturing method thereof and a semi-finished product assembly. The electronic component packaging structure comprises a plurality of protective substrates, a first capacitor core, an insulating glue material, an anode terminal and a cathode terminal. The plurality of protective substrates are arranged in a stacked manner at intervals, and a conductive thin material is arranged between any two adjacent protective substrates. The first capacitor core is arranged among the plurality of protective substrates and forms a sandwich structure together. The first capacitor core includes a cathode and an anode. An insulating glue material fills the gaps between the plurality of protective substrates and the first capacitor core, and forms a flat structure together with the plurality of protective substrates and the first capacitor core. The anode terminal and the cathode terminal are located at opposite ends of the flat body structure. Thereby, a low profile, low ESR (equivalent series resistance) and high reliability solid electrolytic capacitor is obtained.

Description

Electronic component packaging structure, manufacturing method thereof and semi-finished product assembly

Technical Field

The present invention relates to an electronic component package structure, a method for manufacturing the same, and a semi-finished assembly suitable for the electronic component package structure, and more particularly, to an electronic component package structure including a capacitor core, a method for manufacturing the same, and a semi-finished assembly.

Background

The existing solid electrolytic capacitor has the characteristics of low short, high capacitance and low ESR (equivalent series resistance), so that the existing solid electrolytic capacitor is suitable for surface mounting (assembling) in a small-sized high-frequency electronic system. Further, the conventional solid electrolytic capacitor assembly is usually formed by stacking one or more solid electrolytic capacitor cores and packaging them with an insulating material. In addition, the electrodes (anode and cathode) of the solid electrolytic capacitor core will be connected through a plurality of electrical contacts to terminals on the outer surface of the package.

It should be noted that, in the conventional solid electrolytic capacitor core (hereinafter, referred to as a capacitor core) is generally formed of an aluminum base, and most of the surface of the aluminum base is etched to form a plurality of deep holes correspondingly, thereby increasing the effective surface area. And a very thin layer of alumina is formed on the surface of the aluminum base with the plurality of deep holes to serve as a dielectric interface of the capacitor core. Furthermore, at the dielectric interface of the capacitor core, a continuous conductive polymer (solid electrolyte) and conductive coating (usually carbon powder and silver particle binder) will be deposited and correspond to the cathode, while the aluminum-based body will serve as the anode. Wherein the aluminum-based end is not deposited with a conductive polymer and a small portion of the coating will be used for external connection of the anode.

Further, as shown in FIG. 1, FIG. 1 is a schematic sectional view of a typical solid electrolytic capacitor core 10, which is sectioned from an anode 11 to a cathode 12 of the solid electrolytic capacitor core 10. Wherein the dielectric interface 14 is on the surface of the aluminum base 15 and the conductive polymer layer 16 covers the dielectric interface 14 and the conductive coating is silver paste on the conductive polymer layer 16 on the outermost surface 12. Thus, in its external view, as shown in assembly 10A in fig. 2A, most of the surface area is covered by silver paste 12 on the cathode layer (not shown), with anode 11 at one end.

It should be noted that a barrier coating is usually applied between the regions of the anode 11 and the cathode 12 to prevent short circuit between the two regions of the anode 11 and the cathode 12. For example, as shown by the barrier coating 13A in fig. 2A, and the width of the barrier coating 13A may be narrow, or as shown by the barrier coating 13B in fig. 2B, the width of the barrier coating 13B may also be wide to cover most of the area of the anode except for the tip face 11B of the anode end.

It is emphasized that the conventional solid electrolytic capacitor device is packaged by encapsulating one or more capacitor cores 10 in an insulating material and electrically connecting an anode 11 and a cathode 12 to external terminals. However, since the capacitor of the capacitor core 10 is disposed on the dielectric interface 14, the surface area of the dielectric interface 14 covering the aluminum base 15 is preferably maximized for a fixed size aluminum base 15. Therefore, the exposed area of the anode end is relatively small. Further, in order to minimize the area and profile of the packaged capacitor device, it is desirable to have the package casing as close to the capacitor core as possible.

For the reasons mentioned above, there are currently two challenges in minimizing capacitor packaging. First of all, the external terminals are preferably as close as possible to the anode and cathode, and the size of the connection conductors should be minimal. But establishing and maintaining a good electrical connection in this small area becomes a challenge due to the small anode area. Furthermore, this anode connection problem becomes more critical when multiple capacitor cores are stacked together to increase the overall capacitance of the device. For example, as shown in fig. 2A-2C, it can be seen that the anode connection must be made at the tip face of the anode end 11B, since this is the only exposed area available for making electrical contact.

However, further complicating the situation is that due to the high activity of metallic aluminum, there is always a very thin film of aluminum oxide on the exposed anode surface and tip area. This oxide film not only affects the conductivity, but also prevents effective equipotentialization with any external termination.

Secondly, the insulation surrounding the capacitor core should be as thin as possible. Conventional encapsulation processes, such as molding by transfer molding (transfer molding), use high pressures to drive the flow of the high viscosity material into the mold. To produce thin insulation, the spacing between the mold walls and the capacitor core must be reduced, but this increases the viscous stress on the capacitor core at the same material flow rate. Processes using compression molding can reduce the pressure flow but cannot eliminate it. There are also molding processes (sheet compound molding) which also involve high pressures.

As mentioned above, because solid electrolytic capacitor cores generally lack good mechanical strength, and because of the above-mentioned factors, it becomes extremely difficult to package thin capacitors without damaging the capacitor cores or the electrode connections.

At present, many people have proposed solutions to the above technical problems. For example, as described in Japanese patent No. JP 8(1996) -273983A (JPH09273983A), a method of forming a metal plating layer on the anode surface of each capacitor core and connecting the anodes of a plurality of stacked capacitor cores to further another plating layer is described.

For example, as carried by U.S. patent No. 6,392,869B2(US6392869B2), and with reference to fig. 1B, 2A, 2B and the corresponding description of the patent, it is known that this patent describes a compact package for a plurality of capacitor cores. The capacitor cores are stacked together by a conductive paste and bonded on a conductor having an extended portion as a cathode external terminal; then, the stack with the cathode conductor terminal is wrapped by an insulating material; then, polishing the anode end to show that the tip end surface of the anode end of the stacked capacitor core is exposed; then, removing the aluminum oxide film on the exposed tip surface by adopting a zinc replacement process (zinc or zinc subsystem); then, coating a layer of nickel on the tip surface through electroless plating; then, coating a layer of gold by electroless plating; next, a conductive resin layer is coated on the tip end surface of the capacitor core. Through the above processes, an anode conductive elastomer, i.e., an anode terminal, is formed by covering the gold and nickel and the surrounding insulating material.

As carried, for example, in US patent No. 10,340,092B2(US10340092B2), another type of tight package for multiple capacitor cores is described. Similar to that described in U.S. Pat. No. 6,392,869B2(US6392869B 2). The capacitive cores carried by US patent No. 10,340,092B2(US10340092B2) can be stacked and bonded together by conductive glue, and the lead layer on one side of the base substrate will be used as the cathode. Wherein, the assembly including the front guide layer is formed by compression, and then is completely wrapped and covered by the insulating material; subsequently, the base with the assembled capacitor body is cut into individual capacitor bodies; then, roll polishing the capacitor body to round the corners and edges of each capacitor body and expose the tip surface of the cathode leading layer and the anode of the capacitor core; subsequently, electrical connection to the anodic metallic aluminum was made using a zinc displacement process, similar to that described in U.S. Pat. No. 6,392,869B2(US6392869B2), followed by electroless nickel plating. However, as described in U.S. Pat. No. 10,340,092B2(US10340092B2) and shown in fig. 2 and 8 thereof, the anode terminal is not a conductive resin but made by electroless copper plating, nickel and tin.

In light of the foregoing, despite the technical measures that have been developed to address the above problems, there is still a need in the electronics industry and market for solid electrolytic capacitors of low profile, low ESR (equivalent series resistance), and high reliability. Furthermore, micro-scale cracking or peeling or delamination can increase ESR (equivalent series resistance) and reduce the reliability of the capacitor due to the thermal effects of solder reflow during device assembly. Therefore, there is a need for better package structures and more cost-effective manufacturing processes.

Disclosure of Invention

Embodiments of the present invention provide an electronic device package structure, a method for manufacturing the same, and a semi-finished assembly, which can effectively overcome the defects of the conventional package structure.

One embodiment of the invention discloses a manufacturing method of an electronic component packaging structure, which comprises the following steps: a first providing step: providing a bottom substrate; the upper surface of the bottom substrate is defined with a plurality of first preset positions, a plurality of conductive thin materials are further arranged on the upper surface of the bottom substrate corresponding to the first preset positions, and a conductive connecting material is coated on the conductive thin materials; the setting step: placing a plurality of electronic core pieces on the conductive connecting material on the plurality of conductive thin materials; a second providing step: providing a top substrate; a plurality of second predetermined positions are defined on the lower surface of the top substrate, a plurality of conductive thin materials are arranged on the lower surface of the top substrate corresponding to the second predetermined positions, and the conductive connecting materials are coated on the plurality of conductive thin materials; a superposition step: stacking the top substrate on the bottom substrate at intervals, so that the electronic core pieces are located between the top substrate and the bottom substrate; wherein, the edge of the bottom substrate exceeds a projection area formed by the orthographic projection of the top substrate, and the upper surface of the part of the bottom substrate exceeding the projection area is defined as a glue placing area; a first hardening step: hardening the conductive connecting material, and further connecting the top substrate, the bottom substrate and the electronic core pieces to form a basic assembly correspondingly; wherein, the inner space of the basic assembly is provided with a channel which is communicated with the glue placing area; and (3) glue filling: filling the channel with an insulating glue material from the glue placing region so as to correspondingly embed the plurality of electronic core pieces between the top substrate and the bottom substrate; a second hardening step: hardening the insulating glue material, and further enabling the basic assembly and the insulating glue material to correspond to form a first semi-finished product assembly; cutting: cutting the first semi-finished product assembly and correspondingly forming a plurality of slotted hole openings to expose a plurality of conductive thin materials on the bottom substrate and a plurality of conductive thin materials on the top substrate, and correspondingly forming a second semi-finished product assembly; a film forming step: forming a conductive film on the second semi-finished product assembly and correspondingly forming a plurality of component terminals, so that the second semi-finished product assembly and the component terminals correspondingly form a third semi-finished product assembly; wherein, a plurality of assembly terminals are communicated with a plurality of exposed conductive thin materials; and a cutting step: and cutting the third semi-finished product assembly to correspondingly form a plurality of electronic component packaging structures.

Preferably, in the step of filling the adhesive, the insulating adhesive material can fill the channel by capillary action.

Preferably, each of said electronic core pieces further comprises a capacitor core comprising an anode and a cathode, and said cathode is operable to cooperate with said conductive connecting material to join said plurality of conductive sheets on said bottom substrate and said plurality of conductive sheets on said top substrate, and a portion of said anode is exposed through said plurality of slotted openings in said second semi-finished assembly; wherein the film forming step further comprises a plating substep of: electroplating metal zinc on the partial surface of the exposed anode and correspondingly forming a zinc layer, and electroplating metal nickel on the zinc layer and correspondingly forming a nickel layer; wherein the film forming step further comprises a connector step of: connecting the anode of the capacitor core to an anode terminal via the zinc layer and the nickel layer, and connecting the cathode of the capacitor core to a cathode terminal via the plurality of conductive sheets.

One embodiment of the present invention discloses a semi-finished product assembly suitable for an electronic component package structure, the semi-finished product assembly comprising: a plurality of protective substrates which are arranged in a stacked manner at intervals, a plurality of preset positions are defined between any two adjacent protective substrates, and a plurality of conductive thin materials are further arranged on the surface of each protective substrate corresponding to the preset positions; the edge of one of any two adjacent protective substrates exceeds a projection area formed by the orthographic projection of the other protective substrate, and the part of the surface of the protective substrate exceeding the projection area is defined as a glue placing area; a plurality of electronic core pieces located between the plurality of protective substrates, and the plurality of electronic core pieces being disposed at a plurality of the predetermined positions; wherein each of the electronic core pieces comprises a plurality of contacts; a conductive connecting material connected to the plurality of conductive thin materials and a part of the contact points; an insulating adhesive material filling gaps between the plurality of protective substrates and the plurality of electronic core members; and a plurality of slot openings passing through the plurality of protective substrates and the insulating adhesive material, and the plurality of slot openings can be used for exposing the plurality of conductive thin materials communicated with part of the contacts of the electronic core member.

Preferably, each of said electronic core pieces further comprises a capacitor core, and two of said contacts of said capacitor core are respectively defined as an anode and a cathode, and said cathode is adapted to be bonded to a plurality of said conductive sheets, and a plurality of said slotted openings are adapted to expose a portion of said anode; wherein, a zinc layer is formed on the surface of the exposed part of the anode by electroplating.

Preferably, each of the protective substrates is an all-copper substrate, and a plurality of the conductive thin materials are formed after each of the protective substrates is etched.

One embodiment of the present invention discloses an electronic component package structure, which includes: a plurality of protective substrates which are arranged in a stacked manner at intervals, a preset position is defined between any two adjacent protective substrates, and a plurality of conductive thin materials are further arranged on the surface of each protective substrate corresponding to the preset position; the first capacitor core is arranged at the preset position and forms a sandwich structure together with the plurality of protective substrates; wherein, the first capacitor core comprises a cathode and an anode; the insulating glue material is filled in gaps between the plurality of protective substrates and the first capacitor core and forms a flat structure together with the plurality of protective substrates and the first capacitor core; an anode terminal located at one end of the flat body structure; a cathode terminal located at the other end of the flat structure from the anode terminal; and a conductive connecting material connected to a plurality of the conductive thin materials and a part of the cathode on each protective substrate; wherein a part of the plurality of conductive thin materials extends and is connected to the cathode terminal, and the cathode terminal is connected and formed on the plurality of conductive thin materials in a copper plating manner; wherein a portion of the anode is connected to the anode terminal, and the anode terminal is connected to and formed at a portion of the anode in such a manner as to form a conductive film.

Preferably, the electronic component packaging structure further comprises a second capacitor core, and the second capacitor core is arranged on the first capacitor core in a stacking mode at intervals, and the second capacitor core is located among the plurality of protective substrates; wherein the plurality of protective substrates, the first capacitor core and the second capacitor core together form a multi-layer core structure, the second capacitor core includes a cathode and an anode, two cathodes of the first capacitor core and the second capacitor core are connected to the cathode terminal, and two anodes of the first capacitor core and the second capacitor core are connected to the anode terminal.

Preferably, the electronic component package structure further includes a middle substrate, and the middle substrate is disposed between the first capacitor core and the second capacitor core, and the middle substrate includes an anode end conductive thin material set and a cathode end conductive thin material set separated from each other; the cathode end conductive thin material group is connected to the two cathodes of the first capacitor core and the second capacitor core through the conductive connecting material, and the anode end conductive thin material group is connected to the anode terminal.

Preferably, the conductive film comprises a zinc layer and a nickel layer, and the zinc layer is plated on a part of the surface of the anode, and the nickel layer is plated on the zinc layer.

Preferably, the anode has two side surfaces on opposite sides, and both of the side surfaces can be connected to the plurality of protective substrates and the anode terminal with the conductive connecting material to enhance the structural strength of the electronic component packaging structure.

Preferably, the plurality of protection substrates further include an anode side conductive thin material located at a plurality of ends of the protection substrates located adjacent to the anode terminal, and the anode terminal covers the anode side conductive thin material and the end face and the side face of the flat body structure located adjacent to the anode terminal to form the five-face covered anode terminal correspondingly; wherein, the structural strength of the electronic component packaging structure is enhanced; the plurality of protective substrates further comprise a cathode side conductive thin material which is positioned at a plurality of ends of the plurality of protective substrates adjacent to the cathode terminal, and the cathode terminal covers the cathode side conductive thin material and the end face and the side face of the flat body structure adjacent to the cathode terminal, and the structural strength of the electronic component packaging structure is enhanced.

One embodiment of the invention discloses a manufacturing method of an electronic component packaging structure, which comprises the following steps: (a) providing a first plate as a bottom substrate, wherein a plurality of preset positions on the upper surface of the first plate comprise conductive thin materials, and a part of areas of the conductive thin materials are coated with a bonding material; (b) placing a plurality of electronic core pieces on a bonding material on the conductive sheet at a plurality of predetermined positions of the upper surface; (c) providing a second plate as a top substrate, wherein a plurality of preset positions on the lower surface of the second plate comprise conductive thin materials, coating the bonding material on partial areas of the conductive thin materials, laminating the top substrate on the bottom substrate, placing the electronic components between the top substrate and the bottom substrate, and exposing a part of the upper surface near the edge of the bottom substrate to form a glue placing area; (d) hardening the bonding material to bond the top substrate, the bottom substrate and the plurality of electronic core members to form a basic assembly, wherein a channel communicated with the glue placing area is formed in the space inside the basic assembly; (e) filling an insulating glue material into the channel from the glue placing area, and embedding the electronic core pieces between the top substrate and the bottom substrate; (f) hardening the insulating glue material to form a first semi-finished product assembly by the basic assembly and the insulating glue material; (g) forming a plurality of slotted hole openings on the first semi-finished product assembly by a cutting process, so that a part of the conductive thin materials of the top substrate and the bottom substrate are exposed to form a second semi-finished product assembly; (h) forming a conductive film at a specific position on the second semi-finished product assembly, communicating with the exposed conductive thin material, and then forming a component terminal on the conductive thin material to form a third semi-finished product assembly; (i) and cutting the third semi-finished product assembly into a plurality of electronic component packaging structures.

Preferably, the filling process of the insulating adhesive material is to place adhesive on the adhesive placing area so that the insulating adhesive material fills the channel due to capillary phenomenon flowing in.

Preferably, said electronic core member comprises a capacitor core comprising an anode and a cathode; the cathode is combined with the conductive thin materials on the bottom substrate and the top substrate through the combination material; a plurality of slotted openings on the second semi-finished product assembly expose a part of the anode; in the process of forming the conductive film, a layer of zinc is plated on part of the surface of the exposed anode, and then a layer of nickel is plated on the part of the surface of the exposed anode; the process of forming the component terminal forms an anode terminal and a cathode terminal, the anode terminal is connected to the anode of the capacitor core through the nickel layer conductive film, and the cathode terminal is connected to the cathode of the capacitor core through the conductive sheet.

One embodiment of the present invention discloses a semi-finished product assembly, comprising: the protective substrate comprises a bottom substrate, a top substrate and at least two protection substrates which are overlapped up and down, wherein a plurality of preset positions on the surface of the protective substrate comprise conductive thin materials, and a part of the upper surface near the edge of the bottom substrate is exposed to form a glue placing area; a plurality of electronic core pieces disposed at a plurality of predetermined positions between the top substrate and the bottom substrate, at least a part of the contacts of the electronic core pieces being bonded to the conductive sheet with a conductive bonding material; filling the gap channels among the top substrate, the bottom substrate and the plurality of electronic core members with an insulating glue material; a plurality of slot openings pass through the top substrate, the bottom substrate and the insulating glue material to expose the conductive part communicated with the contact of the electronic core member.

Preferably, said electronic core member comprises a capacitor core, the junction of which comprises an anode and a cathode; the cathode is combined with the conductive thin material on the protective substrate; the slotted holes enable a part of the anode to be exposed, and a layer of zinc is plated on the surface of the exposed anode.

Preferably, the protective substrate is an all-copper substrate, and the conductive thin material is formed by etching the all-copper substrate.

One embodiment of the present invention discloses an electronic component packaging structure, which includes: at least two protection substrates which are overlapped up and down, such as a bottom substrate, a top substrate and the like, wherein the preset position of the surface of each protection substrate comprises a conductive thin material; at least one first capacitor core arranged at a preset position between the protective substrates to form a sandwich structure; a capillary filling insulating glue material is filled in the gap between the protective substrate and the capacitor core to form a flat structure; an anode terminal and a cathode terminal respectively located at two opposite ends of the flat structure; the capacitor core has a joint including an anode and a cathode, a part of the cathode is bonded with a conductive thin material on the protective substrate by a conductive bonding material, the conductive thin material extends to one end of the cathode terminal of the flat body structure, the cathode terminal is formed by connecting the conductive thin material with a copper plating, a part of the anode is located at one end of the anode terminal of the flat body structure, and the anode terminal is formed by a conductive film connected with a part of the anode.

Preferably, the capacitor module package structure further includes at least one second capacitor core stacked on the first capacitor core, a multi-layer core structure is formed between the bottom substrate and the top substrate, cathodes of the two capacitor cores are connected to the same cathode terminal, and anodes of the two capacitor cores are connected to the same anode terminal.

Preferably, the capacitor module package structure further includes a middle substrate disposed between the two capacitor cores, the middle substrate includes a group of anode end conductive thin materials and a group of cathode end conductive thin materials separated from each other, the cathode end conductive thin materials are connected with the cathodes of the two capacitor cores by the conductive bonding material, and the anode end conductive thin materials are connected with the anode terminals.

Preferably, the conductive film comprises a zinc layer directly plated on a portion of the surface of the anode and a nickel layer further plated on the zinc layer.

Preferably, the upper and lower surfaces of the anode further comprise an anode side conductive bonding material to bond the anode side conductive bonding material with the bottom substrate and the top substrate, and also bond the anode terminal to improve the structural strength.

Preferably, the bottom substrate and the top substrate further comprise an anode side conductive thin material facing outward near the anode end, and the conductive film covers the anode side conductive thin material and the anode end face and the side face of the flat body structure to form a five-face coated anode terminal, so as to improve the structural strength; the bottom substrate and the top substrate further comprise cathode side conductive thin materials facing to the outside, and the cathode terminal coats the cathode side conductive thin materials, the cathode end face and the side face of the flat body structure so as to improve the structural strength.

One of the advantages of the present invention is that the electronic component package structure, the manufacturing method thereof and the semi-finished assembly provided by the present invention can obtain a solid electrolytic capacitor with low profile, low ESR (equivalent series resistance) and high reliability by the technical scheme of "filling the gaps between the plurality of protective substrates and the first capacitor core with the insulating adhesive material".

For a better understanding of the nature and technical content of the present invention, reference should be made to the following detailed description of the invention and the accompanying drawings, which are provided for illustration purposes only and are not intended to limit the scope of the invention in any way.

Drawings

FIG. 1 is a schematic sectional view of a solid electrolytic capacitor core pertaining to the prior art.

Fig. 2A is a perspective view of a solid electrolytic capacitor core pertaining to the prior art.

FIG. 2B is another perspective view of a solid electrolytic capacitor core according to the prior art.

Fig. 2C is a schematic perspective view of a tantalum capacitor in the prior art.

Fig. 3 is a schematic cross-sectional view of an electronic device package structure according to a first embodiment of the invention.

Fig. 4 is an exploded view of an electronic device package structure according to a first embodiment of the invention.

Fig. 5 is a perspective view of an electronic device package structure according to a first embodiment of the invention.

Fig. 6A is a cross-sectional view of an electronic device package structure according to a second embodiment of the invention.

Fig. 6B is another cross-sectional view of the electronic device package structure according to the second embodiment of the invention.

Fig. 6C is another schematic cross-sectional view (iii) of an electronic device package structure according to a second embodiment of the invention.

Fig. 7A is a cross-sectional view of an electronic device package structure according to a third embodiment of the invention.

Fig. 7B is another cross-sectional view of the electronic device package structure according to the third embodiment of the invention (ii).

Fig. 7C is another schematic cross-sectional view (iii) of an electronic device package structure according to a third embodiment of the invention.

Fig. 8 is a schematic cross-sectional view illustrating an electronic device package structure according to a fourth embodiment of the invention.

Fig. 9 is a schematic cross-sectional view of an electronic device package structure according to a fifth embodiment of the invention.

Fig. 10 is a cross-sectional view of an electronic device package structure according to a sixth embodiment of the invention.

Fig. 11 is another cross-sectional view of an electronic device package structure according to a sixth embodiment of the invention.

Fig. 12 is a perspective view of an electronic device package structure according to a seventh embodiment of the invention.

Fig. 13 is a flowchart illustrating a method of manufacturing an electronic device package structure according to an eighth embodiment of the invention.

Fig. 14A is a top view of an electronic device package structure according to an eighth embodiment of the invention.

Fig. 14B is a cross-sectional view of the XIVB-XIVB section of fig. 14A.

Fig. 15A is another schematic top view of an electronic device package structure according to an eighth embodiment of the invention.

FIG. 15B is a cross-sectional view of the XVB-XVB cross-section of FIG. 15A.

Fig. 16 is another cross-sectional view of an electronic device package structure according to an eighth embodiment of the invention.

Fig. 17A is another schematic cross-sectional view of an electronic device package structure according to an eighth embodiment of the invention.

Fig. 17B is another schematic cross-sectional view (iii) of an electronic device package structure according to an eighth embodiment of the invention.

Fig. 17C is another schematic cross-sectional view (iv) of an electronic device package structure according to an eighth embodiment of the invention.

Fig. 18 is another top view schematically illustrating a package structure of an electronic device according to an eighth embodiment of the present invention (iii).

Detailed Description

The following description is provided for the embodiments of the electronic device package structure, the manufacturing method thereof, and the intermediate assembly, which are disclosed in the present disclosure, by specific embodiments, and those skilled in the art can understand the advantages and effects of the present disclosure from the disclosure of the present disclosure. The invention is capable of other and different embodiments and its several details are capable of modifications and various changes in detail, all without departing from the spirit and scope of the present invention. The drawings of the present invention are for illustrative purposes only and are not intended to be drawn to scale. Furthermore, as will be appreciated by reference to and as illustrated in the accompanying drawings, the description is intended to highlight only those specific figures that are presently or later come within the context of such description, but not to limit the scope of such description to those specific figures. The following embodiments will further explain the related art of the present invention in detail, but the disclosure is not intended to limit the scope of the present invention.

It will be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are mainly used to distinguish one element from another element, or from one signal to another signal. In addition, the term "or" as used herein should be taken to include any one or combination of more of the associated listed items as the case may be.

[ first embodiment ]

Please refer to fig. 3 to 5, which are first exemplary embodiments of the present invention, it should be noted that the corresponding drawings and related numbers and shapes mentioned in the present embodiment are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, and not for limiting the scope of the present invention.

As shown in fig. 3, a first embodiment of the invention provides an electronic device package structure 100, which includes: a first capacitor core 10, a plurality of protective substrates 20, an anode terminal 30, a cathode terminal 40, a conductive connecting material 50, an insulating adhesive 60, an external anode terminal 70, and an external cathode terminal 80, but the present invention is not limited thereto. For example, in other embodiments of the present invention, the electronic device package structure 100 may not include the external anode terminal 70 and the external cathode terminal 80.

Hereinafter, for convenience of explanation and understanding, a plurality of the protective substrate 20, the first capacitor element 10, the anode terminal 30, the cathode terminal 40, the external anode terminal 70, and the external cathode terminal 80 will be described in sequence, and the relative positional relationship among the above components and the conductive connecting material 50 and the insulating adhesive material 60 will be described in due course.

It should be noted that, for convenience of illustration and understanding, the anode terminal 30, the cathode terminal 40, the conductive connecting material 50 and the insulating glue 60 are not shown in fig. 4, but in practice, the above components are still present in the electronic component packaging structure 100, and thus, it is stated that the above components are not mistakenly found.

As shown in fig. 3, in the present embodiment, a plurality of the protection substrates 20 are stacked and disposed at intervals, in this embodiment, each of the protection substrates 20 is an insulating plate, and the number of the plurality of protection substrates 20 is preferably two, but the invention is not limited thereto. For example, in other embodiments of the present invention, each of the protection substrates 20 may also be made of other materials, and the number of the protection substrates 20 may be adjusted according to actual requirements.

For convenience of understanding and explanation, two protective substrates 20 will be explained below, but actually, the explanation of two protective substrates 20 can be applied to any two adjacent protective substrates 20 among the plurality of protective substrates 20.

Further, a predetermined position (not shown in fig. 3) is defined between two adjacent protection substrates 20, and in the embodiment, a plurality of conductive thin materials 21 and an insulating material (not shown) not covering the plurality of conductive thin materials 21 are further disposed on the surface of each protection substrate 20 corresponding to the predetermined position, but the invention is not limited thereto. For example, in other embodiments of the present invention, the protection substrate 20 may also be a conductive material such as copper, and the conductive thin materials 21 may also be formed by etching the conductive metal protection substrate 20.

Specifically, as shown in fig. 3 and 4, in the present embodiment, four conductive thin materials 21 are disposed on the outer surface of each of the protection substrates 20, and the four conductive thin materials 21 on each of the protection substrates 20 are respectively defined as: a first external conductive sheet 21AO, a second external conductive sheet 21CO, an internal anode conductive sheet 21AI, and an internal cathode conductive sheet 21 CI. In the embodiment, the four conductive thin materials 21AO, 21CO, 21AI, and 21CI are preferably copper conductive pads, and the number of the conductive thin materials 21 may be adjusted according to actual requirements, which is not limited in the invention.

In more detail, the first external conductive thin material 21AO and the second external conductive thin material 21CO are disposed on an upper surface 22 of the protection substrate 20, and the inner anode conductive thin material 21AI and the inner cathode conductive thin material 21CI are disposed on a lower surface 23 of the protection substrate 20.

A plurality of the protective substrates 20 are introduced so far, and the first condenser core 10 will be described below. As shown in fig. 3 and 4, the first capacitor core 10 is disposed between any two adjacent protective substrates 20, and the first capacitor core 10 includes an anode 11, a cathode 12 and a barrier coating 13 disposed between the anode 11 and the cathode 12, and a portion of the cathode 12 can be connected to a plurality of conductive thin materials on each of the protective substrates 20 by the conductive connecting material 50 (e.g., silver or copper paste).

Further, the first capacitor core 10 is disposed at the predetermined position, and the insulating adhesive material 60 (low viscosity epoxy resin material) fills a gap between the two protective substrates 20 and the first capacitor core 10. The first capacitor core 10 and the two protection substrates 20 can form a sandwich structure together, and the first capacitor core 10, the insulating adhesive material 60, the two protection substrates 20 and the two protection substrates can form a flat structure together.

In addition, as shown in fig. 3, the conductive connecting material 50 is disposed on two opposite sides of the cathode 12, and the two inner cathode conductive thin materials 21CI of the two protective substrates 20 can be disposed on the conductive connecting material 50, and are extended and cut to be aligned with one end of the cathode 12 of the first capacitor core 10, so that a portion of the cathode 12 can be electrically connected to the inner cathode conductive thin materials 21CI through the conductive connecting material 50.

The first condenser core 10 is introduced so far, and the description of the anode terminal 30 and the cathode terminal 40 will be started. As shown in fig. 3, the anode terminal 30 is located at one end of the flat body structure, and the cathode terminal 40 is located at the other end of the flat body structure, which is far away from the anode terminal 30, and the anode terminal 30 and the cathode terminal 40 are respectively in a C shape. In other words, the anode terminal 30 and the cathode terminal 40 are respectively located at the common and corresponding two ends of the plurality of protection substrates 20.

Further, the anode terminal 30 is connected to and formed on a portion of the anode 11 by forming a conductive film, and the anode terminal 30 is a copper conductive film in this embodiment and is connected to the first outer conductive sheet 21AO and the inner anode conductive sheet 21AI, so that the anode terminal 30 can be electrically connected to the anode 11; the cathode terminal 40 is formed on the second outer conductive sheet 21CO and the inner cathode conductive sheet 21CI by copper plating, so that the cathode terminal 40 can be electrically connected to the cathode 12.

The anode terminal 30 and the cathode terminal 40 are introduced, and the external anode terminal 70 and the external cathode terminal 80 will be introduced. As shown in fig. 3 and 5, the electronic component package structure 100 excluding the external anode terminal 70 and the external cathode terminal 80 can be regarded as an insulator 101, and the external anode terminal 70 and the external cathode terminal 80 are respectively formed on the sides of the anode terminal 30 and the cathode terminal 40 relatively far away from the first capacitor core 10, and the external anode terminal 70 and the external cathode terminal 80 are respectively wrapped around at least three sides regarded as the insulator 101.

Further, in the present embodiment, the external anode terminal 70 and the external cathode terminal 80 can be used to further increase the metal thickness and strength of the anode terminal 30 or the cathode terminal 40, and the external anode terminal 70 and the external cathode terminal 80 are preferably copper metal layers formed by additional electroplating on the anode terminal 30 and the cathode terminal 40, but the invention is not limited thereto. In other embodiments of the present invention, the external anode terminal 70 and the external cathode terminal 80 may be made of other metals.

It should be noted that, when the anode 11 and the cathode 12 of the first capacitor core 10 are respectively connected to the anode terminal 30 and the cathode terminal 40 and covered with electroless copper, the copper metal layer may be further plated to form the external anode terminal 70 and the external cathode terminal 80. In addition, after the copper metal layer additionally plated is completely plated, a tin metal layer (not shown) may be further plated to protect the copper metal layer.

It should be noted that, in the embodiment, the inner anode conductive thin material 21AI may also be selectively not provided, but if the inner anode conductive thin material 21AI is provided, it can effectively help to increase the adhesion strength of the copper-plated male terminal 30.

The first embodiment described above describes the electronic component packaging structure 100 of the present invention, and basically, a chip aluminum solid electrolytic capacitor is taken as an example for illustration. The aluminum-based solid electrolytic capacitor uses aluminum as an anode, and the difficulty of connecting conductive terminals to the outside due to the influence of the oxide film on the conductivity has been described in the background of the invention. Thus, the preferred method employs zinc displacement (or zinc displacement) to plate a layer of zinc, which is then replaced with nickel, thereby plating the copper. The method is described in detail in the second embodiment. The present invention is not limited to packaging aluminum-based solid electrolytic capacitor cores. For example, the electronic device package structure 100 of the present invention can also be used for tantalum capacitors (or tantalum electrolytic capacitors), and the process, the capacitor structure and the intermediate assembly structure corresponding to the first embodiment can also be applied to the packaging of other types of electronic devices.

The tantalum capacitor core adopts a porous tantalum structure as an anode, manganese oxide is coated on the surface of a pore of the porous tantalum structure to serve as a conductive electrolyte cathode, and the tantalum anode structure is connected outwards and penetrates through a tantalum wire, as shown by 11T in figure 2C. The external terminals can be connected to the anode tantalum wire by electroplating or vacuum sputtering a coating of nickel or copper onto the tip surface 11TC of the tantalum wire, or by applying a silver adhesive. Alternatively, a small piece of nickel or copper may be bonded to the anode tantalum wire by welding or pressing, and then the copper of the outer terminal may be directly plated on the nickel or copper sheet.

[ second embodiment ]

Please refer to fig. 6A to 6C, which are second embodiments of the present invention, it should be noted that the present embodiment is similar to the first embodiment, and therefore the same parts of the two embodiments are not repeated (for example, the protection substrate 20); furthermore, the relative numbers and shapes of the embodiments mentioned in the drawings are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, and are not used to limit the scope of the present invention.

It should be noted that, for convenience of understanding and explanation, the external anode terminal 70 and the external cathode terminal 80 are not shown in fig. 6A to 6C of the present embodiment as in fig. 3 of the first embodiment, but the present invention is not limited thereto. The electronic device package structure 100 of the present embodiment actually includes the external anode terminal 70 and the external cathode terminal 80, and thus is described.

As shown in fig. 6C, the main difference of this embodiment compared with the first embodiment is that the anode terminal 30 (the conductive film) further includes a zinc layer (not shown) and a nickel layer 31, the zinc layer is plated on a tip end surface 11A of the anode 11, the nickel layer 31 is plated on the zinc layer, and the second external conductive thin material 21CO and a portion of the internal cathode conductive thin material 21CI extend and are connected to the cathode terminal 30.

To further aid understanding and description, the detailed formation of the zinc layer and the nickel layer 31 will be described. First, as shown in fig. 6A, the first capacitor core 10, the plurality of protective substrates 20 and the insulating adhesive 60 together form a first semi-finished assembly, and both ends of the first semi-finished assembly are respectively processed to flatten the surfaces thereof and expose the tip surface 11A of the anode 11 of the first capacitor core 10 and the conductive thin materials 21AO, 21CO on the plurality of protective substrates 20.

Then, as shown in fig. 6B, the Zinc layer is deposited on the tip surface 11A by a Zinc replacement reaction (Zinc deposition process), and the Nickel layer 31 is plated on the Zinc layer by an Electroless Nickel bombardment reaction (Electroless Nickel Plating Strike process). Wherein, when the electroless nickel bombardment reaction is performed, metal nickel is not plated on the upper surface 22 and the lower surface 23 of the protective substrate 20 or the insulating paste material 60, which are non-conductive bodies, and the first outer conductive thin material 21AO and the second outer conductive thin material 21CO, which are copper pads, because copper does not catalyze electroless nickel.

Next, as shown in fig. 6C, the upper surface 22 and the lower surface 23 of the non-conductive protection substrate 20 are respectively masked by a plating mask, and then pre-treated (for example, plated with pd), and finally plated with electroless copper, so as to cover the two ends of the flat structure and the first external conductive thin material 21AO and the second external conductive thin material 21 CO. After the electroless copper plating is completed, the plated copper metal forms a good electrical connection with the nickel layer 31, and the anode terminal 30 (the conductive film) including the zinc layer and the nickel layer 31 is correspondingly formed.

[ third embodiment ]

Please refer to fig. 7A to 7C, which are illustrations of a third embodiment of the present invention, it should be noted that this embodiment is similar to the first and second embodiments, and therefore the same parts of the embodiments are not repeated (for example, the protection substrate 20); furthermore, the embodiments of the present invention are described in detail with reference to the figures, so as to facilitate understanding of the present invention, and the scope of the present invention is not limited thereto.

It should be noted that, for convenience of understanding and explanation, the external anode terminal 70 and the external cathode terminal 80 are not shown in fig. 7A to 7C of the present embodiment as in fig. 3 of the first embodiment, but the present invention is not limited thereto. The electronic device package structure 100 of the present embodiment actually includes the external anode terminal 70 and the external cathode terminal 80, and thus is described.

As shown in fig. 7A to 7C, the main difference of this embodiment compared with the second embodiment is that the electronic device package structure 100 further includes the conductive connecting material 50A disposed between two opposite sides of the anode 11 (i.e. a portion of the tip end surface 11A), the plurality of protective substrates 20 and the anode terminal 30, so as to further connect the three components and correspondingly improve the adhesion strength of the anode terminal 30 and the structural strength of the electronic device package structure 100.

Further, the conductive connecting material 50A disposed on the anode 11 can be used to connect the inner anode conductive thin material 21AI to the anode 11, and a material different from the conductive connecting material 50 connecting the cathode 12 and the inner cathode conductive thin material 21CI can be used for the conductive connecting material 50A disposed on the anode 11.

It should be noted that, by the technical solution of "providing the anode 11 with the conductive connecting material 50A", the conductive connecting material 50A can increase the mechanical strength of the anode terminal 30 with a relatively large bonding area and an end thereof close to the anode 11.

Since the difference between this embodiment and the second embodiment is only that the conductive connecting material 50A is disposed on both sides of the anode 11, other components or manufacturing processes (such as the formation process of the zinc layer or the nickel layer 31) are similar, and thus the description thereof is omitted.

[ fourth embodiment ]

Please refer to fig. 8, which is a fourth embodiment of the present invention, it should be noted that this embodiment is similar to the first embodiment, and therefore the same parts of the two embodiments are not repeated (for example, the protection substrate 20); furthermore, the relative numbers and shapes of the embodiments mentioned in the drawings are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, and are not used to limit the scope of the present invention.

As shown in fig. 8, the main difference of this embodiment compared with the first embodiment is that the electronic device package structure 100 further includes a second capacitor core 10-2, and in this embodiment, the specific structure of the second capacitor core 10-2 is substantially the same as that of the first capacitor core 10, but the invention is not limited thereto. For example, in other embodiments of the present invention, the specific structure of the second capacitor core 10-2 may be different from that of the first capacitor core 10.

Further, the second capacitor core 10-2 is disposed on the first capacitor core 10 in a stacked manner at intervals, and the second capacitor core 10-2 is disposed between two protective substrates 20, and the two protective substrates 20, the first capacitor core 10 and the second capacitor core 10-2 together form a multi-layer core structure. Wherein two cathodes (not shown) of the first and second condenser cores 10-2 are connected to the cathode terminal 40, and two anodes (not shown) of the first and second condenser cores 10-2 are connected to the anode terminal 30.

It should be noted that, as shown in fig. 8, the conductive connecting material 50 is disposed between the two cathodes of the first capacitor core 10 and the second capacitor core 10-2, and the insulating glue material 60 is filled between the two anodes of the first capacitor core 10 and the second capacitor core 10-2.

[ fifth embodiment ]

Please refer to fig. 9, which is a fifth embodiment of the present invention, it should be noted that this embodiment is similar to the first embodiment and the fourth embodiment, and therefore the same parts of the embodiments are not described again (for example, the protection substrate 20); furthermore, the relative numbers and shapes of the embodiments mentioned in the drawings are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, and are not used to limit the scope of the present invention.

As shown in fig. 9, the main difference of this embodiment compared with the first and the fourth embodiments is that the electronic component packaging structure 100 further includes a middle substrate 20-2, and the middle substrate 20-2 is disposed between the first capacitor core 10 and the second capacitor core 10-2, and the middle substrate 20-2 includes an anode end conductive thin material set and a cathode end conductive thin material set separated from each other. Wherein the cathode end conductive sheet material group is connected to the two cathodes (not shown) of the first and second capacitor cores 10 and 10-2 by the conductive connecting material 50, and the anode end conductive sheet material group is connected to the anode terminal 30.

Further, as shown in fig. 9, the middle substrate 20-2, which is located between the first capacitor core 10 and the second capacitor core 10-2, is provided with the cathode terminal conductive sheet material group on the surface thereof, which includes two inner cathode conductive sheet materials 20-2AM, and the two inner cathode conductive sheet materials 20-2AM can be electrically connected to the two cathodes of the first capacitor core 10 and the second capacitor core 10-2 through the conductive connecting material 50; the middle substrate 20-2, which is located between the first capacitor core 10 and the second capacitor core 10-2, has the anode terminal conductive thin material set disposed on the surface thereof, which includes two inner anode conductive thin materials 20-2BM, and the two inner anode conductive thin materials 20-2BM are electrically connected to the two anodes (not shown) of the first capacitor core 10 and the second capacitor core 10-2 and the anode terminal 30.

Therefore, the technical scheme that the middle layer substrate 20-2 is arranged between the first capacitor core 10 and the second capacitor core 10-2 is beneficial to improving the structural strength of the electronic component packaging structure 100. Further, the middle substrate 20-2, which is positioned between the first condenser core 10 and the second condenser core 10-2, has two inner anode conductive sheets 20-2AM provided on the surface thereof, which contribute to the enhancement of the adhesion of the two anodes of the first condenser core 10 and the second condenser core 10-2.

[ sixth embodiment ]

Please refer to fig. 10 and 11, which are related to a sixth embodiment of the present invention, and the related numbers and shapes of the embodiment mentioned in the drawings are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, but not for limiting the scope of the present invention.

As shown in fig. 10, the main difference of this embodiment compared to the first, fourth and fifth embodiments is that the protection substrate 20 is an all-conductor (e.g. a copper substrate, which may be referred to as an all-copper substrate for convenience), and the all-conductor plate is etched into conductive pads by a selective etching method, and a plurality of the conductive pads may be further defined as two anode conductive pads 20A and two cathode conductive pads 20B in this embodiment, and the two anode conductive pads 20A and the two cathode conductive pads 20B may be made of thin copper sheets, but the invention is not limited thereto. For example, in other embodiments of the present invention, the number of the conductive pads can be adjusted according to actual requirements.

Further, the two anode conductive pads 20A and the two cathode conductive pads 20B are electrically connected to the external anode terminal 70 and the external cathode terminal 80, respectively, and the insulating glue 60 is filled in the gap between the first capacitor core 10, the two anode conductive pads 20A and the two cathode conductive pads 20B. There is no electrical connection between any two adjacent anode conducting pads 20A and cathode conducting pads 20B, and by the arrangement of the two anode conducting pads 20A and the two cathode conducting pads 20B, the overall thickness of the electronic device package structure 100 of the present invention can be effectively reduced.

It should be noted that, in the present embodiment, each of the cathode conductive pads 20B is large and is only smaller than the cathode (not shown). Thus, each of the cathode conductive pads 20B can replace a major portion of the protective substrate 20, and the cathode can be connected to each of the cathode conductive pads 20B with a relatively large contact area to provide low electrical impedance. In addition, the cathode terminal 40 or the external cathode terminal 80 may cover only a portion of each of the cathode conductive pads 20B in this embodiment.

An advantage of using an all-conductor protective substrate is that the thickness of the package is reduced. The aforementioned example of the first embodiment of the insulating protective substrate with the conductive thin material attached thereon can be exemplified by a typical printed circuit board, which generally comprises a substrate of non-conductive material, and a copper foil layer covered on the upper and lower surfaces thereof, wherein the substrate is generally made of glass fiber reinforced epoxy resin and has a thickness of 0.1 mm to 0.2 mm, and the copper foil layer is generally 1/2 ounces or 1 ounce and has a thickness of 0.018 mm to 0.035 mm. Therefore, if a typical printed circuit board is used as the protective substrate 20, the total thickness of the two protective substrates 20 is about 0.27 mm to 0.54 mm. On the other hand, if only the all-copper substrate having a thickness of 0.1 mm is used, the total thickness of the 2 all-copper protective substrates can be reduced to 0.2 mm. If only the copper clad laminate used by the copper foil layer of the printed circuit board is used as the full copper protective substrate, the total thickness of the 2 full copper protective substrates can be further reduced to 0.035-0.07 mm.

It should be noted that, as shown in fig. 9 and 11, even if the protection substrates 20 are replaced by the conductive pads of all conductors, the electronic component package structure 100 can still be used to package the first capacitor core 10 and the second capacitor core 10-2. In comparison with fig. 11, fig. 9 is different from fig. 11 only in that one anode conductive pad 20A and one cathode conductive pad 20B are additionally disposed between the first capacitor core 10 and the second capacitor core 10-2.

In other words, comparing fig. 11 with fig. 8 of the fourth embodiment, the only difference is that the protection substrate 20 originally located between the first capacitor core 10 and the second capacitor core 10-2 is replaced with one anode conductive pad 20A and one cathode conductive pad 20B.

[ seventh embodiment ]

Please refer to fig. 12, which is a seventh embodiment of the present invention, it should be noted that this embodiment is similar to the first embodiment, the fourth embodiment and the fifth embodiment, and therefore the same points of the embodiments are not repeated (for example, the protection substrate 20); furthermore, the relative numbers and shapes of the embodiments mentioned in the drawings are only used for describing the embodiments of the present invention in detail, so as to facilitate the understanding of the contents of the present invention, and are not used to limit the scope of the present invention.

As shown in fig. 12, the main difference of this embodiment compared with the first embodiment is that the ends of the protection substrates 20 adjacent to the anode terminal 30 further include an anode side conductive thin material 21AX thereon, and the ends of the protection substrates 20 adjacent to the cathode terminal 40 further include a cathode side conductive thin material 21BX thereon.

Further, the conductive film (the anode terminal 30) covers the anode side conductive thin material 21AX and the end surface and the side surface of the flat body structure located adjacent to the anode terminal 30, and the anode terminal 30 covers the end surface and the side surface of the flat body structure to form the five-surface covered anode terminal 30 correspondingly, so as to enhance the structural strength of the electronic component packaging structure 100; the cathode terminal 40 covers the cathode side conductive thin material 21BX and the end surface and the side surface of the flat body structure at the position adjacent to the cathode terminal 40, and enhances the structural strength of the electronic component packaging structure 100.

[ eighth embodiment ]

Please refer to fig. 13 to 18, which are eighth embodiments of the present invention, it should be noted that the present embodiment is similar to the first to seventh embodiments, and therefore the same parts of the embodiments are not repeated (for example, the protection substrate 20); furthermore, the embodiments of the present invention are described in detail with reference to the figures, so as to facilitate understanding of the present invention, and the scope of the present invention is not limited thereto.

As shown in fig. 13, an eighth embodiment of the invention provides a method S100 for manufacturing an electronic device package structure, which includes: a first providing step S101, a setting step S102, a second providing step S103, a laminating step S104, a first curing step S105, a glue filling step S106, a second curing step S107, a cutting step S108, a film forming step S109, and a cutting step S110. The film forming step S109 further includes a plating sub-step and a connector step, but the invention is not limited thereto. For example, in another embodiment of the present invention, the film forming step S109 may not include the plating substep and the connector substep.

As shown in fig. 14A and 14B, in the first providing step S101, a bottom substrate 20C is provided, and a top surface 20C1 of the bottom substrate 20C defines a plurality of first predetermined locations (not shown), and a plurality of conductive thin materials 21 are further disposed on the top surface 20C1 of the bottom substrate 20C corresponding to the plurality of first predetermined locations. The conductive thin materials 21 are coated with a conductive connecting material 50, and the structure and material of the bottom substrate 20C are the same as those of the protection substrate 20 disclosed in the first embodiment of the present invention.

As shown in fig. 13, 14A and 14B, in the setting step S102, a plurality of electronic core members (not shown) are placed on the conductive connecting materials 50 on the plurality of conductive thin materials 21. Wherein each of said electronic core pieces comprises a first capacitor core 10, and said first capacitor core 10 comprises an anode 11, a cathode 12, and a barrier coating 13.

As shown in fig. 13, 14A and 14B, in the second providing step S103, a top substrate 20D is provided, and a plurality of second predetermined locations (not shown) are defined on a lower surface 20D1 of the top substrate 20D, and a plurality of conductive thin materials 21 are disposed on the lower surface 20D1 of the top substrate 20D corresponding to the plurality of second predetermined locations, and the conductive connecting material 50 is coated on the plurality of conductive thin materials 21. The structure and material of the top substrate 20D are the same as those of the protection substrate 20 disclosed in the first embodiment of the present invention.

It should be noted that the cathode 12 can be used to cooperate with the conductive connecting material 50 to combine with the plurality of conductive thin materials 21 on the bottom substrate 20C and the plurality of conductive thin materials 21 on the top substrate 20D.

As shown in fig. 13, 14A and 14B, in the stacking step S104, the top substrate 20D is stacked on the bottom substrate 20C at intervals such that the first condenser core 10 of the plurality of electronic core pieces is located between the top substrate 20D and the bottom substrate 20C. The edge of the bottom substrate 20C exceeds a projection area (not shown) formed by the orthographic projection of the top substrate 20D, and a portion of the upper surface 20C1 of the bottom substrate 20C exceeding the projection area is defined as a glue placement area 20 CA.

In the present embodiment, the first condenser core 10 of the plurality of electronic core members is disposed between the top substrate 20D and the bottom substrate 20C for encapsulation, but the present invention is not limited thereto. For example, in other embodiments of the present invention, the first capacitor core 10 of a plurality of the electronic core pieces may also be disposed between two or more protective substrates 20 as shown in fig. 9 or fig. 14A to 14B of the fifth embodiment to be collectively processed into a plurality of the electronic core piece packaging structures 100.

As shown in fig. 13, 14A and 14B, in the first curing step S105, the conductive connecting material 50 is cured, so that the top substrate 20D is connected to the bottom substrate 20C and the first capacitor core 10 of the plurality of electronic core pieces to form a basic assembly. Wherein, the inner space of the basic assembly forms a channel (not labeled), which is connected to the glue placing area 20 CA.

As shown in fig. 13, 14A and 14B, in the glue filling step S106, an insulating glue material 60 fills the channel from the glue placing region 20CA to correspondingly embed the first condenser core 10 of the plurality of electronic core pieces between the top substrate 20D and the bottom substrate 20C. Wherein the insulating glue material 60 can fill the channels by capillary action.

Further, the first condenser core 10 due to each of the electronic core pieces is sandwiched between the top substrate 20D and the bottom substrate 20C and buried therein. Therefore, the conventional liquid-in-place package cannot be applied to package the first condenser core 10 of the plurality of electronic core pieces sandwiched between the top substrate 20D and the bottom substrate 20C, because the conventional liquid-in-place package is generally performed on a single exposed structure. In addition, it is difficult to use a composite or transfer molding packaging method because in this case, the liquid must be squeezed in through the narrow edge opening between the top substrate 20D and the bottom substrate 20C, and special molds are required for sealing and pressurization.

As described above, in order to fill the gap (the channel) between the top substrate 20D and the bottom substrate 20C with the insulating adhesive material 60, capillary filling is the preferred method. Further, the area of the bottom substrate 20C needs to be larger than that of the top substrate 20D, so that the portion of the upper surface 20C1 of the bottom substrate 20C beyond the projection area is defined as the glue placement area 20 CA.

The uncured insulating glue material 60 will flow into the gap (the channel) by capillary effect. Preferably, a liquid is injected into one end between the top substrate 20D and the bottom substrate 20C, so that the uncured insulating rubber material 60 flows from one end to the other end. Capillary effect is capable of drawing liquid into narrow gaps to fill sandwich elements having an area of at least 100 mm x 240 mm. This process can be carried out at normal atmospheric pressure with a simple liquid dispensing device.

As shown in fig. 13, 14A and 14B, in the second hardening step S107, the insulating adhesive material 60 is baked and hardened, so that the basic assembly and the insulating adhesive material 60 correspond to each other to form a first semi-finished assembly.

As shown in fig. 13, fig. 15A and fig. 15B, in the cutting step S108, the first semi-finished assembly is cut and a plurality of slot openings 105 are correspondingly formed, so that a plurality of conductive thin materials 21 on the bottom substrate 20C and a plurality of conductive thin materials 21 on the top substrate 20D are partially exposed, and a second semi-finished assembly is correspondingly formed. Wherein a portion of the anode 11 can be exposed out of the tip surface 11A through the slotted openings 105 of the second semi-finished assembly.

It should be noted that, as shown in fig. 18, in the cutting step S108, a plurality of secondary slot openings 105A may be further cut in addition to the plurality of slot openings 105 to expose the plurality of anodes 11 and the plurality of cathodes 12 of the plurality of first capacitor cores 10. Thus, the top substrate 20D and the bottom substrate 20C of the second semi-finished assembly will be more easily processed, facilitating further deposition of metal to cover and wrap the top substrate 20D and the bottom substrate 20C.

It should be noted that, in other embodiments of the present invention, the second semi-finished product assembly can be used alone (for example, sold) or used with other components.

As shown in fig. 13, with reference to fig. 3 of the first embodiment of the present invention and fig. 6A to 6C of the second embodiment of the present invention, in the film forming step S109, a conductive film is formed on the second semi-finished assembly, and a plurality of device terminals (e.g., the anode terminal 30 and the cathode terminal 40 of the first embodiment of the present invention) are correspondingly formed, so that the second semi-finished assembly and the plurality of device terminals correspond to each other to form a third semi-finished assembly. The plurality of module terminals are connected to the plurality of exposed conductive thin materials 21.

In the sub-step of electroplating, metal zinc is electroplated on the exposed part of the surface of the anode 11 and a zinc layer is formed correspondingly, and then metal nickel is electroplated on the zinc layer and a nickel layer 31 is formed correspondingly.

In the connector step, the anode 11 of the first capacitor core 10 is connected to an anode terminal 30 through the nickel layer 31 and the conductive film, and the cathode 12 of the first capacitor core 10 is connected to a cathode terminal 40 through the plurality of conductive thin materials 21.

As shown in fig. 13, in the cutting step S110, the third semi-finished product assembly is cut to correspondingly form a plurality of electronic device package structures 100.

In the method S100 for manufacturing the electronic device package structure, the top substrate 20D and the bottom substrate 20C of the electronic device package structure 100 may be replaced with a plurality of conductive pads having all conductors as shown in fig. 10 and 11 of the sixth embodiment of the present invention. Further, as shown in fig. 17A. First, a plurality of the first condenser cores 10 of the plurality of electronic core pieces are placed between an upper conductor piece 20E and a lower conductor piece 20F and bonded to the conductor pieces by the conductive connecting material 50 to form a complete sandwich structure. Then, the insulating adhesive material 60 is filled in the gap between the upper conductor piece 20E and the lower conductor piece 20F and cured. Then, as shown in FIG. 17B, selected portions 20E1 of the upper conductor strip 20E and selected portions 20F1 of the lower conductor strip 20F are etched away, with the remaining portions of the upper conductor strip 20E and the lower conductor strip 20F forming separate two anode conductive pads 20A and two cathode conductive pads 20B. Thereafter, as shown in fig. 17C, the cutting step S108 is performed to open a plurality of the slot openings 105.

It is to be noted that, for convenience of explanation and understanding, a plurality of the electronic core members will be explained below as an aluminum capacitor core for mass production. For example, as shown in fig. 16, the second semi-finished assembly additionally includes the middle substrate 20-2, and in this embodiment, each of the electronic core pieces has a size of 7.4 mm × 3.7 mm × 0.25 mm, and a plurality of the electronic core pieces are connected in parallel. The top substrate 20D and the bottom substrate 20C each had a thickness of 0.075 mm covered with 1 ounce copper foil, which corresponds to a thickness of 0.035 mm.

The top substrate 20D has dimensions of 230 mm × 110 mm; the size of the middle substrate 20-2 is 230 mm × 108 mm; the bottom substrate 20C has dimensions of 240 mm × 125 mm. Therefore, 506 capacitor cores can be contained between any two substrates. In the subsequent step S110, a plurality of the electronic device package structures 100 are cut and separated, and each of the electronic device package structures 100 has a size of 7.3 mm × 4.4 mm × 1.1 mm. In contrast, if a conventional lead frame and overmolded package were used, the dimensions of each electronic component package structure 100 would be 7.3 mm by 4.3 mm by 1.9 mm, significantly thicker than the product of the present invention.

It is to be noted that, for convenience of explanation and understanding, a plurality of the electronic core pieces will be explained below as a tantalum capacitor core for mass production. For example, as shown in fig. 14B, the second semi-finished assembly only includes the top substrate 20D and the bottom substrate 20C, and in this embodiment, the size of each electronic core piece is 7.0 mm × 3.65 mm × 1.0 mm, and a plurality of electronic core pieces are connected in parallel. The top substrate 20D and the bottom substrate 20C each have a thickness of 0.075 mm covered with a 1 oz copper foil having a thickness of 0.035 mm.

The top substrate 20D has a size of 230 mm × 110 mm, and the bottom substrate 20C has a size of 240 mm × 125 mm. Thus, 506 condenser cores can be included between the two

substrates

20D and 20C. In the subsequent step S110, a plurality of the electronic device package structures 100 are cut and separated, and each of the electronic device package structures 100 has a size of 7.3 mm × 4.4 mm × 1.5 mm. In contrast, if a conventional lead frame and overmolded package were used, the dimensions of each electronic component package structure 100 would be 7.3 mm by 4.3 mm by 1.9 mm, significantly thicker than the product of the present invention.

[ advantageous effects of the embodiments ]

One of the advantages of the present invention is that the electronic component package structure 100, the manufacturing method S100 thereof, and the semi-finished product assembly provided by the present invention can obtain a solid electrolytic capacitor with low profile, low ESR, and high reliability by the technical solution of "filling the gaps between the plurality of protective substrates 20 and the first capacitor core 10 with the insulating adhesive 60".

The disclosure is only a preferred embodiment of the invention and should not be taken as limiting the scope of the invention, so that the invention is not limited by the disclosure of the specification and drawings.

Claims

1. A method for manufacturing an electronic device package structure, the method comprising:

a first providing step: providing a bottom substrate; the upper surface of the bottom substrate is defined with a plurality of first preset positions, a plurality of conductive thin materials are further arranged on the upper surface of the bottom substrate corresponding to the first preset positions, and a conductive connecting material is coated on the conductive thin materials;

the setting step: placing a plurality of electronic core pieces on the conductive connecting material on the plurality of conductive thin materials;

a second providing step: providing a top substrate; a plurality of second predetermined positions are defined on the lower surface of the top substrate, a plurality of conductive thin materials are arranged on the lower surface of the top substrate corresponding to the second predetermined positions, and the conductive connecting materials are coated on the plurality of conductive thin materials;

a superposition step: stacking the top substrate on the bottom substrate at intervals, so that the electronic core pieces are located between the top substrate and the bottom substrate; wherein, the edge of the bottom substrate exceeds a projection area formed by the orthographic projection of the top substrate to the bottom substrate, and the part of the upper surface of the bottom substrate exceeding the projection area is defined as a glue placing area;

a first hardening step: hardening the conductive connecting material, and further connecting the top substrate with the bottom substrate and a plurality of electronic core pieces to form a basic assembly correspondingly; wherein, a channel is formed in the inner space of the basic assembly and is communicated with the glue placing area;

and (3) glue filling: filling the channel with an insulating glue material from the glue placing region so as to correspondingly embed the plurality of electronic core pieces between the top substrate and the bottom substrate;

a second hardening step: hardening the insulating glue material, and further enabling the basic assembly and the insulating glue material to correspond to form a first semi-finished product assembly;

cutting: cutting the first semi-finished product assembly and correspondingly forming a plurality of slotted hole openings to expose a plurality of conductive thin materials on the bottom substrate and a plurality of conductive thin materials on the top substrate, and correspondingly forming a second semi-finished product assembly;

a film forming step: forming a conductive film on the second semi-finished product assembly and correspondingly forming a plurality of component terminals, so that the second semi-finished product assembly and the component terminals correspondingly form a third semi-finished product assembly; wherein a plurality of component terminals are communicated with the exposed conductive thin materials; and

cutting: and cutting the third semi-finished product assembly to correspondingly form a plurality of electronic component packaging structures.

2. The method of claim 1, wherein the insulating material fills the via by capillary action during the step of filling.

3. The method of manufacturing an electronic assembly packaging structure of claim 2, wherein each of the electronic core pieces further comprises a capacitor core, the capacitor core comprises an anode and a cathode, and the cathode is capable of cooperating with the conductive connecting material to combine with the plurality of conductive thin materials on the bottom substrate and the plurality of conductive thin materials on the top substrate, and a portion of the anode is capable of being exposed through the plurality of slot openings on the second semi-finished assembly; wherein, the film forming step further comprises an electroplating substep: electroplating metal zinc on the partial surface of the exposed anode and correspondingly forming a zinc layer, and electroplating metal nickel on the zinc layer and correspondingly forming a nickel layer; wherein the film forming step further comprises a connector step of: connecting the anode of the capacitor core to an anode terminal via the zinc layer and the nickel layer, and connecting the cathode of the capacitor core to a cathode terminal via the plurality of conductive sheets.

4. A semi-finished product assembly, wherein the semi-finished product assembly is adapted for use in an electronic component package, the semi-finished product assembly comprising:

a plurality of protective substrates which are arranged in a stacked manner at intervals, a plurality of preset positions are defined between any two adjacent protective substrates, and a plurality of conductive thin materials are further arranged on the surface of each protective substrate corresponding to the preset positions; the edge of one of any two adjacent protective substrates exceeds a projection area formed by the orthographic projection of the other protective substrate on the protective substrate, and the partial surface of the protective substrate exceeding the projection area is defined as a glue placing area;

a plurality of electronic core pieces located between the plurality of protective substrates, and the plurality of electronic core pieces being disposed at a plurality of the predetermined positions; wherein each of the electronic core pieces comprises a plurality of contacts;

a conductive connecting material connected to the plurality of conductive thin materials and part of the contacts;

an insulating adhesive material filling gaps between the plurality of protective substrates and the plurality of electronic core members; and

and a plurality of slot openings passing through the plurality of protective substrates and the insulating adhesive material, and the plurality of slot openings can be used for exposing the plurality of conductive thin materials communicated with the partial contacts of the electronic core member.

5. The semi-finished assembly of claim 4, wherein each of said electronic core pieces further comprises a capacitor core, and two of said contacts of said capacitor core are respectively defined as an anode and a cathode, and said cathode is adapted to be coupled to a plurality of said conductive sheets, and a plurality of said slotted openings are adapted to expose portions of said anode; wherein, a zinc layer is formed on the surface of the exposed anode by electroplating.

6. The assembly as claimed in claim 4, wherein each of the protection substrates is an all-copper substrate, and each of the protection substrates is etched to form a plurality of the conductive thin materials.

7. An electronic package assembly, comprising:

a plurality of protective substrates which are arranged in a stacked manner at intervals, a preset position is defined between any two adjacent protective substrates, and a plurality of conductive thin materials are further arranged on the surface of each protective substrate corresponding to the preset position;

the first capacitor core is arranged at the preset position and forms a sandwich structure together with the plurality of protective substrates; wherein, the first capacitor core comprises a cathode and an anode;

the insulating glue material is filled in gaps between the plurality of protective substrates and the first capacitor core and forms a flat structure together with the plurality of protective substrates and the first capacitor core;

an anode terminal located at one end of the flat body structure;

a cathode terminal located at the other end of the flat body structure located away from the anode terminal; and

a conductive connecting material connected to a plurality of the conductive thin materials and a part of the cathode on each protective substrate;

wherein a part of the plurality of conductive thin materials extends and is connected to the cathode terminal, and the cathode terminal is connected and formed on the plurality of conductive thin materials in a manner of copper plating; wherein a portion of the anode is connected to the anode terminal, and the anode terminal is connected to and formed at a portion of the anode in such a manner as to form a conductive film.

8. The electronic component package structure of claim 7, wherein each of the protective substrates is an all-copper substrate, and each of the protective substrates is etched to form a plurality of the conductive thin materials.

9. The electronic component package according to claim 7, further comprising a second capacitor core, wherein the second capacitor core is disposed on the first capacitor core in a spaced-apart manner, and the second capacitor core is disposed between the plurality of protective substrates; wherein the plurality of protective substrates, the first capacitor core and the second capacitor core together form a multi-layer core structure, the second capacitor core includes a cathode and an anode, two cathodes of the first capacitor core and the second capacitor core are connected to the cathode terminal, and two anodes of the first capacitor core and the second capacitor core are connected to the anode terminal.

10. The electronic component package according to claim 9, further comprising a middle substrate disposed between the first capacitor core and the second capacitor core, wherein the middle substrate comprises an anode-side conductive sheet set and a cathode-side conductive sheet set separated from each other; the cathode end conductive thin material group is connected to the two cathodes of the first capacitor core and the second capacitor core through the conductive connecting material, and the anode end conductive thin material group is connected to the anode terminal.

11. The electronic device package of claim 7, wherein the conductive film comprises a zinc layer and a nickel layer, and wherein the zinc layer is plated on a portion of the surface of the anode and the nickel layer is plated on the zinc layer.

12. The electronic component package according to claim 7, wherein the anode has two sides on opposite sides, and the two sides are connected to the plurality of protective substrates and the anode terminal with the conductive connecting material to enhance the structural strength of the electronic component package.

13. The electronic device package structure of claim 7, wherein the plurality of protective substrates further comprise an anode-side conductive thin material disposed at a plurality of ends of the plurality of protective substrates adjacent to the anode terminal, and the anode terminal covers the anode-side conductive thin material and the end surface and the side surface of the flat body structure adjacent to the anode terminal, so as to form the five-sided coated anode terminal correspondingly and enhance the structural strength of the electronic device package structure; the plurality of protective substrates further comprise a cathode side conductive thin material positioned at a plurality of ends of the plurality of protective substrates adjacent to the cathode terminal, and the cathode terminal covers the cathode side conductive thin material and the end face and the side face of the flat body structure positioned adjacent to the cathode terminal, and enhances the structural strength of the electronic component packaging structure.