CN114899218A - High-voltage-resistant protection device and manufacturing method thereof - Google Patents

High-voltage-resistant protection device and manufacturing method thereof Download PDF

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Publication number
CN114899218A
CN114899218A CN202210466661.8A CN202210466661A CN114899218A CN 114899218 A CN114899218 A CN 114899218A CN 202210466661 A CN202210466661 A CN 202210466661A CN 114899218 A CN114899218 A CN 114899218A
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well
active region
voltage
doping
sub
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杜明
裴国旭
李会羽
陈锡均
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STMicroelectronics Shenzhen R&D Co Ltd
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STMicroelectronics Shenzhen R&D Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/66007—Multistep manufacturing processes
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    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
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    • H01L29/66393—Lateral or planar thyristors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7436—Lateral thyristors

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Abstract

The application is suitable for the technical field of semiconductor devices, and provides a high-voltage-resistant protection device which comprises a substrate, a buried layer and an epitaxial layer, wherein the substrate, the buried layer and the epitaxial layer are sequentially stacked; based on the epitaxial layer, a first trap and a high-voltage trap are sequentially arranged from any point of the edge of the epitaxial layer to the direction of the central point; a first active region is arranged on the first trap; the high-voltage trap is provided with three closed annular vacant areas, and a second trap, a third trap and a fourth trap are respectively arranged in the three annular vacant areas; a second active region, a third active region and a fourth active region are arranged on the second well, the third well and the fourth well; the fifth trap is arranged on the high-voltage trap, and the fifth active region is arranged on the fifth trap, so that the technical problem that the SCR device in the prior art cannot be applied to an ultrahigh voltage-resistant occasion is solved.

Description

High-voltage-resistant protection device and manufacturing method thereof
Technical Field
The application belongs to the technical field of semiconductor devices, and particularly relates to a high-voltage-resistant protection device and a manufacturing method thereof.
Background
As the size of semiconductor processes is reduced, the difference between the device operating voltage and the breakdown voltage is smaller and smaller, and the problem of electrostatic discharge (ESD) of integrated circuits is more and more significant. Usually, the working voltage of the chip port is between 0V and the power supply voltage, so that the ESD structure of the ordinary device port only needs to ensure that the ESD device has no leakage current when the port voltage is between 0V and the power supply voltage.
When an ESD event occurs in the existing SCR device with high triggering and positive voltage resistance, the triggering of the SCR structure requires that the voltage between a PAD (PAD area) and the ground exceeds the reverse breakdown voltage of a PN (positive-negative) junction, and the structure is only suitable for the condition that the normal working voltage of the PAD is higher than the ground voltage.
However, in practical applications, a port voltage of some chips is much higher than a power supply voltage or lower than a negative voltage of a ground potential, and in this case, a parasitic PN junction of an SCR device is turned on, which causes a large leakage current at a port, so that a port signal is incomplete, and practical use of the entire chip is affected. And the conduction of a Silicon Controlled Rectifier (SCR) device is triggered by reversely breaking down PN junctions of an N well and a P well, so that the SCR device cannot be applied to the occasions with ultrahigh voltage resistance, and some application occasions have special requirements of small leakage current and the like.
Disclosure of Invention
The embodiment of the application provides a high-voltage-resistant protection device and a manufacturing method thereof, and can solve the technical problem that an SCR device in the prior art cannot be applied to an ultrahigh voltage-resistant occasion.
In a first aspect, an embodiment of the present application provides a high voltage resistant protection device, including:
a substrate;
burying the layer;
the substrate, the buried layer and the epitaxial layer are sequentially stacked;
based on the epitaxial layer, a first well and a high-voltage well are sequentially arranged from any point of the edge of the epitaxial layer to the direction of the central point; a first active region is arranged on the first trap;
the high-voltage trap is provided with three closed annular vacant areas, and a second trap, a third trap and a fourth trap are respectively arranged in the three annular vacant areas; a second active region, a third active region and a fourth active region are arranged on the second well, the third well and the fourth well;
a fifth trap is arranged on the high-voltage trap, and a fifth active region is arranged on the fifth trap;
the doping types of the substrate, the epitaxial layer, the first well, the second well, the third well, the fourth well, the first active region and the third active region are of a first type;
the doping types of the buried layer, the fifth well, the second active region, the fourth active region and the fifth active region are of a second type; the first type is different from the second type.
In one possible implementation manner of the first aspect, the first well, the second well, the third well, the fourth well, and the fifth well are all closed rings.
In a possible implementation manner of the first aspect, the doping concentration of the high-voltage well is less than the doping concentration of the first well, the doping concentration of the second well, the doping concentration of the third well, the doping concentration of the fourth well, and the doping concentration of the fifth well, respectively.
In a possible implementation manner of the first aspect, the fifth active region is floating; the first active region, the second active region of the second well, the third active region and the fourth active region form a first end of the high voltage resistant protection device; the second active region, the third active region and the fourth active region of the third well form a second end of the high-voltage-resistant protection device; any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
In one possible implementation manner of the first aspect, the first type doping is P doping; the second type doping is N doping; or the like, or, alternatively,
the first type doping is N doping; the second type doping is P doping.
In a possible implementation manner of the first aspect, the high-voltage well includes a first high-voltage sub-well, a second high-voltage sub-well, and a third high-voltage sub-well that are mutually communicated, each sub-well respectively surrounds one of the annular vacant regions, the fifth well includes a first sub-well, a second sub-well, and a third sub-well that are mutually communicated, and each sub-well is uniformly arranged on each high-voltage sub-well in a pair; the fifth active region comprises a first sub-active region, a second sub-active region and a third sub-active region, and each sub-active region is arranged on each sub-well in a one-to-one mode.
In a possible implementation manner of the first aspect, the third well is an emitter, the second high-voltage sub-well and the second sub-well are bases, and the second well and the fourth well are collectors, so as to form a lateral PNP triode 1;
the second high-voltage sub-well and the second sub-well are used as collectors, the second well and the fourth well are used as bases, and a fourth active region and a second sub-active region of the second well are emitters, so that a transverse NPN triode 1 is formed;
the buried layer is a collector, the second well and the fourth well are bases, and a fourth active region and a second sub-active region of the second well are emitters, so that a longitudinal NPN triode 2 is formed;
the transverse NPN triode 1, the longitudinal NPN triode 2 and the transverse PNP triode 1 form a positive silicon controlled rectifier structure.
In a possible implementation manner of the first aspect, the second well and the fourth well are emitters, the second high-voltage sub-well and the second sub-well are bases, and the third well is a collector, so as to form a lateral PNP triode 2;
the second high-voltage sub-well is used as a collector, the third well is used as a base electrode, and the second active region and the fourth active region of the third well are used as emitter electrodes, so that a transverse NPN triode 3 is formed;
the buried layer is a collector, the third well is a base, and the second active region and the fourth active region of the third well are emitters to form a longitudinal NPN triode 4;
the transverse NPN triode 3, the longitudinal NPN triode 4 and the transverse PNP triode 2 form a reverse silicon controlled rectifier structure.
In a second aspect, an embodiment of the present application provides a method for manufacturing a high voltage resistant protection device, including:
forming a buried layer on a substrate by diffusion or ion implantation;
forming an epitaxial layer on the buried layer by growth epitaxy;
forming a first well on the epitaxial layer through first type doping and forming a high-voltage well with three closed annular vacant areas through inversion doping;
forming a second well, a third well and a fourth well in the three annular vacant areas respectively through first type doping;
forming a first active region on the first well by first type doping;
a second active region, a third active region and a fourth active region are arranged on the second well, the third well and the fourth well through first type doping and second type doping;
forming a fifth well in the high-voltage well by doping of a second type;
forming a fifth active region in the fifth well by doping of a second type;
the doping types of the substrate, the epitaxial layer, the first well, the second well, the third well, the fourth well, the first active region and the third active region are of a first type;
the doping types of the buried layer, the fifth well, the second active region, the fourth active region and the fifth active region are of a second type; the first type is different from the second type.
In a possible implementation manner of the second aspect, the first active region, the second active region, the third active region, and the fourth active region of the second well, and the second active region, the third active region, and the fourth active region of the fourth well are connected by a metal wire to form a first end of the high voltage tolerant protection device;
the second active region, the third active region and the fourth active region of the third well are connected through metal wires to form a second end of the high-voltage-resistant protection device;
any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
Compared with the prior art, the embodiment of the application has the advantages that:
the first trap and the high-voltage trap with a special shape are preset, the second trap, the third trap and the fourth trap are arranged in the reserved annular vacant area in the high-voltage trap, the fifth trap is arranged on the high-voltage trap, and the first trap to the fifth trap are doped to form a plurality of active areas, so that a special PN junction formed by the high-voltage trap and other traps can be formed on the high-voltage resistant protection device, the special connection of the PN junctions is realized through the setting process, and the effect of equal forward breakdown voltage and reverse breakdown voltage is realized through the structure, so that the limit values of the reverse breakdown voltage and the forward breakdown voltage of the finally formed high-voltage resistant protection device can be greatly improved, and the technical problem that the SCR device in the prior art cannot be applied to ultra-high voltage resistant occasions is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of a high voltage tolerant guard provided in accordance with an embodiment of the present application;
fig. 2 is a schematic cross-sectional top view of a high voltage protection device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of an equivalent circuit of a high voltage tolerant guard device according to an embodiment of the present application;
FIG. 4 is a schematic diagram of an equivalent circuit of a high voltage tolerant protection device according to an embodiment of the present application;
fig. 5 is a schematic flowchart of a method for manufacturing a high voltage protection device according to another embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to" determining "or" in response to detecting ". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
The invention aims to solve the technical problem that an SCR device in the prior art cannot be applied to an ultrahigh voltage-resistant occasion. The invention provides a manufacturing method, a manufacturing device, manufacturing equipment and a computer-readable storage medium of a protective device.
In an embodiment, fig. 1 and fig. 2 show a schematic structural diagram of a high voltage tolerant device provided by the present application, where the high voltage tolerant device includes a substrate 101, a buried layer 102, and an epitaxial layer, and the substrate 101, the buried layer 102, and the epitaxial layer are sequentially stacked; based on the epitaxial layer, first wells 201 and 213 and a high voltage well HVNW are sequentially arranged from any point of the edge of the epitaxial layer to the direction of the central point; and a first active region is disposed on the first well 201, 213; the high voltage well HVNW has three closed annular vacant regions, and a second well 204, a third well 207, and a fourth well 210 are respectively disposed in the three annular vacant regions; a second active region, a third active region and a fourth active region are disposed on the second well 204, the third well 207 and the fourth well 210; a fifth well is disposed on the high voltage well HVNW, and a fifth active region is disposed on the fifth well.
Wherein the doping types of the substrate 101, the epitaxial layer, the first well 201, 213, the second well 204, the third well 207, the fourth well 210, the first active region and the third active region are of a first type; the doping type of the buried layer 102, the fifth well NW, the second active region, the fourth active region, and the fifth active region is a second type; the first type is different from the second type.
In the above embodiment, by providing the first wells 201 and 213 and the specially shaped high-voltage well HVNW in advance, providing the second well 204, the third well 207 and the fourth well 210 in the ring-shaped empty region reserved in the high-voltage well HVNW, providing the fifth well NW on the high-voltage well HVNW, and doping the first wells 201, 213 to the fifth well NW to form a plurality of active regions, it is possible to form a special PN junction formed by the high-voltage well HVNW and other wells in the high-voltage tolerant device, realize special connection of the plurality of PN junctions through the above-mentioned setting process, and realize the same effect of the forward breakdown voltage and the reverse breakdown voltage through the above-mentioned structure, thereby greatly improving the limit values of the reverse breakdown voltage and the forward breakdown voltage of the finally formed high-voltage tolerant device, and solving the technical problem that the SCR device in the prior art cannot be applied to the ultra-high-voltage situation.
In the above-described scheme, since the second well 204, the third well 207, and the fourth well 210 are separated by the high voltage well HVNW, isolation is actually performed, and the isolation ring has a low leakage characteristic, so that problems such as parasitic field tubes can be effectively prevented.
Optionally, the first well 201, 213, the second well 204, the third well 207, the fourth well 210, the fifth well NW are all closed rings.
Wherein, the closed ring shape can be better with keeping apart between every active area and the well to can reduce the electric leakage in the at utmost, prevent parasitic field pipe scheduling problem more effectively.
Optionally, the doping concentration of the high voltage well HVNW is less than the doping concentration of the first well 201, 213, the doping concentration of the second well 204, the doping concentration of the third well 207, the doping concentration of the fourth well 210, and the doping concentration of the fifth well NW, respectively.
The doping concentration of the high-voltage well HVNW is set to be lower than the doping concentrations of the first well 201 and 213, the second well 204, the third well 207, the fourth well 210, and the fifth well NW, and the doping concentrations are all set to ensure low doping of the high-voltage well HVNW at this time, and may be set to be lower than the doping concentrations of all active regions, so that forward and reverse breakdown voltages of the formed PN junction are further increased.
In one possible implementation, the fifth active region is floating; the first active region, the second active region 403, the third active region 404 and the fourth active region 405 of the second well 204, and the second active region 411, the third active region 412 and the fourth active region 413 of the fourth well 210 constitute a first end of the high voltage tolerant protection device; the second active region 407, the third active region 408 and the fourth active region 409 of the third well 207 constitute a second end of the high voltage tolerant protection device; any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
Through the implementation mode, PN junction formation can be guaranteed, the effect of forward and reverse improvement of breakdown voltage values can be fully achieved, when the process of BCD 0.5um is adopted, the reverse breakdown voltage can be 70V determined in a laboratory, so that the forward trigger voltage of 70V and the reverse trigger voltage of 70V can be achieved, the positive and negative high-voltage ESD protection effect can be achieved, the characteristic of low leakage current is achieved, and the ESD protection capability under a Human Body Model (HBM) is 15 KV.
In one possible implementation, the first type doping is P doping; the second type doping is N doping.
In one possible implementation, the first type doping is N-doping; the second type doping is P doping.
In the two schemes, the types of P doping and N doping can be flexibly replaced, and the equivalent effect can be realized.
In one possible implementation, the high voltage well HVNW includes first, second and third high voltage sub-wells 203, 206, 209 and 209, 212 connected to each other, each disposed around one of the ring-shaped empty regions, and the fifth well NW includes first, second and third sub-wells 202, 205, 208 and 208, 211 connected to each other, each disposed on one high voltage sub-well; the fifth active region includes first sub-active regions 402 and 406, second sub-active regions 406 and 410, and third sub-active regions 410 and 414, each of which is disposed on each of the sub-wells one-to-one.
Through the process, the sub-wells, the high-voltage sub-wells and the sub-active regions which can be connected independently are isolated in the independent regions, so that better low leakage current and isolation effects are achieved.
Based on the above embodiments, further, the working principle of the protection device is explained by an embodiment: referring to fig. 3, the third well 207 is an emitter, the second high- voltage sub-wells 206 and 209 and the second sub-wells 205 and 208 are bases, and the second well 204 and the fourth well 210 are collectors, so as to form a lateral PNP transistor 1;
the second high- voltage sub-wells 206 and 209 and the second sub-wells 205 and 208 are used as collectors, the second well 204 and the fourth well 210 are used as bases, and the fourth active region and the second sub-active regions 406 and 410 of the second well 204 are emitters, so as to form a lateral NPN transistor 1;
the buried layer 102 is a collector, the second well 204 and the fourth well 210 are bases, and the fourth active region and the second sub-active regions 406 and 410 of the second well 204 are emitters, so as to form a vertical NPN transistor 2;
the transverse NPN triode 1, the longitudinal NPN triode 2 and the transverse PNP triode 1 form a positive silicon controlled rectifier structure.
In this structure, since the SCR structure is the same from GND to PAD and from PAD to GND, the structure can withstand positive and negative voltages. When the PAD voltage is higher than the GND voltage and reaches the breakdown voltage of the high voltage N-wells (HVNW)206 and 209 and the P-wells (PW)204 and 210 when an ESD event occurs, the PN junction is broken down, current flows from the high voltage N-wells (HVNW)206 and 209 to the P-wells (PW)204 and 210, the lateral PNP transistor 1, the lateral NPN transistor 1 and the vertical NPN transistor 2 are turned on, and the forward SCR is triggered.
Optionally, referring to fig. 4, the second well 204 and the fourth well 210 are emitters, the second high- voltage sub-wells 206 and 209 and the second sub-wells 205 and 208 are bases, and the third well 207 is a collector, so as to form a lateral PNP transistor 2;
the second high- voltage sub-wells 206 and 209 are used as collectors, the third well 207 is a base, and the second active region and the fourth active region of the third well 207 are emitters, so as to form a lateral NPN triode 3;
the buried layer 102 is a collector, the third well 207 is a base, and the second active region and the fourth active region of the third well 207 are emitters, so as to form a vertical NPN transistor 4;
the transverse NPN triode 3, the longitudinal NPN triode 4 and the transverse PNP triode 2 form a reverse silicon controlled rectifier structure.
When the GND voltage is higher than the PAD voltage and reaches the breakdown voltage of the High Voltage N Wells (HVNW)206 and 209 and the P Well (PW)207, the PN junction is broken down, the current flows from the High Voltage N Wells (HVNW)206 and 209 to the P Well (PW)207, the lateral PNP transistor 2, the lateral NPN transistor 3, and the vertical NPN transistor 4 are turned on, and the reverse SCR is triggered.
Since the high voltage N-wells (HVNW)206 and 209 are lightly doped wells, the PN junctions formed by the high voltage N-wells (HVNW)206 and 209 and the P-wells (PW)204, 207 and 210 have a high breakdown voltage, and thus, a high voltage resistance characteristic can be realized.
Further, the device can adopt a BCD 0.5um process, the structure of the device is triggered by utilizing a PN junction formed by a high-voltage N well and a P well, the PN junction reverse breakdown voltage is 70V, so that the forward trigger voltage is 70V, the reverse trigger voltage is 70V, the positive and negative high-voltage ESD protection effect can be realized, the device has the characteristic of low leakage current, and the ESD protection capability is 15KV under a Human Body Model (HBM).
Fig. 5 shows a flowchart of a method for manufacturing the high voltage resistant protection device provided in the embodiment of the present application, corresponding to the high voltage resistant protection device described in the above embodiments, and for convenience of description, only the parts related to the embodiment of the present application are shown.
Referring to fig. 5, a method for manufacturing a high voltage resistant protection device, the method for manufacturing a high voltage resistant protection device being used for manufacturing the high voltage resistant protection device, includes:
s1, forming a buried layer 102 on the substrate 101 by diffusion or ion implantation;
s2, forming an epitaxial layer on the buried layer 102 by growing epitaxy;
s3, forming first wells 201 and 213 on the epitaxial layer by doping of a first type and forming a high-voltage well HVNW with three closed annular vacant areas by inversion doping;
s4, forming a second well 204, a third well 207 and a fourth well 210 in the three annular vacant areas respectively by doping of the first type; and forming a first active region on the first well 201, 213 by first type doping;
s5, forming a second active region, a third active region and a fourth active region on the second well 204, the third well 207 and the fourth well 210 by doping the first type and doping the second type; forming a fifth well NW in the high voltage well HVNW by second type doping;
s6, forming a fifth active region in the fifth well NW by second type doping;
wherein the doping types of the substrate 101, the epitaxial layer, the first well 201, 213, the second well 204, the third well 207, the fourth well 210, the first active region and the third active region are of a first type;
the doping type of the buried layer 102, the fifth well NW, the second active region, the fourth active region, and the fifth active region is a second type; the first type is different from the second type.
The first wells 201 and 213 and the specially shaped high voltage well HVNW are arranged in advance, the second well 204, the third well 207 and the fourth well 210 are arranged in the annular vacant area reserved in the high voltage well HVNW, the fifth well NW is arranged on the high voltage well HVNW, and the first wells 201, 213 to the fifth well NW are doped to form a plurality of active regions, so that a special PN junction formed by the high voltage well HVNW and other wells can be formed in the high voltage resistant protective device, the special connection of the plurality of PN junctions is realized through the arrangement process, and the equivalent effect of the forward breakdown voltage and the reverse breakdown voltage is realized through the structure, so that the reverse breakdown voltage and the limit value of the forward breakdown voltage of the finally formed high voltage resistant protective device can be greatly improved, and the technical problem that the SCR device in the prior art cannot be applied to the ultra-high voltage situation is solved.
In an optional embodiment, the method for manufacturing the high voltage resistant protection device further includes:
the first active region, the second active region 403, the third active region 404 and the fourth active region 405 of the second well 204, the second active region 411, the third active region 412 and the fourth active region 413 of the fourth well 210 are connected by metal wires to form a first end of the high voltage withstanding protection device;
the second active region 407, the third active region 408 and the fourth active region 409 of the third well 207 are connected by metal lines to form a second end of the high voltage resistant protection device;
any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. A high voltage tolerant protective device, comprising:
a substrate;
burying the layer;
the substrate, the buried layer and the epitaxial layer are sequentially stacked;
based on the epitaxial layer, a first well and a high-voltage well are sequentially arranged from any point of the edge of the epitaxial layer to the direction of the central point; a first active region is arranged on the first trap;
the high-voltage trap is provided with three closed annular vacant areas, and a second trap, a third trap and a fourth trap are respectively arranged in the three annular vacant areas; a second active region, a third active region and a fourth active region are arranged on the second well, the third well and the fourth well;
a fifth trap is arranged on the high-voltage trap, and a fifth active region is arranged on the fifth trap;
the doping types of the substrate, the epitaxial layer, the first well, the second well, the third well, the fourth well, the first active region and the third active region are of a first type;
the doping types of the buried layer, the fifth well, the second active region, the fourth active region and the fifth active region are of a second type; the first type is different from the second type.
2. The device of claim 1, wherein the first well, the second well, the third well, the fourth well, and the fifth well are all closed rings.
3. The device of claim 1, wherein a doping concentration of the high voltage well is less than a doping concentration of the first well, a doping concentration of the second well, a doping concentration of the third well, a doping concentration of the fourth well, and a doping concentration of the fifth well, respectively.
4. The device of claim 1, wherein the fifth active region is floating; the first active region, the second active region, the third active region and the fourth active region of the second well form a first end of the high-voltage-resistant protection device; the second active region, the third active region and the fourth active region of the third well form a second end of the high-voltage-resistant protection device; any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
5. The device of claim 1, wherein the first type of doping is a P-doping; the second type doping is N doping; or the like, or, alternatively,
the first type doping is N doping; the second type doping is P doping.
6. The hpp guard of claim 1, wherein the hpp well comprises a first, a second and a third hpp sub-wells in communication with each other, each sub-well respectively surrounding one of the annular vacant areas, and the fifth well comprises a first, a second and a third sub-wells in communication with each other, each sub-well being uniformly disposed on each high-voltage sub-well; the fifth active region comprises a first sub-active region, a second sub-active region and a third sub-active region, and each sub-active region is arranged on each sub-well in a one-to-one mode.
7. The device of claim 6, wherein the third well is an emitter, the second high-voltage sub-well and the second sub-well are bases, and the second well and the fourth well are collectors, so as to form a lateral PNP transistor 1;
the second high-voltage sub-well and the second sub-well are used as collectors, the second well and the fourth well are used as bases, and a fourth active region and a second sub-active region of the second well are emitters, so that a transverse NPN triode 1 is formed;
the buried layer is a collector, the second well and the fourth well are bases, and a fourth active region and a second sub-active region of the second well are emitters, so that a longitudinal NPN triode 2 is formed;
the transverse NPN triode 1, the longitudinal NPN triode 2 and the transverse PNP triode 1 form a positive silicon controlled rectifier structure.
8. The device of claim 6, wherein the second well and the fourth well are emitters, the second high voltage sub-well and the second sub-well are bases, and the third well is a collector to form a lateral PNP transistor 2;
the second high-voltage sub-well is used as a collector, the third well is used as a base electrode, and the second active region and the fourth active region of the third well are used as emitter electrodes, so that a transverse NPN triode 3 is formed;
the buried layer is a collector, the third well is a base, and the second active region and the fourth active region of the third well are emitters to form a longitudinal NPN triode 4;
the transverse NPN triode 3, the longitudinal NPN triode 4 and the transverse PNP triode 2 form a reverse controllable silicon structure.
9. A method for manufacturing a high voltage resistant protection device, wherein the method for manufacturing the high voltage resistant protection device is used for manufacturing the high voltage resistant protection device according to any one of claims 1 to 8, and comprises the following steps:
forming a buried layer on a substrate by diffusion or ion implantation;
forming an epitaxial layer on the buried layer by growth epitaxy;
forming a first well on the epitaxial layer through first type doping and forming a high-voltage well with three closed annular vacant areas through inversion doping;
forming a second well, a third well and a fourth well in the three annular vacant areas respectively through first type doping; forming a first active region on the first well by first type doping;
a second active region, a third active region and a fourth active region are arranged on the second well, the third well and the fourth well through first type doping and second type doping; forming a fifth well in the high-voltage well by doping of a second type;
forming a fifth active region in the fifth well by doping of a second type;
the doping types of the substrate, the epitaxial layer, the first well, the second well, the third well, the fourth well, the first active region and the third active region are of a first type;
the doping types of the buried layer, the fifth well, the second active region, the fourth active region and the fifth active region are of a second type; the first type is different from the second type.
10. The method of claim 8, further comprising:
the first active region, the second active region, the third active region and the fourth active region of the second well, the second active region, the third active region and the fourth active region of the fourth well are connected through metal wires to form a first end of the high-voltage-resistant protection device;
the second active region, the third active region and the fourth active region of the third well are connected through metal wires to form a second end of the high-voltage-resistant protection device;
any one of the first end of the high-voltage resistant protection device and the second end of the high-voltage resistant protection device is an anode, and the rest end of the high-voltage resistant protection device is a cathode.
CN202210466661.8A 2022-04-29 2022-04-29 High-voltage-resistant protection device and manufacturing method thereof Pending CN114899218A (en)

Priority Applications (1)

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CN202210466661.8A CN114899218A (en) 2022-04-29 2022-04-29 High-voltage-resistant protection device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210466661.8A CN114899218A (en) 2022-04-29 2022-04-29 High-voltage-resistant protection device and manufacturing method thereof

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CN114899218A true CN114899218A (en) 2022-08-12

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