CN114880985A - Parasitic capacitance extraction method and device based on Gaussian surface uniform sampling - Google Patents
Parasitic capacitance extraction method and device based on Gaussian surface uniform sampling Download PDFInfo
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Abstract
The application relates to a parasitic capacitance extraction method, a parasitic capacitance extraction device, an electronic device and a storage medium based on Gaussian face uniform sampling, wherein the method comprises the following steps: dividing a preset region of a Gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas; distributing all the area elements to a plurality of working threads; sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread; and starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking. Through the application, the problem that the extraction precision of the parasitic capacitance is low due to the fact that the sampling points on the Gaussian face are unevenly distributed is solved, uniform sampling on the Gaussian face is achieved, and the technical effect of the extraction precision of the parasitic capacitance is improved.
Description
Technical Field
The present disclosure relates to the field of integrated circuit technologies, and in particular, to a method and an apparatus for extracting parasitic capacitance based on gaussian surface uniform sampling, an electronic apparatus, and a storage medium.
Background
In the layout verification of an integrated circuit, an important link is the extraction of the parasitic capacitance of a conductor. With the increasing requirement of the industry on the calculation accuracy, the extraction of the parasitic capacitance usually depends on a three-dimensional field solver for accurate solution, and a random walking algorithm is a popular method in the three-dimensional field solver.
The random walk is different from the conventional finite difference, finite element and other methods, does not need to solve a linear equation system, and comprises the following main steps: and constructing a Gaussian surface surrounding the conductor, randomly selecting sampling points from the Gaussian surface according to uniform probability distribution, constructing a transfer cube from the sampling points, and then performing subsequent jumping operation. Whether the distribution of the sampling points on the Gaussian surface is uniform or not is closely related to the accuracy of the calculation result.
When the integrated circuit is large in scale and contains a large number of conductor and electrolyte patterns on the layout, the amount of calculation for random walk is significantly increased. To improve computational efficiency, the total number of steps of random walks can be reduced, for example: giving a total step number, stopping the random walking process after walking the total step number, and calculating a final result; or decreasing the convergence criteria, such as increasing the error threshold, the total number of random walk steps is also decreased.
However, in such solutions, the reduction of the number of random walking steps means that the number of samples on the gaussian surface is reduced, and the reduction of the number of samples may cause that the distribution of the sampling points in some regions of the gaussian surface is dense, and the distribution of the sampling points in other regions is sparse, that is, the distribution of the random sampling points on the gaussian surface is not uniform enough, thereby causing a large error in the calculation result.
At present, no effective solution is provided for the problem of low extraction precision of parasitic capacitance caused by uneven distribution of sampling points on a Gaussian surface.
Disclosure of Invention
The application provides a parasitic capacitance extraction method and device based on Gaussian face uniform sampling, an electronic device and a storage medium, and aims to solve the problem of low parasitic capacitance extraction precision caused by uneven distribution of sampling points on a Gaussian face.
In a first aspect, the present application provides a method for extracting parasitic capacitance based on gaussian surface uniform sampling, where the method includes: dividing a preset region of a Gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas; distributing all the area elements to a plurality of working threads; sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread; and starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
Further, the preset region of the gaussian surface comprises all regions of the gaussian surface or partial regions of the gaussian surface; dividing a preset region of a Gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas comprises: acquiring the random walking times corresponding to the preset area of the Gaussian surface; and dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas, wherein the number of the area elements is the same as the random walking times corresponding to the preset region of the Gaussian surface.
Further, dividing the preset region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas includes: and dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas at equal intervals.
Further, sampling on the area element corresponding to the working thread to obtain a sampling point on the area element corresponding to the working thread includes: when the number of the area elements corresponding to the working thread is equal to 1, the working thread performs primary sampling on the corresponding area elements to obtain sampling points corresponding to the working thread; and when the number of the area elements corresponding to the working thread is more than 1, the working thread performs sampling on each corresponding area element once to obtain a plurality of sampling points corresponding to the working thread.
Further, the performing, by the worker thread, one sampling on the corresponding area element includes: acquiring the position coordinates of the area elements; acquiring a first random number and a second random number; and calculating the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, and completing one-time sampling of the area elements.
Further, the first random number and the second random number are both randomly selected from a preset numerical value interval; calculating the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, wherein the step of calculating the position coordinates of the sampling points comprises the following steps: by the relation: (x1+ r1 (x2-x1), y1+ r2 (y2-y1)), and determining the position coordinates of the sampling points, wherein (x1, y1, x2, y2) represent the position coordinates of the area elements on an XOY plane, r1 represents the first random number, and r2 represents the second random number.
Further, assigning all of the area elements to a plurality of worker threads comprises: and averagely distributing all the area elements to a plurality of working threads, and storing the area elements corresponding to the working threads into storage vectors corresponding to the working threads.
In a second aspect, the present application provides a parasitic capacitance extraction apparatus based on gaussian surface uniform sampling, the apparatus comprising: the dividing module is used for dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas; the distribution module is used for distributing all the area elements to a plurality of working threads; the sampling module is used for sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread; and the calculation module is used for starting random walking from each sampling point and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
In a third aspect, the present application further provides an electronic apparatus, including a memory and a processor, where the memory stores a computer program, and the processor is configured to execute the computer program to perform the parasitic capacitance extraction method based on uniform sampling of gaussian surface according to the first aspect.
In a fourth aspect, the present application further provides a storage medium, in which a computer program is stored, where the computer program is executed by a processor to implement the parasitic capacitance extraction method based on gaussian surface uniform sampling according to the first aspect.
Compared with the prior art, the parasitic capacitance extraction method, the parasitic capacitance extraction device, the electronic device and the storage medium based on the Gaussian surface uniform sampling divide a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas; distributing all the area elements to a plurality of working threads; when the working threads walk randomly, sampling is carried out on the area elements corresponding to the working threads, sampling points on the area elements corresponding to the working threads are obtained, in the process of walking randomly, each working thread only samples the area elements allocated to the working thread, and when all the working threads finish sampling points, sampling of all the area elements in the preset area of the whole Gaussian surface is finished. And starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking. Because the areas of the area elements are equal, and the random walking points are obtained by sampling the area elements once, the sampling of the preset area of the Gaussian surface can be ensured to be uniform, the calculation error caused by uneven distribution of sampling points on the preset area of the Gaussian surface is avoided under the condition that the random walking steps are limited, and the extraction precision of the parasitic capacitance of the target conductor is improved. Through the application, the problem that the extraction precision of the parasitic capacitance is low due to the fact that the sampling points on the Gaussian face are unevenly distributed is solved, uniform sampling on the Gaussian face is achieved, and the technical effect of the extraction precision of the parasitic capacitance is improved.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a flowchart of a parasitic capacitance extraction method based on gaussian surface uniform sampling according to an embodiment of the present application;
FIG. 2 is a schematic diagram of dividing an area element on a predetermined region of a Gaussian face according to an embodiment of the present application;
FIG. 3 is a schematic diagram of sampling on an area element according to an embodiment of the present application;
fig. 4 is a block diagram of a parasitic capacitance extraction apparatus based on gaussian surface uniform sampling according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is described and illustrated below with reference to the accompanying drawings and embodiments.
The present embodiment provides a parasitic capacitance extraction method based on gaussian surface uniform sampling, and fig. 1 is a flowchart of a parasitic capacitance extraction method based on gaussian surface uniform sampling according to an embodiment of the present application, and as shown in fig. 1, the method includes:
step S101, a preset region of a gaussian surface corresponding to a target conductor is divided into a plurality of area elements with equal areas.
In this embodiment, a CPU (Central Processing Unit) or other processors supporting multi-thread parallel computing may be used to extract the parasitic capacitance of the target conductor.
In this embodiment, an integrated circuit layout in which the target conductor is located may be obtained first, and the target conductor pattern may be read from the integrated circuit layout to construct a gaussian surface surrounding the target conductor. The corresponding Gaussian surface of the target conductor is a closed envelope surface surrounding the target conductor, the interior of the Gaussian surface contains the target conductor only, and the Gaussian surface does not intersect with the target conductor and does not contact with any surface of the target conductor; the gaussian surface may be obtained by translating the surface of the target conductor outward.
In this embodiment, the preset region of the gaussian surface may include all regions of the gaussian surface or a partial region of the gaussian surface. When the preset region of the gaussian surface includes all regions of the gaussian surface, the entire gaussian surface needs to be divided into a plurality of area elements with equal areas. When the preset region of the gaussian surface only includes the partial region of the gaussian surface, the partial region of the gaussian surface may be divided into a plurality of area elements with equal areas, and random sampling may be performed in other regions of the gaussian surface.
In the above embodiment, the size of the preset area may be selected according to the actual needs of the user, and the application is not limited herein.
Step S102, all area elements are distributed to a plurality of working threads.
In this embodiment, one CPU may be used to simultaneously control and operate a plurality of working threads, or a plurality of CPUs may be used, and each CPU simultaneously controls and operates one working thread or a plurality of working threads, so as to improve the environmental adaptability of the parasitic capacitance extraction method based on gaussian surface uniform sampling provided in this embodiment.
And step S103, sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread.
In this embodiment, in the random walking process, each worker thread only samples the area elements allocated to the worker thread, so that mutual influence among the worker threads is avoided, and collision among the worker threads is avoided.
And step S104, starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
In the above embodiment, when the target conductor is subjected to parasitic capacitance extraction, the target conductor may be approximated to a rectangular parallelepiped shape, and therefore, the gaussian surfaces produced based on the target conductor are also in a rectangular parallelepiped shape, and if there is an intersection between the rectangular cuboids, the intersection may be removed, thereby ensuring that the gaussian surfaces are in a regular structure.
When the scale of the integrated circuit is large and a large number of conductor and electrolyte images exist on the integrated circuit layout, the calculation amount of random walking is remarkably increased, and even the calculation cannot be completed within a relatively reasonable time. In order to improve the calculation efficiency, the total number of steps of random walking can be reduced, however, the reduction of the number of steps of random walking means that the number of samples on the gaussian surface is reduced, and the reduction of the number of samples may cause that the distribution of the sampling points in some regions of the gaussian surface is denser, and the distribution of the sampling points in other regions is sparser, that is, the distribution of the random sampling points on the gaussian surface is not uniform enough, thereby causing a larger error of the calculation result.
In the embodiment, the preset region of the gaussian surface corresponding to the target conductor is divided into a plurality of area elements with equal areas, and the area elements are distributed to a plurality of working threads, in the process of random walking, each working thread only samples the area elements distributed to the working thread, when all the working threads finish obtaining sampling points, the sampling of all the area elements in the preset region of the whole gaussian surface is finished, at the moment, random walking can be started from each sampling point, the parasitic capacitance of the target capacitance is extracted, because the areas of all the area elements are equal, and each area element carries out sampling once to obtain a random walking point, therefore, the sampling of the preset region of the gaussian surface can be ensured to be uniform, and the calculation error caused by uneven distribution of the sampling points in the preset region of the gaussian surface under the condition that the random walking step number is limited is avoided, the extraction precision of the parasitic capacitance of the target conductor is improved.
Through the steps S101 to S104, dividing a preset region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas; distributing all the area elements to a plurality of working threads; sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread; and starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking. Through the application, the problem that the extraction precision of the parasitic capacitance is low due to the fact that the sampling points on the Gaussian face are unevenly distributed is solved, uniform sampling on the Gaussian face is achieved, and the technical effect of the extraction precision of the parasitic capacitance is improved.
In some embodiments, dividing the preset region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas is implemented by the following steps:
And 2, dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas, wherein the number of the area elements is the same as the random walking times corresponding to the preset region of the Gaussian surface.
In this embodiment, dividing the preset region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas includes: a preset region of a Gaussian surface corresponding to a target conductor is divided into a plurality of area elements with equal areas at equal intervals.
Fig. 2 is a schematic diagram of dividing area elements on a predetermined region of a gaussian surface according to an embodiment of the present invention, as shown in fig. 2, in this embodiment, the predetermined region of the gaussian surface is all regions of the gaussian surface, that is, the entire gaussian surface corresponding to a target conductor is divided into a plurality of area elements with equal areas at equal intervals, the number of random walks N corresponding to the predetermined region of the gaussian surface may be 148, and the predetermined region of the gaussian surface corresponding to the target conductor is divided into a plurality of area elements with equal areas at equal intervals according to the number of random walks N corresponding to the predetermined region of the gaussian surface 148, wherein the gaussian surface is divided into 30 area elements on the front side of the YOZ plane, the gaussian surface is divided into 30 area elements on the back side of the YOZ plane, the gaussian surface is divided into 20 area elements on the front side and the back side of the XOY plane, each gaussian surface is divided into 24 area elements, and a total of (30+20+24) × 2 is 148 area elements, corresponding to the number of random walks N of a predetermined region of the gaussian surface being 148.
In some of these embodiments, assigning all of the area elements to the plurality of worker threads comprises: and averagely distributing all the area elements to a plurality of working threads, and storing the area elements corresponding to the working threads into storage vectors corresponding to the working threads.
In this embodiment, sampling on the area element corresponding to the working thread, and obtaining a sampling point on the area element corresponding to the working thread includes: when the number of the area elements corresponding to the working threads is equal to 1, the working threads perform primary sampling on the corresponding area elements to obtain sampling points corresponding to the working threads; and when the number of the area elements corresponding to the working thread is more than 1, the working thread performs sampling on each corresponding area element once to obtain a plurality of sampling points corresponding to the working thread.
In the above embodiment, the number nth of the work threads may be set to 37, and the number of the area elements allocated to each work thread is N/nth of 4, as shown in fig. 2, the area element 00, the area element 01, the area element 02, and the area element 03 on the YOZ plane may be allocated to the work thread 0, the area element 04, the area element 05, the area element 10, and the area element 11 may be allocated to the work thread 1, the area element 12, the area element 13, the area element 14, and the area element 15 may be allocated to the work thread 2, and so on, until all the area elements on the preset region of the gaussian plane are equally allocated to 37 work threads, thereby ensuring that the number of the area elements allocated to each work thread is equal, the work time of each work thread is also approximately the same, and improving the sampling efficiency of the gaussian plane.
In this embodiment, the number N/nth of the area elements allocated to each worker thread may not be an integer, for example, N is 150, and nth is 37, in this case, the area elements 00 to 147 may be first allocated to 37 worker threads on an average basis, that is, each worker thread may be allocated to 4 area elements, the area element 148 may be randomly allocated to any one of the 37 worker threads, and then the area element 149 may be randomly allocated to any one of the 37 worker threads, so as to ensure that the number of the area elements allocated to the 37 worker threads is substantially the same, further ensure that the working time of each worker thread is substantially the same, and improve the sampling efficiency of the gaussian plane.
In the above embodiment, the area element corresponding to each working thread may also be stored in the storage vector corresponding to the working thread, for example, the storage vector v0 corresponding to the working thread 0 stores [00, 01, 02, 03], the storage vector v1 corresponding to the working thread 1 stores [04, 05, 10, 11], the storage vector v2 corresponding to the working thread 2 stores [12, 13, 14, 15], in the subsequent sampling process, each working thread may read the area element from the corresponding storage vector and sample each area element stored in the storage vector only once, because the area elements are divided from the preset region of the gaussian surface at equal intervals and equal areas, and each area element is sampled only once, it may be ensured that the sampling point of a certain region does not appear too concentrated on the preset region of the gaussian surface, under the condition that sampling points in a certain area are too dispersed, the calculation error caused by uneven distribution of the sampling points in the preset area of the Gaussian surface is avoided under the condition that the random walking step number is limited, and the extraction precision of the parasitic capacitance of the target conductor is improved.
In some embodiments, the sampling of the corresponding area element by the worker thread is performed by:
And 2, acquiring a first random number and a second random number.
And 3, calculating to obtain the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, and completing one-time sampling of the area elements.
In this embodiment, when a worker thread samples a certain area element stored in a corresponding storage vector, it is necessary to ensure randomness of a sampling point position on the area element, and therefore, a first random number and a second random number may be selected, and a position coordinate of the sampling point is calculated according to a position coordinate of the area element.
In this embodiment, the first random number and the second random number are both randomly selected from a preset value interval; according to the position coordinates of the area elements, the first random number and the second random number, calculating the position coordinates of the sampling points comprises the following steps: by the relation: (x1+ r1 (x2-x1), y1+ r2 (y2-y1)), and determining the position coordinates of the sampling points, wherein (x1, y1, x2, y2) represent the position coordinates of the area elements on the XOY plane, r1 represents a first random number, and r2 represents a second random number.
Fig. 3 is a schematic diagram of sampling on an area element according to an embodiment of the present application, as shown in fig. 3, in this embodiment, the position coordinates of the area element on the XOY plane are (x1, y1, x2, y2), the preset value interval may be [0, 1], and the first random number r1 and the second random number r2 may be randomly selected from the value interval [0, 1], and then, using the formulas (x1+ r1 (x2-x1), y1+ r2 (y2-y1)), the left position of the sampling point on the area element may be calculated, that is, one random sampling on the preset area of the gaussian surface is completed, and after all the working threads finish one sampling on the allocated area element, it may be determined that uniform sampling is completed on all the area elements on the preset area of the gaussian surface.
The present embodiment provides a parasitic capacitance extraction device based on gaussian surface uniform sampling, and fig. 4 is a block diagram of a structure of a parasitic capacitance extraction device based on gaussian surface uniform sampling according to an embodiment of the present application, and as shown in fig. 4, the device includes: a dividing module 402, configured to divide a preset region of a gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas; an allocation module 404, configured to allocate all area elements to multiple work threads; the sampling module 406 is configured to sample an area element corresponding to a working thread when the working thread randomly walks, and obtain a sampling point on the area element corresponding to the working thread; and the calculating module 408 is configured to start random walking from each sampling point, and calculate a parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
In some embodiments, the dividing module 402 is further configured to obtain a random walking number corresponding to a preset region of the gaussian surface; and dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas, wherein the number of the area elements is the same as the random walking times corresponding to the preset region of the Gaussian surface.
In some embodiments, the dividing module 402 is further configured to divide the preset region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal area at equal intervals.
In some embodiments, the sampling module 406 is further configured to, when the number of the area elements corresponding to the worker thread is equal to 1, perform one-time sampling on the corresponding area element by the worker thread to obtain a sampling point corresponding to the worker thread; and when the number of the area elements corresponding to the working thread is more than 1, the working thread performs sampling on each corresponding area element once to obtain a plurality of sampling points corresponding to the working thread.
In some of these embodiments, the sampling module 406 is further configured for obtaining location coordinates of the area elements; acquiring a first random number and a second random number; and calculating to obtain the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, and completing the primary sampling of the area elements.
In some embodiments, the first random number and the second random number are randomly selected from a preset range of values; the sampling module 406 is further configured for: (x1+ r1 (x2-x1), y1+ r2 (y2-y1)), and determining the position coordinates of the sampling points, wherein (x1, y1, x2, y2) represent the position coordinates of the area elements on the XOY plane, r1 represents a first random number, and r2 represents a second random number.
In some embodiments, the allocation module 404 is further configured to allocate all area elements to a plurality of working threads, and store the area elements corresponding to the working threads into the storage vectors corresponding to the working threads.
It should be noted that, for specific examples in this embodiment, reference may be made to examples described in the foregoing embodiments and optional implementations, and details of this embodiment are not described herein again.
The present embodiment further provides an electronic device, fig. 5 is a schematic diagram of a hardware structure of the electronic device according to an embodiment of the present application, and as shown in fig. 5, the electronic device includes a memory 504 and a processor 502, a computer program is stored in the memory 504, and the processor 502 is configured to execute the computer program to perform the steps in any of the method embodiments.
Specifically, the processor 502 may include a Central Processing Unit (CPU), or A Specific Integrated Circuit (ASIC), or may be configured to implement one or more Integrated circuits of the embodiments of the present Application.
The processor 502 may be configured to implement any one of the above-described embodiments of the gaussian surface uniform sampling based parasitic capacitance extraction method by reading and executing computer program instructions stored in the memory 504.
Optionally, the electronic apparatus may further include a transmission device 506 and an input/output device 508, wherein the transmission device 506 is connected to the processor 502, and the input/output device 508 is connected to the processor 502.
Optionally, in this embodiment, the processor 502 may be configured to execute the following steps by a computer program:
and S1, dividing the preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas.
S2, all area elements are distributed to a plurality of working threads.
And S3, sampling on the area element corresponding to the working thread when the working thread walks randomly, and obtaining sampling points on the area element corresponding to the working thread.
And S4, starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
It should be noted that, for specific examples in this embodiment, reference may be made to examples described in the foregoing embodiments and optional implementations, and details of this embodiment are not described herein again.
In addition, in combination with the parasitic capacitance extraction method based on the gaussian surface uniform sampling in the above embodiment, the embodiment of the present application may provide a storage medium to implement. The storage medium having stored thereon a computer program; the computer program, when executed by a processor, implements any one of the above-described embodiments of the method for extracting parasitic capacitance based on gaussian surface uniform sampling.
It should be understood by those skilled in the art that various features of the above embodiments can be combined arbitrarily, and for the sake of brevity, all possible combinations of the features in the above embodiments are not described, but should be considered as within the scope of the present disclosure as long as there is no contradiction between the combinations of the features.
Claims (10)
1. A parasitic capacitance extraction method based on Gaussian face uniform sampling is characterized by comprising the following steps:
dividing a preset region of a Gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas;
distributing all the area elements to a plurality of working threads;
sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread;
and starting random walking from each sampling point, and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
2. The parasitic capacitance extraction method based on uniform sampling of the Gaussian face according to claim 1, wherein the preset region of the Gaussian face comprises all regions of the Gaussian face or partial regions of the Gaussian face; dividing a preset region of a Gaussian surface corresponding to a target conductor into a plurality of area elements with equal areas comprises:
acquiring the random walking times corresponding to the preset area of the Gaussian surface;
and dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas, wherein the number of the area elements is the same as the random walking times corresponding to the preset region of the Gaussian surface.
3. The method of claim 2, wherein the dividing the predetermined region of the gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas comprises:
and dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas at equal intervals.
4. The method for extracting parasitic capacitance based on gaussian surface uniform sampling according to claim 1, wherein sampling on the area element corresponding to the working thread to obtain a sampling point on the area element corresponding to the working thread comprises:
when the number of the area elements corresponding to the working thread is equal to 1, the working thread performs primary sampling on the corresponding area elements to obtain sampling points corresponding to the working thread;
and when the number of the area elements corresponding to the working thread is more than 1, the working thread performs sampling on each corresponding area element once to obtain a plurality of sampling points corresponding to the working thread.
5. The parasitic capacitance extraction method based on Gaussian face uniform sampling according to claim 4, wherein the working thread performs one-time sampling on the corresponding area element and comprises the following steps:
acquiring the position coordinates of the area elements;
acquiring a first random number and a second random number;
and calculating the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, and completing one-time sampling of the area elements.
6. The method according to claim 5, wherein the first random number and the second random number are both randomly selected from a preset range of values; calculating the position coordinates of the sampling points according to the position coordinates of the area elements, the first random number and the second random number, wherein the step of calculating the position coordinates of the sampling points comprises the following steps:
by the relation: (x1+ r1 (x2-x1), y1+ r2 (y2-y1)), and determining the position coordinates of the sampling points, wherein (x1, y1, x2, y2) represent the position coordinates of the area elements on an XOY plane, r1 represents the first random number, and r2 represents the second random number.
7. The parasitic capacitance extraction method based on Gaussian face uniform sampling according to any one of claims 1 to 6, wherein the step of allocating all area elements to a plurality of working threads comprises the steps of:
and averagely distributing all the area elements to a plurality of working threads, and storing the area elements corresponding to the working threads into storage vectors corresponding to the working threads.
8. A parasitic capacitance extraction device based on Gaussian face uniform sampling is characterized in that the device comprises:
the dividing module is used for dividing a preset region of the Gaussian surface corresponding to the target conductor into a plurality of area elements with equal areas;
the distribution module is used for distributing all the area elements to a plurality of working threads;
the sampling module is used for sampling on the area element corresponding to the working thread when the working thread walks randomly to obtain a sampling point on the area element corresponding to the working thread;
and the calculation module is used for starting random walking from each sampling point and calculating the parasitic capacitance value corresponding to the target conductor when all the working threads finish the random walking.
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, and the processor runs the computer program to execute the parasitic capacitance extraction method based on uniform sampling of gaussian surface according to any one of claims 1 to 7.
10. A storage medium having a computer program stored therein, wherein the computer program when executed by a processor implements the parasitic capacitance extraction method based on uniform sampling of gaussian surface according to any one of claims 1 to 7.
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| PCT/CN2023/087149 WO2023193812A1 (en) | 2022-04-08 | 2023-04-07 | Parasitic capacitance extraction method, electronic device, and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116842895A (en) * | 2023-08-31 | 2023-10-03 | 青岛展诚科技有限公司 | Fine granularity parallel processing method for randomly walking in capacitor extraction |
| WO2023193812A1 (en) * | 2022-04-08 | 2023-10-12 | 杭州行芯科技有限公司 | Parasitic capacitance extraction method, electronic device, and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2023193812A1 (en) * | 2022-04-08 | 2023-10-12 | 杭州行芯科技有限公司 | Parasitic capacitance extraction method, electronic device, and storage medium |
| CN116842895A (en) * | 2023-08-31 | 2023-10-03 | 青岛展诚科技有限公司 | Fine granularity parallel processing method for randomly walking in capacitor extraction |
| CN116842895B (en) * | 2023-08-31 | 2023-11-21 | 青岛展诚科技有限公司 | Fine granularity parallel processing method for randomly walking in capacitor extraction |
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Inventor after: He Yu Inventor after: Jiao Wuzhen Inventor after: Hu Chao Inventor after: Zeng Xianqiang Inventor before: He Yu Inventor before: Jiao Wuzhen Inventor before: Hu Chao Inventor before: Zeng Xianqiang Inventor before: He Qing |