CN114866216A - Chaotic synchronization system and method based on resistance and fractional order equivalent capacitance coupling - Google Patents

Abstract

The invention discloses a chaotic synchronization system and method based on resistance and fractional order equivalent capacitance coupling, which comprises a coupling drive end, a control end and a coupling response end; the coupling driving end is provided with a coupling driving circuit, the coupling response end is provided with a coupling response circuit, and the control end is provided with a linear coupling circuit; the coupling driving circuit is connected with the coupling response circuit through the linear coupling circuit. The invention adopts the resistor and the fractional order equivalent capacitor to carry out linear coupling synchronization on the driving end and the response end, has simple control structure and higher stability, thereby improving the safety of data in the chaotic synchronization process.

Description

Chaos Synchronization System and Method Based on Resistive and Fractional Equivalent Capacitive Coupling

technical field

The invention relates to the technical field of communication, in particular to a chaotic synchronization system and method based on resistance and fractional-order equivalent capacitive coupling.

Background technique

Communication is an important part of national security. At present, the exchange of data and information in the background of the era of big data is very frequent and rapid, and traditional confidential communication can no longer fully meet the security requirements of current network communication. Chaotic signals have the characteristics of extreme sensitivity of initial conditions and system parameters, continuous wide-band spectrum, ergodicity, boundedness, internal randomness, fractal dimension, and universality, which are consistent with the requirements of cryptography and secure communication.

Chaos is a generalization of a kind of complex and disordered motion, showing extreme sensitivity to small changes. The fractional-order chaos model is obtained by extending the order of chaos to the range of fractions. The change of order makes the fractional chaotic model show a more complex evolution trajectory, and evolves many properties unique to fractional chaos: for example, the fractional derivative or integral comprehensively considers the past history and the influence of non-local distribution, in the representation system. Its own characteristics and actual physical characteristics are more accurate. Therefore, compared with the integer-order chaotic system, the fractional-order chaotic system is more in line with the actual situation and can more accurately reflect the dynamic characteristics of the actual system; and the more complex dynamic characteristics and pseudo-randomness improve the security of the system. In addition, the fractional-order chaotic system has a strong ability to suppress the disturbance of noise level parameters, and the linear resistive coupling control makes the chaotic synchronization have better robustness.

The current synchronization control method of the chaotic system, Chinese patent (CN113141250A) discloses the synchronization control method and device for the secure communication of the chaotic system between the sender and the receiver, by setting the initial value of the chaotic system at the sender; according to the mathematical model of the chaotic system at the sender , construct the mathematical model of the chaotic system at the receiving end; set the initial value of the chaotic system at the receiving end; define the synchronization of the chaotic system at the sending end and the chaotic system at the receiving end according to the mathematical model of the chaotic system at the sending end and the mathematical model of the chaotic system at the receiving end The error system is obtained; the controller is constructed; the error system is controlled based on the controller to realize the synchronization of the chaotic system at the sender end and the chaotic system at the receiver end; after the synchronization, the sender end and the receiver end start to perform secure communication. The control method has more advantages in synchronization time and fast response ability. However, studies have shown that general low-dimensional chaotic systems are vulnerable to adaptive synchronization control attacks and do not have high confidentiality; low-dimensional chaotic systems have simple system dynamics and small key space, and cannot resist phase space reconstruction. easily deciphered. More importantly, the patent uses the idea of the drive-response synchronization method, which is an open-loop state and is more sensitive to noise and parameter mismatch, so the robustness is poor. More importantly, the controller term of this method consists of three parts, including the uncertainty term, the external disturbance term, and the error system, and the structure is complex. As a result, more components are required in the specific circuit implementation, resulting in large interference between signals, and the initial value sensitivity of the chaotic signal determines that it is easily interfered by the signal, so it will lead to large errors in implementation.

A Chinese patent (CN110149201A) discloses a secure communication method based on error concealment and chaotic synchronization, comprising the following steps: the sender constructs a driving chaotic system, and encrypts the information to be encrypted by using the first parameter in the driving chaotic system to obtain encrypted information. The sending end uses the second parameter and the third parameter in the driving chaotic system to mask and superimpose the encrypted information to obtain a chaotic signal, and sends the chaotic signal to the receiving end; The chaotic signal sent by the receiving end and the error signal and the synchronization law in response to the chaotic system construction; the receiving end adjusts the synchronization law to make the error signal approach zero; and when the error signal approaches zero, according to the Decryption information is obtained in response to the first parameter of the chaotic system and the encrypted information included in the chaotic signal. The method can improve the security during data transmission. The invention only adds synchronization rules (control items) at the receiving end, and does not add synchronization rules at the sending end. Therefore, from the perspective of the actual system, the linear characteristics of the chaotic system at the sending end and the receiving end have changed, and have become two Different systems, and the added control terms are very complex, which is very difficult to realize in actual physical implementation; the e3 of the error system of the invention does not contain nonlinear terms, and for linear systems, its stability and output characteristics are only determined by the structure and the system itself. The stability and output dynamic process of a nonlinear system are not only related to the structure and parameters of the system, but also related to the initial conditions of the system and the size of the input signal, which increases the difficulty of signal deciphering. Therefore, the linear system is easier to be cracked than the nonlinear system when the synchronous secure communication is performed, which reduces the security of the data transmission process.

SUMMARY OF THE INVENTION

Aiming at the problem of low data transmission security caused by nonlinear coupling in the chaotic synchronization system in the prior art, the present invention proposes a chaotic synchronization system and method based on the coupling of resistance and fractional-order equivalent capacitance. By adopting resistance and fractional-order equivalent capacitance The driving end and the responding end are coupled and synchronized, so as to realize the linear coupling of the chaotic synchronization system, thereby improving the security of data in the process of chaotic synchronization.

In order to achieve the above object, the present invention provides the following technical solutions:

The chaotic synchronization system based on the coupling of resistance and fractional equivalent capacitance includes a coupling drive end, a control end, and a coupling response end; the coupling drive end is provided with a coupling drive circuit, and the coupling response end is provided with a coupling response circuit, The control terminal is provided with a linear coupling circuit; the coupling driving circuit is connected through the linear coupling circuit and the coupling response circuit.

Preferably, the coupling driving circuit includes a first driving circuit, a second driving circuit and a third driving circuit;

The first drive circuit includes a first drive variable terminal x1:

The first drive variable end x1 is connected to one end of the first resistor R1, the other end of the first resistor R1, one end of the first fractional equivalent capacitor F1, and one end of the second resistor R2 are connected in parallel with the inverse of the first comparator U1. The phase input terminal is connected, the non-phase input terminal of the first comparator U1 is grounded, and the other terminal of the first fractional equivalent capacitor F1 is connected to the first drive variable terminal x1, the output terminal of the first comparator U1, and the output terminal of the eighth resistor R8 respectively. One end is connected, the other end of the eighth resistor R8 and one end of the ninth resistor R9 are connected in parallel with the inverting input end of the fourth comparator U4, the non-inverting input end of the fourth comparator U4 is grounded, and the output of the fourth comparator U4 The other end of the ninth resistor R9 is connected in parallel with one end of the third resistor R3 in the second drive circuit, and the other end of the second resistor R2 is respectively connected with one end of the fourth resistor R4 and the eleventh resistor in the second drive circuit. The other end of R11, the output end of the fifth comparator U5 and the second input end of the second multiplier X2 in the third drive circuit are connected;

The second driving circuit includes a second driving variable terminal x2 and a coupling driving terminal u:

The second drive variable end x2 is connected to one end of the twenty-third resistor R23 in the linear coupling circuit, the coupling drive end u is connected to one end of the thirtieth resistor R30, and the first input end of the first multiplier X1 is connected to the first drive variable The terminal x1 is connected, the output terminal of the first multiplier X1 is connected to one end of the fifth resistor R5, the other end of the thirtieth resistor R30, the other end of the third resistor R3, the other end of the fourth resistor R4, and the fifth resistor R5 The other end of the second fractional equivalent capacitor F2 is connected in parallel with the inverting input terminal of the second comparator U2, the non-inverting input terminal of the second comparator U2 is grounded, and the other end of the second fractional equivalent capacitor F2 is connected to the ground. One end, the output end of the second comparator U2, and one end of the tenth resistor R10 are connected in parallel with the second drive variable end x2, and the other end of the tenth resistor R10 and one end of the eleventh resistor R11 are connected in parallel with the fifth comparator The inverting input end of U5 is connected, the non-inverting input end of the fifth comparator U5 is grounded, and the other end of the eleventh resistor R11 and the output end of the fifth comparator U5 are connected in parallel with the other end of the second resistor R2;

The third drive circuit includes a third drive variable terminal x3:

The third driving variable terminal x3 is respectively connected to the second input terminal of the first multiplier X1, one terminal of the sixth resistor R6, the other terminal of the third fractional equivalent capacitor F3, and the output terminal of the third comparator U3. The first input end of the multiplier X2 is connected to the first drive variable end x1, the second input end of the second multiplier X2 is connected to the other end of the second resistor R2, and the output end of the second multiplier X2 is connected to the seventh resistor R7 The other end of the sixth resistor R6, the other end of the seventh resistor R7, and one end of the third fractional equivalent capacitor F3 are connected in parallel with the inverting input end of the third comparator U3, and the third comparator U3 The non-inverting input is grounded.

Preferably, the coupling response circuit includes a first response circuit, a second response circuit and a third response circuit;

The first response circuit includes a first response variable terminal y1:

The first response variable end y1 is connected to one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16, one end of the fourth fractional equivalent capacitor F4, and one end of the seventeenth resistor R17 are connected in parallel with the eighth comparator The inverting input end of U8 is connected, the non-inverting input end of the eighth comparator U8 is grounded, the other end of the fourth fractional-order equivalent capacitor F4, the output end of the eighth comparator U8, and one end of the fourteenth resistor R14 are connected in parallel with The first response variable terminal y1 is connected, the other end of the fourteenth resistor R14 and one end of the twelfth resistor R12 are connected in parallel with the inverting input terminal of the sixth comparator U6, and the non-inverting input terminal of the sixth comparator U6 is grounded, The output end of the sixth comparator U6 and the other end of the twelfth resistor R12 are connected in parallel with one end of the eighteenth resistor R18 in the second response circuit, and the other end of the seventeenth resistor R17 is respectively connected with the first end of the eighteenth resistor R18 in the second response circuit. One end of the nineteenth resistor R19, the other end of the thirteenth resistor R13, the output end of the seventh comparator U7 and the second input end of the fourth multiplier X4 in the third response circuit are connected;

The second response circuit includes a second response variable terminal y2 and a coupled response terminal -u:

The output end of the linear coupling circuit is connected to the coupling response end-u, the coupling response end-u is also connected to one end of the thirty-first resistor R31, the first input end of the third multiplier X3 is connected to the first response variable end y1, The output end of the third multiplier X3 is connected to one end of the twentieth resistor R20, the other end of the thirty-first resistor R31, the other end of the eighteenth resistor R18, the other end of the nineteenth resistor R19, and the twentieth resistor R20 The other end of the fifth fractional equivalent capacitor F5 is connected in parallel with the inverting input terminal of the ninth comparator U9, the non-inverting input terminal of the ninth comparator U9 is grounded, and the other end of the fifth fractional equivalent capacitor F5 is connected to the ground. One end, the output end of the ninth comparator U9, and one end of the fifteenth resistor R15 are connected in parallel with the second response variable end y2, and the second response variable end y2 is also connected with one end of the twenty-fourth resistor R24 in the linear coupling circuit , the other end of the fifteenth resistor R15 and one end of the thirteenth resistor R13 are connected in parallel with the inverting input end of the seventh comparator U7, the non-inverting input end of the seventh comparator U7 is grounded, and the other end of the thirteenth resistor R13 One end and the output end of the seventh comparator U7 are connected in parallel with the other end of the seventeenth resistor R17;

The third response circuit includes a third response variable terminal y3:

The third response variable end y3 is respectively connected to the second input end of the third multiplier X3, one end of the twenty-first resistor R21, the other end of the sixth fractional equivalent capacitor F6, and the output end of the tenth comparator U10, The first input end of the fourth multiplier X4 is connected to the first response variable end y1, the second input end of the fourth multiplier X4 is connected to the other end of the seventeenth resistor R17, and the output end of the fourth multiplier X4 is connected to the 17th resistor R17. One end of the twenty-two resistor R22 is connected in parallel, and the other end of the twenty-first resistor R21, the other end of the twenty-second resistor R22, and one end of the sixth fractional-order equivalent capacitor F6 are connected in parallel with the inversion of the tenth comparator U10. The input terminal is connected, and the non-inverting input terminal of the tenth comparator U10 is grounded.

Preferably, the linear coupling circuit includes a linear resistance R _k and a seventh fractional-order equivalent capacitance F7:

One end of the twenty-third resistor R23 is connected to the second drive variable terminal x2, one end of the twenty-fourth resistor R24 is connected to the second response variable terminal y2, the other end of the twenty-third resistor R23, the twenty-sixth resistor R26 One end of the 24th resistor R24 and one end of the 25th resistor R25 are connected in parallel with the non-inverting input end of the eleventh comparator U11 after being connected in parallel with the inverting input end of the eleventh comparator U11. , the other end of the twenty-fifth resistor R25 is grounded, the other end of the twenty-sixth resistor R26 and the output end of the eleventh comparator U11 are connected in parallel with one end of the linear resistor R _k and the seventh fractional equivalent capacitor F7. One end is connected, the other end of the linear resistor R _k , the other end of the seventh fractional equivalent capacitor F7, and one end of the twenty-seventh resistor R27 are connected in parallel with the inverting input end of the twelfth comparator U12, the twelfth The non-inverting input end of the comparator U12 is grounded, the output end of the twelfth comparator U12, the other end of the twenty-seventh resistor R27, and one end of the twenty-eighth resistor R28 are connected in parallel with the coupling drive end u, and the twenty-eighth The other end of the resistor R28 and one end of the twenty-ninth resistor R29 are connected in parallel with the inverting input terminal of the thirteenth comparator U13, the non-inverting input terminal of the thirteenth comparator U13 is grounded, and the other end of the twenty-ninth resistor R29 is connected to the ground. One end and the output end of the thirteenth comparator U13 are connected in parallel with the coupling response end -u.

Preferably, the equivalent circuit of the seventh fractional-order equivalent capacitance F7 is:

One end of the a-th resistor Ra and one end of the first capacitor C1 are connected in parallel with the input port, and the other end of the a-th resistor Ra and the other end of the first capacitor C1 are connected in parallel with one end of the b-th resistor Rb and the second capacitor C2 respectively. one end of the resistor Rb and the other end of the second capacitor C2 are connected in parallel with one end of the cth resistor Rc and one end of the third capacitor C3 respectively, and the other end of the cth resistor Rc and the third capacitor C3 The other end is connected in parallel with the output port.

The invention also provides a chaotic synchronization method based on resistance and fractional equivalent capacitance coupling, which specifically includes the following steps:

S1: Build the mathematical model of the driver:

分别为x₁,x₂,x₃的导数，q表示分数阶导数；In formula (1), x ₁ , x ₂ , and x ₃ represent driving variables, respectively,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively, and q represents the fractional derivative;

S2: Build the mathematical model of the response side according to the mathematical model of the driver side:

分别为y₁,y₂,y₃的导数；In formula (2), y ₁ , y ₂ , and y ₃ represent the response variables, respectively,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively;

S3: Determine the linear coupling term, and improve the driving end and the response end respectively to obtain the coupling driving end and the coupling response end;

The mathematical model of the linear coupling term is:

R_k表示线性电阻,R₀＝100KΩ；In formula (3), u represents the linear coupling control term, K _R represents the linear resistance coupling coefficient,

R _k represents linear resistance, R ₀ =100KΩ;

Combining the linear coupling term and the driving end to get the coupling driving end, its mathematical model is:

Combining the linear coupling term with the response end gets the coupled response end, and its mathematical model is:

分别为x₁,x₂,x₃的导数；y₁,y₂,y₃表示响应变量，

分别为y₁,y₂,y₃的导数，q表示分数阶导数；In formulas (4) and (5), x ₁ , x ₂ , and x ₃ represent driving variables,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively; y ₁ , y ₂ , and y ₃ represent the response variables,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively, and q represents the fractional derivative;

S4: Define the synchronization error between the coupling drive end and the coupling response end according to formulas (4) and (5), obtain an error system, and arrange the error system at the control end, so as to realize the synchronization of the coupling drive end and the coupling response end;

The mathematical model of the error system is:

In formula (6), e _i =x _i -y _i , i=1,2,3;

Preferably, in the S1, the circuit state equation corresponding to the mathematical model of the driving end is:

The dimensionless state equation mapped by the circuit state equation (5) is expressed as follows:

In formulas (7) and (8), V1, V2, and V3 represent voltages respectively, corresponding to x ₁ , x ₂ , and x ₃ ; t=τ/t ₀ , R ₀ =100kΩ, C ₀ =10nF, t ₀ =R ₀ C ₀ , F represents fractional equivalent capacitance, let R ₁ =R ₂ =2.5kΩ, R ₃ =R ₅ =R ₇ =10kΩ, R ₄ =4kΩ, R ₆ =33.3kΩ.

e_i＝x_i-y_i,i＝1,2,3。Preferably, in the S4, the synchronization error of the error system

e _i =x _i -y _i , i=1,2,3.

Preferably, in the S3, q=0.95, and K _R =1.

To sum up, due to the adoption of the above technical solutions, compared with the prior art, the present invention has at least the following beneficial effects:

1. The present invention adopts a fractional-order system. Since the fractional-order system has the characteristics of historical memory and the like, its dynamic characteristics are more complex and difficult to decipher, which can greatly enhance the security of chaotic secure communication.

2. Synchronization based on linear coupling technology: The nonlinear system realizes the continuity and persistence of the coupling through linear feedback. Even under the interference of large environmental noise, the coupled fractional-order chaotic system can still achieve synchronization and has strong anti-noise. ability. Therefore, through the simple and easy-to-implement linear coupled controller, the fractional-order chaotic system can achieve stable coupling synchronization, and the chaotic synchronization system has a strong ability to suppress noise interference and chaotic system parameter disturbance. The coupled control fractional-order chaotic synchronization system has better robustness. More importantly, mutually coupled nonlinear systems are ubiquitous in nature, and because the linear coupling structure of the present invention is simple, it has very prominent practical value.

3. Low cost: the existing fractional-order chaotic synchronization system adopts many components, the interference between signals is large, and the realization error is large; And the structure is simple, the robustness and applicability of the synchronization system are improved, and the security of the communication system is improved.

Description of drawings:

FIG. 1 is a schematic circuit diagram of a chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling according to an exemplary embodiment of the present invention.

FIG. 2 is a schematic diagram of a fractional-order equivalent capacitance equivalent circuit according to an exemplary embodiment of the present invention.

3 is a schematic diagram of a simulation of the variation of the maximum Lyapunov exponent with K _R in an error system according to an exemplary embodiment of the present invention.

FIG. 4 is a schematic diagram of a synchronization error simulation of an error system according to an exemplary embodiment of the present invention.

Detailed ways

The present invention will be further described in detail below with reference to the examples and specific implementation manners. However, it should not be construed that the scope of the above-mentioned subject matter of the present invention is limited to the following embodiments, and all technologies realized based on the content of the present invention belong to the scope of the present invention.

In the description of the present invention, it should be understood that the terms "portrait", "horizontal", "upper", "lower", "front", "rear", "left", "right", "vertical", The orientations or positional relationships indicated by "horizontal", "top", "bottom", "inside", "outside", etc. are based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present invention and simplifying the description, rather than Indication or implication that the referred device or element must have a particular orientation, be constructed and operate in a particular orientation, is not to be construed as a limitation of the invention.

In the description of the present invention, unless otherwise specified and limited, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it may be a mechanical connection or an electrical connection, or two The internal communication between the elements may be directly connected or indirectly connected through an intermediate medium, and those of ordinary skill in the art can understand the specific meanings of the above terms according to specific circumstances.

Chaos synchronization is an important condition for realizing chaotic secure communication. The basic idea of chaotic synchronous communication is to add the transmitted signal source to a chaotic signal generated by a chaotic system to generate a chaotic noise-like signal, encrypt the information source, and after the chaotic signal is sent to the receiver, it is then sent to the receiver. A corresponding chaotic system separates the chaotic signal, that is, the decryption process, and then restores the original transmitted information source. Due to the existence of the chaotic synchronization effect, this decryption process can be realized.

The invention utilizes resistance and fractional-order equivalent capacitance to realize the linear coupling of the drive system and the response system, finally achieves synchronization, and uses the synchronized chaotic system in the field of secure communication. The flow chart of the present invention mainly includes: constructing a driving system and its circuit implementation, constructing a response system and its circuit implementation, realizing the coupling term through resistance and fractional equivalent capacitance and drawing a synchronous circuit diagram, and constructing an error system according to the coupled driving system and the coupling response system And its circuit realizes five main steps to realize the synchronization of fractional-order chaotic system.

As shown in FIG. 1 , the present invention provides a chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling, including a coupling drive end, a control end, and a coupling response end. The coupling drive end is provided with a coupling drive circuit 1, and the coupling response end is A coupling response circuit 3 is provided, the control terminal is provided with a linear coupling circuit 2 , a coupling driving circuit 1 and a coupling response circuit 3 , and the coupling driving circuit 1 is connected with the coupling response circuit 3 through the linear coupling circuit 2 .

In this embodiment, the coupling driving circuit 1 includes a first driving circuit, a second driving circuit and a third driving circuit.

The first drive circuit includes a first drive variable terminal x1:

The first drive variable end x1 is connected to one end of the first resistor R1, the other end of the first resistor R1, one end of the first fractional equivalent capacitor F1, and one end of the second resistor R2 are connected in parallel with the inverse of the first comparator U1. The phase input terminal is connected, the non-phase input terminal of the first comparator U1 is grounded, and the other terminal of the first fractional equivalent capacitor F1 is connected to the first drive variable terminal x1, the output terminal of the first comparator U1, and the output terminal of the eighth resistor R8 respectively. One end is connected, the other end of the eighth resistor R8 and one end of the ninth resistor R9 are connected in parallel with the inverting input end of the fourth comparator U4, the non-inverting input end of the fourth comparator U4 is grounded, and the output of the fourth comparator U4 The other end of the ninth resistor R9 is connected in parallel with one end of the third resistor R3 in the second drive circuit, and the other end of the second resistor R2 is respectively connected with one end of the fourth resistor R4 and the eleventh resistor in the second drive circuit. The other end of R11, the output end of the fifth comparator U5 and the second input end of the second multiplier X2 in the third driving circuit are connected. In this embodiment, the circuit formed by the eighth resistor R8, the ninth resistor R9 and the fourth comparator U4 is used to invert the first variable signal x1 input from the first drive variable terminal x1.

The second driving circuit includes a second driving variable terminal x2 and a coupling driving terminal u:

The second driving variable terminal x2 is connected to the input terminal of the linear coupling circuit 2 (one terminal of the twenty-third resistor), the coupling driving terminal u is connected to one terminal of the thirtieth resistor R30, and the first input terminal of the first multiplier X1 and The first drive variable end x1 is connected, the output end of X1 is connected to one end of the fifth resistor R5, the other end of the thirtieth resistor R30, the other end of the third resistor R3, the other end of the fourth resistor R4, and the fifth resistor R5 The other end of the second fractional equivalent capacitor F2 is connected in parallel with the inverting input terminal of the second comparator U2, the non-inverting input terminal of the second comparator U2 is grounded, and the other end of the second fractional equivalent capacitor F2 is connected to the ground. One end, the output end of the second comparator U2, and one end of the tenth resistor R10 are connected in parallel with the second drive variable end x2, and the other end of the tenth resistor R10 and one end of the eleventh resistor R11 are connected in parallel with the fifth comparator The inverting input terminal of U5 is connected, the non-inverting input terminal of the fifth comparator U5 is grounded, and the other terminal of the eleventh resistor R11 and the output terminal of the fifth comparator U5 are connected in parallel with the other terminal of the second resistor R2. In this embodiment, the circuit formed by the tenth resistor R10 , the eleventh resistor R11 , and the fifth comparator U5 is used to invert the second variable signal x2 input from the second drive variable terminal x2 .

The third drive circuit includes a third drive variable terminal x3:

The third drive variable terminal x3 is respectively connected to the second input terminal of X1, one terminal of the sixth resistor R6, the other terminal of the third fractional equivalent capacitor F3, and the output terminal of the third comparator U3. The first input end is connected to the first drive variable end x1, the second input end of X2 is connected to the other end of the second resistor R2, the output end of the second multiplier X2 is connected to one end of the seventh resistor R7, and the sixth resistor R6 The other end of , the other end of the seventh resistor R7, and one end of the third fractional equivalent capacitor F3 are connected in parallel with the inverting input terminal of the third comparator U3, and the non-inverting input terminal of the third comparator U3 is grounded.

In this embodiment, the mathematical model corresponding to the coupling driving circuit 1 is:

分别为x₁,x₂,x₃的导数，q表示分数阶导数，K_R表示线性电阻耦合系数，

R_k表示线性电阻,R₀＝100KΩ。In formula (1), x ₁ , x ₂ , and x ₃ represent the drive variables input by the first drive circuit, the second drive circuit, and the third drive circuit, respectively,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively, q represents the fractional derivative, K _R represents the linear resistance coupling coefficient,

R _k represents the linear resistance, R ₀ =100KΩ.

In this embodiment, correspondingly, the coupling response circuit 3 includes a first response circuit, a second response circuit and a third response circuit.

The first response circuit includes a first response variable terminal y1:

The first response variable end y1 is connected to one end of the sixteenth resistor R16, the other end of the sixteenth resistor R16, one end of the fourth fractional equivalent capacitor F4, and one end of the seventeenth resistor R17 are connected in parallel with the eighth comparator The inverting input end of U8 is connected, the non-inverting input end of the eighth comparator U8 is grounded, the other end of the fourth fractional-order equivalent capacitor F4, the output end of the eighth comparator U8, and one end of the fourteenth resistor R14 are connected in parallel with The first response variable terminal y1 is connected, the other end of the fourteenth resistor R14 and one end of the twelfth resistor R12 are connected in parallel with the inverting input terminal of the sixth comparator U6, and the non-inverting input terminal of the sixth comparator U6 is grounded, The output end of the sixth comparator U6 and the other end of the twelfth resistor R12 are connected in parallel with one end of the eighteenth resistor R18 in the second response circuit, and the other end of the seventeenth resistor R17 is respectively connected with the first end of the eighteenth resistor R18 in the second response circuit. One end of the nineteenth resistor R19, the other end of the thirteenth resistor R13, the output end of the seventh comparator U7, and the second input end of the fourth multiplier X4 in the third response circuit are connected.

The second response circuit includes a second response variable terminal y2 and a coupled response terminal -u:

The output end of the linear coupling circuit 2 is connected to the coupling response end-u, the coupling response end-u is also connected to one end of the thirty-first resistor R31, and the first input end of the third multiplier X3 is connected to the first response variable end y1 , the output end of X3 is connected to one end of the twentieth resistor R20, the other end of the thirty-first resistor R31, the other end of the eighteenth resistor R18, the other end of the nineteenth resistor R19, and the other end of the twentieth resistor R20 , One end of the fifth fractional equivalent capacitor F5 is connected in parallel with the inverting input terminal of the ninth comparator U9, the non-inverting input terminal of the ninth comparator U9 is grounded, and the other end of the fifth fractional equivalent capacitor F5, the first The output terminal of the nine comparator U9 and one end of the fifteenth resistor R15 are connected in parallel with the second response variable terminal y2, and the second response variable terminal y2 is also connected to one end of the twenty-fourth resistor R24 in the linear coupling circuit 2. The other end of the fifteenth resistor R15 and one end of the thirteenth resistor R13 are connected in parallel with the inverting input end of the seventh comparator U7, the non-inverting input end of the seventh comparator U7 is grounded, and the other end of the thirteenth resistor R13, The output end of the seventh comparator U7 is connected in parallel with the other end of the seventeenth resistor R17.

The third response circuit includes a third response variable terminal y3:

The third response variable terminal y3 is respectively connected to the second input terminal of X3, one terminal of the twenty-first resistor R21, the other terminal of the sixth fractional equivalent capacitor F6, and the output terminal of the tenth comparator U10. The input end is connected to the first response variable end y1, the second input end of X4 is connected to the other end of the seventeenth resistor R17, the output end of X4 is connected to one end of the twenty-second resistor R22, and the second end of the twenty-first resistor R21 is connected. The other end, the other end of the twenty-second resistor R22, and one end of the sixth fractional equivalent capacitor F6 are connected in parallel with the inverting input end of the tenth comparator U10, and the non-inverting input end of the tenth comparator U10 is grounded.

In this embodiment, the mathematical model of the coupling response circuit 3 is:

分别为y₁,y₂,y₃的导数，q表示分数阶导数，K_R表示线性电阻耦合系数，

R_k表示线性电阻,R₀＝100KΩ。In formula (2), y ₁ , y ₂ , and y ₃ represent the response variables output by the first response circuit, the second response circuit, and the third response circuit, respectively,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively, q is the fractional derivative, K _R is the linear resistance coupling coefficient,

R _k represents the linear resistance, R ₀ =100KΩ.

In this embodiment, the driving circuit and the response circuit are in a one-to-one correspondence. For example, the first driving circuit corresponds to the first response circuit, the second driving circuit corresponds to the second response circuit, and the third driving circuit corresponds to the third response circuit.

In this embodiment, the linear coupling circuit 2 includes a linear resistance R _k and a fractional-order equivalent capacitance F7:

One end of the twenty-third resistor R23 is connected to the second drive variable terminal x2, one end of the twenty-fourth resistor R24 is connected to the second response variable terminal y2, the other end of the twenty-third resistor R23, the twenty-sixth resistor R26 One end is connected in parallel with the inverting input end of the eleventh comparator U11, the other end of the twenty-fourth resistor R24 and one end of the twenty-fifth resistor R25 are connected in parallel with the non-inverting input end of the eleventh comparator U11 connected, the other end of the twenty-fifth resistor R25 is grounded, the other end of the twenty-sixth resistor R26 and the output end of the eleventh comparator U11 are connected in parallel with one end of the linear resistor R _k and one end of the fractional equivalent capacitor F7 respectively. Connection, the other end of the linear resistor R _k , one end of the twenty-seventh resistor R27, and the other end of the fractional equivalent capacitor F7 are connected in parallel with the inverting input end of the twelfth comparator U12, and the twelfth comparator U12 The non-inverting input terminal of the twelfth comparator U12 is grounded, the output terminal of the twelfth comparator U12, the other end of the twenty-seventh resistor R27, and one end of the twenty-eighth resistor R28 are connected in parallel with the coupling drive terminal u, and the twenty-eighth resistor R28 is connected in parallel. The other end, one end of the twenty-ninth resistor R29 is connected in parallel with the inverting input terminal of the thirteenth comparator U13, the non-inverting input terminal of the thirteenth comparator U13 is grounded, and the other end of the twenty-ninth resistor R29, the third The output terminals of the thirteen comparators U13 are connected in parallel with the coupling response terminal -u.

In this embodiment, the mathematical model of the linear coupling circuit 2 is:

R_k表示线性电阻,R₀＝100KΩ，其阻值可根据需要进行调整。In formula (3), u represents the linear coupling control term, K _R represents the linear resistance coupling coefficient,

R _k represents the linear resistance, R ₀ =100KΩ, and its resistance value can be adjusted as required.

In this embodiment, R23=R24=R25=R26=R28=R29=10KΩ, and R27=100KΩ.

In this embodiment, each fractional equivalent capacitor is a fractional equivalent capacitor F, that is, F1=F2=F3=F4=F5=F6=F7=F, and the equivalent circuit of the fractional equivalent capacitor F is shown in the figure 2 shows:

One end of the a-th resistor Ra and one end of the first capacitor C1 are connected in parallel with the input port, and the other end of the a-th resistor Ra and the other end of the first capacitor C1 are connected in parallel with one end of the b-th resistor Rb and the second capacitor C2 respectively. one end of the resistor Rb and the other end of the second capacitor C2 are connected in parallel with one end of the cth resistor Rc and one end of the third capacitor C3 respectively, and the other end of the cth resistor Rc and the third capacitor C3 The other end is connected in parallel with the output port.

In this embodiment, when the fractional derivative q=0.95, C1=3.616MF, C2=4.622MF, C3=1.267MF, Ra=15.1KΩ, Rb=1.51MΩ, and Rc=692.9MΩ.

Most of the existing technical solutions use integer-order chaotic systems, whose chaotic characteristics are far lower than fractional-order chaotic systems. Because the fractional derivative or integral does not reflect the nature or quantity of the local or a certain point, but comprehensively considers the influence of past history and non-local distribution, the fractional chaotic system can more accurately describe the physical model of actual chaos, Analytical research on synchronous control of fractional-order systems has a more general scope of application. Moreover, from the point of view of control energy, the coupling strength of coupled chaotic synchronization is much larger than the coupling strength of coupled synchronization in chaotic or periodic state. Therefore, the present invention utilizes fractional chaos (q) to realize coupling synchronization. Since the fractional system has the characteristics of historical memory, its dynamic characteristics are more complex and difficult to decipher, which can greatly enhance the security of chaotic secure communication.

The present invention provides a method for designing a chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling, which specifically includes the following steps:

S1: Build the mathematical model of the drive circuit at the drive end:

分别为x₁,x₂,x₃的导数，q表示分数阶导数。In formula (4), x ₁ , x ₂ , and x ₃ represent the drive variables input by the first drive circuit, the second drive circuit, and the third drive circuit, respectively,

are the derivatives of x ₁ , x ₂ , and x ₃ , respectively, and q represents the fractional derivative.

The Multisim software is used to simulate the drive circuit, so that the relationship between the voltages in the drive circuit satisfies equation (2). Based on the circuit principle, the state equation of the drive circuit is expressed as follows:

Then the dimensionless state equation mapped from formula (5) is expressed as follows:

In formulas (5) and (6), V ₁ , V ₂ , and V ₃ represent the voltages of the first drive circuit, the second drive circuit, and the third drive circuit, respectively, t=τ/t ₀ , R ₀ =100kΩ, C ₀ = 10nF, t ₀ =R ₀ C ₀ , F represents fractional equivalent capacitance, let R ₁ =R ₂ =2.5kΩ, R ₃ =R ₅ =R ₇ =10kΩ, R ₄ =4kΩ, R ₆ =33.3 kΩ.

S2: Build the mathematical model of the response circuit at the response end according to the mathematical model of the driving circuit:

分别为y₁,y₂,y₃的导数，q表示分数阶导数。In formula (7), y ₁ , y ₂ , and y ₃ represent the response variables output by the first response circuit, the second response circuit, and the third response circuit, respectively,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively, and q represents the fractional derivative.

In this embodiment, to achieve synchronization, the circuit structure of the response circuit and the circuit structure of the drive circuit need to be the same, so that the signal synchronization can be better performed. Therefore, the circuit state model transformation principle of the response circuit and the circuit state model principle of the drive circuit It is the same and belongs to simple replacement, so it will not be repeated here.

S3: Determine the mathematical model of the linear coupling term, and improve the mathematical model of the driving circuit and the mathematical model of the response circuit respectively to obtain the mathematical model of the coupled driving circuit and the mathematical model of the coupled response circuit.

The mathematical model of the linear coupling term is:

R_k表示线性电阻,R₀＝100KΩ，其阻值可根据需要进行调整。In formula (8), u represents the linear coupling control term, K _R represents the linear resistance coupling coefficient,

R _k represents the linear resistance, R ₀ =100KΩ, and its resistance value can be adjusted as required.

Then the linear coupling term and the driving circuit are combined to obtain the coupling driving circuit, and its mathematical model is:

The coupling response circuit is obtained by combining the linear coupling term with the response circuit, and its mathematical model is:

分别为x₁,x₂,x₃的导数；y₁,y₂,y₃分别表示第一响应电路、第二响应电路、第三响应电路输出的响应变量，

分别为y₁,y₂,y₃的导数，q表示分数阶导数，K_R表示线性电阻耦合系数，

R₀＝100KΩ，R_k表示线性电阻,其阻值可根据需要进行调整。In formulas (9) and (10), x ₁ , x ₂ , and x ₃ represent the drive variables input by the first drive circuit, the second drive circuit, and the third drive circuit, respectively,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively; y ₁ , y ₂ , and y ₃ represent the response variables output by the first response circuit, the second response circuit, and the third response circuit, respectively,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively, q is the fractional derivative, K _R is the linear resistance coupling coefficient,

R ₀ =100KΩ, R _k represents a linear resistance, and its resistance value can be adjusted as required.

S4: Define the synchronization error of the coupling drive end and the coupling response end according to formulas (9) and (10), obtain the error system, and arrange the error system at the control end, so as to realize the synchronization of the coupling drive end and the coupling response end.

In this embodiment, the mathematical model of the error system is:

q表示分数阶导数，K_R表示线性电阻耦合系数，

R₀＝100KΩ；R_k表示线性电阻,其阻值可根据需要进行调整。In formula (11), e _i =x _i -y _i , i=1,2,3;

q is the fractional derivative, K _R is the linear resistive coupling coefficient,

R ₀ =100KΩ; R _k represents the linear resistance, and its resistance value can be adjusted as required.

When e _i = 0, i = 1, 2, and 3 are asymptotically stable, the coupling drive end and the coupling response end can achieve fractional-order chaotic system synchronization.

In this embodiment, the Lyapunov index criterion can be used to judge the synchronization stability as:

For a nonlinear system of equations, the Lyapunov exponent λ is obtained by averaging the stretching or compression rates at each point of the trajectory over a long period of time. If λ>0, it means that the orbit is unstable in each part, and the adjacent points will eventually be separated exponentially, but the chaotic attractor will be formed after repeated folding under the action of the overall stability factor of the orbit; if λ< 0, it means that the motion orbit is also stable locally, and the adjacent points will eventually get closer, corresponding to the periodic motion or stable equilibrium point of the dynamic system; λ=0 corresponds to the bifurcation point, which changes from negative to positive. The process is the process of period-doubling bifurcation to chaos. Therefore, when all the Lyapunov exponents of the error system (11) in S4 are negative values, the state error will gradually tend to zero within a limited time, indicating that the coupling drive end and the coupling response end are synchronized.

范围内最大李雅普诺夫指数值均为负，即选择线性电阻

时，耦合驱动端和耦合响应端实现混沌同步。As shown in Figure 3, when q=0.95, the maximum Lyapunov exponent in the error system changes with K _R , it can be known that

The maximum Lyapunov exponent values in the range are all negative, that is, linear resistance is selected

When , the coupling drive end and the coupling response end realize chaotic synchronization.

For example, let the fractional derivative q=0.95 and K _R =1, that is, when the linear resistance R _k =100KΩ, the driving variables x ₁ , x ₂ , and x ₃ of the coupling driving terminal (9) are (2, 2, 2), The response variables y ₁ , y ₂ , and y ₃ of the coupled response terminal (10) are (-2, -5, 5), then the three Lyapulov exponents of the error system (11) in S4 are calculated as λ ₁ =- 2.4781, λ ₂ =-3.2007, λ ₃ =-5.7004, which are all negative numbers, which means that the coupling driving end and the coupling responding end are synchronized.

多次模拟得到q＝0.95，K_R＝1，即线性电阻R_k＝100KΩ时的模拟图，如图4所示，同步误差值Err(t)在一段时间内(1s)逐渐趋于零，耦合驱动端和耦合响应端达到完全同步。In this embodiment, the synchronization error of the error system

After several simulations, q = 0.95, K _R = 1, that is, the simulation diagram when the linear resistance R _k = 100KΩ, as shown in Figure 4, the synchronization error value Err(t) gradually tends to zero within a period of time (1s), The coupling drive end and the coupling response end are fully synchronized.

Compared with the prior art, the present invention has the following advantages:

1. High security: Most of the existing technical solutions use general integer-order chaotic systems, whose chaotic characteristics are far lower than fractional-order chaotic systems. Fractional-order chaotic systems can more accurately describe the physical model of actual chaos. Because the fractional derivative or integral does not reflect the nature or quantity of the local or a certain point, but comprehensively considers the past history and the influence of non-local distribution. Therefore, the fractional-order chaotic system can better reflect the engineering physical phenomena presented by the system, and the analysis and research of the synchronous control of the fractional-order system has a more general application range. Moreover, from the point of view of control energy, the coupling strength of coupled chaotic synchronization is much greater than the coupling strength of coupled synchronization in chaotic or periodic state. Therefore, the present invention utilizes fractional chaos to realize coupling synchronization. Because the fractional system has the characteristics of historical memory and the like, its dynamic characteristics are more complex and difficult to decipher, which can greatly enhance the security of chaotic secure communication.

2. Synchronization based on linear coupling technology: The nonlinear system realizes the continuity and persistence of the coupling through linear feedback. Even under the interference of large environmental noise, the coupled fractional-order chaotic system can still achieve synchronization and has strong anti-noise. ability. Therefore, through the simple and easy-to-implement linear coupled controller, the fractional-order chaotic system can achieve stable coupling synchronization, and the chaotic synchronization system has a strong ability to suppress noise interference and chaotic system parameter disturbance. The coupled control fractional-order chaotic synchronization system has better robustness. More importantly, mutually coupled nonlinear systems are ubiquitous in nature, and because the linear coupling structure of the present invention is simple, it has very prominent practical value. In addition, the linear coupled synchronous system does not require pre-calculation and analysis of the chaotic system, and the technology is feasible and easy to implement.

3. Low cost: the existing fractional-order chaotic synchronization system adopts many components, the interference between signals is large, and the realization error is large; And the structure is simple, the robustness and applicability of the synchronization system are improved, and the security of the communication system is improved.

Those skilled in the art can understand that the above-mentioned embodiments are specific examples for realizing the present invention, and in practical applications, various changes can be made in form and details without departing from the spirit of the present invention and range.

Claims (9)

1. The chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling is characterized in that, it comprises a coupling drive end, a control end, and a coupling response end; the coupling drive end is provided with a coupling drive circuit, and the coupling response end is A coupling response circuit is provided, and a linear coupling circuit is provided on the control terminal; the coupling driving circuit is connected with the coupling response circuit through the linear coupling circuit. 2. The chaotic synchronization system based on resistance and fractional equivalent capacitive coupling according to claim 1, wherein the coupling driving circuit comprises a first driving circuit, a second driving circuit and a third driving circuit; The first drive circuit includes a first drive variable terminal (x1): The first drive variable end (x1) is connected to one end of the first resistor (R1), the other end of the first resistor (R1), one end of the first fractional equivalent capacitor (F1), and one end of the second resistor (R2) After parallel connection, it is connected to the inverting input terminal of the first comparator (U1), the non-inverting input terminal of the first comparator (U1) is grounded, and the other terminal of the first fractional-order equivalent capacitor (F1) is respectively connected to the first driving variable terminal. (x1), the output end of the first comparator (U1) is connected to one end of the eighth resistor (R8), the other end of the eighth resistor (R8) and one end of the ninth resistor (R9) are connected in parallel with the fourth comparator The inverting input terminal of (U4) is connected, the non-inverting input terminal of the fourth comparator (U4) is grounded, the output terminal of the fourth comparator (U4) and the other terminal of the ninth resistor (R9) are connected in parallel with the second driving circuit One end of the third resistor (R3) is connected, and the other end of the second resistor (R2) is compared with one end of the fourth resistor (R4), the other end of the eleventh resistor (R11), and the fifth The output end of the device (U5) is connected with the second input end of the second multiplier (X2) in the third driving circuit; The second driving circuit includes a second driving variable terminal (x2) and a coupling driving terminal (u): The second drive variable terminal (x2) is connected to one end of the twenty-third resistor (R23) in the linear coupling circuit, the coupling drive terminal (u) is connected to one end of the thirtieth resistor (R30), and the first multiplier (X1) The first input end of the first multiplier (X1) is connected to the first drive variable end (x1), the output end of the first multiplier (X1) is connected to one end of the fifth resistor (R5), the other end of the thirtieth resistor (R30), the third The other end of the resistor (R3), the other end of the fourth resistor (R4), the other end of the fifth resistor (R5), and one end of the second fractional equivalent capacitor (F2) are connected in parallel with the second comparator (U2) The inverting input end of the second comparator (U2) is connected to the ground, the other end of the second fractional equivalent capacitor (F2), the output end of the second comparator (U2), the tenth resistor (R10 ) is connected in parallel with the second drive variable terminal (x2), the other end of the tenth resistor (R10) and one end of the eleventh resistor (R11) are connected in parallel with the inverting input terminal of the fifth comparator (U5). connected, the non-inverting input end of the fifth comparator (U5) is grounded, and the other end of the eleventh resistor (R11) and the output end of the fifth comparator (U5) are connected in parallel with the other end of the second resistor (R2); The third drive circuit includes a third drive variable terminal (x3): The third driving variable terminal (x3) is respectively connected with the second input terminal of the first multiplier (X1), one terminal of the sixth resistor (R6), the other terminal of the third fractional equivalent capacitor (F3), and the third comparator The output end of (U3) is connected, the first input end of the second multiplier (X2) is connected to the first drive variable end (x1), and the second input end of the second multiplier (X2) is connected to the second resistor (R2) The other end of the second multiplier (X2) is connected to one end of the seventh resistor (R7), the other end of the sixth resistor (R6), the other end of the seventh resistor (R7), the third fractional order One end of the equivalent capacitor (F3) is connected in parallel with the inverting input terminal of the third comparator (U3), and the non-inverting input terminal of the third comparator (U3) is grounded. 3. The chaotic synchronization system based on resistance and fractional equivalent capacitive coupling according to claim 1, wherein the coupling response circuit comprises a first response circuit, a second response circuit and a third response circuit; The first response circuit includes a first response variable terminal (y1): The first response variable end (y1) is connected to one end of the sixteenth resistor (R16), the other end of the sixteenth resistor (R16), one end of the fourth fractional equivalent capacitor (F4), the seventeenth resistor (R17 ) is connected in parallel with the inverting input of the eighth comparator (U8), the non-inverting input of the eighth comparator (U8) is grounded, and the other end of the fourth fractional-order equivalent capacitor (F4), the eighth comparator The output end of the device (U8), one end of the fourteenth resistor (R14) is connected in parallel with the first response variable end (y1), the other end of the fourteenth resistor (R14), and one end of the twelfth resistor (R12) After parallel connection, it is connected to the inverting input terminal of the sixth comparator (U6), the non-inverting input terminal of the sixth comparator (U6) is grounded, the output terminal of the sixth comparator (U6), the other side of the twelfth resistor (R12) One end is connected in parallel with one end of the eighteenth resistor (R18) in the second response circuit, and the other end of the seventeenth resistor (R17) is respectively connected with one end of the nineteenth resistor (R19) in the second drive circuit, the thirteenth The other end of the resistor (R13), the output end of the seventh comparator (U7) and the second input end of the fourth multiplier (X4) in the third response circuit are connected; The second response circuit includes a second response variable terminal (y2) and a coupled response terminal (-u): The output end of the linear coupling circuit is connected to the coupling response end (-u), the coupling response end (-u) is also connected to one end of the thirty-first resistor (R31), and the first input end of the third multiplier (X3) and The first response variable terminal (y1) is connected, the output terminal of the third multiplier (X3) is connected to one end of the twentieth resistor (R20), the other end of the thirty-first resistor (R31), the eighteenth resistor (R18) ), the other end of the nineteenth resistor (R19), the other end of the twentieth resistor (R20), and one end of the fifth fractional equivalent capacitor (F5) are connected in parallel with the inverse of the ninth comparator (U9). The phase input terminal is connected, the non-phase input terminal of the ninth comparator (U9) is grounded, the other terminal of the fifth fractional equivalent capacitor (F5), the output terminal of the ninth comparator (U9), the fifteenth resistor (R15) One end is connected in parallel with the second response variable end (y2), the second response variable end (y2) is also connected with one end of the twenty-fourth resistor (R24) in the linear coupling circuit, and the other end of the fifteenth resistor (R15) One end and one end of the thirteenth resistor (R13) are connected in parallel with the inverting input end of the seventh comparator (U7), the non-inverting input end of the seventh comparator (U7) is grounded, and the other end of the thirteenth resistor (R13) is connected to the ground. One end, the output end of the seventh comparator (U7) is connected in parallel with the other end of the seventeenth resistor (R17); The third response circuit includes a third response variable terminal (y3): The third response variable end (y3) is respectively connected with the second input end of the third multiplier (X3), one end of the twenty-first resistor (R21), the other end of the sixth fractional equivalent capacitor (F6), the tenth The output end of the comparator (U10) is connected, the first input end of the fourth multiplier (X4) is connected to the first response variable end (y1), and the second input end of the fourth multiplier (X4) is connected to the seventeenth resistor The other end of (R17) is connected, the output end of the fourth multiplier (X4) is connected to one end of the twenty-second resistor (R22), the other end of the twenty-first resistor (R21), the twenty-second resistor (R22 ) and one end of the sixth fractional equivalent capacitor (F6) are connected in parallel with the inverting input terminal of the tenth comparator (U10), and the non-inverting input terminal of the tenth comparator (U10) is grounded. 4. The chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling according to claim 1, wherein the linear coupling circuit comprises a linear resistance (R _k ) and a seventh fractional-order equivalent capacitance (F7) : One end of the twenty-third resistor (R23) is connected to the second drive variable terminal (x2), one end of the twenty-fourth resistor (R24) is connected to the second response variable terminal (y2), and the twenty-third resistor (R23) The other end of the 26th resistor (R26) is connected in parallel with the inverting input end of the eleventh comparator (U11), the other end of the 24th resistor (R24), the 25th resistor ( One end of R25) is connected in parallel with the non-inverting input end of the eleventh comparator (U11), the other end of the twenty-fifth resistor (R25) is grounded, the other end of the twenty-sixth resistor (R26), the eleventh comparator The output end of (U11) is connected in parallel with one end of the linear resistor (R _k ) and one end of the seventh fractional equivalent capacitor (F7), and the other end of the linear resistor (R _k ) and the seventh fractional equivalent capacitor The other end of (F7) and one end of the twenty-seventh resistor (R27) are connected in parallel with the inverting input of the twelfth comparator (U12), the non-inverting input of the twelfth comparator (U12) is grounded, and the The output end of the twelve comparator (U12), the other end of the twenty-seventh resistor (R27), and one end of the twenty-eighth resistor (R28) are connected in parallel with the coupling drive end (u), and the twenty-eighth resistor ( The other end of R28) and one end of the twenty-ninth resistor (R29) are connected in parallel with the inverting input of the thirteenth comparator (U13), the non-inverting input of the thirteenth comparator (U13) is grounded, and the second The other end of the nineteenth resistor (R29) and the output end of the thirteenth comparator (U13) are connected in parallel with the coupling response end (-u). 5. the chaotic synchronization system based on resistance and fractional equivalent capacitance coupling as claimed in claim 4, is characterized in that, the equivalent circuit of described seventh fractional equivalent capacitance (F7) is: One end of the a-th resistor (Ra) and one end of the first capacitor (C1) are connected in parallel with the input port, and the other end of the a-th resistor (Ra) and the other end of the first capacitor (C1) are connected in parallel with the b-th resistor respectively. One end of (Rb) and one end of the second capacitor (C2) are connected, and the other end of the bth resistor (Rb) and the other end of the second capacitor (C2) are connected in parallel with one end of the cth resistor (Rc) and the third One end of the capacitor (C3) is connected, the other end of the c-th resistor (Rc) and the other end of the third capacitor (C3) are connected in parallel with the output port. 6. A chaotic synchronization method based on resistance and fractional-order equivalent capacitive coupling, characterized in that it specifically comprises the following steps: S1: Build the mathematical model of the driver:

In formula (1), x ₁ , x ₂ , and x ₃ represent driving variables, respectively,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively, and q represents the fractional derivative; S2: Build the mathematical model of the response side according to the mathematical model of the driver side:

In formula (2), y ₁ , y ₂ , and y ₃ represent the response variables, respectively,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively; S3: Determine the linear coupling term, and improve the driving end and the response end respectively to obtain the coupling driving end and the coupling response end; The mathematical model of the linear coupling term is:

In formula (3), u represents the linear coupling control term, K _R represents the linear resistance coupling coefficient,

R _k represents linear resistance, R ₀ =100KΩ; Combining the linear coupling term and the driving end to get the coupling driving end, its mathematical model is:

Combining the linear coupling term with the response end gets the coupled response end, and its mathematical model is:

In formulas (4) and (5), x ₁ , x ₂ , and x ₃ represent driving variables,

are the derivatives of x ₁ , x ₂ , and x ₃ respectively; y ₁ , y ₂ , and y ₃ represent the response variables,

are the derivatives of y ₁ , y ₂ , and y ₃ respectively, and q represents the fractional derivative; S4: Define the synchronization error between the coupling drive end and the coupling response end according to formulas (4) and (5), obtain an error system, and arrange the error system at the control end, so as to realize the synchronization of the coupling drive end and the coupling response end; The mathematical model of the error system is:

In formula (6), e _i =x _i -y _i , i=1,2,3;

7. the design method of the chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling as claimed in claim 6, is characterized in that, in described S1, the circuit state equation corresponding to the mathematical model of driving end is:

The dimensionless state equation mapped by the circuit state equation (5) is expressed as follows:

In formulas (7) and (8), V1, V2, and V3 represent voltages respectively, corresponding to x ₁ , x ₂ , and x ₃ ; t=τ/t ₀ , R ₀ =100kΩ, C ₀ =10nF, t ₀ =R ₀ C ₀ , F represents fractional equivalent capacitance, let R ₁ =R ₂ =2.5kΩ, R ₃ =R ₅ =R ₇ =10kΩ, R ₄ =4kΩ, R ₆ =33.3kΩ. 8. the design method of the chaotic synchronization system based on resistance and fractional-order equivalent capacitance coupling as claimed in claim 6, is characterized in that, in described S4, the synchronization error of error system

e _i =x _i -y _i , i=1,2,3. 9 . The method for designing a chaotic synchronization system based on resistance and fractional-order equivalent capacitive coupling according to claim 6 , wherein, in the S3 , q=0.95 and K _R =1. 10 .

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