CN114861133A - Error space extraction optimization method and device, electronic equipment and readable storage medium - Google Patents

Error space extraction optimization method and device, electronic equipment and readable storage medium Download PDF

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CN114861133A
CN114861133A CN202210447033.5A CN202210447033A CN114861133A CN 114861133 A CN114861133 A CN 114861133A CN 202210447033 A CN202210447033 A CN 202210447033A CN 114861133 A CN114861133 A CN 114861133A
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赵言涛
汤博
汪龙峰
徐虎
王建忠
刘宇轩
刘名成
汪攀
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Wasion Group Co Ltd
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Abstract

The application discloses an error space extraction optimization method, an error space extraction optimization device, electronic equipment and a readable storage medium, which are applied to the technical field of power transmission and transformation equipment, wherein the error space extraction optimization method comprises the following steps: acquiring signal measurement data of a capacitive voltage transformer, and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not; if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; and determining a pivot space and an error space in the feature decomposition result. The application solves the technical problem of low error space extraction efficiency in the prior art.

Description

Error space extraction optimization method and device, electronic equipment and readable storage medium
Technical Field
The application relates to the technical field of power transmission and transformation equipment, in particular to an error space extraction optimization method and device, electronic equipment and a readable storage medium.
Background
With the rapid development of science and technology, the technology of power transmission and transformation equipment is also developed more and more mature, at present, a capacitance voltage type mutual inductor adopts a covariance matrix decomposition method to extract an error space, the available memory space for processing data by the covariance matrix decomposition method is smaller, and when the data processing amount is overlarge, the situation that the memory occupies overlarge space to cause slow operation or incapability of operation easily occurs, so that the extraction efficiency of the error space is low.
Disclosure of Invention
The present application mainly aims to provide an error space extraction optimization method, an error space extraction optimization device, an electronic device, and a readable storage medium, and aims to solve the technical problem of low error space extraction efficiency in the prior art.
In order to achieve the above object, the present application provides an error space extraction optimization method applied to an error space extraction optimization device, where the error space extraction optimization method includes:
acquiring signal measurement data of a capacitive voltage transformer, and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not;
if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data;
if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data;
and determining a pivot space and an error space in the feature decomposition result.
Optionally, the feature decomposition result includes a feature vector matrix and a feature value matrix, and the step of determining a principal component space and an error space in the feature decomposition result includes:
determining the number of principal elements of the capacitor voltage transformer according to the characteristic value matrix;
and determining a principal component space and an error space in the eigenvector matrix according to the number of the principal components and the number of signal channels corresponding to the capacitor voltage transformer.
Optionally, the step of determining a principal component space and an error space in the eigenvector matrix according to the number of principal components and the number of signal channels corresponding to the capacitive voltage transformer includes:
determining first position information of a pivot space in the feature vector matrix and second position information of an error space in the feature vector matrix according to the pivot number and the signal channel number;
and selecting the pivot space in the feature vector matrix according to the first position information, and selecting the error space in the feature vector matrix according to the second position information.
Optionally, the step of determining the number of principal elements of the capacitor voltage transformer according to the eigenvalue matrix includes:
determining the correlation among the signal channels according to the characteristic value matrix;
and classifying the signal channels in the pivot space according to the correlation to obtain pivot classification groups, and taking the group number of the pivot classification groups as the pivot number.
Optionally, the step of determining the correlation between the signal channels according to the eigenvalue matrix includes:
and calculating a correlation coefficient between every two signal channels in each signal channel according to the eigenvalue matrix, and taking the correlation coefficient as the correlation between the signal channels.
Optionally, the step of classifying each signal channel in the pivot space according to the correlation to obtain a pivot classification group includes:
selecting a target correlation coefficient with strong correlation from the correlation coefficients;
and dividing the target signal channel pair corresponding to the target correlation coefficient into pivot element classification groups.
Optionally, the step of selecting a target signal channel corresponding to a correlation coefficient with strong correlation from the correlation coefficients includes:
judging whether the correlation coefficient meets a preset correlation condition or not;
if yes, judging that the target signal channel pair corresponding to the correlation coefficient has strong correlation;
if not, judging that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
In order to achieve the above object, the present application further provides an error space extraction optimization apparatus, which is applied to an error space extraction optimization device, the error space extraction optimization apparatus includes:
the judging module is used for acquiring signal measurement data of the capacitive voltage transformer and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not;
the singular value decomposition module is used for performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data if the singular value decomposition module is positive;
the covariance decomposition module is used for carrying out covariance matrix decomposition on the signal measurement data if the signal measurement data is not the same as the signal measurement data, so as to obtain a characteristic decomposition result of the signal measurement data;
and the determining module is used for determining a pivot space and an error space in the feature decomposition result.
Optionally, the feature decomposition result includes a feature vector matrix and a feature value matrix, the step of determining a principal component space and an error space in the feature decomposition result is further configured to:
determining the number of principal elements of the capacitor voltage transformer according to the characteristic value matrix;
and determining a principal component space and an error space in the eigenvector matrix according to the number of the principal components and the number of signal channels corresponding to the capacitor voltage transformer.
Optionally, the step of determining a principal component space and an error space in the eigenvector matrix according to the number of principal components and the number of signal channels corresponding to the capacitive voltage transformer, the determining module is further configured to:
determining first position information of a pivot space in the feature vector matrix and second position information of an error space in the feature vector matrix according to the pivot number and the signal channel number;
and selecting the pivot space in the feature vector matrix according to the first position information, and selecting the error space in the feature vector matrix according to the second position information.
Optionally, in the step of determining the number of principal elements of the capacitor voltage transformer according to the eigenvalue matrix, the determining module is further configured to:
determining the correlation among the signal channels according to the characteristic value matrix;
and classifying the signal channels in the pivot space according to the correlation to obtain pivot classification groups, and taking the group number of the pivot classification groups as the pivot number.
Optionally, in the step of determining the correlation between the signal channels according to the eigenvalue matrix, the determining module is further configured to:
and calculating a correlation coefficient between every two signal channels in each signal channel according to the eigenvalue matrix, and taking the correlation coefficient as the correlation between the signal channels.
Optionally, the step of classifying each signal channel in the pivot space according to the correlation to obtain a pivot classification group, where the determining module is further configured to:
selecting a target correlation coefficient with strong correlation from the correlation coefficients;
and dividing the target signal channel pair corresponding to the target correlation coefficient into pivot element classification groups.
Optionally, in the step of selecting a target signal channel corresponding to a correlation coefficient having strong correlation among the correlation coefficients, the determining module is further configured to:
judging whether the correlation coefficient meets a preset correlation condition or not;
if yes, judging that the target signal channel pair corresponding to the correlation coefficient has strong correlation;
if not, judging that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
The present application further provides an electronic device, the electronic device including: a memory, a processor and a program of the error space extraction optimization method stored on the memory and executable on the processor, which when executed by the processor, may implement the steps of the error space extraction optimization method as described above.
The present application also provides a computer-readable storage medium having stored thereon a program for implementing the error space extraction optimization method, which when executed by a processor, implements the steps of the error space extraction optimization method as described above.
The present application also provides a computer program product comprising a computer program which, when executed by a processor, performs the steps of the error space extraction optimization method as described above.
Compared with the prior art which only adopts a covariance matrix decomposition method to extract an error space, the method and the device for extracting and optimizing the error space judge whether the data volume of the signal measurement data meets a preset data volume threshold value or not by acquiring the signal measurement data of the capacitive voltage transformer; if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; the principal component space and the error space are determined in the characteristic decomposition result, because the complexity of the covariance matrix decomposition method is lower than that of the singular value decomposition method, when the data volume is small, the covariance matrix decomposition method is selected to improve the efficiency of error space extraction, and when the data volume is large, the singular value decomposition method is selected to ensure that the error space extraction can normally operate, the decomposition method is flexibly selected according to the data size, so that the capacitance voltage transformer can still extract the error space under the condition of ensuring normal operation in the face of a complex heterogeneous application environment, the technical defect that the operation is slow or incapable of operation due to the fact that the memory is excessively occupied due to the fact that the data volume is excessively large when the error space is extracted only by adopting the covariance matrix decomposition method is avoided, and the efficiency of error space extraction is improved.
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The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
FIG. 1 is a schematic flow chart of a first embodiment of an error space extraction optimization method according to the present application;
fig. 2 is a schematic structural diagram of a hardware operating environment related to an error space extraction optimization method in an embodiment of the present application.
The objectives, features, and advantages of the present application will be further described with reference to the accompanying drawings.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments of the present application are described in detail below with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
In a first embodiment of the error space extraction optimization method, referring to fig. 1, the error space extraction optimization method includes:
step S10, acquiring signal measurement data of the capacitor voltage transformer, and judging whether the data volume of the signal measurement data meets a preset data volume threshold value;
step S20, if yes, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data;
step S30, if not, obtaining a characteristic decomposition result of the signal measurement data by carrying out covariance matrix decomposition on the signal measurement data;
and step S40, determining a pivot space and an error space in the feature decomposition result.
In this embodiment, it should be noted that the preset data amount threshold may be a preset critical value of a system available memory when using the covariance matrix decomposition method, or may be a preset maximum value of the data amount using the covariance matrix decomposition method.
In this embodiment, it should be noted that, when the singular value decomposition method is used, the available memory space of the system is large, and the system can be used for processing signal measurement data with a large data volume; when the covariance matrix decomposition method is used, the available memory space of the system is small, and the method can be used for processing signal measurement data with small data volume.
Exemplarily, the steps S10 to S40 include: according to the number of signal channels corresponding to the capacitive voltage transformer, acquiring signal measurement data of the capacitive voltage transformer on the secondary side of each signal channel corresponding to the number of signal channels, acquiring the data volume of the signal measurement data, and judging whether the data volume meets a preset data volume threshold value; if the data volume meets a preset data volume threshold value, acquiring a time domain sampling characteristic value of each signal channel, determining a data matrix formed by the signal measurement data according to the number of the signal channels and the time domain sampling characteristic value, and performing singular value decomposition on the data matrix to obtain a characteristic decomposition result of the signal measurement data; if the data volume does not meet a preset data volume threshold value, acquiring a time domain sampling characteristic value of each signal channel, determining a data matrix formed by the signal measurement data according to the number of the signal channels and the time domain sampling characteristic value, and performing covariance matrix decomposition on the data matrix to obtain a characteristic decomposition result of the signal measurement data; and determining a principal component space and an error space in the feature decomposition result, wherein the time domain sampling feature value can be a time domain sampling point number, a time domain sampling amplitude value or a time domain sampling phase value.
Further, the specific process of singular value decomposition is as follows:
T NxM =U N×NN×M V M×M
in the formula, T N×M For said data matrix, U N×N Is a decomposition matrix, sigma, of said data matrix N×M Is a matrix of eigenvalues, V, of the data matrix M×M Is a feature vector matrix of the data matrix.
Further, the specific process of the covariance matrix decomposition is as follows:
Figure BDA0003617354380000061
in the formula, T N×M For the purpose of the data matrix,
Figure BDA0003617354380000071
for transposition of the data matrix, U N×N Is the eigenvector matrix, sigma, of the data matrix N×M Is a matrix of eigenvalues of said data matrix,
Figure BDA0003617354380000072
is a transpose of the matrix of eigenvalues,
Figure BDA0003617354380000073
is a transpose of the eigenvector matrix.
The singular value decomposition is performed by dividing the data matrix into the decomposition matrix, the eigenvalue matrix, and the eigenvector matrix, and the covariance matrix decomposition is performed by dividing the data matrix into the eigenvector matrix and the eigenvalue matrix, and therefore, the covariance matrix decomposition method is less complex than the singular value decomposition method.
In step S40, the feature decomposition result includes a feature vector matrix and a feature value matrix, and the step of determining the pivot space and the error space in the feature decomposition result includes:
step S41, determining the number of the principal elements of the capacitor voltage transformer according to the eigenvalue matrix;
and step S42, determining a principal component space and an error space in the characteristic vector matrix according to the number of the principal components and the number of signal channels corresponding to the capacitor voltage transformer.
Exemplarily, the steps S41 to S42 include: determining the number of principal elements of the capacitor voltage transformer according to the characteristic value matrix; determining the number of signal channels of the capacitor voltage transformer according to the ratio difference and the angular difference of the capacitor voltage transformer, and determining a principal component space and an error space in the eigenvector matrix according to the number of principal components and the number of signal channels, wherein the ratio difference is a ratio error, and is a percentage of an actual secondary current (voltage) of the capacitor voltage transformer multiplied by the difference between a rated transformation ratio and an actual primary current (voltage); the angular difference is a phase angle error, namely a phase difference between a secondary current (voltage) phasor and a primary current (voltage) phasor of the capacitive voltage transformer after the secondary current (voltage) phasor rotates by 180 degrees anticlockwise.
In step S42, the step of determining a principal component space and an error space in the eigenvector matrix according to the number of principal components and the number of signal channels corresponding to the capacitive voltage transformer includes:
step A10, determining first position information of a pivot space in the feature vector matrix and second position information of an error space in the feature vector matrix according to the pivot number and the signal channel number;
step a20, selecting the pivot space in the eigenvector matrix according to the first position information, and selecting the error space in the eigenvector matrix according to the second position information.
In this embodiment, it should be noted that the first position information is a row-column position of the pivot space in the feature vector matrix; the second position information is a row and column position of the error space in the feature vector matrix.
Illustratively, steps a10 through a20 include: determining first position information of a pivot space in the feature vector matrix according to the pivot number, and determining second position information of an error space in the feature vector matrix according to the signal channel number and the pivot number; selecting the pivot space in the eigenvector matrix according to the first position information, and selecting the error space in the eigenvector matrix according to the second position information, for example, when the number of pivots is 2 and the number of signal channels is 4, taking the first two columns in the eigenvector matrix as the pivot space, and taking the third to fourth columns in the eigenvector matrix as the error space.
Compared with the prior art that the error space is extracted only by adopting a covariance matrix decomposition method, the method for extracting the error space comprises the steps of obtaining signal measurement data of a capacitive voltage transformer and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not; if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; the principal component space and the error space are determined in the characteristic decomposition result, because the complexity of the covariance matrix decomposition method is lower than that of the singular value decomposition method, when the data volume is small, the covariance matrix decomposition method is selected to improve the efficiency of error space extraction, and when the data volume is large, the singular value decomposition method is selected to ensure that the error space extraction can normally operate, the decomposition method is flexibly selected according to the data size, so that the capacitance voltage transformer can still extract the error space under the condition of ensuring normal operation in the face of a complex heterogeneous application environment, the technical defect that the operation is slow or incapable of operation due to the fact that the memory is excessively occupied due to the fact that the data volume is excessively large when the error space is extracted only by adopting the covariance matrix decomposition method is avoided, and the efficiency of error space extraction is improved.
Example two
Further, based on the first embodiment of the present application, in another embodiment of the present application, the same or similar contents to the first embodiment described above may be referred to the above description, and are not repeated herein. On this basis, in step S41, the step of determining the number of principal elements of the capacitor voltage transformer according to the eigenvalue matrix includes:
step B10, determining the correlation among the signal channels according to the eigenvalue matrix;
and step B20, classifying the signal channels in the pivot space according to the correlation to obtain pivot classification groups, and taking the group number of the pivot classification groups as the pivot number.
In this embodiment, it should be noted that, in the prior art, the number of principal elements of the capacitor voltage transformer is determined by a principal element determination formula.
Specifically, the pivot determination formula is as follows:
Figure BDA0003617354380000091
wherein m is the number of the principal elements, delta i And M is the value of a diagonal line in the characteristic value matrix, the number of the signal channels is M, and a is a principal component control threshold value.
The setting of the pivot control threshold is related to the real measuring environment, for different pivot control threshold conditions, the signal-to-noise ratio of the monitoring error signal of the error channel is different, thereby having different influence on error detection, and further when the pivot quantity is determined by adopting the fixed pivot control threshold, when the signal measurement data is changed, the situation that error space extraction error is caused by low signal-to-noise ratio of the monitoring error signal and the coupling rule of the setting error is unclear, thereby causing error overflow, or the situation that error overflow is excessively corrected is caused by high signal-to-noise ratio of the monitoring error signal is easy to occur, the pivot quantity is determined by the correlation among the signal channels in the embodiment of the application, even if the signal measurement data is changed, the proper pivot quantity can be adapted in real time, and the situation that the pivot quantity is determined by adopting the fixed pivot control threshold is avoided, due to the fact that signal measurement data are changed, the technical defects that error space extraction is wrong due to the fact that the signal to noise ratio of a monitoring error signal is low and the coupling rule of the set error is unclear, and therefore error overflow occurs, or the error overflow situation is excessively corrected due to the fact that the signal to noise ratio of the monitoring error signal is high, and therefore the accuracy of error space extraction is improved, and the accuracy of error coupling is further improved.
In step B10, the step of determining the correlation between the signal channels according to the eigenvalue matrix includes:
and step B11, calculating a correlation coefficient between every two signal channels in each signal channel according to the eigenvalue matrix, and taking the correlation coefficient as the correlation between each signal channel.
Exemplarily, step B11 includes: according to the eigenvalue matrix, calculating the correlation between every two signal channels in each signal channel to obtain a correlation matrix, obtaining a correlation coefficient sequence of the correlation matrix, obtaining a correlation coefficient between every two signal channels, and taking the correlation coefficient as the correlation between the signal channels, wherein the correlation matrix comprises the serial numbers of the two signal channels and the correlation coefficient sequence between the two signal channels.
Further, the specific process of obtaining the correlation coefficient between each two signal channels is as follows:
Figure BDA0003617354380000101
in the formula, C i,j Is the correlation coefficient between the i signal channel and the j signal channel, T (i) is the data matrix of the i signal channel,
Figure BDA0003617354380000102
transpose the data matrix for the i signal channel, T (j) is the data matrix for the j signal channel,
Figure BDA0003617354380000103
transpose the data matrix for the j signal channel.
Wherein the step of classifying each of the signal channels in the pivot space according to the correlation to obtain a pivot classification group includes:
step B21, selecting a target correlation coefficient with strong correlation from the correlation coefficients;
and B22, dividing the target signal channel pair corresponding to the target correlation coefficient into pivot element classification groups.
Exemplarily, the step B21 to the step B22 include: selecting a target correlation coefficient with strong correlation from the correlation coefficients according to the correlation coefficients; and acquiring target signal channels corresponding to the target correlation coefficients, and taking each target signal channel as a principal component classification group, for example, taking the 1, 3, 4 channels with strong correlation as one principal component classification group, and taking the 2, 5, 6 channels with strong correlation as another principal component classification group.
In step B21, the step of selecting a target signal channel corresponding to a correlation coefficient having strong correlation among the correlation coefficients includes:
step C10, judging whether the correlation coefficient meets the preset correlation condition;
step C20, if yes, determining that the target signal channel pair corresponding to the correlation coefficient has strong correlation;
and step C30, if not, determining that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
In this embodiment, it should be noted that the preset correlation condition is a preset condition for judging that the correlation coefficient is characterized by a strong correlation, and the preset correlation condition may be that an absolute value of the correlation coefficient is greater than a preset value.
Exemplarily, the step C10 to the step C30 include: judging whether the correlation coefficient meets a preset correlation condition or not; if the correlation coefficient meets a preset correlation condition, judging that a target signal channel pair corresponding to the correlation coefficient has strong correlation; and if the correlation coefficient does not meet the preset correlation condition, judging that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
Compared with the prior art that the error space is extracted only by adopting a covariance matrix decomposition method, the method for extracting the error space comprises the steps of obtaining signal measurement data of a capacitive voltage transformer and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not; if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; the principal component space and the error space are determined in the characteristic decomposition result, because the complexity of the covariance matrix decomposition method is lower than that of the singular value decomposition method, when the data volume is small, the covariance matrix decomposition method is selected to improve the efficiency of error space extraction, and when the data volume is large, the singular value decomposition method is selected to ensure that the error space extraction can normally operate, the decomposition method is flexibly selected according to the data size, so that the capacitance voltage transformer can still extract the error space under the condition of ensuring normal operation in the face of a complex heterogeneous application environment, the technical defect that the operation is slow or incapable of operation due to the fact that the memory is excessively occupied due to the fact that the data volume is excessively large when the error space is extracted only by adopting the covariance matrix decomposition method is avoided, and the efficiency of error space extraction is improved.
EXAMPLE III
The embodiment of the present application further provides an error space extraction optimization device, the error space extraction optimization device is applied to the error space extraction optimization device, the error space extraction optimization device includes:
the judging module is used for acquiring signal measurement data of the capacitive voltage transformer and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not;
the singular value decomposition module is used for performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data if the singular value decomposition module is positive;
the covariance decomposition module is used for carrying out covariance matrix decomposition on the signal measurement data if the signal measurement data is not the same as the signal measurement data, so as to obtain a characteristic decomposition result of the signal measurement data;
and the determining module is used for determining a pivot space and an error space in the feature decomposition result.
Optionally, the feature decomposition result includes a feature vector matrix and a feature value matrix, the step of determining a principal component space and an error space in the feature decomposition result is further configured to:
determining the number of principal elements of the capacitor voltage transformer according to the characteristic value matrix;
and determining a principal component space and an error space in the eigenvector matrix according to the number of the principal components and the number of signal channels corresponding to the capacitor voltage transformer.
Optionally, the step of determining a principal component space and an error space in the eigenvector matrix according to the number of principal components and the number of signal channels corresponding to the capacitive voltage transformer, the determining module is further configured to:
determining first position information of a pivot space in the feature vector matrix and second position information of an error space in the feature vector matrix according to the pivot number and the signal channel number;
and selecting the pivot space in the feature vector matrix according to the first position information, and selecting the error space in the feature vector matrix according to the second position information.
Optionally, in the step of determining the number of principal elements of the capacitor voltage transformer according to the eigenvalue matrix, the determining module is further configured to:
determining the correlation among the signal channels according to the characteristic value matrix;
and classifying the signal channels in the pivot space according to the correlation to obtain pivot classification groups, and taking the group number of the pivot classification groups as the pivot number.
Optionally, in the step of determining the correlation between the signal channels according to the eigenvalue matrix, the determining module is further configured to:
and calculating a correlation coefficient between every two signal channels in each signal channel according to the eigenvalue matrix, and taking the correlation coefficient as the correlation between the signal channels.
Optionally, the step of classifying each signal channel in the pivot space according to the correlation to obtain a pivot classification group, where the determining module is further configured to:
selecting a target correlation coefficient with strong correlation from the correlation coefficients;
and dividing the target signal channel pair corresponding to the target correlation coefficient into pivot element classification groups.
Optionally, in the step of selecting a target signal channel corresponding to a correlation coefficient having strong correlation among the correlation coefficients, the determining module is further configured to:
judging whether the correlation coefficient meets a preset correlation condition or not;
if yes, judging that the target signal channel pair corresponding to the correlation coefficient has strong correlation;
if not, judging that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
The error space extraction optimization device provided by the application adopts the error space extraction optimization method in the embodiment, and the technical problem of low error space extraction efficiency is solved. Compared with the prior art, the beneficial effects of the error space extraction optimization device provided by the embodiment of the present application are the same as the beneficial effects of the error space extraction optimization method provided by the above embodiment, and other technical features in the error space extraction optimization device are the same as the features disclosed by the above embodiment method, which are not repeated herein.
Example four
An embodiment of the present application provides an electronic device, which includes: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the error space extraction optimization method of the above embodiments.
Referring now to FIG. 2, shown is a schematic diagram of an electronic device suitable for use in implementing embodiments of the present disclosure. The electronic devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., car navigation terminals), and the like, and fixed terminals such as digital TVs, desktop computers, and the like. The electronic device shown in fig. 2 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 2, the electronic device may include a processing apparatus (e.g., a central processing unit, a graphic processor, etc.) that may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) or a program loaded from a storage apparatus into a Random Access Memory (RAM). In the RAM, various programs and data necessary for the operation of the electronic apparatus are also stored. The processing device, the ROM, and the RAM are connected to each other by a bus. An input/output (I/O) interface is also connected to the bus.
Generally, the following systems may be connected to the I/O interface: input devices including, for example, touch screens, touch pads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, and the like; output devices including, for example, Liquid Crystal Displays (LCDs), speakers, vibrators, and the like; storage devices including, for example, magnetic tape, hard disk, etc.; and a communication device. The communication means may allow the electronic device to communicate wirelessly or by wire with other devices to exchange data. While the figures illustrate an electronic device with various systems, it is to be understood that not all illustrated systems are required to be implemented or provided. More or fewer systems may alternatively be implemented or provided.
In particular, according to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication means, or installed from a storage means, or installed from a ROM. The computer program, when executed by a processing device, performs the above-described functions defined in the methods of the embodiments of the present disclosure.
The electronic device provided by the application adopts the error space extraction optimization method in the embodiment, and the technical problem of low error space extraction efficiency is solved. Compared with the prior art, the beneficial effects of the electronic device provided by the embodiment of the present application are the same as the beneficial effects of the error space extraction optimization method provided by the above embodiment, and other technical features in the electronic device are the same as the features disclosed in the above embodiment method, which are not repeated herein.
It should be understood that portions of the present disclosure may be implemented in hardware, software, firmware, or a combination thereof. In the foregoing description of embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
EXAMPLE five
The present embodiment provides a computer readable storage medium having computer readable program instructions stored thereon for performing the method of error space extraction optimization in the above embodiments.
The computer readable storage medium provided by the embodiments of the present application may be, for example, a usb disk, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, or device, or a combination of any of the above. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present embodiment, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, or device. Program code embodied on a computer readable storage medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.
The computer-readable storage medium may be embodied in an electronic device; or may be present alone without being incorporated into the electronic device.
The computer readable storage medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: acquiring signal measurement data of a capacitive voltage transformer, and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not; if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data; and determining a pivot space and an error space in the feature decomposition result.
Computer program code for carrying out operations for aspects of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The modules described in the embodiments of the present disclosure may be implemented by software or hardware. Wherein the names of the modules do not in some cases constitute a limitation of the unit itself.
The computer-readable storage medium provided by the application stores computer-readable program instructions for executing the error space extraction optimization method, and solves the technical problem of low error space extraction efficiency. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided by the embodiment of the present application are the same as the beneficial effects of the error space extraction optimization method provided by the foregoing implementation, and are not described herein again.
EXAMPLE six
The present application also provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the error space extraction optimization method as described above.
The computer program product provided by the application solves the technical problem of low error space extraction efficiency. Compared with the prior art, the beneficial effects of the computer program product provided by the embodiment of the present application are the same as the beneficial effects of the error space extraction optimization method provided by the above embodiment, and are not described herein again.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are included in the scope of the present application.

Claims (10)

1. An error space extraction optimization method, characterized in that the error space extraction optimization method comprises:
acquiring signal measurement data of a capacitive voltage transformer, and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not;
if so, performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data;
if not, performing covariance matrix decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data;
and determining a pivot space and an error space in the feature decomposition result.
2. The error space extraction optimization method of claim 1, wherein the feature decomposition result includes a feature vector matrix and a feature value matrix, and the step of determining the principal component space and the error space in the feature decomposition result includes:
determining the number of principal elements of the capacitor voltage transformer according to the characteristic value matrix;
and determining a principal component space and an error space in the eigenvector matrix according to the number of the principal components and the number of signal channels corresponding to the capacitor voltage transformer.
3. The method for optimizing the extraction of error space according to claim 2, wherein the step of determining the principal component space and the error space in the eigenvector matrix according to the number of the principal components and the number of the signal channels corresponding to the capacitor voltage transformer comprises:
determining first position information of a principal component space in the characteristic vector matrix and second position information of an error space in the characteristic vector matrix according to the number of the principal components and the number of the signal channels;
and selecting the pivot space in the feature vector matrix according to the first position information, and selecting the error space in the feature vector matrix according to the second position information.
4. The error space extraction optimization method of claim 2, wherein the step of determining the number of principal elements of the capacitor voltage transformer according to the eigenvalue matrix comprises:
determining the correlation among the signal channels according to the characteristic value matrix;
and classifying the signal channels in the pivot space according to the correlation to obtain pivot classification groups, and taking the group number of the pivot classification groups as the pivot number.
5. The method of claim 4, wherein the step of determining the correlation between the signal channels based on the eigenvalue matrix comprises:
and calculating a correlation coefficient between every two signal channels in each signal channel according to the eigenvalue matrix, and taking the correlation coefficient as the correlation between the signal channels.
6. The method of claim 5, wherein the step of classifying each of the signal paths in the pivot space according to the correlation to obtain pivot classification groups comprises:
selecting a target correlation coefficient with strong correlation from the correlation coefficients;
and dividing the target signal channel pair corresponding to the target correlation coefficient into pivot element classification groups.
7. The method as claimed in claim 6, wherein the step of selecting the target signal channel corresponding to the correlation coefficient having strong correlation among the correlation coefficients comprises:
judging whether the correlation coefficient meets a preset correlation condition or not;
if yes, judging that the target signal channel pair corresponding to the correlation coefficient has strong correlation;
if not, judging that the target signal channel pair corresponding to the correlation coefficient does not have strong correlation.
8. An error space extraction optimization apparatus, comprising:
the judging module is used for acquiring signal measurement data of the capacitive voltage transformer and judging whether the data volume of the signal measurement data meets a preset data volume threshold value or not;
the singular value decomposition module is used for performing singular value decomposition on the signal measurement data to obtain a characteristic decomposition result of the signal measurement data if the singular value decomposition module is positive;
the covariance decomposition module is used for carrying out covariance matrix decomposition on the signal measurement data if the signal measurement data is not the same as the signal measurement data, so as to obtain a characteristic decomposition result of the signal measurement data;
and the determining module is used for determining a pivot space and an error space in the feature decomposition result.
9. An electronic device, characterized in that the electronic device comprises:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the steps of the error space extraction optimization method of any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium has stored thereon a program for implementing an error space extraction optimization method, the program being executed by a processor to implement the steps of the error space extraction optimization method according to any one of claims 1 to 7.
CN202210447033.5A 2022-04-26 2022-04-26 Error space extraction optimization method and device, electronic equipment and readable storage medium Pending CN114861133A (en)

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