CN114860024B - Voltage stabilizing circuit based on memristor - Google Patents
Voltage stabilizing circuit based on memristor Download PDFInfo
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- CN114860024B CN114860024B CN202210330155.6A CN202210330155A CN114860024B CN 114860024 B CN114860024 B CN 114860024B CN 202210330155 A CN202210330155 A CN 202210330155A CN 114860024 B CN114860024 B CN 114860024B
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- 230000000087 stabilizing effect Effects 0.000 title claims abstract description 18
- DBIPGWVTQBAHGP-UHFFFAOYSA-N CN(C(C(C)OC1=CC=C2C(=CC(OC2=C1)=O)C1=C(C=CC=C1)C)=O)C Chemical compound CN(C(C(C)OC1=CC=C2C(=CC(OC2=C1)=O)C1=C(C=CC=C1)C)=O)C DBIPGWVTQBAHGP-UHFFFAOYSA-N 0.000 claims abstract description 25
- 101150098554 imt1 gene Proteins 0.000 claims abstract description 25
- 239000003990 capacitor Substances 0.000 claims abstract description 17
- 230000010355 oscillation Effects 0.000 claims description 9
- 238000005259 measurement Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 5
- 230000007704 transition Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Nonlinear Science (AREA)
- Electromagnetism (AREA)
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- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The invention discloses a memristorThe circuit is formed by connecting two parts in series, wherein the first part is formed by connecting a resistor R1 with a resistance value of 5-20 k and an IMT1 memristor in series, two ends of the IMT1 memristor are connected with a capacitor C1 in parallel, and the size of the capacitor C1 is 1-100 p; the other end of the resistor R1 is connected with the input end V IN The method comprises the steps of carrying out a first treatment on the surface of the The second part consists of a resistor R2 with a resistance value of 120-150 k and an IMT2 memristor which are connected in series, wherein two ends of the resistor R2 and the IMT2 memristor are connected in parallel with a capacitor C2, and the size of the capacitor C2 is 20-50 n; the other end of the IMT2 memristor is grounded; the first and second portions are connected in series at point V3. The circuit realizes voltage stabilizing output through the characteristic of memristor threshold transition, and can greatly reduce the complexity of the voltage stabilizing circuit.
Description
Technical Field
The invention relates to the technical field of integrated circuit design, in particular to a memristor-based voltage stabilizing circuit.
Background
With the rapid development and innovation of the computer industry, the CPU has been applied to various aspects of life, and people are enjoying convenience brought to life by science and technology, however, the conventional CMOS manufacturing process and computer architecture problems are restricting the further development of the computer industry, and the CMOS process is subject to a series of limitations in terms of integration level, power consumption, process reliability and the like. At this time, memristors have received attention, and have advantages of fast switching, small size, low energy consumption, and the like. In the development of the information age, products such as mobile phones and computers are popular, and for any electronic product, whether mobile equipment or large-sized electronic equipment, the power management module is an important component module of a power system, and cannot work normally if stable electric energy cannot be provided.
As shown in FIG. 1, the structure of the LDO low dropout linear voltage regulator in the prior art is schematically shown, and the circuit is to send a part of the output to an error amplifier through a feedback loop, the error amplifier obtains a difference value by comparing with a given reference voltage, and then the difference value is amplified by the error amplifier to control the conduction state of a series switch, thereby achieving a voltage stabilizing effect. However, the circuit structure of the prior art is complex, the circuit modules are more, the difference between the input and the output is not too large, and a plurality of factors need to be considered.
Disclosure of Invention
The invention aims to provide a memristor-based voltage stabilizing circuit which realizes voltage stabilizing output through the characteristic of memristor threshold transition and can greatly reduce the complexity of the voltage stabilizing circuit.
The invention aims at realizing the following technical scheme:
a memristor-based voltage stabilizing circuit, the circuit consisting of two parts in series, wherein:
the first part consists of a resistor R1 with a resistance value of 5-20 k and an IMT1 memristor which are connected in series, wherein two ends of the IMT1 memristor are connected with a capacitor C1 in parallel, and the size of the capacitor C1 is 1-100 p; the other end of the resistor R1 is connected with the input end V IN ；
The second part consists of a resistor R2 with a resistance value of 120-150 k and an IMT2 memristor which are connected in series, wherein two ends of the resistor R2 and the IMT2 memristor are connected in parallel with a capacitor C2, and the size of the capacitor C2 is 20-50 n; the other end of the IMT2 memristor is grounded;
the first and second portions are connected in series at point V3.
Based on the structure of the circuit, when the signal V is input IN When the IMT1 memristor is connected, with the increase of the input voltage, the voltage at the two ends of the IMT1 memristor reaches the set threshold voltage V th When the voltage at two ends of the IMT1 memristor is insufficient to enable the IMT1 memristor to oscillate, the oscillation is closed;
due to continuous voltage input, the voltage of the point V3 rises, so that an oscillation asymmetry phenomenon is caused, and the resistance value of the IMT1 memristor when oscillation is closed is obtained through measurement of the IMT1 memristor;
measuring the IMT2 memristor, wherein the resistance value of the IMT2 memristor is maintained at a certain value, and the IMT2 memristor is always in an on state; due to the characteristics of the device, when the IMT2 memristor is always in an on state, a clamping phenomenon can occur, so that the voltage at two ends of the IMT2 memristor cannot be changed continuously, and the voltage stabilizing effect is achieved.
According to the technical scheme provided by the invention, the circuit realizes voltage stabilizing output through the characteristic of memristor threshold transition, and the complexity of the voltage stabilizing circuit can be greatly reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a prior art LDO low dropout linear voltage regulator circuit;
FIG. 2 is a schematic diagram of a memristor-based voltage stabilizing circuit according to an embodiment of the present disclosure;
FIG. 3 is a simulation diagram of LTspice during operation of the circuit according to the embodiment of the present invention;
fig. 4 is a schematic diagram of an output waveform of a circuit according to an embodiment of the invention.
Detailed Description
The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments of the present invention, and this is not limiting to the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
Fig. 2 is a schematic diagram of a memristor-based voltage stabilizing circuit according to an embodiment of the present disclosure, where the circuit is composed of two parts connected in series, and in which:
the first part consists of a resistor R1 with a resistance value of 5-20 k and an IMT (Insulator-Metal-Transition) 1 memristor which are connected in series, two ends of the IMT1 memristor are connected in parallel with a capacitor C1, and the size of the capacitor C1 is 1-100 p; the other end of the resistor R1 is connected with the input end V IN The method comprises the steps of carrying out a first treatment on the surface of the Here, the parallel capacitor C1 is to eliminate the influence of the parasitic capacitance of the memristor itself;
the second part consists of a resistor R2 with a resistance value of 120-150 k and an IMT2 memristor which are connected in series, wherein two ends of the resistor R2 and the IMT2 memristor are connected in parallel with a capacitor C2, and the size of the capacitor C2 is 20-50 n; the other end of the IMT2 memristor is grounded;
the first and second portions are connected in series at point V3.
Based on the structure of the circuit, when the signal V is input IN When the IMT1 memristor is connected, with the increase of the input voltage, the voltage at the two ends of the IMT1 memristor reaches the set threshold voltage V th When the voltage at two ends of the IMT1 memristor is insufficient to enable the IMT1 memristor to oscillate, the oscillation is closed; in particular implementation, the input signal V IN Can be a sinusoidal signal, the frequency is 1K, the amplitude is 5V, and the bias is 3V;
as a result of the continuous voltage input, the voltage at the point V3 rises, resulting in an oscillation asymmetry phenomenon, as shown in fig. 3, which is a LTspice simulation diagram of the circuit according to the embodiment of the present invention during operation;
as shown in fig. 4, which is a schematic diagram of an output waveform of the circuit according to the embodiment of the present invention, by measuring the IMT1 memristor, a resistance value of the IMT1 memristor when oscillation is turned off can be obtained, where the resistance value is determined by a process of the device itself, and the resistance value is not fixed due to the influence of joule heat, but a difference of the resistance values in an off state does not exceed an order of magnitude;
measuring the IMT2 memristor, wherein the resistance value is maintained to be a certain value, the value is the resistance value when the memristor is in an on state, the resistance value is determined by the technology of the device, and the resistance value is not fixed but the difference of the resistance values in the on state does not exceed one order of magnitude due to the influence of Joule heat, and the IMT2 memristor is always in the on state; due to the characteristics of the device, when the IMT2 memristor is always in an on state, a clamping phenomenon can occur, so that the voltage at two ends of the IMT2 memristor cannot be changed continuously, and the voltage stabilizing effect is achieved.
It is noted that what is not described in detail in the embodiments of the present invention belongs to the prior art known to those skilled in the art.
In summary, compared with the previous LDO, the circuit structure of the circuit of the embodiment of the invention is greatly simplified, and the principle of the circuit is determined by the characteristics of the device, so that the feasibility of the circuit is greatly improved, and a stable output with larger phase difference with the input can be provided.
The foregoing is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims. The information disclosed in the background section herein is only for enhancement of understanding of the general background of the invention and is not to be taken as an admission or any form of suggestion that this information forms the prior art already known to those of ordinary skill in the art.
Claims (1)
1. A memristor-based voltage stabilizing circuit, characterized in that the circuit is composed of two parts connected in series, wherein:
the first part consists of a resistor R1 with a resistance value of 5-20 k and an IMT1 memristor which are connected in series, wherein two ends of the IMT1 memristor are connected with a capacitor C1 in parallel, and the size of the capacitor C1 is 1-100 p; the other end of the resistor R1 is connected with the input end V IN ；
The second part consists of a resistor R2 with a resistance value of 120-150 k and an IMT2 memristor which are connected in series, wherein two ends of the resistor R2 and the IMT2 memristor are connected in parallel with a capacitor C2, and the size of the capacitor C2 is 20-50 n; the other end of the IMT2 memristor is grounded;
the first and second portions are connected in series at point V3;
based on the structure of the circuit, when the signal V is input IN When the IMT1 memristor is connected, with the increase of the input voltage, the voltage at the two ends of the IMT1 memristor reaches the set threshold voltage V th When the voltage at two ends of the IMT1 memristor is insufficient to enable the IMT1 memristor to oscillate, the oscillation is closed;
due to continuous voltage input, the voltage of the point V3 rises, so that an oscillation asymmetry phenomenon is caused, and the resistance value of the IMT1 memristor when oscillation is closed is obtained through measurement of the IMT1 memristor;
measuring the IMT2 memristor, wherein the resistance value of the IMT2 memristor is maintained at a certain value, and the IMT2 memristor is always in an on state; due to the characteristics of the device, when the IMT2 memristor is always in an on state, a clamping phenomenon can occur, so that the voltage at two ends of the IMT2 memristor cannot be changed continuously, and the voltage stabilizing effect is achieved.
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| CN202210330155.6A CN114860024B (en) | 2022-03-31 | 2022-03-31 | Voltage stabilizing circuit based on memristor |
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| CN202210330155.6A CN114860024B (en) | 2022-03-31 | 2022-03-31 | Voltage stabilizing circuit based on memristor |
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| CN114860024A CN114860024A (en) | 2022-08-05 |
| CN114860024B true CN114860024B (en) | 2023-10-24 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014100024A1 (en) * | 2012-12-18 | 2014-06-26 | The Regents Of The University Of Michigan | Resistive memory structure for single or multi-bit data storage |
| KR20160144623A (en) * | 2015-06-09 | 2016-12-19 | 제주대학교 산학협력단 | Hybrid element array based memresistor |
| CN110647982A (en) * | 2019-09-26 | 2020-01-03 | 中国科学院微电子研究所 | Artificial sensory nerve circuit and preparation method thereof |
| CN111585562A (en) * | 2020-04-29 | 2020-08-25 | 西安交通大学 | Capacitive touch sensing unit for nerve morphology output |
| CN111585563A (en) * | 2020-04-29 | 2020-08-25 | 西安交通大学 | Piezoresistive tactile sensing unit for nerve form output |
| CN112485529A (en) * | 2020-11-26 | 2021-03-12 | 大连理工大学 | Impedance spectrum testing and fitting method of memristor |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8212621B2 (en) * | 2010-10-29 | 2012-07-03 | Hewlett-Packard Development Company, L.P. | Memristive programmable frequency source and method |
| US10516398B2 (en) * | 2016-05-24 | 2019-12-24 | Technion Research & Development Foundation Limited | Logic design with unipolar memristors |
| US10171083B2 (en) * | 2016-12-05 | 2019-01-01 | Board Of Regents, The University Of Texas System | Memristor logic design using driver circuitry |
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- 2022-03-31 CN CN202210330155.6A patent/CN114860024B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014100024A1 (en) * | 2012-12-18 | 2014-06-26 | The Regents Of The University Of Michigan | Resistive memory structure for single or multi-bit data storage |
| KR20160144623A (en) * | 2015-06-09 | 2016-12-19 | 제주대학교 산학협력단 | Hybrid element array based memresistor |
| CN110647982A (en) * | 2019-09-26 | 2020-01-03 | 中国科学院微电子研究所 | Artificial sensory nerve circuit and preparation method thereof |
| CN111585562A (en) * | 2020-04-29 | 2020-08-25 | 西安交通大学 | Capacitive touch sensing unit for nerve morphology output |
| CN111585563A (en) * | 2020-04-29 | 2020-08-25 | 西安交通大学 | Piezoresistive tactile sensing unit for nerve form output |
| CN112485529A (en) * | 2020-11-26 | 2021-03-12 | 大连理工大学 | Impedance spectrum testing and fitting method of memristor |
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