CN114842793A - LED driving chip with redundant address circuit - Google Patents

LED driving chip with redundant address circuit Download PDF

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Publication number
CN114842793A
CN114842793A CN202210309313.XA CN202210309313A CN114842793A CN 114842793 A CN114842793 A CN 114842793A CN 202210309313 A CN202210309313 A CN 202210309313A CN 114842793 A CN114842793 A CN 114842793A
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address
circuit
fuse
led
module
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CN114842793B (en
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孙占龙
袁楚卓
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Shenzhen Meisi Micro Semiconductor Co ltd
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Shenzhen Meixi Micro Semiconductor Co ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

An LED driver chip with redundant address circuitry, comprising: fuse array, address coding and decoding circuit; the fuse array comprises a redundancy address circuit, wherein the redundancy address circuit at least comprises a first fuse module and a second fuse module; the first fuse module and the second fuse module are both programmed with the same address information; the address coding and decoding circuit is connected with the fuse array to obtain the programmed address information. The invention can effectively reduce the address programming failure rate of the LED product, thereby improving the product yield.

Description

LED driving chip with redundant address circuit
Technical Field
The invention relates to an LED driving chip, in particular to an LED driving chip with a redundant address circuit.
Background
Currently, large indoor or outdoor LED screens are increasingly widely used. Such screens need to take into account the address circuitry of each of the plurality of LED luminaires in the same row or column. When the address circuit corresponding to each LED luminous body correctly indicates the coding information of each LED luminous body, each LED luminous body can respectively perform its own function and correctly emit the light and the color thereof which the LED luminous body should emit, so that the LED screen correctly presents the picture. The address circuit usually employs a fuse burning method to burn the corresponding encoded information as an address.
However, in the prior art, a failure of the address circuit itself may occur, which directly causes the LED luminary corresponding to the address circuit to be failed as a whole, thereby affecting the yield of the product. In addition, the LED driving chip in the prior art often adopts a breakpoint continuous transmission manner, which involves 2 data signal input pins DIN1 and DIN2 and at least one data signal output pin DOUT, and the plurality of pins result in more wirings and pads, which further affects the yield of the product.
Therefore, there is a need in the art to develop new schemes that can effectively reduce failure rates.
Disclosure of Invention
In view of the above, the present invention provides an LED driving chip with a redundant address circuit, comprising:
fuse array, address coding and decoding circuit;
the fuse array comprises a redundancy address circuit, wherein the redundancy address circuit at least comprises a first fuse module and a second fuse module;
wherein the content of the first and second substances,
the first fuse module and the second fuse module are both programmed with the same address information;
the address coding and decoding circuit is connected with the fuse array to obtain the programmed address information.
Preferably, the first and second liquid crystal materials are,
the redundant address circuit also comprises an AND gate;
the first fuse module and the second fuse module are respectively connected to a first input end and a second input end of the AND gate.
Preferably, the first and second liquid crystal materials are,
the redundant address circuit further comprises a serial reading module;
the serial reading module is used for serially reading the address information of each fuse module and outputting the address information to the address coding and decoding circuit.
Preferably, the first and second liquid crystal materials are,
the redundant address circuit further comprises a third fuse block;
the third fuse block is connected to a third input terminal of the and gate.
Preferably, the first and second liquid crystal materials are,
the address coding and decoding circuit comprises a redundancy error correction processing circuit;
and the redundancy error correction processing circuit is used for obtaining the output of the serial reading module and correcting the address information of each fuse module.
Preferably, the first and second liquid crystal materials are,
any one of the fuse modules includes: the switching tube PMOS is used for reading;
the grid electrode of the switch tube PMOS is controlled by the address coding and decoding circuit so as to enable the source electrode of the switch tube PMOS in a time-sharing manner, wherein the source electrode of the PMOS is connected with one end of a fuse wire in any fuse wire module;
the drains of the PMOS transistors in all the fuse modules are connected in parallel, and the serial reading module is connected, so that the serial reading module serially reads the address information of each fuse module and outputs the address information to the address coding and decoding circuit.
Preferably, the first and second liquid crystal materials are,
the LED driving chip also comprises a data receiving and processing circuit and a unique data signal input pin DIN;
the input end of the data receiving and processing circuit is connected with a unique data signal input pin DIN; and the LED driving chip is free from setting a data signal output pin DOUT.
Preferably, the first and second liquid crystal materials are,
the first output end of the data receiving and processing circuit is connected with one end of the address coding and decoding circuit;
and the second output end of the data receiving and processing circuit is connected with one end of the driving control circuit.
Preferably, the first and second liquid crystal materials are,
the address coding and decoding circuit comprises a first input end, a second input end, a first output end and a second output end;
wherein the content of the first and second substances,
the first input end of the address coding and decoding circuit is connected with the first output end of the data receiving and processing circuit;
the first output end of the address coding and decoding circuit is connected with the input end of the fuse array;
the second input end of the address coding and decoding circuit is connected with the output end of the fuse array;
and the second output end of the address coding and decoding circuit is connected with one end of the driving control circuit.
Preferably, the first and second liquid crystal materials are,
the LED driving chip also comprises a driving control circuit and an LED driving circuit;
the drive control circuit comprises an address input end, a data input end and an output end;
the address input end of the drive control circuit is connected with one end of the address coding and decoding circuit;
the data input end of the driving control circuit is connected with one end of the data receiving and processing circuit;
the output end of the drive control circuit is connected with the input end of the LED drive circuit;
and the output end of the LED driving circuit is used for driving the LED lamp beads/chips.
The invention provides a novel LED driving chip, which better ensures the address programming success rate of an LED luminous body through an innovative fuse array and a matched address coding and decoding circuit thereof and effectively improves the yield of the LED driving chip. In addition, the failure rate of wiring and welding spots is further reduced by the mode of the unique data signal input pin DIN and the data signal output pin DOUT, and the yield of the LED driving chip is further improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic diagram of a fuse array in accordance with one embodiment of the present invention;
FIG. 2 is a schematic diagram of a fuse block according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a fuse block according to an embodiment of the invention;
FIG. 4 is a schematic diagram of a fuse array in accordance with one embodiment of the present invention;
FIG. 5 is a schematic diagram of a fuse array in accordance with one embodiment of the present invention;
FIG. 6 is a schematic diagram of a fuse block in an embodiment of the invention;
FIG. 7 is a schematic circuit diagram illustrating a breakpoint continuous transmission LED driving chip in the prior art;
FIG. 8 is a schematic circuit diagram of another breakpoint continuous LED driving chip in the prior art;
FIG. 9 is a schematic circuit diagram of an LED driver chip according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of an LED driving chip according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to fig. 1 to 10 of the drawings of the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present invention, it should be noted that, if the terms "upper", "lower", "inner", "outer", "row", "column", "parallel", "vertical", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or the orientations or positional relationships that the products of the present invention usually put out when in use, the terms are only used for convenience of description and simplicity of description, and do not indicate or imply that the devices or elements indicated must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
Furthermore, the appearances of the terms "first," "second," and the like, if any, are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
It should be noted that the features of the embodiments of the present invention may be combined with each other without conflict.
Referring to fig. 1, in one embodiment, the present invention discloses an LED driving chip having a redundant address circuit, including:
fuse array, address coding and decoding circuit;
the fuse array comprises a redundancy address circuit, wherein the redundancy address circuit at least comprises a first fuse module and a second fuse module;
wherein the content of the first and second substances,
the first fuse module and the second fuse module are both programmed with the same address information;
the address coding and decoding circuit is connected with the fuse array to obtain the programmed address information.
It can be understood that, since the cost increase caused by adding the fuse block is limited and controllable, when the plurality of fuse blocks in the redundant address circuit in the above embodiment are all programmed with the same address information, the yield of the LED driving chip is significantly improved.
In another embodiment of the present invention, the substrate is,
the redundant address circuit also comprises an AND gate;
the first fuse module and the second fuse module are respectively connected to a first input end and a second input end of the AND gate.
For convenience of understanding, fig. 2 illustrates a FUSE block in the prior art, wherein a FUSE, i.e., FUSE, may be a poly FUSE, and when not programmed, the initial state generally has a small resistance of about 50 ohms to 100 ohms, and when programmed, the resistance value becomes more than 10K ohms; NM1 is N type mos tube, W/L is large (general L is 0.5 μm, W >40 μm), used for FUSE programming; the WT acts as an input terminal, which actually acts as a control terminal, and the input/control terminal is controlled by the address codec circuit, when the WT is high and maintained for a period of time (e.g. 100 μ s), a large current flows through the path of FUSE- > NM1, which will blow the FUSE and make it assume a large resistance state. I1 is an inverter or comparator, used for reading FUSE, outputting FUSO to the address codec circuit, and outputting the judgment result to the address codec circuit through the inverter or comparator of I1. The read current of the Ir path is about hundreds of microamperes of current, the read current of the Ir path can be realized by a resistor connected with a series switch to GND, or a current source, and the read current of the microamperes of the Ir path is matched with I1 to carry out the read operation of the FUSE, wherein when Ir has a pull-down current, the current flows through the FUSE to generate a voltage drop on the FUSE, if the FUSE is not burnt, the voltage drop is small, and if the FUSE is burnt, the voltage drop on the FUSE is large.
FIG. 3 illustrates an embodiment of the present invention employing an AND gate and a plurality of fuse blocks, wherein: because the first fuse module and the second fuse module are both programmed with the same address information, the logic output by the AND gate is 0; even if there is a fuse block in which the programming was not successful, the logic output by the and gate will be 0 due to the presence of the and gate. Unless all fuse blocks are not successfully programmed, the AND gate will not output a 1. The use of the AND gate and the additional fuse module ensures that the fuse array is successfully programmed to the outside in most cases; only if all fuse blocks are not successfully programmed will the fuse array appear to the outside as a programming failure or fault.
Obviously, the invention improves the success rate of address programming related to the corresponding LED luminous body in the LED driving chip and the yield of the LED driving chip when used for LED products.
Referring to fig. 4, in another embodiment,
the redundant address circuit further comprises a serial reading module;
the serial reading module is used for serially reading the address information of each fuse module and outputting the address information to the address coding and decoding circuit.
In another embodiment of the present invention, the substrate is,
the redundant address circuit further comprises a third fuse block;
the third fuse block is connected to a third input terminal of the and gate.
Referring to fig. 5, in another embodiment,
the address coding and decoding circuit comprises a redundancy error correction processing circuit;
and the redundancy error correction processing circuit is used for obtaining the output of the serial reading module and correcting the address information of each fuse module.
Referring to fig. 6, in another embodiment,
any one of the fuse modules includes: the switching tube PMOS is used for reading;
the grid electrode of the switch tube PMOS is controlled by the address coding and decoding circuit so as to enable the source electrode of the switch tube PMOS in a time-sharing manner, wherein the source electrode of the PMOS is connected with one end of a fuse wire in any fuse wire module;
the drains of the PMOS transistors in all the fuse modules are connected in parallel, and the serial reading module is connected, so that the serial reading module serially reads the address information of each fuse module and outputs the address information to the address coding and decoding circuit.
In another embodiment of the present invention, the substrate is,
the LED driving chip also comprises a data receiving and processing circuit and a unique data signal input pin DIN;
the input end of the data receiving and processing circuit is connected with a unique data signal input pin DIN; and the LED driving chip is free from setting a data signal output pin DOUT.
For this embodiment, each LED luminary only needs to obtain the corresponding data signal for the LED luminary from all the data signals in the DIN pin according to the address information obtained by the LED driving chip. Thus, the need for the DIN2 pin and the DOUT pin in addition to the DIN1 pin is eliminated, as in the prior art breakpoint resume scheme.
Referring to fig. 7, it illustrates a breakpoint resuming LED driving chip in the prior art:
the controller of fig. 7 also uses only one DATA signal, i.e., DATA1, which is apparently the same as the DIN one DATA signal of the present invention shown in fig. 9, but:
in the order from right to left in fig. 7, it can be found that: in fig. 7, in order to implement the function of breakpoint transmission, DATA1 is directly connected to pin DIN1 of the LED driving chip in the first LED luminary, and is also connected to pin DIN2 of the LED driving chip in the second LED luminary, so as to ensure that even if the LED driving chip in the first LED luminary is not working normally and its DOUT cannot send a valid signal, the LED driving chip in the second LED luminary can still obtain the DATA signal from DATA1 through pin DIN 2. If the LED driver chip of the first LED luminaire is operating properly, DOUT will forward a DATA1 signal processed by the LED driver chip of the first LED luminaire and transmit the signal to DIN1 pin of the LED driver chip of the second LED luminaire. And the LED driving chip in the third LED luminous body is similar.
It is apparent that for the prior art illustrated in fig. 7: the primary pin for transmitting data signals is DIN1, and DIN2 provides redundancy only when DIN1 fails to receive signals or operates abnormally. Also, the signal of DIN1 is by default from DOUT of the preceding stage, and the signal of DIN2 is by default from DIN1 of the preceding stage. For the subsequent stage, the signal itself input in DIN1 of the subsequent stage is processed by the previous stage, so that the subsequent stage can directly acquire the data signal corresponding to the subsequent stage; alternatively, the signal input in DIN2 by the subsequent stage is processed by the subsequent stage according to a fixed processing algorithm, and the subsequent stage can still obtain the data signal corresponding to the subsequent stage. In other words, even if the LED driving chip in the first LED luminary close to the controller is not operated normally in the right side of fig. 7, the LED driving chip in the second LED luminary in the subsequent stage is also operated normally. And when the LED driving chips in the first LED luminous body and the second LED luminous body are failed, the other rear stages have large-area failure. That is, for the breakpoint resume scheme shown in fig. 7, if 2 consecutive luminaires fail, then the corresponding subsequent stage will fail as a whole.
Compared with the prior art shown in fig. 7, the invention can further avoid DIN2, DOUT pins and corresponding wiring, because each LED driving chip has its own corresponding address information, it only needs to obtain the corresponding data signal for the LED luminary from the data signal transmitted from DIN according to the address information, thereby ensuring the normal operation of each LED luminary. The prior art shown in fig. 7 does not rely at all on address information of the LED luminary, but: the data signal is processed by the previous stage and then transmitted to the next stage through the DOUT, or the signal of the next stage according to DIN2 is processed according to a fixed processing algorithm, and then the data signal required by the stage is acquired and transmitted back through the DOUT.
The invention can avoid DIN2 and DOUT pins and front and back wiring thereof, and only adopts a unique DIN pin to connect all LED luminous bodies through a data signal line, so the invention can obviously reduce wiring complexity and total cost, and can also obviously reduce failure rate and improve yield. Typically, because the data signal line of the present invention is directly connected to DIN of the LED driving chip in each LED luminary, and each LED driving chip has its own encoded information and accordingly acquires the data signal corresponding to its own luminary from the data signal line, and each LED luminary is connected to its own VCC and GND, when any one LED luminary or its LED driving chip fails, even when two or more LED driving chips fail, the LED driving chips in the remaining LED luminaries of the present invention can still ensure the work of the remaining LED chips/beads.
In addition, comparing the present invention with the prior art shown in fig. 8:
the controller of fig. 8 adds a DATA signal, DATA2, compared to fig. 7, unlike the DIN DATA signal alone shown in fig. 9 of the present invention. It is apparent that fig. 8 is more complex in wiring than the prior art of fig. 7, and is more susceptible to increased faults than the prior art shown in fig. 7.
In another embodiment of the present invention, the substrate is,
the first output end of the data receiving and processing circuit is connected with one end of the address coding and decoding circuit;
and the second output end of the data receiving and processing circuit is connected with one end of the driving control circuit.
In another embodiment of the present invention, the substrate is,
the address coding and decoding circuit comprises a first input end, a second input end, a first output end and a second output end;
wherein, the first and the second end of the pipe are connected with each other,
the first input end of the address coding and decoding circuit is connected with the first output end of the data receiving and processing circuit;
the first output end of the address coding and decoding circuit is connected with the input end of the fuse array;
the second input end of the address coding and decoding circuit is connected with the output end of the fuse array;
and the second output end of the address coding and decoding circuit is connected with one end of the driving control circuit.
In another embodiment of the present invention, the substrate is,
the LED driving chip also comprises a driving control circuit and an LED driving circuit;
the drive control circuit comprises an address input end, a data input end and an output end;
the address input end of the drive control circuit is connected with one end of the address coding and decoding circuit;
the data input end of the driving control circuit is connected with one end of the data receiving and processing circuit;
the output end of the drive control circuit is connected with the input end of the LED drive circuit;
and the output end of the LED driving circuit is used for driving the LED lamp beads/chips.
Referring to fig. 10, in one embodiment, it illustrates a fuse array of LED driver chips and the various circuits described above, a unique data signal input DIN, and an example of R, G, B LED chips/lamp beads being driven, as shown by the three ports OUTR, OUTG, OUTB.
In summary, the present invention can effectively improve the yield of address programming through the fuse array and the address codec circuit, and further improve the yield because the additional data signal input pins DIN2 and the corresponding data signal output pins DOUT and their wiring are eliminated.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (10)

1. An LED driver chip with redundant address circuitry, comprising:
fuse array, address coding and decoding circuit;
the fuse array comprises a redundancy address circuit, wherein the redundancy address circuit at least comprises a first fuse module and a second fuse module;
wherein, the first and the second end of the pipe are connected with each other,
the first fuse module and the second fuse module are both programmed with the same address information;
the address coding and decoding circuit is connected with the fuse array to obtain the programmed address information.
2. The LED driver chip as claimed in claim 1, wherein, preferably,
the redundant address circuit also comprises an AND gate;
the first fuse module and the second fuse module are respectively connected to a first input end and a second input end of the AND gate.
3. The LED driver chip of claim 1,
the redundant address circuit further comprises a serial reading module;
the serial reading module is used for serially reading the address information of each fuse module and outputting the address information to the address coding and decoding circuit.
4. The LED driver chip of claim 2,
the redundant address circuit further comprises a third fuse block;
the third fuse block is connected to a third input terminal of the and gate.
5. The LED driver chip of claim 3,
the address coding and decoding circuit comprises a redundancy error correction processing circuit;
and the redundancy error correction processing circuit is used for obtaining the output of the serial reading module and correcting the address information of each fuse module.
6. The LED driver chip of claim 3,
any one of the fuse modules includes: the switching tube PMOS is used for reading;
the grid electrode of the switch tube PMOS is controlled by the address coding and decoding circuit so as to enable the source electrode of the switch tube PMOS in a time-sharing manner, wherein the source electrode of the PMOS is connected with one end of a fuse wire in any fuse wire module;
the drains of the PMOS transistors in all the fuse modules are connected in parallel, and the serial reading module is connected, so that the serial reading module serially reads the address information of each fuse module and outputs the address information to the address coding and decoding circuit.
7. The LED driver chip of claim 1,
the LED driving chip also comprises a data receiving and processing circuit and a unique data signal input pin DIN;
the input end of the data receiving and processing circuit is connected with a unique data signal input pin DIN; and the LED driving chip is free from setting a data signal output pin DOUT.
8. The LED driver chip of claim 7,
the first output end of the data receiving and processing circuit is connected with one end of the address coding and decoding circuit;
and the second output end of the data receiving and processing circuit is connected with one end of the driving control circuit.
9. The LED driver chip of claim 8,
the address coding and decoding circuit comprises a first input end, a second input end, a first output end and a second output end;
wherein, the first and the second end of the pipe are connected with each other,
the first input end of the address coding and decoding circuit is connected with the first output end of the data receiving and processing circuit;
the first output end of the address coding and decoding circuit is connected with the input end of the fuse array;
the second input end of the address coding and decoding circuit is connected with the output end of the fuse array;
and the second output end of the address coding and decoding circuit is connected with one end of the driving control circuit.
10. The LED driver chip of claim 7,
the LED driving chip also comprises a driving control circuit and an LED driving circuit;
the drive control circuit comprises an address input end, a data input end and an output end;
the address input end of the drive control circuit is connected with one end of the address coding and decoding circuit;
the data input end of the driving control circuit is connected with one end of the data receiving and processing circuit;
the output end of the drive control circuit is connected with the input end of the LED drive circuit;
and the output end of the LED driving circuit is used for driving the LED lamp beads/chips.
CN202210309313.XA 2022-03-27 2022-03-27 LED driving chip with redundant address circuit Active CN114842793B (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1076300A (en) * 1992-03-09 1993-09-15 三星电子株式会社 The row redundancy circuit of semiconductor memory
CN1349259A (en) * 2000-10-18 2002-05-15 三星电子株式会社 Fuse circuit used for semiconductor integrated circuit
US20040150653A1 (en) * 2003-01-31 2004-08-05 Renesas Technology Corp. Display drive control device and electric device including display device
CN105406856A (en) * 2015-11-11 2016-03-16 华中科技大学 APD array address code active output circuit
CN206380123U (en) * 2016-02-25 2017-08-04 宗仁科技(平潭)有限公司 A kind of LED drive controls circuit and LED matrix
CN111611112A (en) * 2019-02-26 2020-09-01 北京知存科技有限公司 Storage and calculation integrated chip and method for improving yield of storage and calculation integrated chip

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1076300A (en) * 1992-03-09 1993-09-15 三星电子株式会社 The row redundancy circuit of semiconductor memory
CN1349259A (en) * 2000-10-18 2002-05-15 三星电子株式会社 Fuse circuit used for semiconductor integrated circuit
US20040150653A1 (en) * 2003-01-31 2004-08-05 Renesas Technology Corp. Display drive control device and electric device including display device
CN105406856A (en) * 2015-11-11 2016-03-16 华中科技大学 APD array address code active output circuit
CN206380123U (en) * 2016-02-25 2017-08-04 宗仁科技(平潭)有限公司 A kind of LED drive controls circuit and LED matrix
CN111611112A (en) * 2019-02-26 2020-09-01 北京知存科技有限公司 Storage and calculation integrated chip and method for improving yield of storage and calculation integrated chip

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