CN114827508A

CN114827508A - Loop-through output circuit, television tuner and radio frequency receiving system

Info

Publication number: CN114827508A
Application number: CN202210291522.6A
Authority: CN
Inventors: 莫秉轩; 侯斌; 金香菊
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-06-13
Filing date: 2018-06-13
Publication date: 2022-07-29
Also published as: CN112262531B; WO2019237283A1; CN112262531A

Abstract

A loop-through output circuit, TV tuner and radio frequency receiving system, the TV tuner includes radio frequency receiving circuit and loop-through output circuit; wherein: the radio frequency receiving circuit comprises a low noise amplifier, a first filter and a first analog-to-digital converter, and is used for carrying out low noise amplification, filtering and analog-to-digital conversion on received signals in sequence; the loop-through output circuit comprises a first loop-through buffer, the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit, the voltage buffer circuit is used for carrying out voltage buffering on a signal output at the input end of the first filter or a signal output at the output end of the first filter, the signal output at the output end of the voltage buffer circuit is used for carrying out loop-through output, and the feedback circuit is used for feeding back a signal output at the output end of the voltage buffer circuit to the input end of the voltage buffer circuit so as to improve the loop gain of the voltage buffer circuit. By implementing the embodiment of the application, the complexity of the loop-through output circuit structure and the power consumption of the loop-through output circuit can be reduced.

Description

Loop-through output circuit, television tuner and radio frequency receiving system

The present application is a divisional application, the original application having application number 201880094527.1, the original application date being 2018, 13/06, the entire content of the original application being incorporated by reference in the present application.

Technical Field

The present application relates to the field of circuit technologies, and in particular, to a loop output circuit, a television tuner, and a radio frequency receiving system.

Background

The loop through output (LT) is to transmit a video signal to a plurality of devices for use when the video signal is output. The loop-through output of the video can be applied to various scenes, such as the loop-through output of a monitoring video and the loop-through output of a satellite television video signal.

Currently, in a television receiving system, after a video signal is received in the form of a Radio Frequency (RF) signal, a television tuner (TV tuner) may perform processes such as amplification, filtering, and analog-to-digital conversion on the RF signal. And then the television equipment can play video according to the processed output signal. In a television receiving system, a loop-through output circuit is often led out before or after a radio frequency signal is amplified. The loop-through output circuit may include a plurality of paths, and signals output by each of the plurality of paths may be played back through the television apparatus.

However, in the multiple paths leading from the video signal before and after the video signal is amplified, the transmitted video signal still needs to be amplified, filtered, and subjected to analog-to-digital conversion for each path. In addition, after the signal is output through the loop, a certain degree of amplification is still required, and the amplification gain is required to be adjustable. Therefore, each path after loop-through output needs to realize the gain range and gain gear of signal amplification, so that the hardware implementation scheme of the loop-through output circuit is more complex, and the power consumption of the loop-through output circuit is increased.

Disclosure of Invention

The embodiment of the application discloses a loop-through output circuit, a television tuner and a set top box, which can reduce the complexity of the implementation scheme of the loop-through output circuit and reduce the power consumption.

In a first aspect, an embodiment of the present application provides a television tuner, where the television tuner includes a radio frequency receiving circuit and a loop-through output circuit; wherein: the radio frequency receiving circuit comprises a low noise amplifier, a first filter and a first analog-to-digital converter, and is used for carrying out low noise amplification, filtering and analog-to-digital conversion on received signals in sequence; the loop-through output circuit comprises a first loop-through buffer, the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit, the voltage buffer circuit is used for carrying out voltage buffering on a signal output at the input end of the first filter or a signal output at the output end of the first filter, the signal output at the output end of the voltage buffer circuit is used for carrying out loop-through output, and the feedback circuit is used for feeding back a signal output at the output end of the voltage buffer circuit to the input end of the voltage buffer circuit so as to improve the loop gain of the voltage buffer circuit.

In the above television tuner, in the first loop-through buffer, a voltage buffer circuit and a feedback circuit may be designed to perform voltage buffering and signal feedback on the signal output at the input end of the first filter or the signal output at the output end of the first filter in sequence. The feedback circuit in the loop-through buffer can improve the loop gain of the voltage buffer circuit and reduce the output impedance of the loop-through output circuit, so that high input impedance and low output impedance can be provided for the loop-through output circuit, the driving capability of the loop-through output circuit can be improved, and the loop-through output circuit has better linearity performance. A condition for loop-through output of the signal output at the input of the first filter or the signal output at the output of the first filter may be satisfied. The low noise amplifier, the mixer, the filter, the variable gain amplifier and other devices do not need to be arranged in the loop-through circuit, and the complexity of the structure of the loop-through output circuit is reduced. In addition, because the signal input into the loop-through output circuit is obtained by amplifying the signal through the variable gain amplifier in the radio frequency receiving circuit according to the principle that the input power of the analog-to-digital converter is a constant power value, the signal input into the loop-through output circuit can ensure that the input power of the analog-to-digital converter in the loop-through output circuit is the constant power value, and different gain ranges and gain gears do not need to be set for the low noise amplifier and the variable gain amplifier in the loop-through output circuit. Therefore, the complexity of the loop-through output circuit structure is reduced, and the power consumption of the loop-through output circuit is reduced.

In one possible design, the voltage buffer circuit includes a source follower, the feedback circuit includes a current mirror and a first transistor; wherein: the drain of the first transistor is coupled with the input end of the current mirror, and the output end of the current mirror is coupled with the source electrode of the source electrode follower; the current mirror and the first transistor are used for feeding back a signal output by the output end of the source follower to the input end of the source follower and providing current bias for the source electrode of the source follower. In the voltage buffer circuit, the source follower, the current mirror and the first transistor can provide high input impedance and low output impedance for the loop-through output circuit, and the driving capability of the loop-through output circuit can be improved. In addition, the loop gain of the voltage buffer circuit can be improved through the feedback circuit consisting of the current mirror and the first transistor, the output impedance of the loop-through output circuit is reduced, the loop-through output circuit has better linearity performance, the condition of carrying out loop-through output on the signal output at the input end of the first filter or the signal output at the output end of the first filter can be met, and the complexity of the structure of the loop-through output circuit is reduced.

In one possible design, the voltage buffer circuit is configured to voltage buffer the signal output at the input of the first filter, and the loop-through output circuit further includes a second filter and a second analog-to-digital converter, and configured to filter and analog-to-digital convert the signal output by the first loop-through buffer.

In one possible design, the voltage buffer circuit is configured to voltage buffer the signal output by the output of the first filter, and the loop-through output circuit further includes a third analog-to-digital converter configured to analog-to-digital convert the signal output by the first loop-through buffer.

The radio frequency receiving circuit may be a narrow band radio frequency receiving circuit or a full band radio frequency receiving circuit.

Wherein the gain of the first amplifier may be adjustable for ensuring that the power of the analog signal received by the first analog-to-digital converter is constant.

Alternatively, the first amplifier may be a PGA. The first filter may be an anti-aliasing filter AAF or a low pass filter LPF.

Alternatively, the first filter and the second filter may be low pass filters.

In one possible design, the radio frequency receiving circuit further includes a single-to-dual circuit; the single-conversion double circuit is used for receiving radio frequency signals, converting the radio frequency signals into differential signals and inputting the differential signals to the low noise amplifier; in the loop-through output circuit, the first loop-through buffer includes a first portion and a second portion, and the first portion of the first loop-through buffer and the second portion of the first loop-through buffer each include the voltage buffer circuit and the feedback circuit; the first part of the first loop buffer and the second part of the first loop buffer are respectively used for processing the two paths of differential signals output at the input end of the first filter or the two paths of differential signals output at the output end of the first filter. In the above scheme, a high input impedance and a low output impedance can be provided for the loop-through output circuit, and the driving capability of the loop-through output circuit can be improved. In addition, the loop gain of the voltage buffer circuit can be improved through a feedback circuit consisting of the current mirror and the first transistor, the output impedance of the loop-through output circuit is reduced, and the loop-through output circuit has better linearity performance. The received single-ended signals are converted into differential signals for processing, mutual interference among the signals in the processing process can be reduced, signal distortion on each channel can be avoided, and signals with higher image and sound quality can be output to television equipment.

Optionally, a loop-through output circuit may be led out from the output end of the single slip circuit. Signals processed by each element in the loop-through output circuit are differential signals, and signals output by each element are also differential signals. The loop-through output circuit can also comprise a third amplifier, a fourth amplifier and a second filter, wherein the third amplifier, the fourth amplifier, the second filter and the second analog-to-digital converter are sequentially connected and used for sequentially carrying out low-noise amplification, amplification and analog-to-digital conversion on the differential signals output from the output ends of the single-conversion double circuits. The loop-through output circuit adopts a differential structure, so that the anti-interference capability of the loop-through output circuit can be improved, and the loop-through output circuit is led out from the output end of the single-to-double circuit, so that the differential structure can be realized without arranging the single-to-double circuit in the loop-through output circuit, and the circuit structure can be simplified.

In one possible design, the low noise amplifier is a differential amplifier, and the differential amplifier includes a first input resistor, a first feedback capacitor, a first feedback resistor, a second input resistor, a second feedback capacitor, a second feedback resistor, a first-stage operational amplifier, an adjustable capacitor, and a second-stage operational amplifier; the resistance value of the first input resistor, the resistance value of the first feedback resistor, the resistance value of the second input resistor and the resistance value of the second feedback resistor are adjustable, and the gain of the differential amplifier is adjusted; one end of the first input resistor is an input end of the differential amplifier, one end of the first input resistor is connected with one output end of the single-conversion double circuit, the other end of the first input resistor is respectively connected with one end of a first parallel circuit and a non-inverting input end of the first-stage operational amplifier, and the first parallel circuit is a parallel circuit formed by the first feedback capacitor and the first feedback resistor; the negative phase output end of the first-stage operational amplifier is respectively connected with one end of the adjustable capacitor and the positive phase input end of the second-stage operational amplifier; the positive phase output end of the second-stage operational amplifier is connected with the other end of the first parallel circuit; one end of the second input resistor is the other input end of the differential amplifier, one end of the second input resistor is connected with the other output end of the single-conversion double-circuit, the other end of the second input resistor is respectively connected with one end of a second parallel circuit and the negative phase input end of the first-stage operational amplifier, and the second parallel circuit is a parallel circuit formed by the second feedback capacitor and the second feedback resistor; the positive phase output end of the first-stage operational amplifier is respectively connected with the other end of the adjustable capacitor and the negative phase input end of the second-stage operational amplifier; and the negative phase output end of the second-stage operational amplifier is connected with the other end of the second parallel circuit.

In the radio frequency receiving circuit, high linearity is facilitated. In addition, the differential amplifier in the embodiment of the present application includes two stages of operational amplifiers, where the first stage amplifier is used to amplify a signal, and the second stage amplifier is used to provide driving capability, which is beneficial to implementing driving of a large load.

The first loop-through buffer can be used for isolating the loop-through output circuit from the radio frequency receiving circuit.

In one possible design, the loop-through output circuit includes N branches, the N branches being connected in parallel; the ith branch in the N branches is used for performing loop-through output on a signal output to the ith branch by the first loop-through buffer; the number N is a positive integer greater than or equal to 1, the number i is an integer which satisfies the condition that the number i is greater than or equal to 1 and is less than or equal to N, and the ith branch is any branch in the N branches.

In one possible design, the loop-through output circuit includes M branches; the first ring buffer comprises M second ring buffers, and the M branches respectively comprise one second ring buffer; the output end of the second loopback buffer on the kth branch is connected to the input end of the second loopback buffer on the (k + 1) th branch, and the second loopback buffer on the (k + 1) th branch is used for caching a signal output by the output end of the second loopback buffer on the kth branch; wherein M is a positive integer greater than or equal to 2, k is an integer satisfying that k is greater than or equal to 1 and less than or equal to M, and the kth branch is any one branch in the M branches; the kth branch and the (k + 1) th branch are two adjacent branches in the M branches.

The second loop-through buffer on the kth branch may be used to isolate the kth branch from the rf receiving circuit.

In a possible design, the kth branch further includes a second amplifier, and an input end of the second amplifier is connected to an output end of the second loop-through buffer on the kth branch, and is configured to amplify a signal.

In one possible design, the radio frequency receiving circuit further includes a gain controller for adjusting a gain of the first amplifier.

In a second aspect, an embodiment of the present application provides a loop-through output circuit, where the loop-through output circuit is configured to perform loop-through output on a radio frequency receiving circuit, where the radio frequency receiving circuit includes a low noise amplifier, a first filter, and a first analog-to-digital converter, and is configured to sequentially amplify, filter, and perform analog-to-digital conversion on a received signal; the loop-through output circuit comprises a first loop-through buffer, the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit, the voltage buffer circuit is used for carrying out voltage buffering on a signal output at the input end of the first filter or a signal output at the output end of the first filter, the signal output at the output end of the voltage buffer circuit is used for carrying out loop-through output, and the feedback circuit is used for feeding back a signal output at the output end of the voltage buffer circuit to the input end of the voltage buffer circuit so as to improve the loop gain of the voltage buffer circuit.

In the above-mentioned loop-through output circuit, in the first loop-through buffer, the voltage buffer circuit and the feedback circuit may be designed to perform voltage buffering and signal feedback on the signal output at the input end of the first filter or the signal output at the output end of the first filter in sequence. The feedback circuit in the loop-through buffer can improve the loop gain of the voltage buffer circuit, reduce the output impedance of the loop-through output circuit, and the loop-through output circuit has better linearity performance. The low noise amplifier, the mixer, the filter, the variable gain amplifier and other devices do not need to be arranged in the loop-through circuit, and the complexity of the structure of the loop-through output circuit is reduced. In addition, because the signal input into the loop-through output circuit is obtained by amplifying the signal through the variable gain amplifier in the radio frequency receiving circuit according to the principle that the input power of the analog-to-digital converter is a constant power value, the signal input into the loop-through output circuit can ensure that the input power of the analog-to-digital converter in the loop-through output circuit is a constant power value, and different gain ranges and gain gears do not need to be set for the low noise amplifier and the variable gain amplifier in the loop-through output circuit. Therefore, the complexity of the loop-through output circuit structure is reduced, and the power consumption of the loop-through output circuit is reduced.

Alternatively, the first filter and the second filter may be low pass filters.

In one possible design, the radio frequency receiving circuit further includes a single-to-dual circuit; the single-conversion double circuit is used for receiving radio frequency signals, converting the radio frequency signals into differential signals and outputting the differential signals to the low noise amplifier; in the loop-through output circuit, the first loop-through buffer includes a first portion and a second portion, and the first portion of the first loop-through buffer and the second portion of the first loop-through buffer each include the voltage buffer circuit and the feedback circuit; the first part of the first loop buffer and the second part of the first loop buffer are respectively used for processing the two paths of differential signals output at the input end of the first filter or the two paths of differential signals output at the output end of the first filter. In the above scheme, a high input impedance and a low output impedance can be provided for the loop-through output circuit, and the driving capability of the loop-through output circuit can be improved. In addition, the loop gain of the voltage buffer circuit can be improved through a feedback circuit consisting of the current mirror and the first transistor, the output impedance of the loop-through output circuit is reduced, and the loop-through output circuit has better linearity performance. The signals received by the loop-through output circuit are differential signals, so that mutual interference among the signals in the processing process can be reduced, signal distortion on each channel can be avoided, and signals with higher image and sound quality can be output to television equipment.

In one possible design, the low noise amplifier is a differential amplifier, and the differential amplifier includes a first input resistor, a first feedback capacitor, a first feedback resistor, a second input resistor, a second feedback capacitor, a second feedback resistor, a first-stage operational amplifier, an adjustable capacitor, and a second-stage operational amplifier; the resistance value of the first input resistor, the resistance value of the first feedback resistor, the resistance value of the second input resistor and the resistance value of the second feedback resistor are adjustable, and the gain of the differential amplifier is adjusted; one end of the first input resistor is an input end of the differential amplifier, one end of the first input resistor is connected with one output end of the single-conversion double circuit, the other end of the first input resistor is respectively connected with one end of a first parallel circuit and a non-inverting input end of the first-stage operational amplifier, and the first parallel circuit is a parallel circuit formed by the first feedback capacitor and the first feedback resistor; the negative phase output end of the first-stage operational amplifier is respectively connected with one end of the adjustable capacitor and the positive phase input end of the second-stage operational amplifier; the positive phase output end of the second-stage operational amplifier is connected with the other end of the first parallel circuit; one end of the second input resistor is the other input end of the differential amplifier, one end of the second input resistor is connected with the other output end of the single-conversion double-circuit, the other end of the second input resistor is respectively connected with one end of a second parallel circuit and the negative phase input end of the first-stage operational amplifier, and the second parallel circuit is a parallel circuit formed by the second feedback capacitor and the second feedback resistor; the positive phase output end of the first-stage operational amplifier is connected with the other end of the adjustable capacitor and the negative phase input end of the second-stage operational amplifier respectively; and the negative phase output end of the second-stage operational amplifier is connected with the other end of the second parallel circuit.

In one possible design, the loop-through output circuit includes M branches; the first loopback buffer comprises M second loopback buffers, and the M branches respectively comprise one second loopback buffer; the output end of the second loopback buffer on the kth branch is connected to the input end of the second loopback buffer on the (k + 1) th branch, and the second loopback buffer on the (k + 1) th branch is used for caching a signal output by the output end of the second loopback buffer on the kth branch; wherein M is a positive integer greater than or equal to 2, k is an integer satisfying that k is greater than or equal to 1 and less than or equal to M, and the kth branch is any one branch in the M branches; the kth branch and the (k + 1) th branch are two adjacent branches in the M branches.

In a possible design, the kth branch further includes a second amplifier, and an input end of the second amplifier is connected to an output end of the second loop-through buffer on the kth branch, so as to perform signal amplification.

In a third aspect, an embodiment of the present application provides a set-top box, where the set-top box includes the second aspect or any one of the possible television tuners of the second aspect.

In a fourth aspect, an embodiment of the present application provides a radio frequency receiving system, where the radio frequency receiving system includes a radio frequency receiving device and a loop-through output device; wherein: the radio frequency receiving device comprises the radio frequency receiving circuit provided by the television tuner of any one of the possible aspects of the second aspect, and the loop-through output device comprises the loop-through output circuit provided by the television tuner of any one of the possible aspects of the second aspect.

Drawings

The drawings to which embodiments of the present application relate are described below.

Fig. 1 is a schematic structural diagram of a radio frequency receiving circuit and a loop-through output circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of another radio frequency receiving circuit and loop-through output circuit provided in an embodiment of the present application;

fig. 3 is a schematic structural diagram of a radio frequency receiving circuit and a loop-through output circuit according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of a first circular buffer according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of a radio frequency receiving circuit and a loop-through output circuit according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of a further radio frequency receiving circuit and a loop-through output circuit provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of a further radio frequency receiving circuit and a loop-through output circuit provided in an embodiment of the present application;

fig. 8 is a schematic structural diagram of another first circular buffer according to an embodiment of the present disclosure;

fig. 9 is a schematic structural diagram of a low noise amplifier provided in an embodiment of the present application;

fig. 10 is a schematic structural diagram of a loop-through output circuit provided in an embodiment of the present application;

fig. 11 is a schematic structural diagram of another loop-through output circuit provided in the embodiment of the present application;

fig. 12 is a schematic structural diagram of another loop-through output circuit provided in the embodiment of the present application;

fig. 13 is a schematic structural diagram of another loop-through output circuit provided in the embodiment of the present application;

fig. 14 is a schematic structural diagram of another loop-through output circuit according to an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings. The terminology used in the description of the embodiments herein is for the purpose of describing particular embodiments herein only and is not intended to be limiting of the application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an rf receiving circuit 10 and a loop-through output circuit 20 according to an embodiment of the present disclosure. The rf receiving circuit 10 may be configured to receive rf signals and convert the rf signals into digital signals, so that the device may perform demodulation and processing of the signals. The radio frequency receiving circuit 10 may be used in a television tuner which can receive video signals in RF form. The video signal in RF form may be, for example, a satellite television signal in the form of an electromagnetic wave or a broadcast television signal in the form of an electromagnetic wave.

As shown in fig. 1, the rf receiving circuit 10 may include an antenna 100, a Low Noise Amplifier (LNA) 200, a mixer (mixer)300, a Variable Gain Amplifier (VGA) 400, a Low Pass Filter (LPF) 500, and an analog-to-digital converter (ADC) 600. The antenna 100, the low noise amplifier 200, the mixer 300, the low pass filter 400, the variable gain amplifier 500, and the analog-to-digital converter 600 are sequentially connected in series.

Antenna 100 may be used, among other things, to receive radio frequency signals. The radio frequency signal may be a television signal, or may be other signals, such as a monitoring video signal, and the like. The lna 200 may be used to perform low noise amplification on the signal output by the antenna 100 to improve the noise immunity of the signal. The mixer 300 may be used to reduce the frequency of the received high frequency signal and shift the desired signal to an intermediate frequency. Variable gain amplifier 400 may be used to amplify the signal output by mixer 300 to meet the power requirements of the signal received by analog-to-digital converter 600. Low pass filter 500 may be used to low pass filter the signal output by variable gain amplifier 400 to select the signal at the desired frequency band. Analog-to-digital converter 600 may be used to analog-to-digital convert the analog signal received from variable gain amplifier 500 into a digital signal for subsequent signal demodulation. The gains of the low noise amplifier 200 and the variable gain amplifier 400 may be adjustable to make the power of the analog signal received by the analog-to-digital converter 600 constant.

In the process of receiving and processing the television signal, the loop-through output circuit 20 can realize that a video signal is transmitted to a plurality of television devices for use. The loop-through output circuit 20 may be drawn from the input or output of the low noise amplifier 200, since the closer the signal to the rf front end output, the lower the signal non-linearity requirements.

As shown in fig. 1, the embodiment of the present application is described by taking a loop-through output circuit as an example, which is led out from an input terminal of a low noise amplifier 200. The loop-through output circuit 20 may comprise a low noise amplifier 201, a mixer 202, a variable gain amplifier 203, a low pass filter 204, and an analog-to-digital converter 205, connected in series in this order. In addition, as shown in fig. 1, the loop-through output circuit 20 may further include a loop-through buffer (LT buffer)206, an input terminal of the loop-through buffer 206 is connected to an input terminal of the low noise amplifier 200, and an output terminal of the loop-through buffer 206 is connected to an input terminal of the low noise amplifier 201. The loop-through buffer 206 may be used to isolate the loop-through output circuit 20 from the rf receive circuit 10.

In this embodiment of the present application, the radio frequency receiving circuit 10 and the loop-through output circuit 20 may be included in a television tuner, and the radio frequency receiving circuit 10 and the loop-through output circuit 20 may be implemented by the same chip or different chips, which is not limited in this embodiment of the present application.

However, in the loop-through output circuit 20 led out from the input terminal of the low noise amplifier 200, before inputting the signal to the television apparatus, it is still necessary to perform amplification, mixing, filtering, and analog-to-digital conversion processing on the signal using a circuit configuration similar to that of the radio frequency receiving circuit in the loop-through output circuit, thereby increasing the complexity of the loop-through output circuit configuration. In addition, in order to ensure that the input power of the analog-to-digital converter in the loop-through output circuit is a constant power value, different gain ranges and gain steps need to be set for the low noise amplifier 201 and the variable gain amplifier 203 in the loop-through output circuit 20, so that the complexity of the structure of the loop-through output circuit and the power consumption of the loop-through output circuit are further increased.

Based on the structural schematic diagrams of the radio frequency receiving circuit 10 and the loop-through output circuit 20 shown in fig. 1, the embodiment of the present application provides a loop-through output circuit, which can reduce the complexity of the loop-through circuit structure and reduce the power consumption of the loop-through output circuit.

The main principles involved in this application may include: in the designed loop-through buffer (the first loop-through buffer 206 in the foregoing and following text), a voltage buffer circuit and a feedback circuit may be designed to perform voltage buffering and signal feedback on a signal output at the input terminal of the first filter or a signal output at the output terminal of the first filter in sequence. The feedback circuit in the loop-through buffer can improve the loop gain of the voltage buffer circuit, reduce the output impedance of the loop-through output circuit, and the loop-through output circuit has better linearity performance. The loop-through output circuit may be taken from the input of the filter of the radio frequency receive circuit (i.e. the first filter in the context of the text) or from the output of the filter (i.e. the input of the analog-to-digital converter). The signals input into the loop-through output circuit do not need to be amplified, mixed and filtered, and the loop-through output circuit only comprises an analog-to-digital converter, i.e. the received signals can be converted into digital signals for signal demodulation. Devices such as a low noise amplifier, a mixer, a filter, a variable gain amplifier and the like do not need to be arranged in the loop-through circuit, and the complexity of the structure of the loop-through output circuit is reduced. In addition, because the signal input into the loop-through output circuit is obtained by amplifying the signal through the variable gain amplifier in the radio frequency receiving circuit according to the principle that the input power of the analog-to-digital converter is a constant power value, the signal input into the loop-through output circuit can ensure that the input power of the analog-to-digital converter in the loop-through output circuit is the constant power value, and different gain ranges and gain gears do not need to be set for the low noise amplifier and the variable gain amplifier in the loop-through output circuit. Therefore, the complexity of the loop-through output circuit structure is reduced, and the power consumption of the loop-through output circuit is reduced.

Based on the above-mentioned principle, several embodiments provided in the present application are explained below.

Based on the rf receiving circuit 10 and the loop-through output circuit 20 described in fig. 1, please refer to fig. 2 and fig. 3 together, and fig. 2 is a schematic structural diagram of another rf receiving circuit 10 and loop-through output circuit 20 provided in the embodiment of the present application. Fig. 3 is a schematic structural diagram of another radio frequency receiving circuit 10 and a loop-through output circuit 20 according to an embodiment of the present application.

As shown in fig. 2 and fig. 3, the rf receiving circuit 10 may include a low noise amplifier 101, a first filter 102, and a first analog-to-digital converter 103, where the low noise amplifier 101, the first filter 102, and the first analog-to-digital converter 103 are connected in sequence for amplifying, filtering, and analog-to-digital converting a received signal in sequence. The description of the low noise amplifier 101 may refer to the detailed description of the low noise amplifier 200 in the radio frequency receiving circuit 10 described in fig. 1, and the description of the first filter 102 and the first analog-to-digital converter 103 may refer to the detailed description of the low noise amplifier 400 and the analog-to-digital converter 600 in the radio frequency receiving circuit 10 described in fig. 1, and will not be repeated here.

As shown in fig. 2 and 3, the loop-through output circuit 20 may further include a first loop-through buffer 206, the first loop-through buffer 206 may include a voltage buffer circuit 2061 and a feedback circuit 2062, the voltage buffer circuit 2061 is used for voltage buffering a signal output at the input terminal of the first filter 102 or a signal output at the output terminal of the first filter 103, a signal output at the output terminal of the voltage buffer circuit 2061 is used for loop-through output, and the feedback circuit 2062 is used for feeding back a signal output at the output terminal of the voltage buffer circuit 2061 to the input terminal of the voltage buffer circuit 2062 to increase the loop gain of the voltage buffer circuit 2061.

The feedback circuit 2062 in the first pass buffer 206 may increase the gain of the voltage buffer circuit 2061. The addition of the feedback circuit 2062 may also reduce the output impedance of the loop-through output circuit 20, so as to provide a high input impedance and a low output impedance for the loop-through output circuit 20, which may improve the driving capability of the loop-through output circuit, and the loop-through output circuit 20 has better linearity performance. The condition for loop-through output of the signal output at the input of the first filter 102 or the signal output at the output of the first filter 102 may be satisfied. Signals input into the loop-through output circuit 20 do not need to be amplified, mixed and filtered, and the loop-through output circuit 20 may only include an analog-to-digital converter, that is, the received signals may be converted into digital signals for signal demodulation. Devices such as a low noise amplifier, a mixer, a filter, a variable gain amplifier and the like do not need to be arranged in the loop-through circuit 20, and the complexity of the structure of the loop-through output circuit 20 is reduced. In addition, since the signal input to the loop-through output circuit 20 is obtained by amplifying the signal through the variable gain amplifier in the radio frequency receiving circuit 10 according to the principle that the input power of the analog-to-digital converter is a constant power value, the signal input to the loop-through output circuit 10 can ensure that the input power of the analog-to-digital converter in the loop-through output circuit 20 is a constant power value, and it is not necessary to set different gain ranges and gain steps for the low noise amplifier and the variable gain amplifier in the loop-through output circuit 20. Thereby reducing the complexity of the ring-through output circuit 20 structure and reducing the power consumption of the ring-through output circuit 20.

As shown in fig. 2, a loop-through output circuit 20 may be taken from the output of the first filter 102, the loop-through output circuit 20 comprising a third analog-to-digital converter 205 for analog-to-digital converting the signal output from the output of the first filter 102. The signal output by the third analog-to-digital converter 205 can be used for signal demodulation by a demodulator (demod).

As shown in fig. 2, an input of the first loop-through buffer 206 is connected to an output of the first filter 102, and an output of the first loop-through buffer 206 is connected to an input of the second analog-to-digital converter 205. The first loopback buffer 206 may be used to isolate the loopback output circuit 20 from the radio frequency receive circuit 10.

In the loop-through output circuit 20 shown in fig. 2 and described, devices such as a low noise amplifier, a filter and a variable gain amplifier do not need to be arranged in the loop-through circuit 20, and the complexity of the structure of the loop-through output circuit and the power consumption of the loop-through output circuit are reduced. In addition, since the signal input to the loop-through output circuit 20 is obtained by amplifying the signal through the low-noise amplifier 101 in the radio frequency receiving circuit 10 according to the principle that the input power of the first analog-to-digital converter 103 is a constant power value, the signal input to the loop-through output circuit 20 can ensure that the input power of the second analog-to-digital converter 206 in the loop-through output circuit 20 is the constant power value, and different gain ranges and gain steps do not need to be set for the amplifier in the loop-through output circuit 20, thereby reducing the structural complexity of the loop-through output circuit 20 and the power consumption of the loop-through output circuit.

Alternatively, as shown in fig. 3, a loop-through output circuit 20 may be derived from the input of the first filter 102, and the loop-through output circuit 20 may include a second filter 204 and a second analog-to-digital converter 205. The second filter 204 and the second analog-to-digital converter 205 are connected in sequence, and are configured to filter and analog-to-digital convert the signal output from the input of the first filter 102. The signal output by the second analog-to-digital converter 205 can be used for signal demodulation by a demodulator (demod). For specific description of the rf receiving circuit 10 and the loop-through output circuit 20 in fig. 3, reference may be made to the rf receiving circuit 10 and the loop-through output circuit 20 described in fig. 2, which is not described herein again.

In the loop-through output circuit 20 depicted in fig. 3, devices such as a low noise amplifier and a variable gain amplifier do not need to be arranged in the loop-through circuit 20, and the complexity of the structure of the loop-through output circuit and the power consumption of the loop-through output circuit are reduced. In addition, since the signal input to the loop-through output circuit 20 is obtained by amplifying the signal through the low-noise amplifier 101 in the radio frequency receiving circuit 10 according to the principle that the input power of the first analog-to-digital converter 103 is a constant power value, the signal input to the loop-through output circuit 20 can ensure that the input power of the second analog-to-digital converter 205 in the loop-through output circuit 20 is the constant power value, and different gain ranges and gain steps do not need to be set for the amplifier in the loop-through output circuit 20, thereby reducing the structural complexity of the loop-through output circuit 20 and the power consumption of the loop-through output circuit.

In the circuit configurations illustrated in fig. 2 and 3, the gain of the low noise amplifier 101 may be adjustable to ensure that the power of the analog signal received by the first analog-to-digital converter 103 is constant. The low noise amplifier 101 may be a Programmable Gain Amplifier (PGA). The first filter 102 may be an anti-aliasing filter (AAF) or a Low Pass Filter (LPF), which is not limited in this embodiment. The filter mentioned in the embodiments of the present application is usually a low-pass filter, but the present application is not limited to this.

Optionally, fig. 4 is a schematic structural diagram of a first loop buffer 206 according to an embodiment of the present disclosure. The first loop-through buffer may be the first loop-through buffer 206 of fig. 2 and 3. As shown in fig. 4, in the first pass buffer 206, the voltage buffer circuit 2061 includes a source follower, and the feedback circuit 2062 includes a current mirror (composed of M3 and M5) and a first transistor M7.

The drain of the first transistor M7 is coupled to the input of the current mirror formed by M3 and M5, and the output of the current mirror formed by M3 and M5 is coupled to the source of M1 in the source follower 2061. As shown in fig. 4, the current mirror formed by M3 and M5 and the first transistor M7 are used for feeding back the signal output from the output terminal of the source follower 2061 to the input terminal of the source follower 2061 and providing a current bias for the source of the source follower 2061. As shown in fig. 4, the voltage of the signal output at the input terminal of the first filter 102 or the signal output at the output terminal of the first filter 102 is Vi, and is input to the voltage buffer circuit 2061. The output voltage Vo is obtained by voltage buffering through the voltage buffer circuit 2061 and the feedback circuit 2062. The source follower 2061 includes a current source bias I _B Transistor M1 and resistor R _B And an output series resistance Ros for impedance matching.

In the first loop-through buffer 206 depicted in fig. 4, the source follower, the current mirror composed of M3 and M5, and the structure of the first transistor M7 can provide high input impedance and low output impedance for the loop-through output circuit 20, and can improve the driving capability of the loop-through output circuit. In addition, the feedback circuit 2062 formed by the current mirror formed by M3 and M5 and the first transistor M7 can increase the loop gain of the voltage buffer circuit, reduce the output impedance of the loop-through output circuit 20, and the loop-through output circuit 20 has better linearity performance, so that the condition of loop-through output of the signal output at the input end of the first filter 102 or the signal output at the output end of the first filter 102 can be satisfied.

It is understood that the rf receiving circuit 10 described in fig. 2 and 3 may be a narrowband rf receiving circuit, or a full-band rf receiving circuit. The following description is made separately.

Referring to fig. 5, fig. 5 is a schematic structural diagram of a radio frequency receiving circuit 10 and a loop-through output circuit 20 according to an embodiment of the present disclosure. The rf receiving circuit 10 is a narrowband rf receiving circuit, and the rf receiving circuit 10 further includes a mixer 104 for reducing the frequency of the received high-frequency signal and moving the required signal to an intermediate frequency. Wherein the gain of the low noise amplifier 101 may be adjustable and the first filter 102 may be a low pass filter. The narrowband rf receiving circuit may further include a variable gain amplifier 105, and the gain of the variable gain amplifier 105 and the gain of the low noise amplifier 101 may be adjusted to make the power of the analog signal received by the first analog-to-digital converter 103 constant. For the detailed description of the low noise amplifier 101, the first filter 102, the first analog-to-digital converter 103, the mixer 104 and the variable gain amplifier 105, reference may be made to the low noise amplifier 200, the low pass filter 500, the analog-to-digital converter 600, the mixer 300 and the variable gain amplifier 400 in sequence in fig. 1, and details are not repeated here. A detailed description of the loop-through output circuit 20 may refer to the loop-through output circuit 20 described in fig. 3. The first ring-through buffer 206 in the ring-through output circuit 20 may be the first ring-through buffer 206 in any one of fig. 2, 3 and 4, and is not described herein again.

Optionally, in the band rf receiving circuit, the loop-through output circuit 20 may also be led out from the output terminal of the first filter 102, and may refer to the embodiment described in fig. 2, which is not described herein again.

Referring to fig. 6, fig. 6 is a schematic structural diagram of a radio frequency receiving circuit 10 and a loop-through output circuit 20 according to an embodiment of the present disclosure. The rf receiving circuit 10 is a full-band rf receiving circuit, and the rf receiving circuit 10 may further include a frequency tracking filter (tracking filter)106, configured to screen out a narrowband rf signal of a frequency band where a frequency band selected by a user is located from the full-band rf signals of the tv received by the antenna. Then, the signal is sent to the low noise amplifier 101 or the like to be subjected to subsequent signal processing. For the detailed description of the low noise amplifier 101, the first filter 102, the first analog-to-digital converter 103, the mixer 104 and the variable gain amplifier 105, reference may be made to the low noise amplifier 200, the low pass filter 500, the analog-to-digital converter 600, the mixer 300 and the variable gain amplifier 400 in sequence in fig. 1, and details are not repeated here. A detailed description of the loop-through output circuit 20 may refer to the loop-through output circuit 20 described in fig. 2 and 3. The first ring-through buffer 206 in the ring-through output circuit 20 may be the first ring-through buffer 206 in any one of fig. 2, 3 and 4, and is not described herein again.

Optionally, in the full-band rf receiving circuit 10, the loop-through output circuit 20 may also be led out from the input end of the first filter 102, which may refer to the embodiment described in fig. 3 and is not described herein again.

Alternatively, in the rf receiving circuit 10, a single to differential (S2D) circuit may also be used. The one-to-two circuit is used to convert a single-ended signal received from the antenna into a differential signal, and input the differential signal to the low noise amplifier 101. The received single-ended signals are converted into differential signals for processing, mutual interference among the signals in the processing process can be reduced, signal distortion on each channel can be avoided, and signals with higher image and sound quality can be output to television equipment. Specifically, referring to fig. 7, fig. 7 is a schematic structural diagram of a radio frequency receiving circuit 10 and a loop-through output circuit 20 according to an embodiment of the present disclosure. After the antenna receives the rf signal, the single-ended signal is converted into a differential signal by the single-to-dual circuit 107. For detailed description of functions of the low noise amplifier 101, the first filter 102, the first analog-to-digital converter 103, and the variable gain amplifier 105, reference may be made to the low noise amplifier 200, the low pass filter 500, the analog-to-digital converter 600, and the variable gain amplifier 400 in fig. 1 in sequence, which are not described herein again. The low noise amplifier 101, the first filter 102, the first analog-to-digital converter 103, and the variable gain amplifier 105 are all differential structures.

The loop-through output circuit 20 may be tapped from the input or output of the first filter 102 (not shown in fig. 7, refer to the tapped-off position of the loop-through output circuit 20 in fig. 5 and 6). The loop-through output circuit 20 may also be taken from the output of the single-to-dual circuit 107. As shown in fig. 7, the differential signal output from the output terminal of the single slip circuit 107 is input to the loop-through output circuit 20. The signals processed by each element in the loop-through output circuit 20 are differential signals, and the signals output by each element are also differential signals. The loop-through output circuit 20 may further include a third amplifier 201, a fourth amplifier 203, and a second filter 204, where the third amplifier 201, the fourth amplifier 203, the second filter 204, and the second analog-to-digital converter 205 are sequentially connected to sequentially perform low-noise amplification, and analog-to-digital conversion on the differential signal output from the output terminal of the single-to-double circuit. The loop-through output circuit adopts a differential structure, so that the anti-interference capability of the loop-through output circuit can be improved, and the loop-through output circuit 20 is led out from the output end of the single-to-double circuit 107, so that the differential structure can be realized without arranging the single-to-double circuit in the loop-through output circuit 20, and the circuit structure can be simplified.

The single-to-dual circuit 107 may be an on-chip passive balun, and the single-to-dual circuit 107 may also be an active balun, which is not limited in the embodiment of the present application.

The rf receiving circuit 10 depicted in fig. 7 is only used to explain the embodiment of the present application, and the position of the single-to-dual circuit 107 is not limited to the position between the antenna 100 and the low noise amplifier 101, and may be other positions. The position of the input signal of the loop-through output circuit 20 is not limited to the position between the single-to-dual circuit 107 and the low noise amplifier 101, and may be other positions, and the embodiment of the present application is not limited.

In a scenario where the signal on the ring-through output circuit 20 is a differential signal, the structure of the first ring-through buffer 206 may also be a differential structure. Specifically, referring to fig. 8, fig. 8 is a schematic structural diagram of another first loop-through buffer 206 according to an embodiment of the present disclosure. As shown in fig. 8, in the loop-through output circuit 20, the first loop-through buffer 206 includes a first portion 2063 and a second portion 2064, and the first portion 2063 of the first loop-through buffer and the second portion 2064 of the first loop-through buffer each include a voltage buffer circuit and a feedback circuit. The first portion 2063 of the first loop-through buffer and the second portion 2064 of the first loop-through buffer are respectively used for processing the two differential signals output at the input end of the first filter 102 or the two differential signals output at the output end of the first filter 102.

Specifically, as shown in fig. 8, the voltages of the differential signal output at the input terminal of the first filter 102 or the differential signal output at the output terminal of the first filter 102 are Vip and Vin, and are input to the voltage buffer circuit 2061. One end voltage Vip of the differential signal is input to the first portion 2063 of the first circular pass buffer, and the other end voltage Vin of the differential signal is input to the second portion 2064 of the first circular pass buffer. The voltage buffer circuit 2061 and the feedback circuit 2062 in the first portion 2063 of the first pass-through buffer perform voltage buffering on the input signal Vip to obtain the output voltage Vop, and the voltage buffer circuit 2061 'and the feedback circuit 2062' in the second portion 2064 of the first pass-through buffer perform voltage buffering on the input signal Vin to obtain the output voltage Von.

In the first loop-through buffer 206 depicted in fig. 8, for the first portion 2063 of the first loop-through buffer, the structure of the source follower, the current mirror composed of M3 and M5, and the first transistor M7 may provide a high input impedance and a low output impedance for the loop-through output circuit 20, and may improve the driving capability of the loop-through output circuit. For the second part of the first loop-through buffer, the structure of the source follower, the current mirror composed of M3 and M5, and the first transistor M7 may provide high input impedance and low output impedance for the loop-through output circuit 20, and may improve the driving capability of the loop-through output circuit. In addition, the feedback circuit composed of the current mirror and the first transistor can increase the loop gain of the voltage buffer circuit, reduce the output impedance of the loop-through output circuit 20, and the loop-through output circuit 20 has better linearity performance, so that the condition of performing loop-through output on the signal output at the input end of the first filter 102 or the signal output at the output end of the first filter 102 can be satisfied. Further, since the loop-through output circuit 20 adopts a differential structure, even-order nonlinearity is good due to the characteristics that the differential signals have equal amplitudes and 180 degrees phase difference. The low-noise amplifier adopted in the embodiment of the application can be a low-noise differential amplifier of a CMOS process, and the cost is reduced.

In a scenario where the signal on the rf receiving circuit 10 is a differential signal, the low noise amplifier 101 is a differential amplifier. Referring to fig. 9, fig. 9 is a schematic structural diagram of a low noise amplifier 101 according to an embodiment of the present disclosure.

As shown in fig. 9, the differential amplifier 101 may include a first input resistor Rin1, a first feedback resistor Rf1, a first feedback capacitor Cf1, a second input resistor Rin2, a second feedback resistor Rf2, a second feedback capacitor Cf2, a first operational amplifier a1, an adjustable capacitor CL, and a second stage operational amplifier a 2. In general, Rf1 and Rf2 are equal in size and Cf1 and Cf2 are equal in size in order to ensure that the signal output from the differential amplifier 101 shown in fig. 8 is a differential signal.

As shown in fig. 9, one end of the first input resistor Rin1 is an input end of the differential amplifier 101, one end of the first input resistor Rin1 is connected to one output end of the one-to-two circuit 107, the other end of the first input resistor Rin1 is connected to one end of a first parallel circuit and a non-inverting input end of the first-stage operational amplifier a1, respectively, and the first parallel circuit is a parallel circuit composed of a first feedback capacitor Cf1 and a first feedback resistor Rf 1. The negative phase output end of the first-stage operational amplifier A1 is respectively connected with one end of the adjustable capacitor and the positive phase input end of the second-stage operational amplifier A2. The non-inverting output terminal of the second-stage operational amplifier a2 is connected to the other terminal of the first parallel circuit. One end of a second input resistor Rin2 is the other input end of the differential amplifier 101, one end of a second input resistor Rin2 is connected with the other output end of the one-to-two circuit 107, the other end of the second input resistor Rin2 is respectively connected with one end of a second parallel circuit and the negative phase input end of the first-stage operational amplifier a1, and the second parallel circuit is a parallel circuit composed of a second feedback capacitor Cf2 and a second feedback resistor Rf 2. The positive phase output end of the first-stage operational amplifier A1 is respectively connected with the other end of the adjustable capacitor CL and the negative phase input end of the second-stage operational amplifier A2. The negative phase output terminal of the second-stage operational amplifier a2 is connected to the other end of the second parallel circuit. The gain of the differential amplifier 101 can be adjusted by adjusting the resistance values of Rin1, Rin2, Rf1, and Rf 2. Therefore, in the above case, the adjustable range of the gain of the differential amplifier 101 is associated with the adjustable range of the resistance values of the resistors Rin1, Rin2, Rf1, and Rf2, and the larger the adjustable range of the gain of the differential amplifier 101 is in the case where the adjustable range of the resistors Rin1, Rin2, Rf1, and Rf2 is larger.

Since the differential amplifier shown in fig. 9 employs a large loop feedback technique of resistance, the gain of the signal satisfies expression (1):

wherein Gain represents the Gain of the signal; rf represents the magnitude of the feedback resistance; rin represents the magnitude of the input resistance Rin, and a represents the open loop gain of the differential amplifier. As can be seen from expression (1), the gain of the signal of the differential amplifier 101 does not vary with changes in temperature, process, power supply voltage, and the like, and is only related to the ratio of the input resistance and the feedback resistance, thereby contributing to achieving high linearity. In addition, since the differential amplifier 101 shown in fig. 9 in the embodiment of the present application includes two stages of operational amplifiers, the first stage amplifier is used for amplifying a signal, and the second stage amplifier is used for providing a driving capability, which is beneficial to implementing driving of a large load.

A plurality of branches may be included in the outgoing loop-through output circuit 20, and connected in parallel. Each of the plurality of branches may process the signal and output a digital signal for signal demodulation. Specifically, the loop-through output circuit 20 may include N branches connected in parallel, and an ith branch of the N branches is used for performing loop-through output on a signal output from the first loop-through buffer 206 to the ith branch. Each of the N branches comprises a second analog-to-digital converter 205. For the ith branch of the N branches, the second analog-to-digital converter 205 is configured to perform analog-to-digital conversion on the signal output by the input end of the first filter 102 or the output end of the first filter 102 on the ith branch. Wherein N is a positive integer greater than or equal to 1, i is an integer satisfying 1 and i are less than or equal to N, and the ith branch is any one of the N branches.

Specifically, referring to fig. 10, fig. 10 is a schematic structural diagram of a loop output circuit 20 according to an embodiment of the present disclosure. As shown in fig. 10, the loop-through output circuit 20 may include N branches, where N may be an integer greater than or equal to 1. A loop-through output circuit 20 is led out of the rf receiving circuit 10 at the output of the filter 102. As shown in fig. 10, a first loop-through buffer 206 may be first provided in the outgoing loop-through output circuit 20, an input terminal of the first loop-through buffer 206 is connected to the output terminal of the first filter 102, and an output terminal of the first loop-through buffer 206 is connected to input terminals of the N parallel branches. The first loopback buffer 206 may be used to isolate the loopback output circuit 20 from the radio frequency receive circuit 10. As shown in fig. 10, each of the N parallel branches includes a second analog-to-digital converter 205, and for each branch, the digital signal output by the second analog-to-digital converter 205 can be used by the demodulator to demodulate the television signal. As for the detailed description of the rf receiving circuit 10, the rf receiving circuit described with reference to any one of fig. 1 to 3 may be referred to.

The outgoing looped output circuit 20 may also include multiple sub-looped branches. Specifically, referring to fig. 11, fig. 11 is a schematic structural diagram of another loop-through output circuit 20 according to an embodiment of the present disclosure. As shown in fig. 11, the loop-through output circuit 20 may include M cascaded loop-through branches. The first ring buffer 206 includes M second ring buffers 207, and each of the M branches includes one second ring buffer 207. The output of the second loopback buffer 207 on the kth branch 208 is connected to the input of the second loopback buffer 207 on the (k + 1) th branch 210, and the second loopback buffer 207 on the (k + 1) th branch 210 is used for buffering the signal output from the output of the second loopback buffer 207 on the kth branch 208.

Wherein M is a positive integer greater than or equal to 2, k is an integer satisfying that k is greater than or equal to 1 and less than or equal to M, and the kth branch 208 is any one of the M branches. The kth branch 208 and the (k + 1) th branch 210 are two adjacent branches of the M branches.

As for the detailed description of the rf receiving circuit 10, the rf receiving circuit described with reference to any one of fig. 1 to 3 may be referred to. Optionally, each branch may further comprise a second amplifier 209. Referring to fig. 12, fig. 12 is a schematic structural diagram of another loop-through output circuit 20 according to an embodiment of the present disclosure. As shown in fig. 12, for the kth branch 208, an input terminal of a second amplifier 209 is connected to an output terminal of the second loop-through buffer 207 on the kth branch 208, an output terminal of the second amplifier 209 is connected to the second analog-to-digital converter 205 of the kth branch 208, and the second amplifier 209 is used for signal amplification.

As shown in fig. 12, for the kth branch 208, when the switch in the kth branch 208 is turned off, the signal output by the second loop-through buffer 207 needs to be amplified by the second amplifier 209 and then output to the second analog-to-digital converter 205 of the kth branch 208. And the (k + 1) th branch 210 is also led out from the output of the second amplifier 209 of the kth branch 208. For each branch, the switch can be selectively closed or opened as required to select whether to use or not use the second amplifier 209 on the branch for amplification.

It is understood that the number of the second amplifiers 209 in the branches of the cascade ring-through is not limited in the embodiment of the present application. In practical application, whether the cascade branches are set or not can be determined according to requirements.

Alternatively, the connection of the second loop-through buffer 207 in the circuit is not limited to the connection shown in fig. 11 and 12, and may be in other manners. Referring to fig. 13, fig. 13 is a schematic structural diagram of another loop-through output circuit 20 according to an embodiment of the present disclosure. As shown in fig. 13, for the kth leg 208, the second ring buffer 207 may be on the kth leg 208 that is dropped. The embodiment of the present application does not limit the positions of the second loopback buffer 207 and the plurality of branches in the loopback output circuit 20.

Optionally, the loop-through output circuit 20 may include a plurality of parallel branches, or may include a plurality of sub-loop-through branches. Specifically, referring to fig. 14, fig. 14 is a schematic structural diagram of another loop-through output circuit 20 according to an embodiment of the present disclosure. As shown in fig. 14, the loop-through output circuit 20 may comprise two parts: a parallel portion 21 and a cascade loop-through portion 22.

The parallel portion 21 includes a plurality of parallel branches, and as shown in fig. 14, may include N branches, where N may be an integer greater than or equal to 1. Each of the N branches comprises a second analog-to-digital converter 205, and the signal output by the second analog-to-digital converter 205 of each branch can be used for demodulating a television signal by the demodulator. The detailed description of the parallel portion 21 may refer to the loop-through output circuit described in fig. 11, and will not be described herein.

The cascade circulation portion 22 may include a plurality of branches of cascade circulation, as shown in fig. 14, N ' branches may be included, N ' may also be an integer greater than or equal to 1, and N ' and N may be equal or different. Each of the N' branches comprises a second analog-to-digital converter 205, and the signal output by the second analog-to-digital converter 205 of each branch can be used for demodulating a television signal by the demodulator. For a detailed description of the cascade loop-through part 22, reference may be made to the loop-through output circuit described in fig. 12, which is not described herein again.

In the loop-through output circuit 20 described in any one of fig. 10 to fig. 14, the loop-through output circuit 20 may be implemented by a separate chip, or may be implemented by being integrated with the radio frequency receiving circuit 10 in a single chip, which is not limited in this embodiment of the present invention. In addition, each branch in the loop-through output circuit 20 connected in parallel may be implemented by an independent chip, or may be implemented by integrating multiple branches connected in parallel in one or more chips, which is not limited in this embodiment of the present application. Each branch of the plurality of branches of the cascade ring may be implemented by an independent chip, or may be implemented by integrating the plurality of branches of the cascade ring in one or more chips, which is not limited in the embodiment of the present application.

Alternatively, the loop-through output circuit 20 described in any of fig. 10-14 may also be derived from the input of the first filter 102, and the output of the first loop-through buffer 206 may be connected in series with a second filter before the plurality of branches for filtering the signal output from the first loop-through buffer.

Optionally, in the loop-through output circuit described in any one of fig. 10 to 14, the structure of the first loop-through buffer 206 may refer to the first loop-through buffer 206 described in fig. 2 to 4, which is not described again here. If the ring-through output circuit 20 is a differential structure, the structure of the first ring-through buffer 206 can refer to the first ring-through buffer 206 described in fig. 8. The rf receiving circuit 10 depicted in any one of fig. 10 to fig. 14 may further include a single-to-dual circuit 107, where the single-to-dual circuit 107 is configured to receive an rf signal, convert the rf signal into a differential signal, and input the differential signal to the low noise amplifier 101. The signals of the inputs and the output signals of the low noise amplifier 101, the first filter 102 and the first analog-to-digital converter 103 in the radio frequency receiving circuit 10 shown in any one of fig. 10 to 14 are differential signals. The input signals and the output signals of the first ring-through buffer 206 and the elements in the plurality of branches in the ring-through output circuit 20 shown in any of fig. 10 to 14 are differential signals.

Optionally, the loop-through output circuit 20 depicted in any one of fig. 10 to 14 is further configured to be led out from the output terminal of the single-to-dual circuit 107. In this case, the loop-through output circuit 20 may further include a third amplifier and a second filter, where the third amplifier, the second filter and the second analog-to-digital converter are sequentially connected to sequentially amplify, filter and perform analog-to-digital conversion on the differential signal output from the output end of the single-to-dual circuit. The third amplifier and the second filter may be connected at the output end of the first loop buffer 206 and before the plurality of branches, or may be at the output end of the first loop buffer 206 and each branch includes the third amplifier and the second filter, which is not limited in the embodiment of the present application.

In addition, the embodiment of the application also provides a television tuner. The television tuner comprises a radio frequency receiving circuit and a loop-through output circuit. Wherein: the rf receiving circuit may be the rf receiving circuit 10 described in any one of fig. 1 to 3, and the loop-through output circuit may be the loop-through output circuit 20 described in any one of fig. 2, 3, 5, 6, 7, and 10 to 14, which are not described herein again.

It should also be noted that the embodiments of the present application do not limit the devices included in the television tuner. The radio frequency receiving circuit may include fewer devices and may include more devices. For example, in the case that the rf receiving circuit is a narrowband rf receiving circuit, the rf receiving circuit may further include one or more mixers. The loop-through output circuit may also include fewer devices and may also include more devices. For example, the loop-through output circuit may also include a demodulator.

The radio frequency receiving circuit and the loop-through output circuit of the television tuner may be integrated on the same chip or different chips, which is not limited in the embodiments of the present application.

In addition, the embodiment of the application also provides a set top box, and the set top box can comprise a television tuner. The television tuner includes a radio frequency receiving circuit and a loop-through output circuit. Wherein: the rf receiving circuit may be the rf receiving circuit 10 described in any one of fig. 1 to 3, and the loop-through output circuit may be the loop-through output circuit 20 described in any one of fig. 2, 3, 5, 6, 7, and 10 to 14, which are not described herein again.

In addition, the embodiment of the application also provides a radio frequency receiving system, which comprises radio frequency receiving equipment and loop-through output equipment; wherein: the radio frequency receiving equipment comprises a low noise amplifier, a first filter and a first analog-to-digital converter, and is used for carrying out low noise amplification, filtering and analog-to-digital conversion on received signals in sequence.

The loop-through output device comprises a first loop-through buffer, the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit, the voltage buffer circuit is used for carrying out voltage buffering on a signal output by the input end of the first filter or a signal output by the output end of the first filter, the signal output by the output end of the voltage buffer circuit is used for carrying out loop-through output, and the feedback circuit is used for feeding back a signal output by the output end of the voltage buffer circuit to the input end of the voltage buffer circuit.

The rf receiving device may include the rf receiving circuit 10 described in any one of fig. 1 to 3. The loop-through output device may comprise the loop-through output circuit 20 described in any of fig. 2, 3, 5, 6, 7, and 10-14.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. A television tuner is characterized by comprising a radio frequency receiving circuit and a loop-through output circuit; wherein:

the radio frequency receiving circuit comprises a low noise amplifier, a first filter and a first analog-to-digital converter, and is used for carrying out low noise amplification, filtering and analog-to-digital conversion on received signals in sequence;

the loop-through output circuit comprises a first loop-through buffer, and the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit.

2. The television tuner of claim 1,

wherein the voltage buffer circuit is configured to voltage buffer a signal output at an input of the first filter or a signal output at an output of the first filter; the signal output by the output end of the voltage buffer circuit is used for carrying out loop-through output; the feedback circuit is used for feeding back a signal output by the output end of the voltage buffer circuit to the input end of the voltage buffer circuit so as to improve the loop gain of the voltage buffer circuit.

3. The television tuner of claim 1 or 2, wherein the voltage buffer circuit comprises a source follower, the feedback circuit comprises a current mirror and a first transistor; wherein:

the drain of the first transistor is coupled with the input end of the current mirror, and the output end of the current mirror is coupled with the source electrode of the source electrode follower; the current mirror and the first transistor are used for feeding back a signal output by the output end of the source follower to the input end of the source follower and providing current bias for the source electrode of the source follower.

4. The television tuner of claim 1 or 2, wherein the voltage buffer circuit is configured to voltage buffer the signal output at the input of the first filter, and wherein the loop-through output circuit further comprises a second filter and a second analog-to-digital converter configured to filter and analog-to-digital convert the signal output by the first loop-through buffer.

5. The television tuner of claim 1 or 2, wherein the voltage buffer circuit is configured to voltage buffer the signal output at the output of the first filter, and wherein the loop-through output circuit further comprises a third analog-to-digital converter configured to analog-to-digital convert the signal output by the first loop-through buffer.

6. The television tuner according to any one of claims 1 to 5, wherein the radio frequency receiving circuit further comprises a single-to-dual circuit; the single-conversion double circuit is used for receiving radio frequency signals, converting the radio frequency signals into differential signals and inputting the differential signals to the low noise amplifier;

in the loop-through output circuit, the first loop-through buffer includes a first portion and a second portion, and the first portion of the first loop-through buffer and the second portion of the first loop-through buffer each include the voltage buffer circuit and the feedback circuit; the first part of the first loop buffer and the second part of the first loop buffer are respectively used for processing the two paths of differential signals output at the input end of the first filter or the two paths of differential signals output at the output end of the first filter.

7. The television tuner of claim 6, wherein the low noise amplifier is a differential amplifier comprising a first input resistor, a first feedback capacitor, a first feedback resistor, a second input resistor, a second feedback capacitor, a second feedback resistor, a first stage operational amplifier, an adjustable capacitor, and a second stage operational amplifier; the resistance value of the first input resistor, the resistance value of the first feedback resistor, the resistance value of the second input resistor and the resistance value of the second feedback resistor are adjustable, and the gain of the differential amplifier is adjusted;

one end of the first input resistor is an input end of the differential amplifier, one end of the first input resistor is connected with one output end of the single-conversion double circuit, the other end of the first input resistor is respectively connected with one end of a first parallel circuit and a non-inverting input end of the first-stage operational amplifier, and the first parallel circuit is a parallel circuit formed by the first feedback capacitor and the first feedback resistor;

the negative phase output end of the first-stage operational amplifier is respectively connected with one end of the adjustable capacitor and the positive phase input end of the second-stage operational amplifier;

the positive phase output end of the second-stage operational amplifier is connected with the other end of the first parallel circuit;

one end of the second input resistor is the other input end of the differential amplifier, one end of the second input resistor is connected with the other output end of the single-conversion double-circuit, the other end of the second input resistor is respectively connected with one end of a second parallel circuit and the negative phase input end of the first-stage operational amplifier, and the second parallel circuit is a parallel circuit formed by the second feedback capacitor and the second feedback resistor;

the positive phase output end of the first-stage operational amplifier is respectively connected with the other end of the adjustable capacitor and the negative phase input end of the second-stage operational amplifier;

and the negative phase output end of the second-stage operational amplifier is connected with the other end of the second parallel circuit.

8. The television tuner of any one of claims 1 to 7, wherein the loop-through output circuit comprises N branches, the N branches being connected in parallel; the ith branch in the N branches is used for performing loop-through output on a signal output to the ith branch by the first loop-through buffer;

the number N is a positive integer greater than or equal to 1, the number i is an integer which satisfies the condition that the number i is greater than or equal to 1 and is less than or equal to N, and the ith branch is any branch in the N branches.

9. The television tuner of any one of claims 1 to 8, wherein the loop-through output circuit comprises M branches;

the first loopback buffer comprises M second loopback buffers, and the M branches respectively comprise one second loopback buffer; the output end of the second loopback buffer on the kth branch is connected to the input end of the second loopback buffer on the (k + 1) th branch, and the second loopback buffer on the (k + 1) th branch is used for caching a signal output by the output end of the second loopback buffer on the kth branch;

wherein M is a positive integer greater than or equal to 2, k is an integer satisfying that k is greater than or equal to 1 and less than or equal to M, and the kth branch is any one branch in the M branches; the kth branch and the (k + 1) th branch are two adjacent branches in the M branches.

10. The television tuner of claim 9, wherein the kth branch further comprises a second amplifier, an input of the second amplifier being connected to an output of the second loop-through buffer on the kth branch for signal amplification.

11. The television tuner according to any one of claims 1 to 10, wherein the radio frequency receiving circuit further comprises a gain controller for adjusting a gain of the low noise amplifier.

12. A loop-through output circuit is characterized in that the loop-through output circuit is used for carrying out loop-through output on a radio frequency receiving circuit, and the radio frequency receiving circuit comprises a low noise amplifier, a first filter and a first analog-to-digital converter and is used for amplifying, filtering and carrying out analog-to-digital conversion on received signals in sequence;

the loop-through output circuit comprises a first loop-through buffer, the first loop-through buffer comprises a voltage buffer circuit and a feedback circuit, the voltage buffer circuit is used for carrying out voltage buffering on a signal output at the input end of the first filter or a signal output at the output end of the first filter, the signal output at the output end of the voltage buffer circuit is used for carrying out loop-through output, and the feedback circuit is used for feeding back a signal output at the output end of the voltage buffer circuit to the input end of the voltage buffer circuit so as to improve the loop gain of the voltage buffer circuit.

13. The loop-through output circuit of claim 12, wherein the voltage buffer circuit comprises a source follower, the feedback circuit comprises a current mirror and a first transistor; wherein:

14. The loop-through output circuit of claim 12 or 13, wherein the voltage buffer circuit is configured to voltage buffer the signal output at the input of the first filter, and wherein the loop-through output circuit further comprises a second filter and a second analog-to-digital converter configured to filter and analog-to-digital convert the signal output by the first loop-through buffer.

15. A low noise amplifier is a differential amplifier, and the differential amplifier comprises a first input resistor, a first feedback capacitor, a first feedback resistor, a second input resistor, a second feedback capacitor, a second feedback resistor, a first-stage operational amplifier, an adjustable capacitor and a second-stage operational amplifier; the resistance value of the first input resistor, the resistance value of the first feedback resistor, the resistance value of the second input resistor and the resistance value of the second feedback resistor are adjustable, and the gain of the differential amplifier is adjusted;

the positive phase output end of the first-stage operational amplifier is connected with the other end of the adjustable capacitor and the negative phase input end of the second-stage operational amplifier respectively;

16. A feedback circuit includes a current mirror and a first transistor; wherein: