CN114826813A - Equipment, system and method for reliably transmitting multi-channel data - Google Patents
Equipment, system and method for reliably transmitting multi-channel data Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
- H04L12/40176—Flexible bus arrangements involving redundancy
- H04L12/40195—Flexible bus arrangements involving redundancy by using a plurality of nodes
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- H—ELECTRICITY
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- H—ELECTRICITY
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- H04L69/16—Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
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- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
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Abstract
The invention provides a device, a system and a method for reliably transmitting multi-channel data, wherein the device comprises: a network card module and a bus interface; the bus interface is used for connecting an upper computer; the network card module is used for connecting other equipment through one or more network ports. The cascade connection of the communication nodes can be realized, and the expandability, the flexibility and the transmission efficiency of the redundant structure are greatly improved.
Description
Technical Field
The invention belongs to the technical field of safety computers, and particularly relates to equipment, a system and a method for reliably transmitting multi-channel data.
Background
Based on the requirement of rail transit transportation service on safety, a safety computer system is generally adopted in a railway signal system. The existing safety computer system, such as interlocking, usually adopts a two-by-two or two-out-of-two redundant structure and double sets of redundancy. That is, one interlock system includes a first system (system a) and a second system (system B), both systems are provided with two CPUs (central processing units), and each system operates the same function. When the master system is in error, the master system and the slave system switch roles and the slave system is upgraded to be the master system, thereby realizing a reliable data transmission mechanism.
However, the existing redundant structure can only realize point-to-point data transmission, cannot realize the automatic transmission of multi-path data of the cascade equipment, and lacks expandability and flexibility. For example, in zone interlocking, multiple cascaded interlocking systems can only use point-to-point transmission, which is inefficient and not easily scalable.
Therefore, a reliable transmission scheme for multiple data paths, which is easy to expand, is needed.
Disclosure of Invention
In view of the above problem, the present invention provides an apparatus for implementing reliable transmission of multiple channels of data, including:
a network card module and a bus interface;
the bus interface is used for connecting an upper computer;
the network card module is used for connecting other equipment through one or more network ports.
Further, the bus interface is a PCIe bus interface.
Further, the apparatus comprises:
and the data checking module is used for checking the data to be forwarded and the received data.
Further, comprising:
and the data encryption and decryption module is used for encrypting the data to be forwarded and decrypting the received data.
Further, the data analysis module is configured to determine a data transmission mode between the device and another device connected through the network port.
Further, the data transmission mode is as follows: and enabling the TCP/IP protocol to carry out data interaction, or disabling the TCP/IP protocol to carry out data interaction by adopting a specified data frame format.
Further, the network card module includes one or more groups of memory units corresponding to the network ports.
Furthermore, each group of memory units comprises a read memory unit and a write memory unit corresponding to the network port;
the write memory unit is used for storing data to be forwarded received from an upper computer, and the data to be forwarded is sent out from the corresponding network port;
the read memory unit is used for storing the received data acquired from the corresponding network port.
Further, the device is implemented by an FPGA.
The invention provides a system for realizing reliable transmission of multi-channel data, which comprises:
a plurality of the above-mentioned devices for realizing reliable transmission of multiple paths of data;
each device is connected with the corresponding upper computer through a bus;
each device is connected to its adjacent two devices via ethernet.
Further, the plurality of devices includes:
a first device, a second device, a third device, and a fourth device;
the first device is connected with the second device and the third device through Ethernet;
the fourth device is connected with the second device and the third device through the Ethernet;
each device is used as a local device and performs data interaction with adjacent devices in the system by disabling the TCP/IP protocol and adopting a specified data frame format.
Furthermore, the upper computers corresponding to the multiple devices are all interlocking systems;
a plurality of said interlocking systems constitute zone interlocks.
Further, the apparatus further comprises: a fifth device and a sixth device;
the fifth device is used for connecting the first device and the third device through the Ethernet and performing data interaction by using a specified data frame format by forbidding a TCP/IP protocol;
the sixth device is used for connecting the second device and the fourth device through the Ethernet and performing data interaction by using a specified data frame format by disabling a TCP/IP protocol;
the fifth device and the sixth device are also used for data interaction with the remote device by enabling a TCP/IP protocol mode.
The invention also provides a method for realizing reliable transmission of the multi-channel data, which comprises the following steps:
realizing cascade connection of a plurality of upper computers through equipment for realizing reliable transmission of multi-path data; wherein the content of the first and second substances,
the apparatus comprises: the system comprises a network card module and a bus interface; the bus interface is used for connecting an upper computer; the network card module is used for connecting other equipment through one or more network ports;
a plurality of the devices are cascaded through corresponding network ports;
the plurality of devices are respectively connected with the corresponding upper computers through the respective bus interfaces.
Furthermore, the equipment is connected with the corresponding upper computer through a PCIe bus.
Further, the method comprises:
and carrying out data verification on the data to be forwarded and the received data through the equipment.
Further, the method comprises:
and encrypting the data to be forwarded through the equipment and decrypting the received data.
Further, the method comprises:
and determining the data transmission mode of the equipment and other equipment connected through the Ethernet.
Further, between local devices, the TCP/IP protocol is forbidden and data interaction is carried out by adopting a specified data frame format;
and enabling a TCP/IP protocol to carry out data interaction between the local equipment and the remote equipment.
Further, according to a plurality of network ports, a plurality of groups of corresponding memory units are arranged in the device, and are respectively used for storing the received data or the data to be forwarded corresponding to the corresponding network ports.
Furthermore, each group of memory units comprises a read memory unit and a write memory unit corresponding to the network port;
storing the data to be forwarded received from the upper computer in a corresponding write memory unit;
and storing the received data acquired from the network port in the corresponding read memory unit.
Further, a plurality of interlocking systems in the regional interlocking are used as the upper computer cascade, wherein,
each interlock system is connected to an adjacent interlock system by a respective said device.
The device for reliably transmitting the multi-channel data can be realized through the FPGAs, each FPGA transmits the data with the upper computer through the PCIe bus, and the FPGAs are communicated through the Ethernet. And grouping the FPGA memory into a plurality of memory cell blocks, and forwarding data in each memory cell of the FPGA through a corresponding Ethernet interface. The FPGA of the multi-path network interface can realize the cascade connection of communication nodes, and greatly improves the expandability and the flexibility of the redundant structure.
The data processing is divided into two cases, one communication node creates a socket according to the TCP/IP protocol family identifier, and starts the TCP/IP protocol to communicate with a remote node; and the other method forbids a TCP/IP protocol, realizes clock synchronization by adopting a 1588 protocol, reduces the software overhead of the protocol, improves the accuracy of the clock synchronization and protects the data information of a local area.
The FPGA sends the data processing result corresponding to the memory unit to the appointed FPGA connected with the FPGA through the Ethernet by designing the RAM of the FPGA without processing the ARM core of the FPGA and directly depending on the internal design, and informs an upper computer to receive the data, and the upper computer of a receiving end receives the data through PCIe, so that the load of the ARM core of the FPGA is greatly reduced.
When communicating with the local node, the TCP/IP protocol stack is closed, and when communicating with the remote node, the TCP/IP protocol stack is started, and the synchronization function is realized by adopting the specified data frame format. When data is transmitted between internal nodes, the design reduces the software overhead of the protocol and improves the clock synchronization accuracy of local node communication.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of an apparatus for reliable transmission of multiple paths of data according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a system for reliable transmission of multiple paths of data according to an embodiment of the present invention;
FIG. 3 is a block diagram of another system for reliable transmission of multiple channels of data according to an embodiment of the present invention;
fig. 4 is a diagram illustrating a data transmission decision process according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides equipment for realizing reliable transmission of multi-channel data, which comprises: a network card module and a bus interface; the bus interface is used for connecting an upper computer; the network card module is used for connecting other equipment through one or more network ports, so that the equipment provided by the embodiment of the invention can cascade a plurality of upper computers. Without loss of generality, the network port is an ethernet port.
Preferably, the bus in the embodiment of the present invention adopts a PCIe bus, that is, the bus interface is a PCIe bus interface. PCI-express (peripheral component interconnect express), PCIe for short, is a high-speed serial computer expansion bus standard. According to the embodiment of the invention, the connection mode of the equipment and the upper computer is set as PCIe bus connection, so that high-speed data transmission between the equipment and the upper computer can be realized. Correspondingly, the network card module is a PCIe network card module.
Without loss of generality, the device according to the embodiment of the present invention may be implemented by an FPGA (Field Programmable Gate Array). In other embodiments, a CPLD (Complex Programmable logic device) may also be used. Hereinafter, PFGA is used as an example.
Illustratively, the specific structure of the device is shown in fig. 1. The main functions of the equipment are realized through the FPGA, and the FPGA is connected with the upper computer through the PCIe bus. The upper computer is mainly used for collecting source data information in real time and processing received data information from other upper computers. The source data information is used as the data to be forwarded of the FPGA, and the received data information is obtained according to the received data of the FPGA. And the source data information carries out data interaction with the FPGA through PCIe. The FPGA is provided with a data checking module, a data encryption and decryption module, a data analysis module and a network card module, and is mainly used for processing data and interacting with equipment (namely other equipment, wherein the other equipment can be the same FPGA as the embodiment of the invention or different equipment) connected with the FPGA through the Ethernet. Furthermore, the FPGA also comprises a data processing module.
The upper computer transmits acquired data information to the FPGA through a PCIe bus, the FPGA verifies the data to be forwarded through a data verification module, the data are encrypted respectively through a data encryption and decryption module, the data are analyzed through a data analysis module, and the data transmission mode of the equipment and other equipment connected through the Ethernet port is determined. If the data needs to be processed, the data analysis module sends the data to the data processing module, the data processing module packages the data through the network card module after processing the data, and sends the data to a memory unit specified by the MAC layer of the network card module, namely a memory unit corresponding to a specified Ethernet port. And if the data processing is not needed, the data analysis module directly sends the data to the network card module after the data analysis is finished.
The data checking module mainly compares the data length and checks the data accuracy through the CRC module. The FPGA needs to carry out consistency comparison through data collected by the upper computer and corresponding data sent by other equipment.
The data encryption and decryption module carries out encryption or decryption processing on the data through the sm4 encryption and decryption algorithm. Specifically, data to be forwarded is encrypted, and received data is decrypted.
The data analysis module analyzes the data to be forwarded sent by the upper computer, and divides the data to be forwarded into two types, one type is that the upper computer establishes a socket address by using an identifier of a TCP/IP protocol family through an operating system, and the data is transmitted safely and reliably through a TCP/IP protocol; the other type of the method is to transmit data by customizing a simple frame structure at an application layer instead of creating a socket through an operating system and not using a TCP/IP protocol. In the process of analyzing data, a data forwarding mode is determined by the node type (namely equipment type) of the received data, the node type is encapsulated in a data header, the data header needs to be analyzed first, whether the node type is a local node or a far-end node is determined, the data sent to the equipment (local equipment) of the local node adopts a custom data frame format, and the data sent to the equipment (far-end equipment) of the far-end node adopts a TCP/IP protocol. When the device receiving the data is a local device, only the type of the device needs to be judged during the first communication, and then the data transmission is directly carried out according to the communication mode of the local device, namely, the TCP/IP protocol is forbidden. Specifically, the header of the data includes a node type, i.e., a remote node or a local node, and a node identifier. The network port used for communication with the node can be determined by the node identification. After the network port is determined according to the node type and the node identifier, the data can be accurately sent to the destination node.
And the data analysis module determines whether the data to be forwarded is transmitted through a TCP/IP protocol stack. In the process of transmitting Ethernet data between local nodes through the FPGA, in order to reduce the protocol overhead of software, improve the clock synchronization accuracy, protect the data of the local nodes at the same time, and bypass a TCP/IP protocol stack, the data transmission rate is greatly improved. The nodes in the embodiment of the invention comprise an upper computer and an FPGA connected with the upper computer. The local node refers to a group of nodes which are connected with each other to form an internal system, for example, each interlocking system in a regional interlocking system is a local node. The equipment (FGPA) in the local node is local equipment.
The network card module comprises one or more groups of memory units corresponding to the Ethernet ports. As shown in fig. 1, the memory units of the network card module are distributed, and the memory units are divided into a plurality of read memory units and write memory units, where the number of the read memory units/the write memory units is equal to the number of the ethernet ports. The write memory unit is used for storing data to be forwarded received from the upper computer, and the data to be forwarded is sent out from the corresponding Ethernet port; the read memory unit is used for storing the received data acquired from the corresponding Ethernet port so as to send the received data to the upper computer. Illustratively, Ethernet ports A, B, C, D are each used to connect to its neighboring FPGAs. Not limited to four ports, and the ports may include a reserved port.
The specific operation of the ethernet port corresponding to the memory unit allocation is as follows:
the receiving cache of the PCIe bus interface of the FPGA is designed into an Ethernet MAC layer sending cache, namely a write memory unit is used for storing data to be forwarded, which is received from an upper computer. Meanwhile, a PCIe bus interface sending cache of the FPGA is designed into a receiving cache of an Ethernet MAC layer, namely, a read memory unit is used for storing received data acquired from a corresponding Ethernet port so as to be sent to an upper computer from the bus interface. When the upper computer sends data to the FPGAs of other devices, the upper computer appoints in advance to send the data to the determined opposite-end FPGA, the opposite-end FPGA corresponds to the ethernet port appointed by the sending-end FPGA, and the sending-end ethernet port A, B, C, D corresponds to the appointed MAC sending cache (write memory unit), respectively. The write memory unit is used as a receiving cache of a PCIe bus interface, so that the direct operation of receiving and forwarding data can be realized.
When the upper computer needs to send the acquired data to the appointed upper computer connected with the upper computer, the upper computer firstly sends the data to the FPGA through a PCIe bus interface, and the FPGA determines a transmission mode through data verification and data encryption and data analysis and then sends the data to the appointed MAC write memory unit. And after the write memory unit receives the data to be forwarded, the network card module automatically sends the data to be forwarded to the opposite-end FPGA through the corresponding Ethernet port. The receiving end FPGA sends a notification to the receiving end upper computer after receiving the data, specifically, the receiving end FPGA sends a receiving interruption to the upper computer of the corresponding receiving end, and the upper computer of the receiving end acquires corresponding data information after receiving the interruption. The memory division and data interaction mode greatly reduces the load of the ARM core in the FPGA, only the ARM core is required to be responsible for scheduling tasks, and the data routing transmission between the FPGAs is not required, so that the load of the ARM core in the FPGA is reduced while the data can be remotely transmitted.
The embodiment of the invention also provides a system for realizing reliable transmission of the multi-channel data, which can be realized based on the equipment for realizing reliable transmission of the multi-channel data. The system comprises a plurality of devices, and each device is connected with a corresponding upper computer through a bus; each device is connected with two adjacent devices through Ethernet to form a ring system. The data transmission between each device and the adjacent devices within the system is considered as the data transmission of the local node. As shown in fig. 2, the plurality of devices includes: a first device, a second device, a third device, and a fourth device; the first device is connected with the second device and the third device through Ethernet; the fourth device is connected with the second device and the third device through the Ethernet; each device is used as a local device and performs data interaction with adjacent devices by disabling the TCP/IP protocol and adopting a specified data frame format. The first equipment and the second equipment have a redundancy relation, and data are backed up with each other; the third device and the fourth device have a redundancy relationship, and data are backed up with each other. The first device is marked as FPGA-a and comprises a network card module PCIe network card a (a first local node) which is connected with a first upper computer (the upper computer a) through a PCIe bus to form a node a. The second device is marked as FPGA-b and comprises a network card module PCIe network card b which is connected with a second upper computer (upper computer b) through a PCIe bus to form a node b (a second local node). The third device is marked as FPGA-c and comprises a network card module PCIe network card c which is connected with a third upper computer (upper computer c) through a PCIe bus to form a node c (a third local node). The fourth device is marked as an FPGA-d, and includes a network card module PCIe network card d, and is connected to a fourth upper computer (upper computer d) through a PCIe bus to form a node d (fourth local node).
The nodes a, b, c and d are local nodes, and data interaction is carried out among the nodes through a specified data frame format. Meanwhile, the nodes a, b, c and d are also used as boundary local nodes of the system and can transmit data with equipment outside the system through a TCP/IP protocol.
The upper computer in the embodiment of the present invention may be an interlocking system, but is not limited to an interlocking system, and any secure computer system (redundant structure) that needs to be cascaded may implement reliable multipath data transmission by using the method in the embodiment of the present invention. The redundancy relation among the devices in the system for reliably transmitting the multi-path data is used for realizing the control function of a multi-machine cascade system, and is not the redundancy relation of double systems or double CPUs of a single upper computer.
When the upper computer is an interlocking system, the plurality of cascaded interlocking systems can form regional interlocking. Zone interlocking is a set of associated interlocking systems that enable data sharing and interlocking management services inside a zone and support data interaction with outside the zone. The number of the nodes in the cascade connection is only exemplary, and more nodes or fewer nodes may be used.
The system of the embodiment of the present invention can be further extended to form a system for realizing reliable transmission of multiple paths of data as shown in fig. 3. In the system, a fifth device and a sixth device are also included; the fifth device is used for connecting the first device and the third device through the Ethernet, and the fifth device performs data interaction with the first device and the third device by adopting a specified data frame format through disabling a TCP/IP protocol; and the sixth device is used for connecting the second device and the fourth device through the Ethernet, and the sixth device adopts a specified data frame format to carry out data interaction with the second device and the fourth device by disabling the TCP/IP protocol. The fifth device and the sixth device are also used for data interaction with the remote device by enabling a TCP/IP protocol mode. And the fifth equipment and the sixth equipment have a redundancy relation and are used for acquiring the same data.
The fifth device is marked as an FPGA-m and comprises a network card module PCIe network card m, and the network card module PCIe network card m is connected with a fifth upper computer (the upper computer m) through a PCIe bus to form a node m (a fifth local node). The sixth device is marked as FPGA-n, and includes a network card module PCIe network card n, and is connected to a sixth upper computer (upper computer n) through a PCIe bus to form a node n (sixth local node). Nodes m and n are local nodes that communicate with remote nodes and are referred to as border local nodes. The remote node is a node opposite to the local node and is a non-safety node outside an internal system formed by the local node.
Each device in the system, namely each FPGA is internally provided with a data checking module, a data encryption and decryption module, a data analysis module, a data processing module and a network card module. Each node works independently and synchronously. The upper computer m and the upper computer n are responsible for collecting data, the FPGA connected with the upper computer m is responsible for processing the data, and then the processed data is sent to the nodes adjacent to the upper computer m. In fig. 3, a data source upper computer m sends acquired data to an FPGA-a and an FPGA-c, an upper computer n sends the acquired data to an FPGA-b and an FPGA-d, the four FPGAs analyze the data after the data received from the upper computer m and the upper computer n are subjected to data verification and encryption, the data comparison state analyzed by an analysis module or processed by a data processing module is sent to the respective upper computer according to needs, and the upper computer acquires data results from the FPGAs-a, the FPGAs-c, the FPGAs-b and the FPGAs-d after acquiring the data comparison and verification state.
The upper computer sends data to the FPGA through the PCIe bus, the FPGA forwards the data to be forwarded through the Ethernet port through the MAC module in the network card module, then the receiving end FPGA receives the Ethernet data and informs the upper computer connected with the receiving end FPGA, software of the receiving end upper computer can read the state of a corresponding register to obtain a data comparison result, and the data is obtained from the memory unit of the network card module through the PCIe bus and used. The local nodes of the system structure adopt a specified data frame format for data interaction, exemplarily, the local nodes adopt a 1588 protocol to realize a synchronization function, and realize local data acquisition, processing and backup. The 1588 protocol is IEEE1588 protocol, also called PTP (precision time protocol). By forbidding the TCP/IP protocol, the accuracy of clock synchronization is improved, the software overhead of the protocol is reduced, and the multipath transmission of data is realized. And the Ethernet MAC layers of the network card modules perform clock synchronization through a 1588 protocol. The clock synchronization is realized in the MAC layer and does not pass through a TCP/IP protocol stack, and the accuracy of the clock synchronization can be provided.
The node m and the node n in fig. 3 are responsible for communicating with a local node and a remote node at the same time, when the two upper computers communicate with the remote node, the TCP/IP protocol is enabled, the TCP/IP protocol is disabled with other internal nodes, and the enabling or disabling of the TCP/IP protocol stack is to judge whether to use the TCP/IP protocol stack after the data analysis module analyzes the data. Except the node m and the node n, the rest of the internal parts do not communicate with an external network, so that the software overhead of a protocol is reduced while internal data is protected, and the accuracy of a synchronous clock is improved.
When the remote node needs to process a data result, the remote node sends a remote data reading request command, when the FPGA-m or the FPGA-n receives the remote data reading command, the command request data is analyzed, and the upper computer-m or the upper computer-n is informed, and the upper computer is responsible for sending corresponding data to the remote node.
The system data transmission communication process in case of normal operation and failure of the local node is described in further detail below.
1) Under the normal working condition of the local node
When the node is started, firstly, the FPGA is started, the FPGA is reset, the state of the register inside the FPGA is determined, and the reset aims to restore the register related to PCIe link to a default value so that a corresponding upper computer of the FPGA can identify and connect the FPGA. Because the upper computer starts to enumerate the equipment when the upper computer is started for 300ms, but the FPGA needs to be electrified and the bit file is loaded and exceeds the time when the upper computer enumerates the equipment, the FPGA needs to be reset first, and the upper computer is started after the FPGA is started, so that the upper computer can correctly scan the FPGA equipment.
The method comprises the steps that a node m and a node n simultaneously send collected data, internal nodes (local nodes) a and b receive the data from the node m, a node c and a node d receive the data from the node n, the node a and the node b respectively send the collected data to a node c and a node d of an opposite end through an Ethernet, the node c and the node d respectively send the collected data to the node a and the node b of the opposite end through the Ethernet, the node a, the node b, the node c and the node d respectively carry out data comparison on information collected from the node m and the node n, and after data processing, interruption is sent to a corresponding upper computer to inform the upper computer of a data comparison result and a processing result. And after the upper computer receives the interrupt, reading and writing the data processing result. And the FPGA-m and the FPGA-n wait for receiving data, acquire a comparison result and a check result, inform an upper computer by the FPGA under the condition of consistent results, and respectively receive and store the data of the FPGA-m and the FPGA-n as files by the upper computer m and the upper computer n.
When data are sent between the local nodes, the upper computer sends the data to the designated memory unit according to the binding relationship between the memory unit and the Ethernet port. The method comprises the steps that whether data are remote data or not needs to be judged when local nodes communicate for the first time, if the data are the remote data, a TCP/IP protocol stack is started, if the data are the remote data, the TCP/IP protocol is forbidden, and then the communication does not need to be judged again, and the communication is carried out in a mode of using a specified data frame format according to the forbidden TCP/IP protocol. The communication diagram is shown in fig. 4.
2) Local node failure
If one of the local nodes m or n in communication with the remote end fails, the other node n or m in normal operation is responsible for communication with the remote end. The node m or n with the fault generates a level interrupt signal to inform adjacent local nodes, the two local nodes connected with the node m or n can temporarily start a remote request receiving function, and a TCP/IP protocol stack is temporarily started to serve as a backup of the local node with the fault and communicate with the remote node. For example, if the local node m fails, the local node a and the local node c connected to the local node m start a function of receiving a remote request, and after a TCP/IP protocol stack is started, remote communication with other devices is realized through a reserved remote communication ethernet port. When the remote node recovers to normal, the two connected local nodes close the function of receiving the remote request, disable the TCP/IP protocol stack and only reserve the function of the local node communication request.
The data transmission decision process of the local node is as shown in fig. 4, the local node determines whether the data transmission to be executed currently is remote data transmission, if not, the TCP/IP protocol stack is disabled, the ethernet port corresponding to the local destination node (the node receiving the data) is determined, the data is transmitted to the write memory unit for storing the local data, and the local data write memory unit performs data interaction with the destination node through a specified data frame format. If the data transmission to be executed is remote data acquisition, a TCP/IP protocol stack is started, the data is sent to a writing memory unit for storing the remote data, the remote data is written into the memory unit, and the data is sent to a remote node through the control of an MAC layer of the network card module.
Based on the same inventive concept, the embodiment of the present invention further provides a method for reliable transmission of multiple paths of data, including: realizing cascade connection of a plurality of upper computers through equipment for realizing reliable transmission of multi-path data; wherein, equipment includes: a network card module and a bus interface; the bus interface is used for connecting an upper computer; the network card module is used for connecting other equipment through one or more Ethernet ports; a plurality of the devices are cascaded through corresponding Ethernet ports; the plurality of devices are respectively connected with the corresponding upper computers through the respective bus interfaces.
Specifically, the devices are connected to their respective corresponding upper computers via PCIe buses. The equipment can carry out data verification, encryption and decryption on the data to be forwarded and the received data. When data is sent, the data transmission mode between the current equipment and other equipment connected through the Ethernet is selected and determined. Between local devices, the TCP/IP protocol is forbidden and data interaction is carried out by adopting a specified data frame format; and enabling a TCP/IP protocol to carry out data interaction between the local equipment and the remote equipment.
Furthermore, according to the multiple ethernet ports, multiple groups of corresponding memory units are set in the device, and are respectively used for storing the received data or the data to be forwarded corresponding to the corresponding ethernet ports. Each group of memory units comprises a read memory unit and a write memory unit corresponding to the Ethernet port; storing the data to be forwarded received from the upper computer in a corresponding write memory unit; and storing the received data acquired from the Ethernet port in the corresponding read memory unit.
The method provided by the embodiment of the invention can be used for system connection of regional interlocking, a plurality of interlocking systems in the regional interlocking are used as the upper computer for cascade connection, and each interlocking system is connected with the adjacent interlocking system through respective equipment.
The embodiment of the invention is based on PFGA and PCIe network card modules, and can realize multi-channel data reliable transmission equipment facing a railway interlocking equipment system by expanding the functions of the PFGA and PCIe network card modules.
The upper computer in the embodiment of the present invention may be a secure computer system, such as a zone controller. A redundant security architecture, such as a two-by-two architecture, may be employed within the upper computer. The embodiment of the invention reliably expands the cascading mode of the existing safety computer system, thereby providing an efficient and safe processing mode for realizing data interaction between local nodes with close relations.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (22)
1. An apparatus for implementing reliable transmission of multiple channels of data, comprising:
a network card module and a bus interface;
the bus interface is used for connecting an upper computer;
the network card module is used for connecting other equipment through one or more network ports.
2. The apparatus for implementing reliable transmission of multiple data according to claim 1,
the bus interface is a PCIe bus interface.
3. The apparatus for implementing reliable transmission of multiple data streams as claimed in claim 1, comprising:
and the data checking module is used for checking the data to be forwarded and the received data.
4. The apparatus for implementing reliable transmission of multiple data streams as claimed in claim 1, comprising:
and the data encryption and decryption module is used for encrypting the data to be forwarded and decrypting the received data.
5. The apparatus for implementing reliable transmission of multiple data according to claim 1,
and the data analysis module is used for determining the data transmission mode of the equipment and other equipment connected through the network port.
6. The apparatus for implementing reliable transmission of multiple data streams according to claim 5,
the data transmission mode is as follows: and enabling the TCP/IP protocol to carry out data interaction, or disabling the TCP/IP protocol to carry out data interaction by adopting a specified data frame format.
7. The apparatus for implementing reliable transmission of multiple data according to claim 1,
the network card module comprises one or more groups of memory units corresponding to the network ports.
8. The apparatus for implementing reliable transmission of multiple data streams according to claim 7,
each group of memory units comprises a read memory unit and a write memory unit corresponding to the network port;
the write memory unit is used for storing data to be forwarded received from an upper computer, and the data to be forwarded is sent out from the corresponding network port;
the read memory unit is used for storing the received data acquired from the corresponding network port.
9. The apparatus for implementing reliable transmission of multiple data according to any one of claims 1-8,
the device is realized by an FPGA.
10. A system for implementing reliable transmission of multiple channels of data, comprising:
a plurality of devices for realizing reliable transmission of multiple paths of data according to any one of claims 1 to 9;
each device is connected with the corresponding upper computer through a bus;
each device is connected to its adjacent two devices via ethernet.
11. The system of claim 10, wherein the plurality of devices comprise:
a first device, a second device, a third device, and a fourth device;
the first device is connected with the second device and the third device through Ethernet;
the fourth device is connected with the second device and the third device through the Ethernet;
each device is used as a local device and performs data interaction with adjacent devices in the system by disabling the TCP/IP protocol and adopting a specified data frame format.
12. The system for reliable transmission of multiple data streams according to claim 11,
the upper computers corresponding to the multiple devices are all interlocking systems;
a plurality of said interlocking systems constitute zone interlocks.
13. The system for implementing reliable transmission of multiple data streams according to claim 10 or 11, further comprising: a fifth device and a sixth device;
the fifth device is used for connecting the first device and the third device through the Ethernet and performing data interaction by using a specified data frame format by forbidding a TCP/IP protocol;
the sixth device is used for connecting the second device and the fourth device through the Ethernet and performing data interaction by using a specified data frame format through forbidding a TCP/IP protocol;
the fifth device and the sixth device are also used for data interaction with the remote device by enabling a TCP/IP protocol mode.
14. A method for realizing reliable transmission of multiple paths of data is characterized by comprising the following steps:
realizing cascade connection of a plurality of upper computers through equipment for realizing reliable transmission of multi-path data; wherein the content of the first and second substances,
the apparatus comprises: a network card module and a bus interface; the bus interface is used for connecting an upper computer; the network card module is used for connecting other equipment through one or more network ports;
a plurality of the devices are cascaded through corresponding network ports;
the plurality of devices are respectively connected with the corresponding upper computers through the respective bus interfaces.
15. The method of claim 14,
the equipment is connected with the corresponding upper computer through a PCIe bus.
16. The method of claim 14, comprising:
and carrying out data verification on the data to be forwarded and the received data through the equipment.
17. The method of claim 14, comprising:
and encrypting the data to be forwarded through the equipment and decrypting the received data.
18. The method of claim 14, comprising:
and determining the data transmission mode of the equipment and other equipment connected through the Ethernet.
19. The method of claim 17,
between local devices, the TCP/IP protocol is forbidden and data interaction is carried out by adopting a specified data frame format;
and enabling a TCP/IP protocol to carry out data interaction between the local equipment and the remote equipment.
20. The method of claim 14,
according to a plurality of network ports, a plurality of groups of corresponding memory units are arranged in the equipment and are respectively used for storing the received data or the data to be forwarded corresponding to the corresponding network ports.
21. The method of claim 19,
each group of memory units comprises a read memory unit and a write memory unit corresponding to the network port;
storing the data to be forwarded received from the upper computer in a corresponding write memory unit;
and storing the received data acquired from the network port in the corresponding read memory unit.
22. The method of claim 14,
and taking a plurality of interlocking systems in the regional interlocking as the upper computer cascade, wherein,
each interlock system is connected to an adjacent interlock system by a respective said device.
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