CN114826491A - Chip, replaceable article, image forming apparatus, and data transmission method - Google Patents

Chip, replaceable article, image forming apparatus, and data transmission method Download PDF

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Publication number
CN114826491A
CN114826491A CN202210669570.4A CN202210669570A CN114826491A CN 114826491 A CN114826491 A CN 114826491A CN 202210669570 A CN202210669570 A CN 202210669570A CN 114826491 A CN114826491 A CN 114826491A
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China
Prior art keywords
chip
host device
preset data
data
controlled switch
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CN202210669570.4A
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Chinese (zh)
Inventor
刘卫臣
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Apex Microelectronics Co Ltd
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Apex Microelectronics Co Ltd
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Publication of CN114826491A publication Critical patent/CN114826491A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/17543Cartridge presence detection or type identification
    • B41J2/17546Cartridge presence detection or type identification electronically
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/38Drives, motors, controls or automatic cut-off devices for the entire printing mechanism
    • B41J29/393Devices for controlling or analysing the entire machine ; Controlling or analysing mechanical parameters involving printing of test patterns
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • H04L12/12Arrangements for remote connection or disconnection of substations or of equipment thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/22Parsing or analysis of headers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/38Drives, motors, controls or automatic cut-off devices for the entire printing mechanism
    • B41J29/393Devices for controlling or analysing the entire machine ; Controlling or analysing mechanical parameters involving printing of test patterns
    • B41J2029/3937Wireless communication between the printer and the cartridge, carriage or printhead

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Security & Cryptography (AREA)
  • Communication Control (AREA)

Abstract

An embodiment of the invention provides a chip, a replaceable article, an image forming apparatus, and a data transmission method. The chip is applied to the replaceable object, the replaceable object is detachably arranged on the host equipment, and the chip comprises a control circuit and an interface module; the interface module is used for communicating with the host equipment; the control circuit is configured to control the interface module to stop receiving the preset data from the host device when it is determined that the host device starts to transmit the preset data. The embodiment of the invention ensures that the chip does not need to execute the preset data, thereby avoiding chip abnormity or chip power consumption increase and operation speed reduction caused by executing the preset data, and ensuring the normal work of the chip.

Description

Chip, replaceable article, image forming apparatus, and data transmission method
[ technical field ] A method for producing a semiconductor device
Embodiments of the present invention relate to the field of image forming technologies, and in particular, to a chip, a replaceable article, an image forming apparatus, and a data transmission method.
[ background of the invention ]
With the development of image forming technology, image forming apparatuses such as laser printers and inkjet printers have been widely used. In the image forming process, the image forming apparatus requires the assistance of the image forming auxiliary information provided from the consumable cartridge to complete the image forming process. The imaging auxiliary information of the image forming apparatus is recorded on the chip in addition to the image forming apparatus. The chip can be attached to the consumable box, and this chip is usually pasted or chucking on the consumable box, and this consumable box can be for filling the ink cartridge of ink or filling the selenium drum of carbon powder, and the effect of chip is authentication and data matching and follow-up formation of image in-process between control consumable box and the image forming device provide formation of image auxiliary information. The chip can record the initial information of the consumable box such as the model number, the color, the capacity of the recording material (such as ink and carbon powder), the production date, the manufacturer code and the like of the consumable box, and can also record the imaging auxiliary information such as data representing the residual quantity/consumption of the recording material and the like obtained in the subsequent printing process. Therefore, the chip mainly serves to identify and provide the use condition of the recording material.
Data interaction between the chip and the image forming device can be carried out through a communication circuit in the chip. In some communication processes, the image forming apparatus may send data to be operated or logically processed to the chip or send an upgrade instruction to the consumable chip, and when the chip cannot operate or logically process the data or complete upgrading according to the upgrade instruction, the chip may be abnormal, thereby affecting normal operation of the chip. In other communication processes, the image forming apparatus sends data that the chip does not wish to execute to the chip, and when the chip indiscriminately receives the data that the chip does not wish to execute, the power consumption of the chip may be increased, the operation speed may be slowed down, and the normal operation of the chip may be affected.
[ summary of the invention ]
In view of this, embodiments of the present invention provide a chip, a replaceable article, an image forming apparatus, and a data transmission method for ensuring normal operation of the chip.
In one aspect, an embodiment of the present invention provides a chip, where the chip is applied to a replaceable article, the replaceable article is detachably mounted on a host device, and the chip includes a control circuit and an interface module;
the interface module is used for communicating with the host equipment;
the control circuit is configured to control the interface module to stop receiving the preset data from the host device when it is determined that the host device starts to transmit the preset data.
Optionally, the interface module includes a controlled switch and at least one first communication port, the controlled switch is connected between the control circuit and a designated first communication port, and each first communication port is used for being connected with a corresponding second communication port in the host device in a communication manner;
the control circuit is used for controlling the controlled switch to be switched off when judging that the host equipment starts to transmit preset data.
Optionally, a control terminal of the controlled switch is connected to a signal output terminal of the control circuit, an output terminal of the controlled switch is connected to a signal input terminal of the control circuit, and an input terminal of the controlled switch is connected to the designated first communication port;
the control circuit is used for outputting a first control signal to the control end of the controlled switch through the signal output end so as to control the controlled switch to be switched off.
Optionally, the capacity size of the preset data includes a plurality of capacity units;
the control circuit is used for receiving the preset data of a part of capacity units or not receiving the preset data of any one capacity unit before outputting the first control signal to the controlled switch through the signal output end.
Optionally, the control circuit is further configured to output a second control signal to the control terminal of the controlled switch through the signal output terminal to control the controlled switch to be turned on when the preset data is stopped being received from the host device, and resume data transmission with the host device through the turned-on controlled switch to return a response bit to the host device.
Optionally, the first communication port comprises a contact communication port comprising a stylus, a contact or a spring.
Optionally, the first communication port comprises a contactless communication port comprising a coil or an antenna.
In another aspect, an embodiment of the present invention provides a replaceable article, including the chip described above.
In another aspect, an embodiment of the present invention provides an image forming apparatus, including a host apparatus and a replaceable article, the replaceable article being detachably mounted on the host apparatus, the replaceable article including a chip, the chip being configured to communicate with the host apparatus;
and the chip is used for stopping receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data.
In another aspect, an embodiment of the present invention provides a data transmission method, where the method is implemented based on an image forming apparatus, where the image forming apparatus includes a host apparatus and a replaceable article, where the replaceable article is detachably mounted on the host apparatus, and the replaceable article includes a chip, and the chip is used for communicating with the host apparatus;
the method comprises the following steps:
and when judging that the host equipment starts to transmit the preset data, the chip stops receiving the preset data from the host equipment.
In the technical scheme provided by the embodiment of the invention, the replaceable article is detachably arranged on the host equipment, the replaceable article comprises a chip communicated with the host equipment, and the chip can be used for stopping receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data, so that the chip does not need to execute the preset data, the abnormal chip or the increase of the power consumption of the chip and the reduction of the running speed caused by executing the preset data are avoided, and the normal work of the chip is ensured.
[ description of the drawings ]
Fig. 1 is a schematic structural diagram of an image forming apparatus according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a format of an instruction according to an embodiment of the present invention;
FIG. 3 is a block diagram illustrating another exemplary format of an instruction according to the present invention;
FIG. 4 is a schematic diagram of an application of a chip according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of associative relationship that describes an associated object, meaning that three types of relationships may exist, e.g., A and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter associated objects are in an "or" relationship.
Fig. 1 is a schematic structural diagram of an image forming apparatus according to an embodiment of the present invention, and as shown in fig. 1, the image forming apparatus includes a host device 10 and a replaceable article 20, the replaceable article 20 is detachably mounted on the host device 10, the replaceable article 20 includes a chip 200, and the chip 200 is used for communicating with the host device 10. The chip 200 is configured to stop receiving the preset data from the host apparatus 10 when it is determined that the host apparatus 10 starts transmitting the preset data.
In the field of print imaging, the host device 10 may be an image forming apparatus, examples of which include: an inkjet printer, a laser printer, a Light Emitting Diode (LED) printer, a copier, a scanner, or a multifunction Peripheral (MFP) that performs the above functions in a single device. The image forming apparatus includes an image formation control unit for controlling the image forming apparatus as a whole, and an image forming unit for forming an image on a sheet conveyed thereto under the control of the image formation control unit based on image formation data and a developer such as toner stored in a consumable cartridge.
In the field of print imaging, the replaceable item may be a consumable cartridge for containing developer. For example, if the consumable cartridge is an ink cartridge and the developer is ink, the ink cartridge is used to contain the ink; the consumable box is a toner cartridge, the developer is carbon powder, and the toner cartridge is used for accommodating the carbon powder; the consumable box is a powder box or a powder cylinder, the developer is carbon powder, the powder box is used for containing the carbon powder, and the powder cylinder is used for containing the carbon powder. The consumable cartridge is detachably mounted on the image forming apparatus.
The chip 200 may receive data transmitted by the host device when communicating with the host device 10. The command sent by the host device may be various commands, for example, a read command, a write command, an authentication command, or a control command for a specific operation.
In the embodiment of the present invention, the host device 10 may serially transmit the command to the chip 200. As an alternative, the default data may include an instruction check value or an instruction identifier.
Fig. 2 shows a command format of a command transmitted serially, and fig. 2 is a schematic diagram of a command format according to an embodiment of the present invention, as shown in fig. 2, the command may sequentially include a command header, command data, a command check value 1, and a command check value 2. In some embodiments, the instruction header is used to indicate the type, access address, and length of the instruction; the instruction data is used to indicate information to be transmitted to the chip 200 by the host device 10; the instruction Check value 1 is used to indicate a Check result obtained by calculating the instruction header and the instruction data by using an algorithm, where the Check result is a Check result related to the instruction header and the instruction data and used to Check whether the data is abnormally transmitted, for example, the algorithm may be Cyclic Redundancy Check (CRC), and then the instruction Check value 1 may be a CRC code of the instruction header and the instruction data; the instruction check value 2 is used to indicate a check result obtained by calculating the instruction header, the instruction data and the instruction check value 1 by using a certain algorithm, for example, the algorithm may be CRC, and the instruction check value 2 may be a CRC code of the instruction header, the instruction data and the instruction check value 1. In practical application, the algorithm may also adopt other verification algorithms.
Fig. 3 shows another instruction format of an instruction transmitted serially, fig. 3 is a schematic diagram of another instruction format provided in the embodiment of the present invention, and as shown in fig. 3, the instruction may sequentially include an instruction header, instruction data, an instruction identifier, and an instruction check value, where in some embodiments, the instruction header is used to indicate a type, an access address, and a length of the instruction; the instruction data is used to indicate information to be transmitted to the chip 200 by the host device 10; the instruction identifier is used to indicate the category or order of the instruction, for example, when the instruction is an authentication instruction, the instruction identifier is used to inform the chip 200 that the instruction is an authentication instruction transmitted for the second time, and in addition, the instruction identifier may also indicate the position or interpretation mode of the instruction check value; the instruction check value is used to indicate a check result obtained by calculating the instruction header, the instruction data and the instruction identifier by using an algorithm, for example, the algorithm may be CRC, and the instruction check value may be a CRC code of the instruction header, the instruction data and the instruction identifier. In practical application, the algorithm may also adopt other verification algorithms.
In the embodiment of the present invention, after receiving the instruction sent by the host device 10, the chip 200 may identify data of each part of the instruction, execute the instruction according to the requirement of the instruction to obtain an execution result, and feed back the execution result to the host device 10. In order to avoid affecting the operation of the chip 200, the user may set all or part of data of one type of the instruction as data that the chip 200 does not execute, that is, set all or part of data of one type of the instruction as preset data. As an alternative, as shown in fig. 2, a user may set all or part of one type of data among the instruction data, the instruction check value 1, and the instruction check value 2 as preset data, for example, set the instruction check value 2 as preset data, and after the chip 200 determines that the host device 10 has transmitted the instruction header, the instruction data, and the instruction check value 1, determine that the host device 10 starts to transmit the preset data instruction check value 2, so as to stop receiving the instruction check value 2 from the host device 10, at this time, the chip 200 does not need to execute the instruction check value 2 again, thereby avoiding affecting the normal operation of the chip 200 when executing the instruction check value 2. As another alternative, as shown in fig. 3, the user may set all or part of one type of data among the instruction data, the instruction identifier, and the instruction check value as preset data, for example, set the instruction identifier as preset data, and after the chip 200 determines that the host device 10 has transmitted the instruction header and the instruction data, determine that the host device 10 starts to transmit the preset data instruction identifier, thereby stopping receiving the instruction identifier from the host device 10, and at this time, the chip 200 does not need to execute the instruction identifier any more, thereby avoiding the normal operation of the chip 200 being affected when the instruction identifier is executed.
In this embodiment of the present invention, the chip 200 may determine that the host device 10 starts to transmit the preset data by determining data with a predetermined size transmitted by the host device 10, content of the data transmitted by the host device 10, format of the data transmitted by the host device 10, or sending time length of the data transmitted by the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts to transmit the preset data when it is determined that data of a predetermined size, which may include predetermined bits or predetermined bytes, is received. The data of each portion of the data transmitted from the host device 10 to the chip 200 has a fixed length, that is, a fixed capacity. The chip 200 determines whether the host device 10 has transmitted the data of the predetermined volume to the chip 200 by counting the volume of the received data, and determines that the host device 10 starts to transmit the preset data if it is determined that the host device 10 has transmitted the data of the predetermined volume to the chip 200. Taking fig. 2 as an example, as shown in fig. 2, the command header, the command data, the command check value 1, and the command check value 2 all have fixed capacity sizes, for example, the capacity size of the command header is 8 bytes (Byte), the capacity size of the command data is 32 bytes, the capacity size of the command check value 1 is 2 bytes, the capacity size of the command check value 2 is 8 bytes, the predetermined capacity size is the sum of the capacity size of the command data, and the capacity size of the command check value 1, that is, the predetermined capacity size is 42 bytes, and then after the chip 200 receives 42 bytes of data transmitted by the host device 10, it is determined that the host device 10 starts to transmit the preset data command check value 2, and at this time, the chip 200 stops receiving the command check value 2 from the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts to transmit the preset data according to the content of the received data. Taking fig. 2 as an example, as shown in fig. 2, the preset data is an instruction check value 2, the host device 10 transmits the instruction check value 2 to the chip 200 after transmitting the instruction check value 1 to the chip 200, the chip 200 determines that the host device 10 has transmitted the data check value 1 according to the content of the received instruction check value 1, and then determines that the host device 10 starts to transmit the preset data instruction check value 1, at this time, the chip 200 stops receiving the instruction check value 2 from the host device 10.
Alternatively, the chip 200 is configured to determine that the host device 10 starts to transmit the preset data according to the format of the received data. Taking fig. 3 as an example, as shown in fig. 3, the preset data is a command identifier, and the host device 10 transmits the command identifier to the chip 200 after transmitting the command data to the chip 200, so that the chip 200 determines that the host device 10 has transmitted the command data according to the format of the received command data, and further determines that the host device 10 starts to transmit the preset data command identifier, and at this time, the chip 200 stops receiving the command identifier from the host device 10.
As another alternative, the chip 200 is configured to determine that the host device 10 starts to transmit the preset data when it is determined that the transmission duration of the received data reaches the preset duration. The chip 200 may start timing when receiving data sent by the host device 10 to obtain a sending time length of the data, and determine that the host device 10 starts to transmit the preset data when the sending time length of the data obtained by timing reaches a preset time length. Taking fig. 2 as an example, as shown in fig. 2, if the sending time of the command header, the command data, and the command verification value 1 transmitted by the host device 10 is 30ms, the preset time is 30ms, the chip 200 starts to time when receiving the data sent by the host device 10, and when the data sending time obtained by timing reaches 30ms, it is determined that the command header, the command data, and the command verification value 1 transmitted by the host device 10 have been received, at this time, the chip 200 may determine that the host device 10 starts to transmit the preset data command verification value 2, and then the chip 200 stops receiving the command verification value 2 from the host device 10.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the chip 200 is used to receive the preset data in units of partial capacity before stopping receiving the preset data from the host device 10 and resuming data transmission. In other words, the capacity size of the preset data received by the chip 200 from the host device 10 lacks a partial capacity unit, and the lack of the partial capacity unit may include lack of one capacity unit or lack of a plurality of capacity units. Wherein, the capacity unit may include 1 bit or 1 byte. For example, the capacity size of the preset data includes a plurality of bits, and the chip 200 stops receiving the data of the 8 th bit of the preset data from the host device 10 after receiving the data of the 7 th bit of the preset data, thereby achieving that the preset data of the 7 bits is received before stopping receiving the preset data from the host device 10 and resuming data transmission. For another example, the size of the capacity of the preset data includes a plurality of bytes, and the chip 200 stops receiving the data of the 4 th byte of the preset data from the host device 10 after receiving the data of the 3 rd byte of the preset data, thereby achieving that the preset data of the 3 bytes is received before stopping receiving the preset data from the host device 10 and resuming the data transmission. In this case, although the chip 200 receives part of the preset data, the received preset data is different from the complete preset data because all the preset data is not received, and the chip 200 cannot execute part of the preset data, thereby avoiding the influence on the normal operation of the chip 200 when executing the preset data.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the chip 200 is used to not receive preset data of any one capacity unit before stopping receiving the preset data from the host device 10 and resuming data transmission. For example, the chip 200 does not receive the preset data of any one byte before stopping receiving the preset data from the host device 10 and resuming the data transmission, in other words, the chip 200 stops receiving the preset data from the host device 10 when the preset data of any one byte is not received. In this case, since the chip 200 does not receive the preset data, the chip 200 does not need to execute the preset data, thereby avoiding the influence on the normal operation of the chip 200 when executing the preset data.
In the embodiment of the present invention, the chip 200 is further configured to resume data transmission with the host device 10 to return a response bit (ACK) to the host device 10 when the reception of the preset data from the host device 10 is stopped. Taking the example of the communication between the host device 10 and the chip 200 using an Inter-Integrated Circuit (IIC) communication protocol, in the IIC communication protocol, each time the host device 10 transmits 8 bits of data to the chip 200, the chip 200 needs to reply a response bit to the host device 10 to notify the host device 10 that the 8 bits of data conforming to the standard protocol are received. For example, the chip 200 stops receiving the data of the 4 th bit of the preset data from the host device 10 after receiving the data of the 3 rd bit of the preset data transmitted by the host device 10; when the host device 10 finishes sending the data of the 8 th bit of the preset data, the chip 200 recovers the data transmission with the host device 10 to return a response bit to the host device 10, so as to avoid the host device 10 considering that the chip 200 is abnormal; further, the chip 200 may continue to perform the stop of receiving the preset data from the host device 10 after returning the response bit to the host device 10. For example, the chip 200 may determine that the host device 10 has finished sending the data of the 8 th bit of the preset data by determining the data of the predetermined size transmitted by the host device 10 or the sending time of the data transmitted by the host device 10.
In this embodiment of the present invention, the chip 200 is further configured to start receiving data from the host device 10 when it is determined that the host device 10 transmits all or part of the preset data, so as to continue receiving other data sent by the host device 10.
In the embodiment of the present invention, the preset data may be data or an upgrade instruction that the chip 200 cannot perform operation or logic processing; alternatively, the preset data may be data that the chip 200 does not wish to execute.
In the technical scheme of the image forming apparatus provided by the embodiment of the invention, the replaceable article is detachably mounted on the host apparatus, the replaceable article comprises a chip communicated with the host apparatus, and the chip can be used for stopping receiving the preset data from the host apparatus when judging that the host apparatus starts to transmit the preset data, so that the chip does not need to execute the preset data, and the abnormal chip or the increase of the power consumption of the chip and the reduction of the running speed caused by executing the preset data are avoided, thereby ensuring the normal work of the chip.
To implement the functions of the chip 200 shown in fig. 1, an embodiment of the present invention provides a chip. Fig. 4 is a schematic diagram of an application of a chip according to an embodiment of the present invention, as shown in fig. 4, the chip 200 is applied to a replaceable article, the replaceable article is detachably mounted on the host device 10, and the chip 200 includes a control circuit 210 and an interface module. The interface module is used for communicating with the host device 10; the control circuit 210 is configured to control the interface module to stop receiving the preset data from the host device 10 when it is determined that the host device 10 starts to transmit the preset data. Wherein the exchangeable object is not specifically shown in fig. 4.
The interface module comprises a controlled switch T1 and at least one first communication port 201. The controlled switch T1 is connected between the control circuit 210 and a designated first communication port 201, each first communication port 201 being for communicative connection with a corresponding second communication port 101 in the host device. The control circuit 201 is configured to control the controlled switch T1 to open when it is determined that the host device 10 starts to transmit the preset data, so as to disconnect the control circuit 201 from the specified first communication port 201, thereby controlling the specified first communication port 201 in the interface module to stop receiving the preset data from the host device 10.
As shown in fig. 3, the interface module may include a plurality of first communication ports 201, and accordingly, the host device 10 may include a plurality of second communication ports 101, and a communication link may be established between each first communication port 201 and the corresponding second communication port 101. The communication link may conform to a standard communication protocol, for example, including but not limited to the IIC communication protocol. When the communication links conform to the IIC standard communication protocol, the four communication links respectively transmit a power supply signal VCC, a clock signal SCL, a data signal SDA and a ground signal GND; in practical applications, when the communication link conforms to other communication protocols, a detection signal, a reset signal, a chip select signal, or the like may be transmitted on the communication link, which is not specifically shown. As an alternative, the interface module may comprise a first communication port 201 and, correspondingly, the host device 10 may comprise a second communication port 101, in which case the communication link between the first communication port 201 and the second communication port 101 may follow a single bus communication protocol, with which the data signal SDA and other signals are transmitted. The embodiment of the present invention does not limit the communication protocol followed by the communication link and the type of the signal transmitted on the communication link.
Alternatively, the host device 10 and the chip 200 may communicate with each other by a contact communication method, which is a wired communication method. The first communication port 201 comprises a contact communication port and correspondingly the second communication port 101 comprises a contact communication port, the first communication port 201 is in physical contact with the corresponding second communication port 101 to construct a communication link, and the contact communication port may comprise electrical contact points, for example, the electrical contact points comprise contact pins, contacts or spring plates. As shown in fig. 4, the four first communication ports 201 include a VCC port for transmitting a power supply signal, an SCL port for transmitting a clock signal, an SDA single port for transmitting a data signal, and a GND port for transmitting a ground signal; accordingly, the four second communication ports 101 include a VCC port transmitting a power supply signal, an SCL port transmitting a clock signal, an SDA port transmitting a data signal, and a GND port transmitting a ground signal.
Alternatively, the host device 10 and the chip 200 may communicate with each other by a contactless communication method, which is a wireless communication method. The first communication port 201 comprises a contactless communication port, correspondingly, the second communication port 101 comprises a contact communication port, the first communication port 201 is wirelessly connected with the corresponding second communication port 101 to construct a communication link, and the contactless communication port can comprise a coil or an antenna. When the first communication port 201 is a coil, the second communication port 101 is also a coil; when the first communication port 201 is an antenna, the second communication port 101 is also an antenna.
As shown in fig. 4, a control terminal of the controlled switch T1 is connected to the signal output terminal P1 of the control circuit, an output terminal of the controlled switch T1 is connected to the signal input terminal P2 of the control circuit 210, and an input terminal of the controlled switch T1 is connected to the designated first communication port 201. As shown in fig. 3, for example, the designated first communication port 201 is an SDA port that transmits a data signal. The control circuit 210 is configured to output a first control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned off, so as to disconnect the signal transmission between the input terminal and the output terminal of the controlled switch T1. Accordingly, when it is required to close the controlled switch T1, the control circuit 210 is configured to output a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, so that signal transmission can be performed between the input terminal and the output terminal of the controlled switch T1. In the embodiment of the present invention, the controlled switch T1 is a circuit element that can function as a switch, and as an alternative, the controlled switch T1 can be a transistor, and the transistor can be a triode or a field effect transistor. The first control signal and the second control signal are signals with opposite functions, the first control signal is used for opening the controlled switch T1, and the second control signal is used for opening the controlled switch T1. According to the type of the controlled switch T1, when the first control signal is a high-level signal or a low-level signal, and the first control signal is a high-level signal, the second control signal may be a low-level signal; conversely, when the first control signal is a low level signal, the second control signal may be a high level signal. The high level signal and the low level signal refer to the definition of high and low levels in the digital circuit, for example, the high level signal may be a voltage between 2.5V and 5V, and the low level signal may be a voltage between 0V and 1.5V.
As an alternative, as shown in fig. 4, a first signal node N is provided on a connection line between the input terminal of the controlled switch T1 and the first communication port 201, the first signal node N being used for detecting and identifying data received by the first communication port 201; a second signal node M for detecting and identifying the received data is provided on the connection between the output of the controlled switch T1 and the signal input P2 of the control circuit 210.
As shown in fig. 4, the control circuit 210 is configured to send a first control signal to the controlled switch T1 through the signal output terminal P1 to open the controlled switch T1 when it is determined that the host device 10 starts to transmit the preset data, so as to disconnect the electrical connection between the first communication port 201 and the control circuit 210, thereby enabling the control interface module to stop receiving the preset data from the host device 10, and further enabling the control circuit 210 to stop receiving the preset data from the host device 10.
In this embodiment of the present invention, the control circuit 210 may determine that the host device 10 starts to transmit the preset data by determining data with a predetermined size transmitted by the host device 10, content of the data transmitted by the host device 10, format of the data transmitted by the host device 10, or sending time length of the data transmitted by the host device 10. At this time, the controlled switch T1 is in a conductive state, the host device 10 transmits data to the control circuit 210 through the conductive controlled switch T1, and the control circuit 210 serves to receive data through the conductive controlled switch T1.
Alternatively, the control circuit 210 is configured to determine that the host device 10 starts to transmit the preset data when it is determined that the data of the predetermined capacity size is received, and further control the interface module to stop receiving the preset data from the host device 10. Alternatively, the control circuit 210 is configured to determine that the host device 10 starts to transmit the preset data according to the content of the received data, and then control the interface module to stop receiving the preset data from the host device 10. Alternatively, the control circuit 210 is configured to determine that the host device 10 starts to transmit the preset data according to the format of the received data, and further control the interface module to stop receiving the preset data from the host device 10. As another alternative, the control circuit 210 is configured to determine that the host device 10 starts to transmit the preset data when it is determined that the transmission duration of the received data reaches the preset duration, and further control the interface module to stop receiving the preset data from the host device 10.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the control circuit 210 is configured to receive the preset data in units of partial capacity before outputting the first control signal to the controlled switch T1 through the signal output terminal P1. In other words, the size of the capacity of the preset data received by the control circuit 210 from the host device 10 lacks a partial capacity unit, and the lack of the partial capacity unit may include lack of one capacity unit or lack of a plurality of capacity units. Wherein, the capacity unit may include 1 bit or 1 byte. For example, the capacity size of the preset data includes a plurality of bits, and the control circuit 210 outputs a first control signal to the controlled circuit T1 through the signal output terminal P1 after receiving the 7 th bit of data of the preset data through the turned-on controlled switch T1 to turn off the controlled circuit T1, thereby controlling the interface module to stop receiving the 8 th bit of data of the preset data from the host device 10, thereby achieving that the 7 bits of preset data are received before stopping receiving the preset data from the host device 10 and resuming data transmission. For another example, the size of the preset data includes a plurality of bytes, and the control circuit 210 outputs the first control signal to the controlled circuit T1 through the signal output terminal P1 after receiving the 3 rd byte of data of the preset data through the turned-on controlled switch T1, so as to turn off the controlled circuit T1, thereby controlling the interface module to stop receiving the 4 th byte of data of the preset data from the host device 10, thereby achieving that the 3 bytes of preset data are received before stopping receiving the preset data from the host device 10 and resuming data transmission.
In the embodiment of the invention, the capacity of the preset data comprises a plurality of capacity units; the control circuit 210 is configured not to receive any one capacity unit of the preset data until the first control signal is output to the controlled switch T1 through the signal output terminal. For example, the capacity size of the preset data includes a plurality of bits, and the control circuit 210 does not receive the preset data of any one bit before outputting the first control signal to the controlled switch through the signal output terminal, in other words, the control circuit 210 outputs the first control signal to the controlled switch T1 through the signal output terminal when the preset data of any one bit is not received, so as to control the controlled switch T1 to be turned off, thereby stopping receiving the preset data from the host device 10, and further realizing that the preset data of any one bit is not received before stopping receiving the preset data from the host device 10 and resuming data transmission.
In the embodiment of the present invention, the control circuit 210 is further configured to output a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on when the receiving of the preset data from the host device 10 is stopped, and resume the data transmission with the host device 10 through the turned-on controlled switch T1 to return the response bit to the host device 10. For example, the control circuit 210 stops receiving the data of the 4 th bit of the preset data from the host device 10 after receiving the data of the 3 rd bit of the preset data transmitted by the host device 10; when the host device 10 has finished sending the data of the 8 th bit of the preset data, the control circuit 210 outputs the second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on, at this time, the control circuit 210 resumes the data transmission with the host device 10 through the turned-on controlled switch T1, and the control circuit 210 can return a response bit to the host device 10 through the turned-on controlled switch T1, thereby avoiding the host device 10 from considering the chip 200 as abnormal. For example, the control circuit 210 may determine that the host device 10 has finished transmitting the 8 th bit of the preset data by determining the data with the predetermined capacity size transmitted by the host device 10 or the transmission time length of the data transmitted by the host device 10.
In this embodiment of the present invention, the control circuit 210 is further configured to output a second control signal to the control terminal of the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned on when it is determined that the host device 10 transmits all or part of the preset data, so that the control circuit 210 can continue to receive other data transmitted by the host device 10 through the turned-on controlled switch T1.
In the embodiment of the present invention, the output timing and the output duration of the control signal set in advance are stored in the control circuit 210, for example, the output timing is used to indicate the timing of outputting the control signal to the controlled switch T1 in the duration of transmitting the preset data, and the output duration is used to indicate the duration of outputting the control signal to the controlled switch T1 in the duration of transmitting the preset data. Specifically, the control circuit 210 is configured to start outputting the first control signal to the controlled switch T1 according to the output timing of the first control signal during the duration of the preset data transmission by the host device 10, and continue outputting the first control signal to the controlled switch T1 for the output duration of the first control signal until stopping outputting the first control signal to the controlled switch T1 and outputting the second control signal to the controlled switch T1 when the output duration of the first control signal is reached. For example, the transmission timing of the first control signal is a timing of receiving data of the 3 rd bit of the preset data transmitted by the host apparatus 10, and the transmission duration of the first control signal is a duration from the start of outputting the control signal to the controlled switch T1 to the stop of outputting the control signal to the controlled switch T1 within the duration of transmitting the preset data, then the control circuit 210 outputs the first control signal to the controlled switch T1 through the signal output terminal P1 to control the controlled switch T1 to be turned off after receiving the data of the 3 rd bit of the preset data transmitted by the host apparatus 10 according to the transmission timing of the first control signal, thereby cutting off the transmission path to stop receiving the data of the 4 th bit of the preset data from the host apparatus 10 within the transmission duration of transmitting the preset data; the control circuit 210 stops outputting the first control signal to the controlled switch T1 and outputs the second control signal to the controlled switch T1 to control the controlled switch T1 to be turned on before the last 1 bit of the preset data is transmitted according to the transmission duration of the first control signal, thereby resuming the data transmission with the host device 10.
In the embodiment of the present invention, as shown in fig. 4, the controlled switch T1 is disposed between the SDA port for transmitting the data signal and the control circuit 210, so that the scheme of fig. 4 stops receiving the preset data transmitted by the host device 10 by turning off the transmitted data signal, but the scheme of the embodiment of the present invention is not limited thereto. Since the chip 200 cannot normally receive data when it does not receive the clock signal, the power signal or the ground signal, in the embodiment of the present invention, the controlled switch T1 may be further disposed between the SCL port for transmitting the clock signal and the control circuit 210, between the VCC port for transmitting the power signal and the control circuit 210, or between the GND port for transmitting the ground signal and the control circuit 210, and as long as the controlled switch T1 in any of the above cases is arbitrarily turned off, the chip cannot receive the preset data of the host device 10.
The specific structure of the chip 200 is described in detail below with reference to fig. 5. Fig. 5 is a schematic structural diagram of a chip according to an embodiment of the present invention, and as shown in fig. 5, the chip 200 may include a control circuit 210 and an interface module 211, where the control circuit 210 may include a control module 212 and a memory module 213, and both the interface module 211 and the memory module 213 are electrically connected to the control module 212.
The interface module 211 is used for communicating input data and output data with an external device. When the replaceable item is installed in the host device 10, the chip 200 of the replaceable item is also installed in the host device 10, and at this time, the interface module 211 of the chip 200 may be electrically connected to a communication port of the host device 10, and the interface module 211 is used for receiving data transmitted by the host device 10 and transmitting data to the host device 10. The interface module 211 may include a contactless port and/or a contact port, and the interface module 211 may be communicatively connected with the host device 10 by a wired connection or a wireless connection. Wherein the contact communication port comprises a contact pin, a contact point or a spring sheet, and the non-contact port comprises a coil or an antenna.
The storage module 213 is used for storing information related to the chip 200, such as the manufacturing date of the chip 200, the manufacturer, the color of the recording material, the capacity of the recording material, the remaining amount or consumed amount of the recording material, the number of printable pages, the number of printed pages, and the like, which may be rewritable information or read-only information, wherein the recording material may include ink or toner. In the embodiment of the present invention, the storage module 213 is further configured to store data characteristics before or after the host device 10 transmits the preset data, for example, a predetermined capacity size of the transmitted data before the host device 10 transmits the preset data, so that the control circuit 210 can control the controlled switch T1 to open when the host device 10 transmits the data with the predetermined capacity size to the control circuit 210 during the process of receiving the data, so as to disconnect the electrical connection between the control circuit 210 and the interface module 211. The storage module 213 may employ a common non-volatile memory, such as: erasable Programmable Read-Only Memory (EPROM), Electrically Erasable Programmable Read-Only Memory (EEPROM), FLASH Memory (FLASH), ferroelectric Memory, phase change Memory, and the like; the Memory module 213 may also adopt a scheme of adding a power supply to a volatile Memory, for example, a Static Random-Access Memory (SRAM) + battery or a capacitor, or a Dynamic Random-Access Memory (DRAM) + battery or a capacitor.
A plurality of configuration fields may be stored in the storage module 213, and the configuration fields may be used to store a predetermined capacity size or a predetermined duration, so that the chip 200 determines that the host device 10 starts to transmit the predetermined data according to the predetermined capacity size or the predetermined duration stored in the configuration fields. The configuration field may further store an output timing and an output duration of the control signal, wherein the control signal includes a first control signal and a second control signal. During the later maintenance, the preset capacity or the preset time length can be adjusted by modifying the configuration field, and the output time of the control signal and the content of the configuration field can be adjusted.
The control module 212 may be a Micro Controller Unit (MCU), a Microcontroller, a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), or the like. The control module 212 is used for controlling communication between the chip 200 and the host device 10, reading data from the storage module 213 and storing data into the storage module 213, and can adjust an output timing and an output duration of the first control signal or the second control signal according to the configuration field stored in the storage module 213.
The chip 200 may further include a circuit board for carrying the control module 212, the interface module 211 and the memory module 213. Alternatively, the control module 212, the interface module 211 and the memory module 213 are integrated in a same circuit, which may be designed as an ASIC, and the ASIC is embodied as a wafer (wafer), and the chip 200 may include the wafer and a circuit board for carrying the wafer.
In the technical scheme of the chip provided by the embodiment of the invention, the chip comprises a control circuit and an interface module, the interface module is used for communicating with the host device, and the control circuit is used for controlling the interface module to stop receiving the preset data from the host device when the host device is judged to start to transmit the preset data, so that the control circuit of the chip does not need to execute the preset data, and the abnormal chip or the increase of the power consumption and the slow running speed of the chip caused by the execution of the preset data are avoided, thereby ensuring the normal work of the chip.
An embodiment of the present invention provides a replaceable article, which includes the chip provided in the above embodiment.
An embodiment of the present invention further provides a data transmission method, which is implemented based on the image forming apparatus, and the description of the image forming apparatus may refer to the embodiment shown in fig. 1, which is not described herein again. The method comprises the following steps: and when the chip judges that the host equipment starts to transmit the preset data, the chip stops receiving the preset data from the host equipment.
In the embodiment of the present invention, the determining, by the chip, that the host device starts to transmit the preset data may specifically include: when the chip judges that the data with the preset capacity is received, the chip determines that the host equipment starts to transmit the preset data; or the chip determines that the host equipment starts to transmit the preset data according to the content of the received data; or the chip determines that the host equipment starts to transmit the preset data according to the format of the received data; or when the chip judges that the sending time of the received data reaches the preset time, the chip determines that the host equipment starts to transmit the preset data.
In this embodiment of the present invention, if the capacity of the preset data includes a plurality of capacity units, the method further includes: the chip receives the preset data of a part of capacity units or does not receive the preset data of any one capacity unit before stopping receiving the preset data from the host device and resuming data transmission.
In the embodiment of the present invention, the method further includes: and when the chip stops receiving the preset data from the host equipment, the chip resumes the data transmission with the host equipment to return a response bit to the host equipment.
According to the technical scheme of the data transmission method provided by the embodiment of the invention, when the chip judges that the host equipment starts to transmit the preset data, the chip stops receiving the preset data from the host equipment, so that the chip does not need to execute the preset data, and the abnormal chip or the increase of the power consumption and the slow running speed of the chip caused by the execution of the preset data are avoided, thereby ensuring the normal work of the chip.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (10)

1. A chip, the said chip is applied to the removable article, the said removable article is installed on host computer apparatus removably, characterized by that, the said chip includes control circuit and interface module;
the interface module is used for communicating with the host equipment;
the control circuit is configured to control the interface module to stop receiving the preset data from the host device when it is determined that the host device starts to transmit the preset data.
2. The chip of claim 1, wherein the interface module comprises a controlled switch and at least one first communication port, the controlled switch is connected between the control circuit and a designated first communication port, each of the first communication ports is used for being connected with a corresponding second communication port in the host device in a communication manner;
the control circuit is used for controlling the controlled switch to be switched off when judging that the host equipment starts to transmit preset data.
3. The chip of claim 2, wherein a control terminal of the controlled switch is connected to a signal output terminal of the control circuit, an output terminal of the controlled switch is connected to a signal input terminal of the control circuit, and an input terminal of the controlled switch is connected to the designated first communication port;
the control circuit is used for outputting a first control signal to the control end of the controlled switch through the signal output end so as to control the controlled switch to be switched off.
4. The chip of claim 3, wherein the capacity size of the preset data comprises a plurality of capacity units;
the control circuit is used for receiving the preset data of a part of capacity units or not receiving the preset data of any one capacity unit before outputting the first control signal to the controlled switch through the signal output end.
5. The chip of claim 2, wherein the control circuit is further configured to output a second control signal to the control terminal of the controlled switch through the signal output terminal to control the controlled switch to be turned on when the preset data is stopped from being received from the host device, and resume data transmission with the host device through the turned-on controlled switch to return a response bit to the host device.
6. The chip of any one of claims 1 to 5, wherein the first communication port comprises a contact communication port comprising a stylus, a contact, or a spring.
7. The chip of any one of claims 1 to 5, wherein the first communication port comprises a contactless communication port comprising a coil or an antenna.
8. A replaceable article comprising a chip according to any one of claims 1 to 7.
9. An image forming apparatus comprising a host apparatus and a replaceable article, the replaceable article being detachably mounted to the host apparatus, the replaceable article comprising a chip for communicating with the host apparatus;
and the chip is used for stopping receiving the preset data from the host equipment when judging that the host equipment starts to transmit the preset data.
10. A data transmission method is characterized in that the method is realized based on an image forming device, the image forming device comprises a host device and a replaceable article, the replaceable article is detachably arranged on the host device, the replaceable article comprises a chip, and the chip is used for communicating with the host device;
the method comprises the following steps:
and when judging that the host equipment starts to transmit the preset data, the chip stops receiving the preset data from the host equipment.
CN202210669570.4A 2021-11-17 2022-06-14 Chip, replaceable article, image forming apparatus, and data transmission method Pending CN114826491A (en)

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CN2021113622239 2021-11-17

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