CN114826287A - Antenna signal processing device - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/1461—Suppression of signals in the return path, i.e. bidirectional control circuits
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Abstract
An embodiment of the present invention provides an antenna signal processing apparatus, including: the zero intermediate frequency processing unit transmits the processed baseband signal to the linear processing unit; the linear processing unit transmits the digital signal to the conversion unit, and the conversion unit transmits the analog signal to the linear processing unit; the conversion unit transmits an analog signal to the frequency conversion unit, the frequency conversion unit outputs a down-conversion signal to the conversion unit, the frequency conversion unit outputs an up-conversion signal to the transceiving unit, and the transceiving unit transmits a radio frequency signal to the frequency conversion unit; the transceiving unit receives and transmits signals to the antenna. Through above-mentioned device, in antenna signal processing process, reducible conversion intermediate frequency in handling antenna signal in-process is handled, raises the efficiency, simultaneously through the zero intermediate frequency structure of this application, solves the problem of image interference to when making the down conversion of rear end handle, the image interference can not appear, and it is relatively poor to have compensatied down conversion image interference's inhibition ability, thereby promotes antenna signal stability.
Description
Technical Field
The invention relates to the technical field of antenna signal processing, in particular to an antenna signal processing device.
Background
With the rapid development of the communication industry, especially personal mobile communication, communication devices play an important role in the life and work of people. The antenna radiates radio waves and receives radio waves, however, the transmitter does not feed radio waves into the antenna through the feeder, nor does the receiving antenna feed radio waves directly into the receiver through the feeder, where energy conversion processes must be performed.
At present, no matter a base station or communication equipment such as a mobile phone, a wireless gateway and the like processes an antenna signal, the signal is subjected to up-conversion and down-conversion processing, and an electromagnetic wave signal is a signal which is easily interfered.
Disclosure of Invention
In view of the above problems, the present invention is proposed to provide a method and apparatus for simulating a switch operation frequency based on a pressure type switch, which overcomes or at least partially solves the above problems, and comprises:
an antenna signal processing apparatus comprising: the device comprises a zero intermediate frequency processing unit, a linear processing unit, a conversion unit, a frequency conversion unit, a transceiving unit and an antenna;
the zero intermediate frequency processing unit is electrically connected with the linear processing unit and is used for transmitting the processed baseband signal to the linear processing unit;
the linear processing unit is electrically connected with the conversion unit and is used for transmitting a digital signal to the conversion unit by the linear processing unit, and the conversion unit is used for transmitting an analog signal to the linear processing unit;
the conversion unit is electrically connected with the frequency conversion unit and is used for transmitting an analog signal to the frequency conversion unit by the conversion unit and outputting a down-conversion signal to the conversion unit by the frequency conversion unit;
the frequency conversion unit is electrically connected with the transceiving unit and is used for outputting an up-conversion signal to the transceiving unit by the frequency conversion unit, and the transceiving unit transmits a radio frequency signal to the frequency conversion unit;
the receiving and transmitting unit is electrically connected with the antenna and used for receiving the signal of the antenna by the receiving and transmitting unit and transmitting the signal to the antenna.
Further, the zero intermediate frequency processing unit includes:
i and Q channels and an adder circuit;
the I channel comprises a first phase shifter, an I channel frequency mixer and an I channel modulator; the first phase shifter is used for outputting a first baseband signal phase-shifted by 90 degrees to the I-channel mixer, and the I-channel mixer is used for receiving a second baseband signal and outputting an I-channel mixing signal to the I-channel modulator; the I channel modulator is further configured to receive the first local oscillator signal with the difference of 90 degrees and output an I channel baseband modulation signal to the adder circuit;
the Q channel comprises a second phase shifter, a Q channel frequency mixer and a Q channel modulator; the second phase shifter is used for outputting a second baseband signal phase-shifted by 90 degrees to the Q-channel mixer, and the Q-channel mixer is used for receiving the first baseband signal and outputting a Q-channel mixing signal to the Q-channel modulator; the Q channel modulator is further configured to receive the first local oscillator signal and output a Q channel baseband modulation signal to the adder circuit;
the adder circuit is electrically connected to the linear processing unit and is used for receiving the I channel output and the Q channel output and outputting the processed baseband signal to the linear processing unit.
Further, the linear processing unit includes: the circuit comprises a linear compensation circuit, a delayer and a comparator;
the linear compensation circuit and the delayer are jointly and electrically connected to an adder circuit of the zero intermediate frequency processing unit and used for receiving a baseband signal processed by the adder circuit;
the output end of the linear compensation circuit is electrically connected with the input end of the D/A module in the conversion unit;
the output end of the comparator is electrically connected with the linear compensation circuit and is used for outputting a comparison signal to the linear compensation circuit; one receiving end of the comparator is electrically connected with the output end of the time delay unit, and the other receiving end of the comparator is electrically connected with the output end of the A/D module in the conversion unit.
Further, the frequency conversion unit includes: the up converter, the down converter and the second local oscillator;
the up-converter is electrically connected with the D/A module in the conversion unit and the transceiving unit, and is used for performing up-conversion processing on the signal output by the D/A module and outputting an up-conversion signal to the transceiving unit;
the down converter is electrically connected with the A/D module in the conversion unit, is electrically connected with the transceiving unit, and is used for receiving the signal of the transceiving unit, performing down conversion processing and outputting the down converted signal to the A/D module;
and the second local oscillator outputs a second local oscillator signal and a second local oscillator signal with a difference of 90 degrees respectively to the up converter and the down converter.
Further, the transceiver unit includes: an amplifier and a duplexing unit;
the amplifier is used for receiving the up-conversion signal, amplifying the up-conversion signal and outputting the amplified up-conversion signal to the duplex unit;
the duplex unit is used for carrying out bidirectional communication with the antenna and transmitting signals received from the antenna to the down converter of the frequency conversion unit.
Further, the transceiver unit further includes an RF filter;
the RF filter is configured to filter the upconverted signal and output the filtered upconverted signal to the amplifier.
Furthermore, two D/A modules are arranged in the conversion unit, and two up-converters of the frequency conversion unit are correspondingly arranged to form an uplink double channel; the input ends of the two D/A modules are commonly and electrically connected to a linear compensation circuit, and the output ends of the two up-converters are commonly and electrically connected to the input end of an amplifier;
and the second local oscillator provides a second local oscillator signal for one of the up-converters and provides a second local oscillator signal with a difference of 90 degrees for the other up-converter.
Further, the linear processing unit further includes a third phase shifter; the number of A/D modules in the conversion unit is two, and the number of down converters of the frequency conversion unit is also two correspondingly, so that a downlink double channel is formed;
wherein a said down converter and a said A/D module form a signal path from the duplexing unit to the comparator; the third phase shifter, the further down-converter and the further a/D module form a further signal path from the duplexing unit to the comparator.
Further, the linear processing unit further includes a third phase shifter;
the third phase shifter, a D/A module and an up-converter form a first up-conversion channel from the linear compensation circuit to the amplifier; another D/A module and another up-converter, form the second up-conversion link between amplifier and the linear compensating circuit;
the down converter, the A/D module and the other third phase shifter form a first down conversion link from the duplex unit to the comparator; another said downconverter and another said a/D module forming a second downconversion link from said duplexing unit to a comparator;
the up converter and the down converter are electrically connected to a second local oscillator, wherein the second local oscillator provides a 0 ° second local oscillator signal of the up converter and the down converter, and provides another 90 ° second local oscillator signal of the up converter and the down converter.
The up converter and the down converter are electrically connected to a second local oscillator, wherein the second local oscillator provides a 0 ° second local oscillator signal of the up converter and the down converter, and provides another 90 ° second local oscillator signal of the up converter and the down converter.
Furthermore, the conversion unit and the frequency conversion unit can also be the same integrated processing unit;
the integrated processing unit comprises a DUC part integrating a D/a-module and an up-converter, and a DDC part integrating a down-converter and an a/D-module.
The invention has the following advantages:
in the embodiment of the invention, the antenna is connected with the zero intermediate frequency processing unit, the linear processing unit, the conversion unit, the frequency conversion unit, the transceiving unit and the antenna; the zero intermediate frequency processing unit is electrically connected with the linear processing unit and is used for transmitting the processed baseband signal to the linear processing unit; the linear processing unit is electrically connected with the conversion unit and is used for transmitting a digital signal to the conversion unit by the linear processing unit, and the conversion unit is used for transmitting an analog signal to the linear processing unit; the conversion unit is electrically connected with the frequency conversion unit and used for transmitting an analog signal to the frequency conversion unit by the conversion unit, and the frequency conversion unit outputs a down-conversion signal to the conversion unit; the frequency conversion unit is electrically connected with the transceiving unit and is used for outputting an up-conversion signal to the transceiving unit by the frequency conversion unit, and the transceiving unit transmits a radio frequency signal to the frequency conversion unit; the receiving and transmitting unit is electrically connected with the antenna and used for receiving the signal from the antenna and sending the signal to the antenna. Reduce the conversion intermediate frequency processing at handling the antenna signal in-process through above-mentioned device, raise the efficiency, simultaneously through the zero intermediate frequency structure of this application, solve the problem of image interference to when making the down conversion of rear end handle, the image interference can not appear, and it is relatively poor to have compensatied down conversion image interference's suppressive ability, thereby promotes antenna signal stability.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of an antenna signal processing apparatus according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a transceiver unit including an RF filter according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an antenna signal processing apparatus including uplink dual channels according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of an antenna signal processing apparatus including a dual downlink channel according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an antenna signal processing apparatus including an uplink dual channel and a downlink dual channel according to an embodiment of the present invention;
figure 6 is a schematic diagram of the structure of a DUC and DDC component provided by an embodiment of the present invention.
In the drawings: 100. a zero intermediate frequency processing unit; 200. a linear processing unit; 300. a conversion unit; 400. a frequency conversion unit; 500. a transceiver unit; 600. an antenna; 101. an I-channel modulator; 102. a Q-channel modulator; 103. an I-channel mixer; 104. a Q-channel mixer; 105. a first phase shifter; 106. a second phase shifter; 107. a first local oscillator; 108. an adder circuit; 201. a linear compensation circuit; 202. a time delay; 203. a comparator; 204. a third phase shifter; 301. a D/A module; 302. an A/D module; 401. an up-converter; 402. a down converter; 403. a second local oscillator; 404. a DUC component; 405. a DDC component; 501. an amplifier; 502. a duplexing unit; 503. an RF filter.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, an antenna signal processing apparatus according to an embodiment of the present invention is shown, which may specifically include the following: a zero intermediate frequency processing unit 100, a linear processing unit 200, a converting unit 300, a frequency converting unit 400, a transceiving unit 500 and an antenna 600; the zero if processing unit 100 is electrically connected to the linear processing unit 200, and is configured to transmit the processed baseband signal to the linear processing unit 200 through the zero if processing unit 100; the linear processing unit 200 is electrically connected to the converting unit 300, and is used for the linear processing unit to transmit digital signals to the converting unit 300, and the converting unit 300 transmits analog signals to the linear processing unit 200; the converting unit 300 is electrically connected to the frequency converting unit 400, and is configured to transmit an analog signal to the frequency converting unit 400 through the converting unit 300, and output a down-converted signal to the converting unit 300 through the frequency converting unit 400; the frequency conversion unit 400 is electrically connected to the transceiver unit 500, and is configured to output an up-conversion signal to the transceiver unit 500 by the frequency conversion unit 400, and the transceiver unit 500 transmits a radio frequency signal to the frequency conversion unit 400; the transceiver unit 500 is electrically connected to the antenna 600, and is used for the transceiver unit 500 to receive signals from the antenna 600 and the transceiver unit 500 to transmit signals to the antenna 600.
In the above embodiment, by the above apparatus, the baseband signal received by the zero if processing unit 100 is converted and output to the antenna 600 through the linear processing unit 200 along the uplink, and the antenna returns to the linear processing unit 200 through the downlink for signal comparison processing, so as to form a processing loop, wherein in the processing process, the converted if processing in the antenna signal processing process can be reduced, and the efficiency is improved.
Next, an antenna signal processing apparatus in the present exemplary embodiment will be further described.
In an embodiment of the present application, as shown in fig. 1, the zero if processing unit 100 includes: i and Q channels and an adder circuit;
the I channel includes a first phase shifter 105, an I channel mixer 103, and an I channel modulator 101; wherein the first phase shifter 105 is configured to output a first baseband signal phase-shifted by 90 ° to the I-channel mixer 103, and the I-channel mixer 103 is configured to receive a second baseband signal and output an I-channel mixed signal to the I-channel modulator 101; the I-channel modulator 101 is further configured to receive the first local oscillator signal with the difference of 90 °, and output an I-channel baseband modulation signal to the adder circuit 108;
the Q channel includes a second phase shifter 106, a Q channel mixer 104, and a Q channel modulator 102; wherein the second phase shifter 106 is configured to output a second baseband signal phase-shifted by 90 ° to the Q-channel mixer 104, and the Q-channel mixer 104 is configured to receive the first baseband signal and output a Q-channel mixed signal to the Q-channel modulator 102; the Q-channel modulator 102 is further configured to receive the first local oscillator signal and output a Q-channel baseband modulation signal to the adder circuit 108;
the adder circuit 108 is electrically connected to the linear processing unit 200, and is configured to receive the I channel output and the Q channel output, and output the processed baseband signal to the linear processing unit 200.
It should be noted that, in the present application, the first local oscillator signal and the first local oscillator signal that differ by 90 ° are obtained by dividing the same signal into two paths, where one path is obtained by shifting the phase by 90 °.
In the above embodiment, referring to FIG. 1, signal Q1 leads signal I1 by 90 ° in both channels, with the amplitudes of both being identical. Similarly, I2 leads Q2 by 90, which is also identical in magnitude. These independent signals are combined such that I1+ I2 ═ I Sum ，Q1+Q2＝Q Sum (ii) a The signals I and Q after addition no longer exhibit phase and amplitude correlationI.e. the amplitude is not equal at all times, the phase relationship between the two is constantly changing. The resulting mixer output places I1/Q1 data on one side of the carrier and I2/Q2 data on the other side of the carrier. By placing the baseband signal data adjacent to each other on either side of the first local oscillator 107, the advantages of the zero intermediate frequency processing unit 100 described above are enhanced; the data processing path bandwidth never exceeds the data bandwidth. Thus, in theory, the use of complex mixers in a zero-if architecture provides for the elimination of RF filtering while also optimizing baseband power efficiency and reducing the unit cost of the unusable signal bandwidth.
In the embodiments of the present application, the description is made with respect to signal transmission, and the same structure can be applied to signal reception. The advantages explained for the transmit signal processing are equally applicable to the signal reception processing. When a single mixer is used to receive signals in the prior art, the image frequency must first be filtered out by the RF mixer. In the application, by the zero intermediate frequency structure, the mirror frequency is not needed to be worried about, and the signal receiving higher than the local oscillator and the signal receiving lower than the local oscillator are independent. The input spectrum is applied to both the I channel mixer 103 and the Q channel mixer 104. One of the mixers is driven by the first local oscillator signal, and the other mixer is driven by the first local oscillator signal +90 ° (the difference 90 ° first local oscillator signal). For signal reception processing, the outputs of its signal reception are I and Q. If the input signal frequency is higher than the local oscillator signal, then the I and Q outputs will be at the local oscillator signal frequency and there will be a phase shift between I and Q (I ahead of Q), e.g., the first local oscillator signal in this application. Similarly, if the input signal frequency is lower than the local oscillator signal, then the I and Q outputs are also at the local oscillator signal frequency, but then Q leads I. By the mode, the zero intermediate frequency structure can distinguish the energy higher than the local oscillation signal from the energy lower than the local oscillation signal.
In an embodiment of the present application, the linear processing unit 200 includes: a linear compensation circuit 201, a delay 202, and a comparator 203; the linear compensation circuit 201 and the delay 202 are electrically connected to one end of the zero if processing unit 100 providing the processed baseband signal; the linear processing unit 200 provides electrical connection from the output of the linear compensation circuit 201 to the input of the D/a module 301 in the conversion unit 300; the linear processing unit 200 further provides an electrical connection for outputting a comparison signal from the comparator 203 to the linear compensation circuit 201; and provides electrical connections for the comparator 203 to receive the output of the delay 202 and to receive the output of the a/D module 302 in the conversion unit 300.
In the above embodiment, the delay 202 controls the processing time of the signal of the linear compensation circuit 201, the comparator 203 compares the phase amplitude output by the delay 202 with the output phase amplitude of the down converter 402, and the linear compensation circuit 201 performs distortion compensation output according to the input signal and the output result of the comparator 203; since the output of the down converter 402 is an analog signal and the comparator 203 is in a digital processing mode, analog-to-digital conversion needs to be performed through the a/D module 302 in the middle of the output from the down converter 402 to the comparator 203.
In the embodiment of the present application, an a/D (Analog/Digital) is a component that converts an Analog signal into a Digital signal; d/a (Digital/Analog) is a component that converts a Digital signal into an Analog signal.
In an embodiment of the present application, the frequency conversion unit 400 includes: an up-converter 401, a down-converter 402 and a second local oscillator 403; the up-converter 401 provides an electrical connection for transmitting up-converted signals from the D/a module 301 of the converting unit 300 to the transceiving unit 500; the downconverter 402 provides electrical connection for transmitting downconverted signals from the transceiver unit 500 to the a/D module 302 in the conversion unit 300; the second local oscillator 403 provides a second local oscillator signal and a second local oscillator signal with a difference of 90 ° for the up converter 401 and the down converter 402, respectively.
In the above embodiment, the oscillation signals with a phase difference of 90 ° (the second local oscillation signal and the 90 ° difference second local oscillation signal) generated by the second local oscillation 408 are respectively provided to the up-converter 401 and the down-converter 402 as carrier signals for up-conversion and down-conversion processing.
In an embodiment of the present application, the transceiver 500 includes: an amplifier 501 and a duplexing unit 502; the amplifier 501 is configured to receive an up-conversion signal, amplify the up-conversion signal, and output the up-conversion signal after amplification to the duplex unit 502; the duplexer unit 502 is configured to perform bidirectional communication with the antenna 600, and transmit a signal received from the antenna 600 to the down converter 402 of the frequency converter unit 400.
In the above embodiment, the duplexing unit 502 is a bidirectional transmission unit located at the rear end of the antenna 600, and transmits a signal to an internal processing unit through the duplexing unit 502 when the antenna receives the signal, and transmits the signal to the antenna 600 through the duplexing unit 502 when the signal is transmitted.
In an embodiment of the present application, as shown in fig. 3, two D/a modules 301 are provided in the conversion unit 300, and two up-converters 401 of the frequency conversion unit 400 are correspondingly provided, so as to form two channels in an uplink; the input ends of the two D/a modules 301 are electrically connected to the linear compensation circuit 201, and the output ends of the two up-converters 401 are electrically connected to the input end of the amplifier 501; the second local oscillator 403 provides a second local oscillator signal for one of the upconverters, and provides a second local oscillator signal with a difference of 90 ° for another one of the upconverters 401.
In the above embodiment, the frequency conversion processing is required to be performed on the signal during the antenna signal processing, and as the output frequencies of the D/a module 301 and the a/D module 302 are lower, sideband signals and distortion are likely to occur in the process, two corresponding up-converters 401 are provided in the uplink, and the up-converters 401 form an up-conversion module with image interference suppression by using the second local oscillator 402 to provide the second local oscillator signal with a 90 ° phase difference, so that the up-conversion module can reduce useless upper sideband signals and suppress distortion.
In an embodiment of the present invention, the linear processing unit 200 further includes a third phase shifter 204; two a/D modules 302 in the conversion unit 300 are provided, and two down converters 402 in the frequency conversion unit 400 are correspondingly provided, so as to form a downlink dual channel; wherein a signal path is formed between a down converter 402 and a/D module 302 from duplexing unit 502 to comparator 203; the third phase shifter 204, the further down-converter 402 and the further a/D module 302 form a further signal path from the duplexing unit 502 to the comparator 203.
In the above embodiment, as shown in fig. 4, the input ends of the two downconverters 402 are commonly connected to the duplexing unit 502, the output end of one of the a/D modules 302 is connected to the comparator 203, and the other a/D module 302 is connected to the comparator 203 through the third phase shifter 204. It forms a down conversion module with suppressed image interference through two downstream channels, similar to fig. 3 described above, and enables it to attenuate unwanted lower sideband signals and suppress distortion.
In an embodiment of the present invention, as shown in fig. 5, the linear processing unit 200 further includes a third phase shifter 204; wherein, the third phase shifter 204, a D/a module 301 and an up-converter 401 form a first up-conversion channel from the linear compensation circuit 201 to the amplifier 501; another D/a module 301 and another up-converter 401, forming a second up-conversion link between the linear compensation circuit 201 and the amplifier 501; a down converter 402, an a/D module 302 and another third phase shifter 204 form a first down conversion link from the duplex unit 502 to the comparator 203; another said downconverter 402 and another said a/D module 302 forming a second downconversion link from said duplexing unit 502 to a comparator 203; the two up converters 401 and the two down converters 402 are electrically connected to a second local oscillator 403, where the second local oscillator 403 provides a second local oscillator signal having an angle of 0 ° for one of the up converters 401 and the down converters 402, and provides a second local oscillator signal having an angle of 90 ° for the other of the up converters 401 and the down converters 402.
In the above embodiments, as shown in fig. 4 to 5, by providing dual uplink channels and dual downlink channels, and combining the advantages of the embodiments corresponding to fig. 3 and 4, an up-conversion module and a down-conversion module with image interference suppression are formed, and are enabled to reduce useless upper sideband signals and lower sideband signals and suppress distortion.
In an embodiment of the present application, as shown in fig. 6, the converting unit 300 and the frequency converting unit 400 may also be the same integrated processing unit; the integrated processing unit comprises a DUC part 404 integrating a D/a-module 301 and an up-converter 401, and a DDC part 405 integrating a down-converter 402 and an a/D-module 302.
In the foregoing embodiment, in a DUC (Digital Up Converter) radio transmission link, a Digital signal is converted into an analog signal, the analog signal is mixed to obtain a desired radio frequency center frequency higher than an original signal, the signal is amplified to a proper power level, and finally, the signal is transmitted through an antenna after a bandwidth is limited. This way of upward variation of the mixing frequency is called up-conversion. The DDC (Digital Down Converters) mainly aims to Down-convert an Intermediate Frequency (IF) Digital signal spectrum acquired by AD to a baseband signal through Digital mixing, then perform decimation filtering to restore an original signal, and the Digital Down-conversion adopts a Digital signal technology to realize Down-conversion, which includes algorithms of Digital filtering, orthogonal transformation, sampling, decimation and the like. The integration degree of the whole device is improved through the structure, the crosstalk phenomenon generated when signals are transmitted among various components is reduced, and the volume of the device can be reduced.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The antenna signal processing apparatus provided by the present invention is described in detail above, and the principle and the implementation of the present invention are explained in this document by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. An antenna signal processing apparatus, comprising: the device comprises a zero intermediate frequency processing unit, a linear processing unit, a conversion unit, a frequency conversion unit, a transceiving unit and an antenna;
the zero intermediate frequency processing unit is electrically connected with the linear processing unit and is used for transmitting the processed baseband signal to the linear processing unit;
the linear processing unit is electrically connected with the conversion unit and is used for transmitting a digital signal to the conversion unit by the linear processing unit, and the conversion unit is used for transmitting an analog signal to the linear processing unit;
the conversion unit is electrically connected with the frequency conversion unit and is used for transmitting an analog signal to the frequency conversion unit by the conversion unit and outputting a down-conversion signal to the conversion unit by the frequency conversion unit;
the frequency conversion unit is electrically connected with the transceiving unit and is used for outputting an up-conversion signal to the transceiving unit by the frequency conversion unit, and the transceiving unit transmits a radio frequency signal to the frequency conversion unit;
the receiving and transmitting unit is electrically connected with the antenna and used for receiving the signal of the antenna by the receiving and transmitting unit and transmitting the signal to the antenna.
2. The apparatus of claim 1, wherein the zero intermediate frequency processing unit comprises:
i and Q channels and an adder circuit;
the I channel comprises a first phase shifter, an I channel frequency mixer and an I channel modulator; the first phase shifter is used for outputting a first baseband signal phase-shifted by 90 degrees to the I-channel mixer, and the I-channel mixer is used for receiving a second baseband signal and outputting an I-channel mixing signal to the I-channel modulator; the I channel modulator is further configured to receive the first local oscillator signal with the difference of 90 degrees and output an I channel baseband modulation signal to the adder circuit;
the Q channel comprises a second phase shifter, a Q channel frequency mixer and a Q channel modulator; the second phase shifter is used for outputting a second baseband signal phase-shifted by 90 degrees to the Q-channel mixer, and the Q-channel mixer is used for receiving the first baseband signal and outputting a Q-channel mixing signal to the Q-channel modulator; the Q channel modulator is further configured to receive the first local oscillator signal and output a Q channel baseband modulation signal to the adder circuit;
the adder circuit is electrically connected to the linear processing unit and is used for receiving the I channel output and the Q channel output and outputting the processed baseband signal to the linear processing unit.
3. The apparatus of claim 1, wherein the linear processing unit comprises: the circuit comprises a linear compensation circuit, a delayer and a comparator;
the linear compensation circuit and the delayer are jointly and electrically connected to an adder circuit of the zero intermediate frequency processing unit and used for receiving a baseband signal processed by the adder circuit;
the output end of the linear compensation circuit is electrically connected with the input end of the D/A module in the conversion unit;
the output end of the comparator is electrically connected with the linear compensation circuit and is used for outputting a comparison signal to the linear compensation circuit; one receiving end of the comparator is electrically connected with the output end of the time delay unit, and the other receiving end of the comparator is electrically connected with the output end of the A/D module in the conversion unit.
4. The apparatus of claim 1, wherein the frequency conversion unit comprises: the up converter, the down converter and the second local oscillator;
the up-converter is electrically connected with the D/A module in the conversion unit and the transceiving unit, and is used for performing up-conversion processing on the signal output by the D/A module and outputting an up-conversion signal to the transceiving unit;
the down converter is electrically connected with the A/D module in the conversion unit, is electrically connected with the transceiving unit, and is used for receiving the signal of the transceiving unit, performing down conversion processing and outputting the down converted signal to the A/D module;
and the second local oscillator outputs a second local oscillator signal and a second local oscillator signal with a difference of 90 degrees respectively to the up converter and the down converter.
5. The apparatus of claim 1, wherein the transceiver unit comprises: an amplifier and a duplexing unit;
the amplifier is used for receiving the up-conversion signal, amplifying the up-conversion signal and outputting the amplified up-conversion signal to the duplex unit;
the duplex unit is used for carrying out bidirectional communication with the antenna and transmitting signals received from the antenna to the down converter of the frequency conversion unit.
6. The apparatus of claim 5, wherein the transceiver unit further comprises an RF filter;
the RF filter is configured to filter the upconverted signal and output the filtered upconverted signal to the amplifier.
7. The device according to claim 1, wherein there are two D/a modules in the conversion unit, and there are two up-converters in the frequency conversion unit, forming two channels upstream; the input ends of the two D/A modules are commonly and electrically connected to a linear compensation circuit, and the output ends of the two up-converters are commonly and electrically connected to the input end of an amplifier;
and the second local oscillator provides a second local oscillator signal for one up-converter and provides a second local oscillator signal with a difference of 90 degrees for the other up-converter.
8. The apparatus of claim 1, wherein the linear processing unit further comprises a third phase shifter; the number of A/D modules in the conversion unit is two, and the number of down converters of the frequency conversion unit is also two correspondingly, so that a downlink double channel is formed;
wherein a said down converter and a said A/D module form a signal path from the duplexing unit to the comparator; the third phase shifter, the further down-converter and the further a/D module form a further signal path from the duplexing unit to the comparator.
9. The apparatus of claim 1, wherein the linear processing unit further comprises a third phase shifter;
the third phase shifter, a D/A module and an up-converter form a first up-conversion channel from the linear compensation circuit to the amplifier; another D/A module and another up-converter, form the second up-conversion link between amplifier and the linear compensating circuit;
the down converter, the A/D module and the other third phase shifter form a first down conversion link from the duplex unit to the comparator; another said downconverter and another said a/D module forming a second downconversion link from said duplexing unit to a comparator;
the up converter and the down converter are electrically connected to a second local oscillator, wherein the second local oscillator provides a 0 ° second local oscillator signal of the up converter and the down converter, and provides another 90 ° second local oscillator signal of the up converter and the down converter.
10. The apparatus of claim 1, wherein the converting unit and the frequency converting unit are also the same integrated processing unit;
the integrated processing unit comprises a DUC part integrating a D/a-module and an up-converter, and a DDC part integrating a down-converter and an a/D-module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210468174.5A CN114826287A (en) | 2022-04-29 | 2022-04-29 | Antenna signal processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210468174.5A CN114826287A (en) | 2022-04-29 | 2022-04-29 | Antenna signal processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114826287A true CN114826287A (en) | 2022-07-29 |
Family
ID=82509692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210468174.5A Withdrawn CN114826287A (en) | 2022-04-29 | 2022-04-29 | Antenna signal processing device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114826287A (en) |
-
2022
- 2022-04-29 CN CN202210468174.5A patent/CN114826287A/en not_active Withdrawn
Non-Patent Citations (1)
| Title |
|---|
| 张莉松: "伺服系统原理与设计 第3版", 北京理工大学出版社, pages: 104 - 106 * |
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Application publication date: 20220729 |