CN114825969B - Flyback switching power supply and output control system, method and chip thereof - Google Patents

Flyback switching power supply and output control system, method and chip thereof Download PDF

Info

Publication number
CN114825969B
CN114825969B CN202210709887.6A CN202210709887A CN114825969B CN 114825969 B CN114825969 B CN 114825969B CN 202210709887 A CN202210709887 A CN 202210709887A CN 114825969 B CN114825969 B CN 114825969B
Authority
CN
China
Prior art keywords
power supply
signal
output
control
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210709887.6A
Other languages
Chinese (zh)
Other versions
CN114825969A (en
Inventor
林新春
郑凌波
朱敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lii Semiconductor Inc
Original Assignee
Lii Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lii Semiconductor Inc filed Critical Lii Semiconductor Inc
Priority to CN202210709887.6A priority Critical patent/CN114825969B/en
Publication of CN114825969A publication Critical patent/CN114825969A/en
Application granted granted Critical
Publication of CN114825969B publication Critical patent/CN114825969B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The application relates to a flyback switching power supply and an output control system, a method and a chip thereof, belonging to the technical field of switching power supply control, comprising a power supply control module which is arranged in a primary side loop and an auxiliary loop and is used for monitoring the load state, adjusting the working frequency according to the change of the load state and stabilizing the output voltage of the power supply; the power supply wake-up module is arranged in the secondary side loop and used for monitoring the load state and outputting a wake-up control signal according to the change of the load state, and the power supply control module responds to the wake-up control signal; when the power supply control module monitors that the load is converted from the on-load state to the no-load state, the output of the switching power supply is controlled by the power supply awakening module; when the power supply awakening module monitors that the load is converted from no-load to on-load, the power supply awakening module outputs an awakening control signal to awaken the power supply control module, and the output control right of the switching power supply is controlled by the power supply control module. The load regulation method and the load regulation device have the effects of improving the load regulation rate and reducing circuit errors.

Description

Flyback switching power supply and output control system, method and chip thereof
Technical Field
The present application relates to the field of switching power supply control, and in particular, to a flyback switching power supply, and an output control system, method, and chip thereof.
Background
With the development of consumer electronics, the market demand of power supplies related to the consumer electronics is increasing, and there are two modes of energy consumption of the electronic products: namely an operating mode and a standby mode; in the operation mode, the system efficiency needs to be improved to meet a larger load power, in the standby mode, the output is required to maintain a better load regulation rate, the power supply system needs to operate in a high-frequency state, and the high-frequency operation generates a larger power consumption. Therefore, from smart phones to home appliances, the consumer electronics industry has a strong need for high performance power supply devices with ultra-low motor power, i.e., when the switching power supply is in a very small (light load) or standby (no load) state, the control circuit is partially or completely turned off, so as to eliminate the energy wasted by these unnecessary functions, and to meet the requirement that the switching power supply can timely judge and adjust the working state when the load is in transient change.
With the progress of science and technology, an AD/DC power supply is developed from a linear switching power supply to a flyback switching power supply, the flyback switching power supply is developed from a secondary control SSR to a primary control PSR, and the PSR power supply is widely applied due to the characteristics of low cost, small size, light weight, high electric energy conversion efficiency and the like. However, the PSR power supply has a problem of poor dynamic load, that is, when the load changes transiently, because the system output is suddenly switched from no-load (standby) to heavy-load (running), the PSR chip applied by the PSR power supply needs to acquire information about load change in the next sampling period, and in the period of time when the load changes but the next sampling period does not arrive, the primary side appears passive, and the output voltage is pulled to a very low voltage value, which causes an error risk to the subsequent circuit.
Disclosure of Invention
In order to improve the load regulation rate and reduce circuit errors so as to improve the voltage stability of the output of the switching power supply, the application provides a flyback switching power supply and an output control system, method and chip thereof.
In a first aspect, the present application provides an output control system of a flyback switching power supply, which adopts the following technical scheme:
an output control system of a flyback switching power supply, comprising:
the power supply control module is arranged in the primary side loop and the auxiliary loop and used for monitoring the load state, adjusting the working frequency according to the change of the load state and stabilizing the output voltage of the power supply;
the power supply wake-up module is arranged in the secondary side loop and used for monitoring the load state and outputting a wake-up control signal according to the change of the load state, and the power supply control module responds to the wake-up control signal;
when the power supply control module monitors that the load is in a load running state, the power supply control module controls the output of the switching power supply;
when the power supply control module monitors that the load is changed from load to no-load, the output of the switching power supply is controlled by the power supply awakening module;
when the power supply awakening module monitors that the load is converted from no-load to on-load, the power supply awakening module outputs an awakening control signal to awaken the power supply control module, and the output control right of the switch power supply is controlled by the power supply control module.
By adopting the technical scheme, the power supply control module and the power supply awakening module are arranged, when the switching power supply is in normal on-load operation, the output of the switching power supply is controlled by the power supply control module, and the power supply control module adjusts the working frequency or conducts the duty ratio in real time according to the load condition to stabilize the output voltage of the power supply; when the switching power supply is in an idle state, in order to reduce the loss of the switching power supply, a power supply control module gives up the output control of the switching power supply and transfers the control right of the switching power supply to a power supply awakening module; when the power supply awakening module monitors that a load is suddenly added, namely the load is converted from no-load to on-load, the power supply awakening module outputs an awakening control signal to awaken the power supply control module, and the output control right of the switching power supply is controlled by the power supply control module again; the power supply awakening module is added, so that the requirement of reducing the loss of the switching power supply in a standby state can be met, and when the load changes transiently, the power supply control module can be immediately awakened through monitoring output awakening control signals of the power supply awakening module so as to reduce the risk of circuit errors.
Preferably, the power supply control module includes a first switching tube for controlling whether the primary side loop is switched on or not, and a main control unit coupled between the first switching tube and the auxiliary loop, and the main control unit is connected to a control end of the first switching tube and is used for controlling the first switching tube to be switched on or switched off;
the main control unit includes:
the sampling input end is connected to the auxiliary loop and used for acquiring a sampling voltage signal on the auxiliary loop;
the current detection input end is connected to the primary side loop and used for detecting a primary side current signal generated when the primary side loop is conducted;
and the control output end is coupled with the first switching tube and outputs a control signal to control the on or off of the first switching tube.
By adopting the technical scheme, the main control unit realizes the adjustment of the working frequency of the switching power supply by controlling the on and off of the first switching tube, and simultaneously, the main control unit judges the load state of the switching power supply through the signal acquisition of the sampling input end and the current detection input end.
Preferably, the main control unit further comprises a sampling control circuit and a wake-up receiving circuit,
the sampling control circuit is connected with the sampling input end and used for acquiring a sampling voltage signal, judging the load state according to the sampling voltage signal and outputting a control signal;
and one input end of the awakening receiving circuit is connected with the sampling input end and used for acquiring a sampling voltage signal, and the other input end of the awakening receiving circuit is connected with the control output end and used for feeding back a control signal and judging whether the load state of the switching power supply changes or not according to the sampling voltage signal and the control signal.
By adopting the technical scheme, the sampling control circuit realizes the output control of the switching power supply, and the awakening receiving circuit identifies whether the load state of the switching power supply changes or not through the sampling voltage signal and the feedback control signal so as to realize the awakening of the power supply control module.
Preferably, the wake-up receiving circuit includes a first timer and a first comparator,
an input end of the first comparator is connected with the sampling input end and used for outputting a first response signal;
the first timer is preset with a first timing duration, the input end of the first timer is connected with a first not gate, the input end of the first not gate is connected with the control output end, and the first timer is triggered by a high level and is used for outputting a second response signal;
the output ends of the first timer and the first comparator are connected with a first OR gate together, the output end of the first OR gate is connected with a second NOT gate, and the second NOT gate outputs a third response signal according to the first response signal and the second response signal;
and the sampling control circuit receives the second response signal and the third response signal, judges whether to close the output control of the switching power supply according to the second response signal, and judges whether to awaken the output control of the switching power supply according to the third response signal.
By adopting the technical scheme, the first timer inputs a feedback control signal, whether the switching power supply is in the running state or not is judged through the set first timing duration, whether the voltage of the auxiliary loop changes or not is judged through the first comparator, the awakening receiving circuit synthesizes the judgment results of the first timer and the first comparator to output a third response signal, and the sampling control circuit determines whether to awaken the power supply control module or not according to the output of the awakening receiving circuit.
Preferably, the sampling control circuit includes an error amplifier, an oscillator, and a peak current detector,
one input end of the error amplifier is connected with the sampling input end and used for outputting an error voltage signal;
the input end of the oscillator is connected with the output end of the error amplifier, receives the error amplification signal and outputs a clock signal according to the error amplification signal;
the peak current detector is connected with the output end of the error amplifier, receives the error amplification signal and provides a peak power reference signal according to the error amplification signal.
Preferably, the sampling control circuit further comprises:
the input end of the standby controller is connected with the output end of the error amplifier and used for receiving the error amplification signal, judging the load state according to the error amplification signal and outputting a standby control signal when the load is no-load; the standby control signal is used for intermittently starting the power supply control module to control the output of the switching power supply.
By adopting the technical scheme, the switching power supply is intermittently started through the standby controller so as to charge the output capacitor, so that the condition that the output capacitor is reduced due to standby loss and the output voltage is stabilized due to overlong standby time is prevented.
Preferably, the power wake-up module includes a second switch tube and a wake-up circuit, and the wake-up circuit includes:
the voltage detection input end is used for detecting a secondary side voltage signal of the secondary side loop;
and the awakening output end is coupled to the control end of the second switching tube and outputs an awakening control signal to control the second switching tube to be switched on or switched off.
Through adopting above-mentioned technical scheme, the power awakens the module and monitors the secondary circuit and control switching on and cutting off going on the second switch tube through awakening circuit, and then realizes that when the load adds suddenly, the power awakens the module and can in time awaken the power control module up.
Preferably, the wake-up circuit further comprises:
the input end of the conduction judging device is connected with the voltage detection input end and is used for judging whether the secondary side coil is in a working state or not and outputting a conduction judging signal;
the input end of the second timer is connected with the conduction judging device and used for acquiring a conduction judging signal and outputting a time awakening signal according to the conduction judging signal;
the input end of the third comparator is connected with the voltage detection input end and used for comparing the secondary side voltage signal and outputting a voltage wake-up signal according to the secondary side voltage signal;
the second timer is preset with a second timing duration, and the second timing duration is greater than the first timing duration.
By adopting the technical scheme, the conduction judging device is used for judging whether the secondary winding works or not, the third comparator is used for judging whether the secondary voltage signal changes or not, and meanwhile, the primary winding and the secondary winding are prevented from working simultaneously to cause the common phenomenon of the transformer by setting the second timer and setting the second timing duration to be greater than the first timing duration.
In a second aspect, the present application provides a switching power supply applying the above output control system, which includes a first switching tube, a primary side loop, a secondary side loop and an auxiliary loop,
the primary side loop comprises a rectifier, a primary side coil and a primary side detection resistor, the primary side coil and the primary side detection resistor are arranged between the rectifier and the ground in series, the first switch tube is coupled between the primary side coil and the detection resistor, and a current detection input end is coupled to one end of the primary side detection resistor coupled with the first switch tube;
the secondary side loop comprises a secondary side coil and an output capacitor, and two ends of the output capacitor are used for connecting a load;
the auxiliary loop comprises an auxiliary coil, a first voltage-dividing resistor and a second voltage-dividing resistor, wherein the first voltage-dividing resistor and the second voltage-dividing resistor are arranged at two ends of the auxiliary coil in parallel, the first voltage-dividing resistor and the second voltage-dividing resistor are connected in series, and a sampling input end is coupled between the first voltage-dividing resistor and the second voltage-dividing resistor.
In a third aspect, the present application provides a control method for an output control system, which adopts the following technical solutions:
a sampling control method based on the output control system of the first aspect, comprising:
s1, acquiring a primary side current signal and a sampling voltage signal;
s2, judging whether the switching power supply is in an operating state, if so, repeating the step S1, and if not, executing the following steps;
s3, the power supply control module transfers the output control right of the switching power supply to the power supply awakening module;
s4, acquiring a secondary side voltage signal;
s5, judging whether the timing duration of the second timer is greater than the second timing duration, if so, enabling a time awakening signal output by the second timer to be at a high level, and if not, enabling the time awakening signal output by the second timer to be at a low level;
s6, judging whether the secondary side sampling signal is smaller than a third reference voltage, if so, determining that a voltage wake-up signal of a third comparator is at a high level, and if not, determining that the voltage wake-up signal of the third comparator is at a low level;
and S7, if the judgment results of S5 and S6 are both yes, outputting a wake-up control signal, and transferring the control right of the switching power supply to the power supply control module.
Preferably, said S5 and S6 are performed simultaneously.
Preferably, the S2 specifically includes the following steps:
judging whether the output control of the switching power supply is controlled by the power supply control module according to the feedback control signal and the timing duration of the first timer, and according to a judgment result, judging a second response signal;
judging whether the power control module is awakened or not according to the sampling voltage signal and the second response signal, and outputting a third response signal according to a judgment result;
and judging whether the switching power supply is in the running state or not according to the second response signal and the third response signal, and outputting a control signal according to the clock signal and the peak power reference signal.
In a fourth aspect, the present application provides a control chip, which adopts the following technical scheme:
a control chip comprising a power control chip comprising the power control module of the output control system according to the first aspect and a wake-up control chip comprising the power wake-up module of the output control system according to the first aspect.
In summary, the present application includes at least one of the following beneficial technical effects:
1. the power supply awakening module in the secondary loop is arranged, so that the secondary loop does not adopt a damping mode any more, but controls the output of the switching power supply by matching the power supply awakening module with the power supply control module, and when the working mode of the switching power supply is changed, the power supply control module and the power supply awakening module correspondingly mediate the working mode, so that the working efficiency and the circuit safety of the switching power supply are improved while the standby power consumption of the switching power supply is reduced;
2. the second timing duration is set to be longer than the first timing duration, so that the situation that the transformers are shared is avoided;
3. through setting up standby controller to realize that switching power supply can intermittent type nature operation charges for output capacitance under long-time standby state, thereby stabilize output voltage.
Drawings
Fig. 1 is a circuit diagram of a flyback switching power supply in an embodiment of the present application;
fig. 2 is a schematic circuit structure diagram of a main control module of the flyback switching power supply in the embodiment of the present application;
fig. 3 is a partial waveform diagram of a standby state of the flyback switching power supply in the embodiment of the present application;
fig. 4 is a schematic circuit diagram of a wake-up receiving circuit of the flyback switching power supply in the embodiment of the present application;
fig. 5 is a schematic circuit diagram of a wake-up circuit of a flyback switching power supply in an embodiment of the present application;
fig. 6 is a partial waveform diagram of the operation of the flyback switching power supply in the embodiment of the present application when the flyback switching power supply is switched from no-load to load;
fig. 7 is a control flowchart of an output control method of the flyback switching power supply in the embodiment of the present application.
Description of reference numerals: 100. a power supply control module; 110. a main control unit; 111. a sampling control circuit; 112. waking up the receiving circuit; 200. A power wake-up module; 201. and a wake-up circuit.
Detailed Description
The present application is described in further detail below with reference to figures 1-7 of the drawings.
The embodiment of the application discloses a flyback switching power supply. As shown in fig. 1, the switching power supply includes a transformer and an output control system for improving a load regulation rate; wherein the transformer includes primary side return circuit, vice limit return circuit and auxiliary circuit, and output control system includes:
the power supply control module 100 is arranged in the primary loop and the auxiliary loop and used for monitoring the load state, adjusting the working frequency (conduction duty ratio) according to the change of the load state and stabilizing the output voltage VOUT of the power supply;
and a power wake-up module 200, disposed in the secondary loop, for monitoring the load state and outputting a wake-up control signal SW2 according to the change of the load state, wherein the power control module 100 responds to the wake-up control signal SW2.
When the power control module 100 monitors that the load is changed from a heavy load to a light load, the power control module 100 reduces the working frequency;
when the power control module 100 monitors that the load is changed from the on-load state to the no-load state, the power control module 100 turns off the output control, and the output control of the switching power supply is transferred from the power control module 100 to the power wake-up module 200 for control;
when the power wake-up module 200 detects that the load is changed from no-load to on-load, the power wake-up module 200 outputs a wake-up control signal SW2 to wake up the power control module 100, and the power control module controls the output of the switching power supply again.
The power control module 100 includes a first switch tube M1 for controlling whether the primary loop is turned on or not, and a main control unit 110 coupled between the first switch tube M1 and the auxiliary loop. The first switching tube M1 is connected in series in the primary side loop, and when the first switching tube M1 is conducted, the primary side loop is conducted; when the first switching tube M1 is turned off, the primary side loop is disconnected. The on/off of the first switching tube M1 is controlled by the main control unit 110, and the main control unit 110 regulates the output of the switching power supply by regulating the on/off of the first switching tube M1.
Referring to fig. 1, the main control unit 110 includes a sampling input VS1 in Current detection input terminal CS in And a control output terminal SW1 out Sampling input VS1 in The sampling voltage signal VS1 is connected to the auxiliary loop and used for acquiring a sampling voltage signal VS1 on the auxiliary loop; current detection input terminal CS in The primary side circuit is connected and used for detecting a primary side current signal CS generated when the primary side circuit is conducted; control output terminal SW1 out The output control signal SW1 is coupled to the first switch tube M1 for controlling the on/off of the first switch tube M1. The main control unit 110 adaptively adjusts the working frequency according to the current output voltage VOUT (the output voltage VOUT and the working frequency are set according to the power supply requirement of the load) and samples the input end VS1 in The input voltage value determines the change of the load state, thereby outputting a control signal SW1 to controlThe first switching tube M1 is switched on or off, so that the working frequency of the switching power supply is adjusted or the working state of the switching power supply is switched; the operating state of the switching power supply includes an operating state when the switching power supply is loaded and a standby state when the switching power supply is unloaded. When the main control unit 110 detects that the load is converted from a heavy load to a light load, the main control unit 110 controls to reduce the conduction duty ratio of the first switching tube M1 or reduce the system working frequency; when the main control unit 110 detects that the load is changed from a light load to a heavy load, the main control unit 110 increases the conduction occupation of the first switching tube M1 or increases the system working frequency by controlling; when the main control unit 110 detects that the load is converted from the on-load state to the no-load state, the switching power supply is in the standby state, the main control unit 110 enters the standby mode, the system intermittently operates at the lowest frequency, and the output control of the switching power supply is controlled by the power supply wake-up module 200.
Referring to fig. 1, the power wake-up module 200 includes a second switch tube M2 and a wake-up circuit 201, the wake-up circuit 201 is configured to detect a secondary side voltage signal VS2 of a secondary side loop, and output a wake-up control signal SW2 according to a change of the secondary side voltage signal VS2, where the wake-up control signal SW2 is configured to control on or off of the second switch tube M2, so as to wake up the power control module 100. The second switch tube M2 includes, but is not limited to, a MOS transistor and a triode, and in the embodiment of the present application, the second switch tube M2 is shown as an NMOS transistor. The wake-up circuit 201 determines the load status according to the secondary side voltage signal VS2, when the wake-up circuit 201 determines that the load is changed from no-load to load, the output voltage VOUT drops rapidly due to sudden load increase, and when the wake-up circuit 201 detects that the secondary side voltage signal VS2 is lower than the predetermined value, the wake-up control signal SW2 output by the wake-up circuit 201 is at a high level, and at this time, the second switch M2 is turned on.
Referring to fig. 1, in particular, the primary side loop includes a bridge rectifier for rectifying an input ac power and a primary side coil NP having one end coupled to the rectifier, where the other end of the primary side coil NP is connected to a primary side detection resistor RCS and the other end of the primary side detection resistor RCS is grounded. A first switch tube M1 coupled between the primary coil NP and the primary detection resistor RCS, and a current detection input terminal CS in A first switch tube M1 coupled to the primary side detection resistor RCSAnd (4) an end. In this embodiment, the first switch tube M1 is shown as an NMOS tube, a drain of the first switch tube M1 is coupled to the primary winding NP, a source of the first switch tube M1 is coupled to the primary detection resistor RCS, a gate of the first switch tube M1 is coupled to the control output terminal SW1 of the main control unit 110 out And (4) coupling. When the control signal SW1 output by the main control unit 110 is at a low level, the first switching tube M1 is turned off, and the primary side loop is turned off, and when the control signal SW1 output by the main control unit 110 is at a high level, the first switching tube M1 is turned on, and the primary side loop is turned on.
The secondary circuit comprises a secondary coil NS and an output capacitor C1 which are mutually connected in parallel, the secondary coil NS and the primary coil NP are mutually coupled and induced, and two ends of the output capacitor C1 are connected with a load in parallel. When the primary loop is switched on, a current flows through the primary detection resistor RCS, the main control unit 110 performs sampling detection on the current flowing through the primary detection resistor RCS, at this time, the primary coil NP stores energy, the secondary coil NS and the auxiliary coil NA do not work, and the output capacitor C1 supplies power to a load.
The auxiliary loop comprises an auxiliary coil NA mutually coupled and induced with a primary coil NP and a secondary coil NS, a first voltage dividing resistor R1 and a second voltage dividing resistor R2 are coupled to two ends of the auxiliary coil NA, the first voltage dividing resistor R1 and the second voltage dividing resistor R2 are connected in series and then connected in parallel with the auxiliary coil NA, and a sampling input end VS1 of the main control unit 110 in The coupling is between the first voltage dividing resistor R1 and the second voltage dividing resistor R2, so that the main control unit 110 obtains a sampling voltage signal VS1 divided by the first voltage dividing resistor R1 and the second voltage dividing resistor R2 in the auxiliary circuit, and the main control unit 110 determines the load status according to the sampling voltage signal VS1.
Referring to fig. 1, in order to facilitate the normal power supply of the power control module 100, the main control unit 110 is provided with a power input terminal VCC in Power input terminal VCC in Coupled to one end of the auxiliary coil NA; power supply input VCC in The energy storage capacitor C2 is coupled, and the other end of the energy storage capacitor C2 is grounded, so that when the auxiliary circuit supplies power to the power control module 100, the energy storage capacitor C2 is charged. A rectifier diode D1 is coupled between the energy storage capacitor C2 and the auxiliary coil NAThe positive pole of D1 is connected with auxiliary winding, and rectifier diode D1's negative pole is connected with power control module 100 and energy storage capacitor C2's connected node to when energy storage capacitor C2 discharges the power supply to power control module 100, energy storage capacitor C2 output current can not flow to auxiliary circuit.
Referring to fig. 1 and2, the main control unit 110 includes a sampling control circuit 111 and a wake-up receiving circuit 112, wherein the sampling control circuit 111 includes an error amplifier EA, a STANDBY controller STANDBY, an oscillator OSC, and a peak current detector CST. Wherein, one input end of the error amplifier EA and the sampling input end VS1 in And the other input end of the error amplifier EA is connected with a first reference voltage VREF1, and the error amplifier EA outputs an error voltage signal EAOUT according to the first reference voltage VREF1 and the sampling voltage signal VS1.
Referring to fig. 2 and 3, the STANDBY controller STANDBY determines whether the switching power supply is in a STANDBY state, and an input terminal of the STANDBY controller STANDBY is connected to an output terminal of the error amplifier EA, and is configured to receive an error voltage signal EAOUT output by the error amplifier EA and output a STANDBY control signal Sout according to the error voltage signal EAOUT. The STANDBY controller STANDBY is preset with a judgment voltage value, and when the input error voltage signal EAOUT is higher than the judgment voltage value, the STANDBY controller STANDBY judges that the switching power supply is in an operating state, and at this time, the STANDBY controller STANDBY does not work, and the STANDBY control signal Sout which is not output by the STANDBY controller STANDBY does not work or can be understood as the STANDBY control signal Sout is at a low level. When the input error voltage signal EAOUT is smaller than the judgment voltage value, the STANDBY controller STANDBY judges that the switching power supply is in a STANDBY state, the STANDBY controller STANDBY works at the moment, the STANDBY controller STANDBY outputs a STANDBY control signal Sout, and the STANDBY control signal Sout is a high-low level switching signal with a small conduction duty ratio. When switching power supply was in STANDBY state, the system had stand-by power consumption, and stand-by power consumption can lead to output capacitance C1's electric energy to descend, leads to output voltage VOUT to descend promptly, and for guaranteeing output voltage VOUT is stable, through STANDBY controller STANDBY control switching power supply intermittent type nature work, for output capacitance C1 charges to stable output voltage VOUT.
Referring to fig. 2, an input terminal of the oscillator OSC is connected to an output terminal of the error amplifier EA, and is configured to receive an error voltage signal EAOUT output by the error amplifier EA and output a clock signal CLK according to the error voltage signal EAOUT. The input terminal of the peak current detector CST is also coupled to the output terminal of the error amplifier EA, and is configured to receive the error voltage signal EAOUT output by the error amplifier EA and provide an appropriate peak power reference signal VSCT according to the error voltage signal EAOUT.
Referring to fig. 1 and 4, the wake-up receiving circuit 112 includes an input and a sampling input VS1 in And the other input end of the first comparator CMP1 inputs a second reference voltage VREF2, and the first comparator CMP1 outputs a first response signal S1 according to the sampling voltage signal VS1 and the second reference voltage VREF 2. In the embodiment of the application, a non-inverting input terminal of a first comparator CMP1 obtains a second reference voltage VREF2, and an inverting input terminal of the first comparator CMP1 obtains a sampling voltage signal VS1; when the input sampling voltage signal VS1 is greater than the second reference voltage VREF2, the first response signal S1 output by the first comparator CMP1 is at a low level, and when the input sampling voltage signal VS1 is less than the second reference voltage VREF2, the first response signal S1 output by the first comparator CMP1 is at a high level. The wake-up receiving circuit 112 further comprises an input and control output SW1 out The output end of the first NOT1 is connected with a first timer TD1, and the first timer TD1 is triggered by a high-level signal; that is, when the control signal SW1 is at a high level, the input of the first timer TD1 is a low level signal, and at this time, the first timer TD1 does not count time; when the control signal SW1 is at a low level, the input of the first timer TD1 is a high level signal, starts timing, and outputs the second response signal S2, so that the second response signal S2 output by the first timer TD1 is initially at a high level. The first timer TD1 is preset with a first timing duration tdly1, and a second response signal S2 output by the first timer TD1 in the first timing duration tdly1 is an inverted signal of the control signal SW1, that is, the output is a high level; after the first timing duration tdly1 is exceeded, the second response signal S2 output by the first timer TD1 is an in-phase signal of the control signal SW1, i.e. the output is a low level.
Referring to fig. 4, the output terminal of the first timer TD1 and the output terminal of the first comparator CMP1 are commonly connected to a first OR gate OR1, the output terminal of the first OR gate OR1 is connected to a second NOT gate NOT2, and the second NOT gate NOT2 outputs a third response signal S3. The first response signal S1 is an internal signal for waking up the receiving circuit 112, and the second response signal S2 and the third response signal S3 are output signals for waking up the receiving circuit 112.
Referring to fig. 1 AND2, the sampling control circuit 111 further includes a first AND gate AND1, a second OR gate OR2, AND a third OR gate OR3, two input terminals of the second OR gate OR2 are respectively used for obtaining the second response signal S2 AND the standby control signal Sout; one input end of the first AND gate AND1 is connected with the output end of the second OR gate OR2, AND the other input end of the first AND gate AND1 inputs the clock signal CLK; an input terminal of the third OR-gate OR3 is connected to the output terminal of the first AND-gate AND1, AND another input terminal of the third OR-gate OR3 receives the third response signal S3. The sampling control circuit 111 further includes a second comparator CMP2 and a flip-flop, wherein an input terminal of the second comparator CMP2 is coupled to the output terminal of the peak current detector CST, and another input terminal of the second comparator CMP2 is coupled to the current detection input terminal CS in (ii) a The output terminal of the second comparator CMP2 is coupled to an input terminal of the flip-flop, and another input terminal of the flip-flop is coupled to the output terminal of the third OR gate OR 3. In the embodiment of the present application, the non-inverting input terminal of the second comparator CMP2 obtains the primary current signal CS, the inverting input terminal of the second comparator CMP2 obtains the peak power reference signal VSCT, and when the primary current signal CS is greater than the peak power reference signal VSCT, the second comparator CMP2 outputs the low level signal. The flip-flop is an RS flip-flop, a set terminal S of the RS flip-flop is connected to an output terminal of the third OR gate OR3, a reset terminal R of the RS flip-flop is connected to an output terminal of the second comparator CMP2, and an output terminal Q of the RS flip-flop is a control output terminal SW1 of the main control unit 110 out The control signal SW1 is used for driving the first switch tube M1 to be turned on or off.
Referring to fig. 1 and 5, the wake-up circuit 201 includes a voltage detection input VS2 in And a wake-up output SW2 out Voltage detection input terminal VS2 in For detecting the secondary side voltage signal VS2 of the secondary side loop, the wake-up circuit 201 further comprises a conduction determiner YES/NO and a second timerTD2, input end of conduction judging device YES/NO and voltage detection input end VS2 in And when the conduction judging signal S4 output by the conduction judging device YES/NO is at a high level, that is, when the secondary winding NS is operated (current flows), the second timer TD2 starts timing.
Referring to fig. 5, the second timer TD2 outputs a time wake-up signal S5, the second timer TD2 has a preset second timing duration tdly2, and the second timing duration tdly2 is set according to the energy storage capacity of the output capacitor C1. The output capacitor C1 is a large capacitor, even if the load suddenly increases, depending on the maximum current I that can be supplied by the secondary circuit max For the load to work, the output capacitor C1 can also supply power for a certain time,
according to the capacitor power supply time t = (c u)/I; then:
t min =（c*∆u）/I max ，
wherein, t min The minimum power supply time of the output capacitor C1, and the capacitance of the output capacitor C1, and the limit value of the drop of the output voltage VOUT of the secondary loop. When the load suddenly increases, the output capacitor C1 is at the maximum current I max The continuous power supply time of the output capacitor C1 is t min Therefore, the second timing duration tdly2 can refer to t min In the embodiment of the present application, the second timing duration tdly2 is preferably t min 80% of the total.
In the second timing duration tdly2, the time wake-up signal S5 output by the second timer TD2 is at a low level, and after the second timing duration tdly2 is exceeded, the time wake-up signal S5 output by the second timer TD2 is at a high level, so that it is known that the time wake-up signal S5 is at a low level initially.
Referring to fig. 1 and 5, the wake-up circuit 201 further includes a voltage detection input VS2 in A third voltage dividing resistor R3 and a fourth voltage dividing resistor R4 connected in series at the voltage detection input VS2 in And the ground; a third comparator CMP3 is coupled between the third voltage dividing resistor R3 and the fourth voltage dividing resistor R4, and an input terminal of the third comparator CMP3 is coupled between the third voltage dividing resistor R3 and the fourth voltage dividing resistor R4, for obtaining the secondary side sampling signal VS _ out. In the embodiment of the present application, an inverting input terminal of the third comparator CMP3 is coupled between the third voltage dividing resistor R3 and the fourth voltage dividing resistor R4, a non-inverting input terminal of the third comparator CMP3 inputs the third reference voltage VREF3, and the third comparator CMP3 compares the secondary side sampling signal VS _ out with the third reference voltage VREF3 to output the voltage wake-up signal S6. When a load is added to the secondary loop, the secondary loop output voltage VOUT drops rapidly due to power consumption of the load, and when the third reference voltage VREF3 input to the non-inverting input terminal of the third comparator CMP3 is greater than the secondary sampling signal VS _ out input to the inverting input terminal of the third comparator CMP3, the voltage wake-up signal S6 output by the third comparator CMP3 is at a high level.
Referring to fig. 1 AND 5, the wake-up circuit 201 further includes a second AND gate AND2, an input terminal of the second AND gate AND2 is respectively connected to an output terminal of the third comparator CMP3 AND an output terminal of the second timer TD2, AND an output terminal of the second AND gate AND2 is a wake-up output terminal SW2 out . When the third comparator CMP3 AND the second timer TD2 both output high level signals, the wake-up control signal SW2 output by the second AND gate AND2 is high level.
Referring to fig. 1 and 6, in the architecture system of the switching power supply, in order to reduce the loss of the switching power supply, a synchronous rectifier is used instead of a diode, so as to improve the system efficiency and reduce the power consumption, but the phenomenon that a power transformer is common (i.e., a primary winding NP and a secondary winding NS work simultaneously) is caused when the synchronous rectifier is improperly controlled, so that the transformer is broken down and damaged. The output power and the stability of the switching power supply are realized by the conduction duty ratio of the first switching tube M1 and the system operating frequency, so that the first switching tube M1 does not necessarily represent that the load is in an idle load state when being turned off, and in order to prevent the power supply control module 100 from misjudging that the load is in the idle load and the primary coil NP and the secondary coil NS are simultaneously operated to cause the situation that the transformer is possibly broken down, therefore, a first timing duration tdly1 preset by the first timer TD1 is less than a second timing duration tdly2 preset by the second timer TD2, that is, tdly1 is less than tdly2.
When the first switching tube M1 is turned off, that is, when the primary winding NP is turned off and the secondary winding NS starts to operate, the first timer TD1 and the second timer TD2 start to count time at the same time. When the time (i.e., the timing duration) when the first switch tube M1 is turned off is within the first timing duration tdly1 of the first timer TD1, the second response signal S2 output by the first timer TD1 is a high level signal, at this time, the level signal output by the first AND gate AND1 is controlled by the oscillator OSC, AND meanwhile, the wake-up signal S3 received by the third OR gate OR3 is a low level, so that whether the control signal SW1 output by the main control unit 110 is a high level OR a low level is still controlled by the power control module 100.
When the timing duration reaches the first timing duration tdly1, and the output EAOUT of the STANDBY controller STANDBY is smaller than the preset voltage value, the switching power supply enters a STANDBY state, the second response signal S2 output by the first timer TD1 is a low level signal, at this time, the STANDBY controller STANDBY starts to work, the STANDBY control signal Sout is output, and the system enters intermittent work at the lowest frequency to ensure stable output voltage VOUT. Therefore, at this time, the control signal SW1 output by the main control unit 110 is not controlled by the oscillator OSC, and the output of the switching power supply is controlled by the power wake-up module 200, that is, the output control right of the switching power supply is transferred from the power control module 100 to the power wake-up module 200, and the switching power supply enters the standby state.
When the switching power supply is in a standby state, the output control right of the switching power supply is controlled by the power supply awakening module 200; the STANDBY controller STANDBY of the main control unit 110 starts working, when the STANDBY control signal Sout is at a low level, the switching power supply is suspended and does not work, and the output voltage VOUT is provided by the output capacitor C1; when the output standby control signal Sout is at a high level, the switching power supply operates at the lowest frequency to stabilize the output voltage VOUT. Each low level duration of the STANDBY control signal Sout is smaller than the high level duration, and when the switching power supply is in a STANDBY state for a long time, the switching power supply enters an intermittent operation state through the STANDBY control signal Sout output by the STANDBY controller STANDBY to supply power to the output capacitor C1, so that the output voltage VOUT is kept stable.
When the timing time length reaches the first timing time length tdly1 but does not reach the second timing time length tdly2, if a load is connected, the load is powered by the output capacitor C1.
When the timing duration reaches the second timing duration tdly2, the second timer TD2 outputs a high level signal, AND the load is connected such that the secondary side sampling signal VS _ out is smaller than the third reference signal, the third comparator CMP3 outputs a high level signal, at this time, the wake-up control signal SW2 output by the second AND gate AND2 is at a high level, the second switching tube M2 is controlled to be turned on, the output voltage VOUT of the secondary side loop generates a positive voltage on the secondary side coil NS, the auxiliary coil NA senses the positive voltage through the coupling sensing of the transformer, the sampling voltage signal VS1 is a positive value AND is greater than the first reference signal, at this time, the first response signal S1 output by the first comparator CMP1 is at a low level, because the second response signal S2 output by the first timer TD2 is at a low level, the third response signal S3 outputs a high level signal, the third OR gate OR3 outputs a high level, the trigger S is set, so the sampling control signal SW1 output by the main control unit 110 is a high level signal, the first switching tube M1 is controlled to be turned on, at this time, the power supply output power supply control module 100 exits the standby control power supply control module.
The control principle of the switching power supply with the control circuit for improving the load regulation rate in the embodiment of the application is as follows: when the switching power supply is in a normal operation (operation state) with a load, the output control of the switching power supply is controlled by the power control module 100, the power control module 100 provides a working voltage from the auxiliary winding NA, the oscillator OSC provides a clock signal CLK according to an error voltage signal EAOUT output by the error amplifier EA, meanwhile, the peak current detector CST provides a proper peak current reference signal VCST according to the error voltage signal EAOUT, and at this time, the second response signal S2 output by the first timer TD1 is a high level signal, so the control signal SW1 output by the main control unit 110 is controlled by the clock signal CLK and the primary side current signal CS. When the load is changed from heavy load to light load or from light load to heavy load, the main control unit 110 adjusts the operating frequency or the on-duty ratio of the switching power supply according to the change of the primary circuit signal.
When the switching power supply is switched from the on-load state to the off-load state, when the primary coil NP is turned off and the secondary coil NS starts to work, the first timer TD1 and the second timer TD2 start to time at the same time, the STANDBY controller STANDBY judges whether the input error voltage signal EAOUT is smaller than the preset voltage value, when the time duration reaches the first time duration tdly1 and the EAOUT is smaller than the preset voltage value, the switching power supply enters the STANDBY state, and the output control of the switching power supply is transferred from the power supply control module 100 to the power supply wake-up module 200.
When the switching power supply is in a STANDBY state, the STANDBY controller STANDBY is started, and the STANDBY controller STANDBY outputs a preset STANDBY control signal Sout. Under the action of STANDBY controller STANDBY, power control module 100 intermittently controls the output of the switching power supply to charge energy storage capacitor C1, thereby stabilizing output voltage VOUT.
When the switching power supply is in a standby state, if the load suddenly increases, the output voltage VOUT rapidly decreases, so that the secondary side sampling signal VS _ out of the wake-up circuit 201 is smaller than the third reference voltage VREF3, and when the timing duration reaches the second timing duration tdly2, the wake-up control signal SW2 output by the wake-up circuit 201 is a high-level signal, and the second switching tube M2 is turned on; through the coupling induction of the transformer, the control signal SW1 output by the wake-up receiving circuit 112 is also at a high level, the first switching tube M1 is turned on, at this time, the primary winding NP starts to work, the power control module 100 exits the standby state, and the output of the switching power supply is controlled again by the power control module 100.
The embodiment of the application also discloses a control method for improving the load regulation rate. Referring to fig. 7, the control method includes the steps of:
s1, acquiring a primary current signal CS and a sampling voltage signal VS1.
In particular by sampling the input VS1 in Obtaining the sampling voltage signal VS1, that is, by setting a first voltage dividing resistor R1 and a second voltage dividing resistor R2 at two ends of the auxiliary coil NA, a sampling input end VS1 of the main control unit 110 in Coupled between the first voltage dividing resistor R1 and the second voltage dividing resistor R2, so that the sampling control circuit 111 collects the auxiliary voltageAnd a sampling voltage signal VS1 is obtained after voltage division is carried out through the first voltage dividing resistor R1 and the second voltage dividing resistor R2.
Through current detection input terminal CS in Obtaining the primary current signal CS, i.e. through a current detection input terminal CS of the main control unit 110 in The primary side detection resistor RCS is coupled to one end of the first switch tube M1, and detects the current flowing through the primary side detection resistor RCS.
And S2, judging whether the switching power supply is in the running state, if so, repeating the step S1, and if not, executing the following steps.
Specifically, the second timing period tdly2 is set according to the output capacitor C1, and the first timing period tdly1 is designed according to the second timing period tdly 2; the clock signal CLK of the oscillator OSC and the peak power reference signal VSCT of the peak current detector CST are set according to the output voltage VOUT, the error amplifier EA obtains an error voltage signal EAOUT according to the sampling voltage signal VS1, the oscillator OSC and the peak current detector CST output the clock signal CLK and the peak current reference signal VCST respectively according to the error voltage signal EAOUT, and the second comparator CMP2 outputs corresponding comparison signals according to the primary side current signal CS and the peak current reference signal VCST.
The awakening receiving circuit judges whether the output control of the switching power supply is controlled by the power supply control module according to the fed-back sampling control signal and the timing duration of the first timer, and a second response signal is obtained according to the judgment result. If the control signal SW1 is a high level signal, the first timer TD1 does not count time, and the second response signal S2 output by the first timer TD1 is a low level; if the control signal SW1 is a low electrical signal, the first timer TD1 starts timing, the second response signal S2 output by the first timer TD1 is at a high level, and when the timing duration reaches the first timing duration tdly1, the second response signal S2 output by the first timer TD1 is a low level signal.
The awakening receiving circuit judges whether the power supply control module is awakened or not according to the sampling voltage signal and the second response signal, and outputs a third response signal according to a judgment result.
The sampling control circuit judges whether the switching power supply is in the running state according to the second response signal and the third response signal, and outputs a control signal according to the clock signal and the peak power reference signal. The flip-flop outputs a control signal SW1 according to the comparison signal output by the second comparator CMP2 and the third response signal S3 output by the wake-up receiving circuit 112, and the output control signal SW1 is at a high level or a low level.
After the switching power supply is started and connected to a load, the power control module 100 provides a working voltage through an auxiliary loop, one end of the error amplifier EA inputs a first reference voltage VREF1, the other end of the error amplifier EA inputs a sampling voltage signal VS1, the oscillator OSC provides a clock signal CLK according to an error voltage signal EAOUT output by the error amplifier EA, meanwhile, the peak current detector CST provides a proper peak current reference signal VCST according to the error voltage signal EAOUT, and at this time, a second response signal S2 output by the first timer TD1 is a high-level signal, so that a control signal SW1 output by the main control unit 110 is controlled by the clock signal CLK and a primary side current signal CS, and the switching power supply is in a running state.
If the control signal SW1 is a high level signal, the first timer TD1 does not count time, the second response signal S2 output by the first timer TD1 is a low level, and when the switching power supply operates normally in a load state, the sampling voltage signal VS1 received by the wake-up receiving circuit 112 is a negative value, so that the first response signal S1 output by the first comparator CMP1 is a high level, at this time, the third response signal S3 is a low level, the control signal SW1 output by the main control unit 110 is controlled by the clock signal CLK and the primary side current signal CS, and the switching power supply is in an operating state.
If the control signal SW1 is a low level signal, the first timer TD1 starts timing, and the STANDBY controller STANDBY starts to determine a relationship between the input error voltage signal EAOUT and a preset voltage value; in the first timing duration tdly1, the second response signal S2 output by the first timer TD1 is at a high level, at this time, the third response signal S3 is at a low level, the control signal SW1 output by the sampling control circuit 111 is controlled by the clock signal CLK and the primary current signal CS, and the switching power supply is in a running state. If the timing duration reaches the first timing duration tdly1, the second response signal S2 output by the first timer TD1 is at a low level, at this time, the control signal SW1 output by the main control unit 110 is controlled by the STANDBY control signal SOUT output by the STANDBY controller STANDBY, and if the STANDBY controller STANDBY determines that the input error voltage signal EAOUT is smaller than the preset voltage value, the switching power supply enters a STANDBY state.
And S3, the power control module 100 transfers the switching power output control right to the power awakening module 200.
Specifically, after the switching power supply enters the standby state, the output control of the switching power supply is controlled by the third response signal S3 output by the wake-up circuit 201, that is, the power control module 100 no longer adjusts and controls the output of the switching power supply in real time, but is controlled by the power wake-up module 200. The power control module 100 does not transfer the control right of the output of the switching power supply to represent that the power control module 100 is completely turned off and does not work, in order to prevent the switching power supply from being in a STANDBY state for a long time, the output voltage VOUT of the output capacitor C1 is reduced due to the consumption of STANDBY power consumption, after the switching power supply enters the STANDBY state, the STANDBY controller STANDBY starts to work, and the switching power supply intermittently enters the running state through the STANDBY controller STANDBY to charge the output capacitor C1.
And S4, acquiring a secondary side voltage signal VS2.
Specifically, the input terminal VS2 is detected by voltage in The secondary side circuit is coupled to obtain a secondary side voltage signal VS2.
And S5, judging whether the timing duration of the second timer TD2 is greater than the second timing duration tdly2, if so, setting the time wake-up signal S5 output by the second timer TD2 to be at a high level, and if not, setting the time wake-up signal S5 output by the second timer TD2 to be at a low level.
Specifically, the third reference voltage VREF3 is set, the conduction determiner YES/NO determines whether the secondary winding NS is in the operating state according to the secondary voltage signal VS2, and when the conduction determiner YES/NO outputs a high level signal, that is, the secondary winding NS is operated (current flows), at this time, the second timer TD2 starts to count time, and outputs the time wakeup signal S5. The second timer TD2 presets a second timer period tdly2 according to the capacitance of the output capacitor C1, and the output capacitor C1 is a large capacitor, even if the load suddenly increases, depending on the maximum current I that can be supplied by the secondary circuit max To supply load workThe output capacitor C1 can also supply power to the load for a certain time.
According to the capacitor power supply time t = (c u)/I; then:
t min =（c*∆u）/I max ，
wherein, t min The minimum power supply time of the output capacitor C1, C the capacitance of the output capacitor C1, and Δ u the limit value of the drop of the output voltage VOUT of the secondary loop. The second timing period tdly2 is referred to t min The setting is performed. When the timing duration of the second timer TD2 reaches the second timing duration tdly2, the time wake-up signal S5 is at a high level, and when the timing duration of the second timer TD2 does not reach the second timing duration tdly2, the time wake-up signal S5 is at a low level.
And S6, judging whether the secondary side sampling signal VS _ out is smaller than a third reference voltage VREF3, if so, the voltage wake-up signal S6 of the third comparator CMP3 is at a high level, and if not, the voltage wake-up signal S6 of the third comparator CMP3 is at a low level.
Specifically, at the voltage detection input VS2 in And the third voltage dividing resistor R3 and the fourth voltage dividing resistor R4 are arranged in series between the ground, and an input end of the third comparator CMP3 is coupled between the third voltage dividing resistor R3 and the fourth voltage dividing resistor R4, and is used for obtaining the secondary side sampling signal VS _ out. The third comparator CMP3 obtains the secondary sampling signal VS _ out according to the secondary voltage signal VS2, and compares the secondary sampling signal VS _ out with a third reference voltage VREF3 to output a voltage wake-up signal S6. When the secondary side sampling signal VS _ out is smaller than the third reference voltage VREF3, it indicates that the load is suddenly added to make the output voltage VOUT rapidly drop and lower than the third reference voltage VREF3, and the voltage wake-up signal S6 of the third comparator CMP3 is at a high level. When the secondary side sampling signal VS _ out is greater than the third reference voltage VREF3, it indicates that no load is added or a load is added but still powered by the output capacitor C1, and at this time, the voltage wake-up signal S6 of the third comparator CMP3 is at a low level.
It should be noted that: the step 5 and the step 6 are not in sequence and are carried out simultaneously.
And S7, if the judgment results of S5 and S6 are both yes, outputting a wake-up control signal, and transferring the control right of the switching power supply to the power supply control module 100.
Specifically, the second AND gate AND2 outputs the wake-up control signal SW2 according to the time wake-up signal S5 output by the second timer TD2 AND the voltage wake-up signal S6 output by the third comparator CMP3, AND the wake-up control signal SW2 is at a high level only when both the time wake-up signal S5 AND the voltage wake-up signal S6 are at a high level according to the logic of the second AND gate AND 2.
That is, when the switching power supply enters the standby state, if the timing duration reaches the second timing duration tdly2 and the load is added to make the output voltage VOUT drop, that is, the secondary side sampling signal VS _ out is smaller than the third reference voltage VREF3, the wake-up control signal SW2 output by the wake-up circuit 201 is at a high level, and at this time, the wake-up control signal SW2 drives the second switching tube M2 to be turned on. The output voltage VOUT of the secondary loop generates a positive voltage at the secondary winding NS, and the auxiliary winding NA induces the positive voltage by the coupling induction of the transformer, so that the switching power supply exits the standby state, and the power supply control module 100 controls the output of the switching power supply again. If the timing duration does not reach the second timing duration tdly2 or the secondary side sampling signal VS _ out is higher than the third reference voltage VREF3, the switching power supply is still in the standby state, and the load is still powered by the output capacitor C1.
The embodiment of the application also discloses an output control chip of the flyback switching power supply. The control chip comprises a power control chip and a wake-up control chip, wherein the power control chip integrates a sampling control circuit 111, a wake-up receiving circuit 112 and a first switching tube M1, can acquire a primary current signal CS on a primary loop and a sampling voltage signal VS1 on an auxiliary loop, judges the state of a load and the output voltage VOUT of the auxiliary loop by detecting the primary current signal CS and the sampling voltage signal VS1, and can receive and respond to a wake-up control signal SW2 output by the wake-up control chip, so that the output control of the working frequency of the power control chip on the switching power supply is adjusted. The wake-up control chip integrates the wake-up circuit 201 and the second switching tube M2, and is capable of sampling the secondary sampling voltage signal VS1 in the secondary loop and outputting the wake-up control signal SW2 according to the secondary sampling signal VS _ out. Similarly, the sampling control circuit 111, the wake-up receiving circuit 112, the first switch tube M1, the wake-up circuit 201, and the second switch tube M2 may also be separately disposed.
The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: equivalent changes in structure, shape and principle of the present application shall be covered by the protection scope of the present application.

Claims (11)

1. An output control system of a flyback switching power supply is characterized in that: the method comprises the following steps:
the power supply control module (100) is arranged in the primary side loop and the auxiliary loop and is used for monitoring the load state, adjusting the working frequency according to the change of the load state and stabilizing the output voltage of the power supply;
the power supply awakening module (200) is arranged in the secondary side loop and used for monitoring the load state and outputting an awakening control signal according to the change of the load state, and the power supply control module (100) responds to the awakening control signal;
the power supply control module (100) comprises a first switching tube for controlling whether a primary circuit is conducted or not and a main control unit (110) coupled between the first switching tube and an auxiliary circuit, wherein the main control unit (110) is connected with a control end of the first switching tube and is used for controlling the first switching tube to be conducted or cut off;
the master control unit (110) comprises:
the sampling input end is connected to the auxiliary loop and used for acquiring a sampling voltage signal on the auxiliary loop;
the current detection input end is connected to the primary side loop and used for detecting a primary side current signal generated when the primary side loop is conducted;
the control output end is coupled with the first switch tube and outputs a control signal to control the on-off of the first switch tube;
the sampling control circuit (111) is connected with the sampling input end and used for acquiring a sampling voltage signal, judging the load state according to the sampling voltage signal and outputting a control signal;
a wake-up receiving circuit (112), one input end of which is connected with the sampling input end and is used for acquiring a sampling voltage signal, and the other input end of which is connected with the control output end and is used for feeding back a control signal and judging whether the load state of the switching power supply changes or not according to the sampling voltage signal and the control signal;
when the power supply control module (100) monitors that a load is in a loaded running state, the power supply control module (100) controls the output of the switching power supply;
when the power supply control module (100) monitors that the load is changed from loaded to unloaded, the output of the switching power supply is controlled by the power supply awakening module (200);
when the power supply awakening module (200) monitors that the load is converted from no-load to on-load, the power supply awakening module (200) outputs an awakening control signal to awaken the power supply control module (100), and the output control right of the switching power supply is controlled by the power supply control module (100).
2. The output control system of the flyback switching power supply of claim 1, wherein: the wake-up receiving circuit (112) comprises a first timer and a first comparator,
an input end of the first comparator is connected with the sampling input end and used for outputting a first response signal;
the first timer is preset with a first timing duration, the input end of the first timer is connected with a first not gate, the input end of the first not gate is connected with the control output end, and the first timer is triggered by a high level and used for outputting a second response signal;
the output ends of the first timer and the first comparator are connected with a first OR gate together, the output end of the first OR gate is connected with a second NOT gate, and the second NOT gate outputs a third response signal according to the first response signal and the second response signal;
and the sampling control circuit (111) receives the second response signal and the third response signal, judges whether to close the output control of the switching power supply according to the second response signal, and judges whether to awaken the output control of the switching power supply according to the third response signal.
3. The output control system of the flyback switching power supply of claim 2, wherein: the sampling control circuit (111) comprises an error amplifier, an oscillator and a peak current detector,
one input end of the error amplifier is connected with the sampling input end and used for outputting an error voltage signal;
the input end of the oscillator is connected with the output end of the error amplifier, receives the error amplification signal and outputs a clock signal according to the error amplification signal;
the peak current detector is connected with the output end of the error amplifier, receives the error amplification signal and provides a peak power reference signal according to the error amplification signal.
4. The output control system of the flyback switching power supply of claim 3, wherein: the sampling control circuit (111) further comprises:
the input end of the standby controller is connected with the output end of the error amplifier and used for receiving the error amplification signal, judging the load state according to the error amplification signal and outputting a standby control signal when the load is no-load; the standby control signal is used for intermittently starting the power supply control module (100) to control the output of the switching power supply.
5. The output control system of the flyback switching power supply of claim 2, wherein: the power wake-up module (200) comprises a second switch tube and a wake-up circuit (201), wherein the wake-up circuit (201) comprises:
the voltage detection input end is used for detecting a secondary side voltage signal of the secondary side loop;
and the awakening output end is coupled to the control end of the second switching tube and outputs an awakening control signal to control the second switching tube to be switched on or switched off.
6. The output control system of the flyback switching power supply of claim 5, wherein: the power wake-up circuit (201) further comprises:
the input end of the conduction judging device is connected with the voltage detection input end and is used for judging whether the secondary side coil is in a working state or not and outputting a conduction judging signal;
the input end of the second timer is connected with the conduction judging device and used for acquiring a conduction judging signal and outputting a time awakening signal according to the conduction judging signal;
the input end of the third comparator is connected with the voltage detection input end and used for comparing the secondary side voltage signal and outputting a voltage wake-up signal according to the secondary side voltage signal;
the second timer is preset with a second timing duration, and the second timing duration is greater than the first timing duration.
7. A switching circuit to which an output control system of a flyback switching power supply according to any one of claims 1 to 6 is applied, characterized in that: comprises a first switch tube, a primary side loop, a secondary side loop and an auxiliary loop,
the primary side loop comprises a rectifier, a primary side coil and a primary side detection resistor, the primary side coil and the primary side detection resistor are arranged between the rectifier and the ground in series, the first switch tube is coupled between the primary side coil and the detection resistor, and a current detection input end is coupled to one end of the primary side detection resistor coupled with the first switch tube;
the secondary side loop comprises a secondary side coil and an output capacitor, and two ends of the output capacitor are used for connecting a load;
the auxiliary loop comprises an auxiliary coil, and a first voltage-dividing resistor and a second voltage-dividing resistor which are arranged at two ends of the auxiliary coil in parallel, wherein the first voltage-dividing resistor and the second voltage-dividing resistor are connected in series, and a sampling input end coupler is coupled between the first voltage-dividing resistor and the second voltage-dividing resistor.
8. An output control method based on the output control system of the flyback switching power supply as claimed in any one of claims 1 to 6, characterized in that: the method comprises the following steps:
s1, acquiring a primary side current signal and a sampling voltage signal;
s2, judging whether the switching power supply is in an operating state, if so, repeating the step S1, and if not, executing the following steps;
s3, the power supply control module (100) transfers the output control right of the switching power supply to the power supply awakening module (200);
s4, acquiring a secondary side voltage signal;
s5, judging whether the timing duration of the second timer is greater than the second timing duration, if so, enabling a time awakening signal output by the second timer to be at a high level, and if not, enabling the time awakening signal output by the second timer to be at a low level;
s6, judging whether the secondary side sampling signal is smaller than a third reference voltage, if so, determining that a voltage wake-up signal of a third comparator is at a high level, and if not, determining that the voltage wake-up signal of the third comparator is at a low level;
and S7, if the judgment results of S5 and S6 are both yes, outputting a wake-up control signal, and transferring the control right of the switching power supply to the power supply control module (100).
9. The output control method according to claim 8, characterized in that: the S5 and S6 are performed simultaneously.
10. The output control method according to claim 8, characterized in that:
judging whether the output control of the switching power supply is controlled by a power supply control module (100) according to the feedback control signal and the timing duration of the first timer, and outputting a second response signal according to a judgment result;
judging whether the power control module (100) is awakened or not according to the sampling voltage signal and the second response signal, and outputting a third response signal according to a judgment result;
and judging whether the switching power supply is in the running state or not according to the second response signal and the third response signal, and outputting a control signal according to the clock signal and the peak power reference signal.
11. The utility model provides a flyback switching power supply's output control chip which characterized in that: comprising a power control chip comprising a power control module (100) of an output control system according to any of the claims 1 to 6 and a wake-up control chip comprising a power wake-up module (200) of an output control system according to any of the claims 1 to 6.
CN202210709887.6A 2022-06-22 2022-06-22 Flyback switching power supply and output control system, method and chip thereof Active CN114825969B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210709887.6A CN114825969B (en) 2022-06-22 2022-06-22 Flyback switching power supply and output control system, method and chip thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210709887.6A CN114825969B (en) 2022-06-22 2022-06-22 Flyback switching power supply and output control system, method and chip thereof

Publications (2)

Publication Number Publication Date
CN114825969A CN114825969A (en) 2022-07-29
CN114825969B true CN114825969B (en) 2022-10-18

Family

ID=82520962

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210709887.6A Active CN114825969B (en) 2022-06-22 2022-06-22 Flyback switching power supply and output control system, method and chip thereof

Country Status (1)

Country Link
CN (1) CN114825969B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115940587B (en) * 2023-03-14 2023-07-14 深圳市凌康技术有限公司 Power supply, output load adjustment rate compensation circuit and voltage adjustment method thereof
CN116131628B (en) * 2023-04-17 2023-07-14 深圳市力生美半导体股份有限公司 Switching power supply and lamp turning control system and chip thereof

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101355256A (en) * 2008-06-04 2009-01-28 李幸 Electric power system for power adapter capable of intelligent dormancy and awakening
CN201667612U (en) * 2010-01-22 2010-12-08 青岛海信电器股份有限公司 Intermittent frequency-hopping standby control power supply circuit and television
CN102118111A (en) * 2009-12-31 2011-07-06 技领半导体(上海)有限公司 Integrated control circuit, method and switch power supply of primary side regulator
CN102291000A (en) * 2011-08-29 2011-12-21 上海新进半导体制造有限公司 Switch power supply integrated circuit
CN103312176A (en) * 2012-03-12 2013-09-18 凌力尔特公司 Isolated flyback converter with sleep mode for light load operation
CN104300793A (en) * 2014-07-17 2015-01-21 矽力杰半导体技术(杭州)有限公司 Control method and control circuit for improving load dynamic response and switching power supply
CN104967317A (en) * 2014-03-31 2015-10-07 意法半导体股份有限公司 Power switching converter
EP2983283A1 (en) * 2014-08-08 2016-02-10 STMicroelectronics Srl Isolated dc/dc converter with wake-up feedback signal reverse modulated on transformer
CN108418432A (en) * 2018-03-06 2018-08-17 茂睿芯（深圳）科技有限公司 Improve control circuit, control method and the Switching Power Supply of load dynamic response
CN112238786A (en) * 2019-07-16 2021-01-19 宁德时代新能源科技股份有限公司 Constant power supply system and constant power supply method
CN112803773A (en) * 2021-01-28 2021-05-14 深圳市稳先微电子有限公司 Control method of PSR flyback switching power supply, secondary side controller device and switching power supply

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3578124B2 (en) * 2001-08-31 2004-10-20 ソニー株式会社 Switching power supply
TWI390818B (en) * 2009-07-14 2013-03-21 Richpower Microelectronics Apparatus and method for improving the standby efficiency of a charger, and ultra low standby power charge
US9337736B2 (en) * 2012-03-19 2016-05-10 System General Corporation Controller with power saving for power converters and method for the same
US9270184B2 (en) * 2012-10-01 2016-02-23 System General Corp. Control circuit and terminal for cable compensation and wake-up of primary-side regulated power converter
CN103728572B (en) * 2014-01-10 2016-06-01 矽力杰半导体技术(杭州)有限公司 A kind of load detection method, detection circuit and apply its switch power supply
US20160056724A1 (en) * 2014-08-21 2016-02-25 Texas Instruments Incorporated Switching Power Supplies And Methods Of Operating Switching Power Supplies
US10033288B2 (en) * 2016-05-25 2018-07-24 Dialog Semiconductor Inc. Auxiliary load application for increasing data rate of messages or for increasing the response speed to transmitted messages in a flyback converter
US10320301B2 (en) * 2017-09-15 2019-06-11 Semiconductor Components Industries, Llc Power converter responsive to device connection status
DE102018110665A1 (en) * 2018-05-03 2019-11-07 Infineon Technologies Austria Ag POWER SUPPLY
CN112238785B (en) * 2019-07-16 2022-03-04 宁德时代新能源科技股份有限公司 Wake-up method and wake-up system of battery management system

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101355256A (en) * 2008-06-04 2009-01-28 李幸 Electric power system for power adapter capable of intelligent dormancy and awakening
CN102118111A (en) * 2009-12-31 2011-07-06 技领半导体(上海)有限公司 Integrated control circuit, method and switch power supply of primary side regulator
CN201667612U (en) * 2010-01-22 2010-12-08 青岛海信电器股份有限公司 Intermittent frequency-hopping standby control power supply circuit and television
CN102291000A (en) * 2011-08-29 2011-12-21 上海新进半导体制造有限公司 Switch power supply integrated circuit
CN103312176A (en) * 2012-03-12 2013-09-18 凌力尔特公司 Isolated flyback converter with sleep mode for light load operation
CN104967317A (en) * 2014-03-31 2015-10-07 意法半导体股份有限公司 Power switching converter
CN104300793A (en) * 2014-07-17 2015-01-21 矽力杰半导体技术(杭州)有限公司 Control method and control circuit for improving load dynamic response and switching power supply
EP2983283A1 (en) * 2014-08-08 2016-02-10 STMicroelectronics Srl Isolated dc/dc converter with wake-up feedback signal reverse modulated on transformer
CN108418432A (en) * 2018-03-06 2018-08-17 茂睿芯（深圳）科技有限公司 Improve control circuit, control method and the Switching Power Supply of load dynamic response
CN112238786A (en) * 2019-07-16 2021-01-19 宁德时代新能源科技股份有限公司 Constant power supply system and constant power supply method
CN112803773A (en) * 2021-01-28 2021-05-14 深圳市稳先微电子有限公司 Control method of PSR flyback switching power supply, secondary side controller device and switching power supply

Also Published As

Publication number Publication date
CN114825969A (en) 2022-07-29

Similar Documents

Publication Publication Date Title
US10284100B2 (en) Method and apparatus for implementing an unregulated dormant mode with an event counter in a power converter
CN114825969B (en) Flyback switching power supply and output control system, method and chip thereof
US8385088B2 (en) Method and apparatus for implementing an unregulated dormant mode with output reset in a power converter
CN1319258C (en) Switching power supply
US8159839B2 (en) Method and apparatus for implementing an unregulated dormant mode in a power converter
US8873254B2 (en) Isolated flyback converter with sleep mode for light load operation
US8665613B2 (en) Switched mode power converter and method of operation thereof
JP2013158231A (en) Separation flyback converter having efficient light-load operation
US8582322B2 (en) Power reduction of a power supply unit at light loading or no loading
JP2001045749A (en) Switching power supply and method for operating the same
JP2004120826A (en) Switching power supply, image forming apparatus, and method of reducing power consumption
JP2001339950A (en) Power supply circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant