CN114824023A - Micro light-emitting diode structure and micro light-emitting diode display device - Google Patents

Micro light-emitting diode structure and micro light-emitting diode display device Download PDF

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Publication number
CN114824023A
CN114824023A CN202210439534.9A CN202210439534A CN114824023A CN 114824023 A CN114824023 A CN 114824023A CN 202210439534 A CN202210439534 A CN 202210439534A CN 114824023 A CN114824023 A CN 114824023A
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China
Prior art keywords
layer
barrier
emitting diode
electrode
epitaxial structure
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CN202210439534.9A
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Chinese (zh)
Inventor
彭宥箖
彭琬容
陈飞宏
蔡百扬
林子旸
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PlayNitride Inc
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PlayNitride Inc
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Priority to CN202210439534.9A priority Critical patent/CN114824023A/en
Publication of CN114824023A publication Critical patent/CN114824023A/en
Priority to TW111146481A priority patent/TWI845046B/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract

The invention provides a micro light-emitting diode structure and a micro light-emitting diode display device. The micro light emitting diode structure comprises an epitaxial structure, an electrode layer and a barrier layer. The epitaxial structure has a surface. The electrode layer is disposed on the surface of the epitaxial structure. The barrier layer is disposed on the electrode layer. The orthographic projection area of the barrier layer on the epitaxial structure is larger than that of the electrode layer covered on the epitaxial structure. The invention uses the barrier layer to cover the electrode layer, so as to avoid the eutectic problem during the subsequent reflow process. Therefore, the micro light-emitting diode structure of the invention has better electrical property and structure reliability, and the micro light-emitting diode display device adopting the micro light-emitting diode structure of the invention has better display yield.

Description

Micro light-emitting diode structure and micro light-emitting diode display device
Technical Field
The present disclosure relates to light emitting devices, and particularly to a micro light emitting diode structure and a micro light emitting diode display device.
Background
In the existing tin pad process, the orthographic projection area of the barrier layer on the epitaxial structure is equal to the orthographic projection area of the electrode layer on the epitaxial structure, so that when the subsequent transfer bonding display back plate is subjected to Reflow process (Reflow process), the high temperature easily causes the tin alloy to form metal eutectic with the electrode layer, and further influences the electrical property and the structural reliability of the micro light-emitting diode display device.
Disclosure of Invention
The invention is directed to a micro light emitting diode structure with better electrical property and structure reliability.
The invention is directed to a micro light emitting diode display device, which comprises the micro light emitting diode structure and has better display yield.
According to an embodiment of the invention, the micro light emitting diode structure includes an epitaxial structure, an electrode layer and a barrier layer. The epitaxial structure has a surface. The electrode layer is disposed on the surface of the epitaxial structure. The barrier layer is disposed on the electrode layer. The orthographic projection area of the barrier layer on the epitaxial structure is larger than that of the electrode layer covered on the epitaxial structure.
According to an embodiment of the invention, a micro light emitting diode display device includes a display substrate and a plurality of micro light emitting diode structures. The micro light emitting diode structures are arranged on the display substrate and comprise epitaxial structures, electrode layers and barrier layers. The epitaxial structure has a surface. The electrode layer is disposed on the surface of the epitaxial structure. The barrier layer is disposed on the electrode layer. The orthographic projection area of the barrier layer on the display substrate is larger than that of the electrode layer covered on the display substrate. The solder layer is disposed on the barrier layer. The solder layer is jointed with the corresponding connecting pads, so that the micro light-emitting diode structures are electrically connected with the display substrate.
In view of the above, in the design of the micro led structure of the present invention, the forward projection area of the barrier layer on the epitaxial structure is larger than and covers the forward projection area of the electrode layer on the epitaxial structure. That is, the present invention utilizes the barrier layer to cover the electrode layer, so as to avoid the eutectic problem during the subsequent reflow process. Therefore, the micro light-emitting diode structure of the invention has better electrical property and structure reliability, and the micro light-emitting diode display device adopting the micro light-emitting diode structure of the invention has better display yield.
Drawings
Fig. 1A is a schematic cross-sectional view of a micro light emitting diode structure according to an embodiment of the invention;
FIG. 1B is a schematic top view of the micro LED structure of FIG. 1A;
FIG. 1C is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view of a micro light-emitting diode structure according to another embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a micro light-emitting diode structure according to another embodiment of the present invention;
FIG. 7 is a schematic top view of a micro LED structure according to another embodiment of the present invention;
FIG. 8 is a schematic top view of a micro LED structure according to another embodiment of the present invention;
fig. 9 is a schematic cross-sectional view of a micro light emitting diode display device according to an embodiment of the invention.
Description of the reference numerals
10, a micro light emitting diode display device;
20, a display substrate;
22, a connecting pad;
100a, 100b, 100c, 100d, 100e, 100f, 100g, 100i, 100j the micro light emitting diode structure;
110a, 110d are epitaxial structures;
112a, 112d a first type semiconductor layer;
114a, 114d a light-emitting layer;
115a through hole;
116a, 116d a second type semiconductor layer;
116d1 first part;
116d2 second part;
120a, 120c electrode layers;
122a, 122c first-type electrodes;
123, a first groove;
124a, 124c are second type electrodes;
125, a second groove;
130a, 130c, 130e, 130f, 130i, 130j, barrier layers;
132a, 132c, 132e, 132f, 132i, 132j a first barrier;
133. 135, a groove;
134a, 134c, 134e, 134f, 134i, 134j, a second barrier;
140a, 140d insulating layers;
142a, 142d are first openings;
144a, 144d a second opening;
150a, 150b, 150f, 150g, 150i, 150j solder layers;
b, a substrate;
e1: first edge;
e2, second edge;
g, spacing;
h, horizontal distance;
l, W, width;
m is a platform;
s1, surface;
s2, S3, S4, S5, peripheral surface;
t, T1, T2 thickness.
Detailed Description
Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
Fig. 1A is a schematic cross-sectional view of a micro light emitting diode structure according to an embodiment of the invention. Fig. 1B is a schematic top view of the micro light emitting diode structure of fig. 1A. Referring to fig. 1A, in the present embodiment, a micro light emitting diode structure 100a includes an epitaxial structure 110a, an electrode layer 120a and a barrier layer 130 a. The epitaxial structure 110a has a surface S1. The electrode layer 120a is disposed on the surface S1 of the epitaxial structure 110 a. The barrier layer 130a is disposed on the electrode layer 120 a. The forward projection area of the barrier layer 130a on the epitaxial structure 110a is larger than and covers the forward projection area of the electrode layer 120a on the epitaxial structure 110 a. That is, the barrier layer 130a can cover the electrode layer 120a to avoid eutectic phenomena during a subsequent reflow process, so as to ensure that the micro led structure 100a of the present embodiment has better electrical performance and structural reliability.
In detail, in the present embodiment, the epitaxial structure 110a includes a first-type semiconductor layer 112a, a light emitting layer 114a, a second-type semiconductor layer 116a, and a via 115 a. The light emitting layer 114a is located between the first type semiconductor layer 112a and the second type semiconductor layer 116 a. The via 115a penetrates the first-type semiconductor layer 112a, the light-emitting layer 114a, and a portion of the second-type semiconductor layer 116 a. One of the first type semiconductor layer 112a and the second type semiconductor layer 116a is a P-type semiconductor layer, and the other of the first type semiconductor layer 112a and the second type semiconductor layer 116a is an N-type semiconductor layer. Furthermore, the micro light emitting diode structure 100a of the present embodiment further includes an insulating layer 140a disposed on the epitaxial structure 110a and covering the surface S1 and the peripheral surface S2 of the epitaxial structure 110 a. The insulating layer 140a has a first opening 142a exposing the first-type semiconductor layer 112a and a second opening 144a exposing the second-type semiconductor layer 116a, wherein the insulating layer 140a extends to cover the inner wall of the via 115a, and the second opening 144a is located in the via 115 a. Here, the cross-sectional profile of the epitaxial structure 110a is, for example, a trapezoid profile, wherein a side surface of the first type semiconductor layer 112a, a side surface of the light emitting layer 114a and a side surface of the second type semiconductor layer 116a in the epitaxial structure 110a may extend and connect in two stages, and the insulating layer 140a is disposed on the epitaxial structure 110a along the profile of the epitaxial structure 110a, so as to have a better yield.
Furthermore, the electrode layer 120a of the present embodiment includes a first-type electrode 122a and a second-type electrode 124a, wherein the first-type electrode 122a and the second-type electrode 124a are opposite in electrical property. The first-type electrode 122a is disposed on the insulating layer 140a, extends into the first opening 142a, and is electrically connected to the first-type semiconductor layer 112 a. The second-type electrode 124a is disposed on the insulating layer 140a, extends into the second opening 144a, and is electrically connected to the second-type semiconductor layer 116 a. The electrode layer 120a is, for example, a multi-layer structure, wherein the material of the electrode layer 120a is, for example, copper, aluminum, platinum, titanium, gold, silver, chromium, or a combination thereof, but not limited thereto. Here, the first-type electrode 122a and the second-type electrode 124a are both located on the same side of the epitaxial structure 110a, which means that the micro led structure 100a of the present embodiment is embodied as a flip-chip micro led structure.
Furthermore, the barrier layer 130a of the present embodiment includes a first barrier 132a and a second barrier 134 a. The first barrier 132a covers the first-type electrode 122a and directly contacts the insulating layer 140a and the first-type electrode 122 a. The second barrier 134a covers the second-type electrode 124a and directly contacts the insulating layer 140a and the second-type electrode 124 a. Here, the first and second barriers 132a and 134a have flat surfaces on the sides away from the first and second- type electrodes 122a and 124 a.
Preferably, in the present embodiment, an orthographic projection area of the electrode layer 120a on the epitaxial structure 110a and an orthographic projection area of the barrier layer 130a on the epitaxial structure 110a are preferably less than or equal to 0.95 and greater than or equal to 0.5, so that the barrier layer 130a can completely cover the electrode layer 120a during subsequent bonding to provide sufficient protection. Furthermore, the ratio of the thickness T of the barrier layer 130a to the thickness T1 of the epitaxial structure 110a in the present embodiment is preferably less than or equal to 0.1. If the ratio is above 0.1, the subsequent contact electrical property will be affected. Referring to fig. 1A, a gap G (e.g., a gap between the second barrier 134a and the second type electrode 124 a) is formed between the first edge E1 of the barrier layer 130a and the second edge E2 of the electrode layer 120a, and a ratio of the gap G to the width W of the barrier layer 130a is greater than or equal to 0.05 and less than or equal to 0.5, wherein the gap G is, for example, greater than or equal to 0.3 microns and less than or equal to 10 microns, which ensures that the barrier layer 130a can completely cover the electrode layer 120a to provide sufficient protection. In addition, the first barrier 132a and the second barrier 134a have a horizontal distance H, and a ratio of the horizontal distance H to the width L of the epitaxial structure 110a in the same direction is greater than or equal to 0.01 and less than or equal to 0.3, wherein the horizontal distance H is, for example, between 0.3 microns and 15 microns, which can prevent a short circuit phenomenon during subsequent bonding.
In addition, referring to fig. 1A and fig. 1B, in the present embodiment, the micro light emitting diode structure 100a further includes a solder layer 150a disposed on the barrier layer 130 a. Here, the forward projection area of the solder layer 150a on the epitaxial structure 110a is, for example, equal to the forward projection area of the barrier layer 130a on the epitaxial structure 110 a. That is, the solder layer 150a and the barrier layer 130a can be performed by the same photolithography process, thereby effectively reducing the production cost. Furthermore, in the present embodiment, the ratio of the thickness T of the barrier layer 130a to the thickness T2 of the solder layer 150a is less than or equal to 0.2, preferably 0.03 to 0.2. In addition, the melting point of the barrier layer 130a is greater than that of the solder layer 150a, so as to effectively separate the solder layer 150a from the electrode layer 120 a. Here, the material of the solder layer 150a is, for example, tin or tin alloy, and the material of the barrier layer 130a is, for example, nickel, platinum, titanium tungsten or tungsten, but not limited thereto.
In brief, in the present embodiment, an area of the barrier layer 130a projected forward on the epitaxial structure 110a is larger than and covers an area of the electrode layer 120a projected forward on the epitaxial structure 110 a. That is, the barrier layer 130a is used to cover the electrode layer 120a in the embodiment, so as to effectively block the solder layer 150a and the electrode layer 120a, thereby avoiding the problem of eutectic formation between the solder layer 150a and the electrode layer 120a during the subsequent reflow process. Therefore, the micro led structure 100a of the present embodiment has better electrical property and structural reliability. Specifically, the micro led structure 100b may also be embodied as two solder balls as shown in fig. 1C, and the solder layer 150b is embodied as two solder balls.
It should be noted that the following embodiments follow the reference numerals and parts of the contents of the foregoing embodiments, wherein the same reference numerals are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
Fig. 2 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1A and fig. 2, a micro led structure 100c of the present embodiment is similar to the micro led structure 100a of fig. 1A, and the difference between the two structures is: in the present embodiment, the first-type electrode 122c of the electrode layer 120c has a first groove 123, and the second-type electrode 124c has a second groove 125. The first barrier portion 132c of the barrier layer 130c extends into the first recess 123 and is disposed conformal with the first-type electrode 122 c. That is, the first barrier 132c also has the design of the recess 133. The second barrier 134c of the barrier layer 130c extends into the second recess 125 and is disposed conformal with the second type electrode 124 c. That is, the second barrier 134c also has the design of the recess 135. The solder layer 150a is disposed on the first barrier portion 132c and the second barrier portion 134c, and fills the recess 133 of the first barrier portion 132c and the recess 135 of the second barrier portion 134c, so that a receiving space is formed by the recess 133 and the recess 135 during the subsequent bonding, thereby effectively preventing the contact between the electrode layer 120c and the barrier layer 130 c.
Fig. 3 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1A and fig. 3, the micro led structure 100d of the present embodiment is similar to the micro led structure 100a of fig. 1A, and the difference therebetween is: in the present embodiment, the type of the epitaxial structure 110d is different from the type of the epitaxial structure 110 a. In detail, in the present embodiment, the first-type semiconductor layer 112d, the light emitting layer 114d and the first portion 116d1 of the second-type semiconductor layer 116d constitute the mesa M. The second portion 116d2 of the second-type semiconductor layer 116d forms a substrate B opposite the mesa M. The first opening 142d of the insulation layer 140d is located on the mesa M, and the second opening 144d exposes the second portion 116d2 of the second type semiconductor layer 116d and is located on the substrate B. Specifically, the micro led structure 100d is, for example, a horizontal micro led structure.
Fig. 4 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1A and fig. 4, the micro led structure 100e of the present embodiment is similar to the micro led structure 100a of fig. 1A, and the difference between the two structures is: in the present embodiment, the barrier layer 130e covers at least a portion of the peripheral surface of the electrode layer 120 a. In detail, the first barrier 132e covers a portion of the peripheral surface S3 of the first-type electrode 122a, and the second barrier 134e covers a portion of the peripheral surface S4 of the second-type electrode 124 a. That is, the peripheral surface S3 of the first-type electrode 122a and the peripheral surface S4 of the second-type electrode 124a are not completely covered by the first barrier 132e and the second barrier 134e, so that an allowance space is provided during the subsequent bonding, so that the barrier layer 130e can cover the peripheral surface S3 of the first-type electrode 122a and the peripheral surface S4 of the second-type electrode 124a when being deformed at high pressure and high temperature, and short circuit caused by the overflow bonding is also avoided.
Fig. 5 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1A and fig. 5, a micro led structure 100f of the present embodiment is similar to the micro led structure 100a of fig. 1A, and the difference between the two structures is: in the present embodiment, the barrier layer 130f covers a portion of the peripheral surface S5 of the solder layer 150 f. In detail, the first barrier portion 132f and the second barrier portion 134f cover a portion of the peripheral surface S5 of the solder layer 150f, so as to prevent the solder layer 150f from overflowing after the reflow process.
Fig. 6 is a schematic cross-sectional view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1A and fig. 6, the micro led structure 100g of the present embodiment is similar to the micro led structure 100a of fig. 1A, and the difference between the two structures is: in the present embodiment, an area of an orthographic projection of the solder layer 150g on the epitaxial structure 110a is larger than an area of an orthographic projection of the barrier layer 130a on the epitaxial structure 110 a. That is, different processes can be used to fabricate the solder layer 150g and the barrier layer 130a, which not only effectively isolates the solder layer 150a from the electrode layer 120a, but also increases the bonding area when the solder layer is bonded to the pad of the subsequent display backplane.
Fig. 7 is a schematic top view of a micro light emitting diode structure according to another embodiment of the invention. Referring to fig. 1B and fig. 7, the micro led structure 100i of the present embodiment is similar to the micro led structure 100a of fig. 1B, and the difference therebetween is: in the present embodiment, an area of an orthographic projection of the solder layer 150i on the epitaxial structure 110a is smaller than an area of an orthographic projection of the barrier layer 130i on the epitaxial structure 110a and larger than an area of an orthographic projection of the electrode layer 120a on the epitaxial structure 110 a. That is, the forward projection area of the solder layer 150i on the epitaxial structure 110a is smaller than the forward projection area of the corresponding first barrier 132i on the epitaxial structure 110a and larger than the forward projection area of the first-type electrode 122a on the epitaxial structure 110 a. The area of the solder layer 150i projected forward on the epitaxial structure 110a is smaller than the area of the second barrier 134i projected forward on the epitaxial structure 110a and larger than the area of the second-type electrode 124a projected forward on the epitaxial structure 110 a. Preferably, a ratio of an orthographic area of the solder layer 150i on the epitaxial structure 110a to an orthographic area of the barrier layer 130i on the epitaxial structure 110a is, for example, less than or equal to 0.9 and greater than or equal to 0.5, and a ratio of an orthographic area of the solder layer 150i on the epitaxial structure 110a to an orthographic area of the electrode layer 120a on the epitaxial structure 110a is, for example, greater than or equal to 1.5, and a bonding strength of the solder layer 150i in subsequent bonding may be insufficient when the ratio is less than 0.5, and the ratio of the orthographic area of the solder layer 150i on the epitaxial structure 110a to the orthographic area of the electrode layer 120a on the epitaxial structure 110a is greater than or equal to 1 and less than or equal to 1.5.
Since the forward projection area of the solder layer 150i on the epitaxial structure 110a is smaller than the forward projection area of the barrier layer 130i on the epitaxial structure 110a, that is, the solder layer 150i is retracted a distance relative to the barrier layer 130i, the overflow risk of the solder layer 150i in the subsequent reflow process can be effectively reduced. As shown in fig. 8, the barrier layer 130j may include a first barrier portion 132j and a second barrier portion 134j, and an orthographic projection area of the solder layer 150j on the epitaxial structure 110a is smaller than an orthographic projection area of the barrier layer 130j on the epitaxial structure 110a and an orthographic projection area of the electrode layer 120a on the epitaxial structure 110a, so that the solder layer 150j and the electrode layer 120a can be effectively blocked when the micro light emitting diode structure 100j is smaller, for example, less than or equal to 15 μm.
Fig. 9 is a schematic cross-sectional view of a micro light emitting diode display device according to an embodiment of the invention. Referring to fig. 9, in the present embodiment, the micro led display device 10 includes a display substrate 20 and, for example, the micro led structure 100b shown in fig. 1C, wherein the micro led structure 100b is disposed on the display substrate 20. In detail, in the present embodiment, the display substrate 20 includes a plurality of pads 22, and the solder layer 150b is bonded to the pads 22, such that the micro light emitting diode structure 100b is disposed on the display substrate 20 and electrically connected to the display substrate 20. By the fact that the area of the barrier layer 130a projected forward on the display substrate 20 is larger than the area of the electrode layer 120a projected forward on the display substrate 20, the problem of eutectic formation between the solder layer 150b and the first type electrode 122a and the second type electrode 124a of the electrode layer 120a due to the overflow of the solder layer 150b caused by the high temperature and high pressure eutectic bonding process when the micro led structure 100b is bonded to the display substrate 20 can be effectively avoided. Here, the forward projection area of the barrier layer 130a on the display substrate 20 is larger than the electrode layer 120a and is smaller than or equal to the forward projection area of the pad 22 on the display substrate 20, and the forward projection area of the solder layer 150b on the display substrate 20 is larger than or equal to the forward projection area of the barrier layer 130a on the display substrate 20, so that when the micro-led structure 100b is bonded to the display substrate 20, the solder layer 150b overflows, and a better bonding can be obtained through a larger bonding pad area and a larger solder layer area. Therefore, the micro led display device 10 of the present embodiment has a better display yield.
It should be noted that, in other embodiments not shown, the micro led display device may include at least one of the micro led structures 100a, 100b, 100c, 100d, 100e, 100f, 100g, 100i, and 100j according to the requirement, and the invention is not limited thereto. That is, the number of the micro light emitting diode structures may be one or more, and may be the same structure or different structures, and may be selected according to the requirement. Moreover, the micro light emitting diode structure can be a red micro light emitting diode structure, a blue micro light emitting diode structure or a green micro light emitting diode structure. In addition, the display substrate 20 of the present embodiment can be, for example, a Complementary Metal-Oxide-Semiconductor (CMOS) substrate, a Liquid Crystal On Silicon (LCOS) substrate, a Thin Film Transistor (TFT) substrate, or other substrates having an operating circuit, and is not limited thereto.
In summary, in the design of the micro led structure of the present invention, the forward projection area of the barrier layer on the epitaxial structure is larger than and covers the forward projection area of the electrode layer on the epitaxial structure. That is, the present invention utilizes the barrier layer to cover the electrode layer, so as to avoid the eutectic problem during the subsequent reflow process. Therefore, the micro light-emitting diode structure of the invention has better electrical property and structure reliability, and the micro light-emitting diode display device adopting the micro light-emitting diode structure of the invention has better display yield.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (13)

1. A micro light emitting diode structure, comprising:
an epitaxial structure having a surface;
an electrode layer disposed on the surface of the epitaxial structure; and
and the barrier layer is configured on the electrode layer, wherein the orthographic projection area of the barrier layer on the epitaxial structure is larger than and covers the orthographic projection area of the electrode layer on the epitaxial structure.
2. The led structure of claim 1, wherein the electrode layer comprises a first type electrode and a second type electrode, and the barrier layer comprises a first barrier and a second barrier, the first barrier covers the first type electrode, the second barrier covers the second type electrode, and the first type electrode and the second type electrode are opposite in electrical polarity.
3. The micro light-emitting diode structure of claim 2, further comprising:
the insulating layer, dispose in on the epitaxial structure, and cover the epitaxial structure surface and surrounding surface, the epitaxial structure includes first type semiconductor layer, luminescent layer and second type semiconductor layer, the luminescent layer is located first type semiconductor layer with between the second type semiconductor layer, the insulating layer has and exposes the first opening of first type semiconductor layer and exposes the second opening of second type semiconductor layer, first type electrode dispose in on the insulating layer and extend to in the first opening and with first type semiconductor layer electric connection, second type electrode dispose in on the insulating layer and extend to in the second opening and with second type semiconductor layer electric connection.
4. The micro led structure of claim 3, wherein the first barrier directly contacts the insulating layer and the first-type electrode, and the second barrier directly contacts the insulating layer and the second-type electrode.
5. The structure of claim 3, wherein the first-type electrode has a first recess and the second-type electrode has a second recess, the first barrier extends into the first recess and is disposed conformal with the first-type electrode, and the second barrier extends into the second recess and is disposed conformal with the second-type electrode.
6. The micro led structure of claim 1, wherein a ratio of a thickness of the barrier layer to a thickness of the epitaxial structure is less than or equal to 0.1.
7. The micro led structure of claim 2, wherein the first barrier and the second barrier have a horizontal distance therebetween, and a ratio of the horizontal distance to a width of the epitaxial structure in the same direction is greater than or equal to 0.01 and less than or equal to 0.3.
8. The micro light emitting diode structure of claim 1, wherein a ratio of an orthographic projection area of the electrode layer on the epitaxial structure to an orthographic projection area of the barrier layer on the epitaxial structure is less than or equal to 0.95 and greater than or equal to 0.5.
9. The micro led structure of claim 1, wherein a gap is formed between a first edge of the barrier layer and a second edge of the electrode layer, and a ratio of the gap to a width of the barrier layer is greater than or equal to 0.05 and less than or equal to 0.5.
10. The micro light emitting diode structure of claim 1, further comprising:
and the solder layer is configured on the barrier layer, wherein the ratio of the thickness of the barrier layer to the thickness of the solder layer is less than or equal to 0.2.
11. The micro light emitting diode structure of claim 10, wherein an area of an orthographic projection of the solder layer on the epitaxial structure is smaller than or equal to the area of the barrier layer on the epitaxial structure.
12. The structure of claim 1, wherein the barrier layer covers at least a portion of a peripheral surface of the electrode layer.
13. A miniature light emitting diode display device, comprising:
a display substrate including a plurality of pads;
a plurality of micro light emitting diode structures disposed on the display substrate, wherein each of the plurality of micro light emitting diode structures comprises:
an epitaxial structure having a surface;
an electrode layer disposed on the surface of the epitaxial structure
A barrier layer disposed on the electrode layer, wherein an area of an orthographic projection of the barrier layer on the display substrate is larger than and covers an area of an orthographic projection of the electrode layer on the display substrate; and
and a solder layer disposed on the barrier layer, wherein the solder layer is bonded to each of the corresponding bonding pads to electrically connect the micro light-emitting diode structures to the display substrate.
CN202210439534.9A 2022-04-25 2022-04-25 Micro light-emitting diode structure and micro light-emitting diode display device Pending CN114824023A (en)

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CN202210439534.9A CN114824023A (en) 2022-04-25 2022-04-25 Micro light-emitting diode structure and micro light-emitting diode display device
TW111146481A TWI845046B (en) 2022-04-25 2022-12-05 Micro element structure and display device

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CN202210439534.9A CN114824023A (en) 2022-04-25 2022-04-25 Micro light-emitting diode structure and micro light-emitting diode display device

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