CN114785115A - Continuous conversion ratio boost/buck type charge pump based on double-gyrator model - Google Patents

Continuous conversion ratio boost/buck type charge pump based on double-gyrator model Download PDF

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CN114785115A
CN114785115A CN202210433527.8A CN202210433527A CN114785115A CN 114785115 A CN114785115 A CN 114785115A CN 202210433527 A CN202210433527 A CN 202210433527A CN 114785115 A CN114785115 A CN 114785115A
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gyrator
cell
voltage
model
capacitor
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周杨润
余凯
李思臻
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Guangdong University of Technology
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073Charge pumps of the Schenkel-type

Abstract

The invention discloses a continuous conversion ratio boost/buck charge pump based on a double-gyrator model, which comprises two single-gyrator models connected in series; the single gyrator model is composed of N identical CELL, wherein the CELL comprises a capacitor C and a switch S1~S2M+4C upper plate passing switch S1To switch SM+2Are respectively connected to VIN,TM,TM‑1……T1,VSS(ii) a The lower polar plates of the capacitor C are respectively connected with a switch SM+3To switch S2M+4Is connected to VOUT,BM,BM‑1……B1,VSS(ii) a The square wave signal port is used for inputting a square wave signal FCLK1Generating N non-overlapping square signals with different phases and same frequency by a phase generation module and simultaneously inputting the signals into N CELL; each CELL converts N square wave signals into a switch S through respective decoders1~S2M+4And then controlling S through the gate driving module1~S2M+4Is opened. The invention realizes continuous conversion ratio and high efficiency in the voltage boosting mode and the voltage reducing mode, and solves the problem that a current source can not be used as a load in single rotation.

Description

Continuous conversion ratio boost/buck type charge pump based on double-gyrator model
Technical Field
The invention relates to the technical field of electronics, in particular to a continuous conversion ratio boosting/reducing type charge pump based on a double-gyrator model.
Background
A DC-DC Converter of a Charge Pump (Charge Pump) is generally classified into three categories, i.e., a Low Drop Out (LDO), a Switched inductor DC-DC Converter, and a Switched Capacitor DC-DC Converter, wherein the Switched Capacitor DC-DC Converter is also called a Charge Pump (Charge Pump). In the LDO, the switched inductor DC-DC converter, and the charge pump, the charge pump is more suitable for full integration because it uses only a capacitor that is easily designed in a chip, and can achieve good efficiency through multiple voltage conversion ratios. Therefore, the charge pump becomes a very promising next generation SoC power supply chip.
The design of a fully integrated charge pump is of great significance to small and low-power systems. However, conventional charge pumps provide only one conversion ratio, and if the output voltage deviates from the conversion ratio, the conversion efficiency will be greatly reduced, thereby limiting their use in systems where the input or output voltage varies. Adding more conversion ratios in a conventional charge pump can help provide more design flexibility, but this increases implementation complexity and tends to result in increased losses and reduced efficiency.
To improve overall efficiency over a larger range of input and output voltages, the system needs to provide a more continuous conversion ratio, which means that new reconfigurable charge pump architectures need to be designed. SAR (successful-Approximation), RSC (corrected Switched-Capacitor), NSC (satellite Switched-Capacitor), ASSP (analytical switch-Capacitor) type charge pumps can only realize the step-down mode. In order to improve the application scene range of the reconfigurable charge pump, the AVFI (altitude Voltage-Feed-In) type reconfigurable charge pump can be simultaneously applied to two modes of Voltage reduction and Voltage boosting, generates any rational number conversion ratio with optimal conduction loss and simultaneously realizes the reduction of parasitic loss; the ASP (Algebraic Series-Parallel) type reconfigurable charge pump can be applied to two modes of voltage reduction and voltage increase.
However, such converters do have drawbacks. First, to maintain high efficiency over a wide voltage range, multiple topologies are often required, each with the addition of additional transistors, which typically create additional series resistance in the other topologies. Furthermore, the control overhead required to switch between different topologies increases rapidly as the number of topologies increases, resulting in poorer efficiency.
In order to achieve a more continuous conversion ratio and to maintain high efficiency, a single topology continuously scalable conversion ratio charge pump is proposed. The converter adopts an advanced Scalable Parasitic Charge Redistribution (SPCR), namely, parasitic charges are redistributed through multiphase control, so that parasitic bottom plate loss and charge sharing loss are greatly reduced. The converter deduces a single-capacitor topological structure similar to a gyrator, realizes a continuously-expandable high-efficiency conversion ratio, but can be only applied to a Buck mode or a Boost mode, cannot be simultaneously applied to the Buck mode or the Boost mode, and cannot use a current source as a load.
Disclosure of Invention
The invention aims to provide a continuous conversion ratio boost/buck type charge pump based on a double-gyrator model, which is used for solving the problem that a traditional single-gyration model circuit can only be applied to a boost mode or a buck mode and cannot use a current source as a load.
In order to realize the task, the invention adopts the following technical scheme:
a continuous conversion ratio boost/buck charge pump based on a double-gyrator model comprises two single-gyrator models which are connected in series;
the single gyrator model is composed of N identical CELLs CELL, each CELL CELL comprises a capacitor C and 2M +4 switches S1~S2M+4M is a positive integer; the upper plate of the capacitor C passes through a switch S1To switch SM+2Are respectively connected to VIN,TM,TM-1……T1,VSS(ii) a The lower polar plates of the capacitor C are respectively connected with a switch SM+3To switch S2M+4Is connected to VOUT,BM,BM-1……B1,VSS(ii) a Wherein T is1~TMAnd B1~BMIndicating voltage connectionEnd, VINFor input voltage, VOUTTo output a voltage, VSSIs a grounding end;
v of each CELL CELLIN,VOUT,VSS,T1~TMAnd B1~BMV connected to other N-1 CELLIN,VOUT,VSS,T1~TMAnd B1~BM
The square wave signal port is used for inputting a square wave signal F with the duty ratio less than 1/NCLK1,FCLK1Generating N non-overlapping square wave signals with different phases and same frequency through a phase generation module, and simultaneously inputting the signals into N units CELL; each CELL converts the N non-overlapped square wave signals with different phases and same frequency into a switch S through a respective decoder1~S2M+4And then controlling S through the gate drive module1~S2M+4Opening of (1);
of the two series-connected single-rotator models, the V of the first rotatorOUTV connected to a second gyratorINAnd connected in parallel with a capacitor C to ground1V of the second gyratorOUTIs the output voltage; v of two single gyrator modelsSSA signal connected to ground; the square wave signal ports of the two single gyrator models are respectively used for receiving square wave signals with different frequencies and the same duty ratio.
Further, the decoders of each CELL are different, so that S of each CELL is different from S of other CELLs CELL1~S2M+4Are switched in different orders.
Further, the voltage change sequence of the upper and lower plates of the capacitor C of the single CELL in one period is shown in table 1, where N is 4M + 4; the respective decoder and gate drive module of each unit are utilized to enable the N units to be in different phases at the same time, so that the upper and lower electrode plate connections of the capacitors in the N units just correspond to the N different phases:
TABLE 1 sequence of capacitor plate voltages over a period in a single gyrator model
Figure BDA0003611846930000031
Further, said TMAnd BMIs generated using parasitic charge redistribution techniques: when the polar plates of two different capacitors are connected, the parasitic capacitors of the polar plates can charge and discharge the charges; the parasitic capacitor needing to be discharged can transmit the charges to the parasitic capacitor needing to be charged, so that the output voltage is the middle value before the two polar plates are connected; according to the method, a plurality of CELL capacitors are used for matching, so that voltage is transited, and a plurality of voltage rails with the same distance are generated; wherein T is1~TMAnd B1~BMI.e., a new voltage rail generated using parasitic charge redistribution techniques.
Further, said T1~TMIs a VINTo VSSVoltage of (B), B1~BMIs a VOUTTo VSSOf the voltage of (c).
Compared with the prior art, the invention has the following technical characteristics:
the invention designs a boosting/reducing type charge pump with continuous conversion ratio based on a double-gyrator model, realizes continuous conversion ratio and high efficiency under boosting and reducing, and can use a current source as a load.
Drawings
FIG. 1 is a circuit diagram of a single rotator model;
FIG. 2 is a circuit diagram of a dual gyrator model;
FIG. 3 is a schematic diagram of a dual gyrator model;
fig. 4 (a) and (b) are schematic diagrams of the operation of the single-rotator model in the buck mode and the boost mode, respectively;
FIG. 5 is a schematic illustration of a parasitic charge redistribution technique;
FIG. 6 is a graph of the efficiency of a single rotator model and the variation of output voltage with load resistance (V)IN=1V);
FIG. 7 is a graph of single rotator model efficiency and output voltage versus frequencyRate change curve (V)IN1V load resistance 7k Ω).
Detailed Description
In the existing scheme, the charge pump providing the continuous conversion ratio has complex control circuits and large switching loss due to the fact that structures such as RSC, NSC, ASSC, AVFI and ASP limit efficiency peak values, the number of the conversion ratios is limited, and the charge pump with the single-topology continuous expandable conversion ratio can achieve the more continuous conversion ratio and has high efficiency, but can only achieve a voltage boosting mode or a voltage reducing mode, and cannot use a current source as a load. The invention provides a continuous conversion ratio boost/buck charge pump of a double-gyrator model, which has continuous conversion ratio and high efficiency under both boost and buck and can use a current source as a load.
The invention provides a continuous conversion ratio boost/buck charge pump adopting a double-gyrator model structure; the charge pump is formed by connecting two single gyrator models in series; through the design of a single gyrator model, the continuous conversion ratio and high efficiency are realized in the voltage boosting and reducing modes; the input and output of the two single gyrator models are connected in series to form the charge pump of the double gyrator model, so that the double gyrator is realized, and the problem that a current source cannot be used as a load under single gyration is solved.
Referring to fig. 1, a block circuit diagram of a single rotator model; the model of the single gyrator is composed of N identical CELLs (CELL), each CELL includes a capacitor C and 2M +4 switches S1~S2M+4M is a positive integer; the size of the capacitor C is the main influence of the output power, and the larger the capacitor is, the larger the output power is, the larger the occupied area is; the upper plate of the capacitor C passes through a switch S1To switch SM+2Are respectively connected to VIN,TM,TM-1……T1,VSS(ii) a The lower polar plate of the capacitor C passes through the switch S respectivelyM+3To switch S2M+4Is connected to VOUT,BM,BM-1……B1,VSS(ii) a Wherein T is1~TMAnd B1~BMThe voltage connection terminal is shown, and the voltage at the voltage connection terminal is also shown; vINTo be transportedInput voltage, VOUTTo output a voltage, VSSIs a grounding end;
the square wave signal port is used for inputting a square wave signal F with the duty ratio less than 1/NCLK1,FCLK1Generating N non-overlapped square signals with different phases and the same frequency by a Phase generation (N Phase Generator) module, and simultaneously inputting the signals into N units CELL; each CELL converts the N non-overlapping square-wave signals with different phases and the same frequency into a switch S through a respective Decoder (Decoder)1~S2M+4The control signal of (2) is controlled by a Gate driver (Gate Drivers) to control S1~S2M+4Opening of (1); the decoders of each CELL are different in order to have each CELL S with other CELLs1~S2M+4The switching sequence of (2) is different;
v of each CELL CELLIN,VOUT,VSS,T1~TMAnd B1~BMV connected to other N-1 CELLIN,VOUT,VSS,T1~TMAnd B1~BM
The working process of the single gyrator model is as follows:
(1) the square wave signal F with the duty ratio less than 1/N is input into the square wave signal portCLK1,FCLK1Generating N non-overlapping square signals with different phases and same frequency by a phase generation module and inputting the signals into all the CELLs CELL; each CELL is selectively controlled S by a respective decoder and gate drive module1~S2M+4Opening of (3).
(2) The voltage change sequence of the upper and lower plates of the capacitor C of the single CELL in one period is shown in table 1, where N is 4M +4, that is, there are N or 4M +4 phases in one period; the N units are in different phases at the same time by utilizing respective decoders and gate driving modules of each unit, so that the upper and lower electrode plates of capacitors in the N units are connected to correspond to the N different phases.
TABLE 1 sequence of capacitor plate voltages over a period in a single gyrator model
Figure BDA0003611846930000051
Referring to fig. 2, a schematic diagram of a circuit of a dual gyrator model, i.e., a charge pump, according to the present invention is shown.
The double-gyrator model is formed by two single-gyrator models connected in series, wherein the V of the first gyratorINV of the first gyrator for input voltageOUTV connected to a second gyratorINAnd connected in parallel with a capacitor C to ground1V of the second gyratorOUTIs the output voltage; v of two single gyrator modelsSSA signal connected and grounded; the square wave signal ports of the two single gyrator models are respectively used for receiving square wave signals F with different frequencies and the same duty ratioCLK1、FCLK2(ii) a T of each gyrator model1~TMAnd B1~BMT not in contact with another gyrator1~TMAnd B1~BMConnecting; the working steps of each gyrator are the same as those of a single gyrator.
As shown in fig. 3, unlike the single gyrator model, the single gyrator model cannot use a current source as a load because the output current of the single gyrator model is determined by the conductance and the input voltage, and in the case of the current source as a load, the input voltage is a fixed value, so that the conductance also becomes a fixed value; while the dual gyrator model avoids this problem.
In FIG. 3, i1′=G1u1,i2′=G2u2Therefore u is2/u1=G2/G1=n;i1And u1For the input voltage and input current of the first gyrator model, i1'and u' are the output voltage and output current of the first gyrator model, G1Conductance for the first gyrator model; i all right angle2'and u' are input voltage and input current of a second gyrator model, i2And u2For the output voltage and output current of the second gyrator model, G2Is the conductance of the second gyrator.
As known from the working principle of the traditional gyrators, the conductance G of each gyrator is mainly determined by the capacitance size and the working frequency of a single unit of the gyrator; the larger the capacitance of a single unit of the gyrator, the larger the conductance G, and the larger the operating frequency G. Since the capacitance of each cell is equal, the ratio of the output voltage to the input voltage can be adjusted by changing the operating frequency of the two single gyrator models.
As can be seen in FIG. 3, the conversion ratio n is formed by two conductances G2And G1Is determined by the ratio of (a) to (b). However, the traditional single-rotator model can only be applied to the buck or boost condition, and u can be seen in the dual-rotator model1、u2And u' is uncertain. Therefore, the invention provides a new single-gyrator model to simultaneously satisfy the switching of the two states of voltage reduction and voltage increase, and the working principle is shown in fig. 4.
T in FIG. 4MAnd BMThe voltage of (c) is generated using parasitic charge redistribution techniques, the principle of which is shown in fig. 5. When the plates of two different capacitors are connected, the parasitic capacitance of the plates will charge and discharge the charge. The parasitic capacitor needing to be discharged can transfer the charges to the parasitic capacitor needing to be charged, so that the output voltage is the middle value before the two polar plates are connected. By using the method, the matching among a plurality of capacitors can be utilized, so that the voltage is transited to generate a plurality of voltage rails with the same distance; wherein T is1~TMAnd B1~BMI.e., the new voltage rail generated by the parasitic charge redistribution technique.
In the step-down mode (a) in fig. 4, q can be calculatedIN=CVOUT+ΔVT,qOUT=CVIN+ΔVB(ii) a Wherein q isINIs a VINNumber of charges, q, input into a single rotator modelOUTFor a single rotator model output to VOUTC is the capacitance of the single rotator model; due to parasitic charge redistribution techniques, VIN,TM~T1,VSSMiddle phaseThe difference between adjacent ports is equal, so the voltage Δ VTIs TMTo VINDifference of (d), likewise voltage Δ VBIs a VOUTTo BMThe difference of (a). When M approaches infinity, Δ VTAnd Δ VBApproaches 0, therefore qIN≈CVOUT,qOUT≈CVIN. The input and output are close to one gyrator model.
Similarly, in the boost mode (b) in fig. 4, q can be calculatedIN=CVOUT+ΔVT,qOUT=CVIN+ΔVB. When M approaches infinity, qIN≈CVOUT,qOUT≈CVIN(ii) a The input and output are also close to a gyrator model.
Furthermore, the voltages of the two plates in buck and boost modes in fig. 4 are shown in table 2. It can be seen that the change sequence of the upper plate and the lower plate in the two modes of voltage reduction and voltage increase is consistent in the same period. The same plate change sequence can be used regardless of whether the ratio of the gyrator's output voltage to input voltage is greater than 1 or less than 1. Therefore, the single-rotator model proposed in the scheme can be applied to the boosting mode and the step-down mode simultaneously.
TABLE 2 sequence of change of capacitor plate voltage in one cycle in single gyrator model
Figure BDA0003611846930000061
Figure BDA0003611846930000071
The invention adjusts T1~TMIs a VINTo VSSVoltage of (B)1~BMIs a VOUTTo VSSVoltage of (2), redesigning logic, getting rid of VINAnd VOUTThe relationship of who is fixed and who is fixed, thereby realizing that the voltage boosting and the voltage reducing have continuous conversion ratio. The inventionThe loss of the parasitic capacitance is almost zero through the parasitic charge redistribution technology, so that the characteristic of high efficiency is achieved.
Related experiments:
as shown in FIG. 6, when the load resistance of the charge pump of the present invention is changed, the efficiency of the VCR is maintained at 80% or more in the range of 0.3-3.2, and the efficiency of the VCR is maintained at 85% or more in the range of 0.5-2. As can be seen from fig. 7, as the frequency changes, the VCR changes, and the efficiency remains above 85% from the boost mode to the buck mode.
The above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present application, and they should be construed as being included in the present application.

Claims (5)

1. A continuous conversion ratio boost/buck charge pump based on a double-gyrator model is characterized by comprising two single-gyrator models which are connected in series;
the single gyrator model is composed of N identical CELLs CELL, each CELL CELL comprises a capacitor C and 2M +4 switches S1~S2M+4M is a positive integer; the upper plate of the capacitor C passes through a switch S1To switch SM+2Are respectively connected to VIN,TM,TM-1……T1,VSS(ii) a The lower polar plates of the capacitor C are respectively connected with a switch SM+3To switch S2M+4Is connected to VOUT,BM,BM-1……B1,VSS(ii) a Wherein T is1~TMAnd B1~BMRepresents the voltage connection terminal, VINFor the input voltage, VOUTTo output a voltage, VSSIs a grounding end;
v of each CELL CELLIN,VOUT,VSS,T1~TMAnd B1~BMV connected to other N-1 CELLIN,VOUT,VSS,T1~TMAnd B1~BM
The square wave signal port is used for inputting a square wave signal F with the duty ratio less than 1/NCLK1,FCLK1Generating N non-overlapping square signals with different phases and same frequency through a phase generation module, and simultaneously inputting the signals into N units CELL; each CELL converts the N non-overlapping square-wave signals with different phases and same frequency into a switch S through a respective decoder1~S2M+4And then controlling S through the gate driving module1~S2M+4Opening of (1);
in the two serially connected single-rotator models, the V of the first rotatorOUTV connected to a second gyratorINAnd connected in parallel with a capacitor C to ground1V of the second gyratorOUTIs the output voltage; v of two single gyrator modelsSSA signal connected to ground; the square wave signal ports of the two single gyrator models are respectively used for receiving square wave signals with different frequencies and the same duty ratio.
2. The dual gyrator model based continuous conversion ratio step-up/step-down type charge pump as claimed in claim 1, wherein a decoder of each CELL is different such that S of each CELL is different from S of other CELLs CELL1~S2M+4Are switched in different orders.
3. The dual-gyrator-model-based continuous conversion ratio step-up/step-down charge pump as claimed in claim 1, wherein the voltage change sequence of the upper and lower plates of the capacitor C of a single CELL in one period is shown in table 1, where N is 4M + 4; the respective decoder and gate drive module of each unit are utilized to enable the N units to be in different phases at the same time, so that the upper and lower electrode plate connections of the capacitors in the N units just correspond to the N different phases:
TABLE 1 sequence of capacitor plate voltages over a period in a single gyrator model
Figure FDA0003611846920000011
Figure FDA0003611846920000021
4. The dual-gyrator-model-based continuous conversion ratio step-up/step-down type charge pump as claimed in claim 1, wherein the T is a voltage of the double-gyrator modelMAnd BMThe voltage of (c) is generated using parasitic charge redistribution techniques: when the polar plates of two different capacitors are connected, the parasitic capacitance of the polar plates can charge and discharge the charge; the parasitic capacitor needing to be discharged can transmit the charges to the parasitic capacitor needing to be charged, so that the output voltage is the middle value before the two polar plates are connected; according to the method, a plurality of CELL capacitors are used for matching, so that voltage is transited, and a plurality of voltage rails with the same distance are generated; wherein T is1~TMAnd B1~BMI.e., a new voltage rail generated using parasitic charge redistribution techniques.
5. The dual-gyrator-model-based continuous-conversion-ratio step-up/step-down charge pump as claimed in claim 1, wherein the T is1~TMIs a VINTo VSSVoltage of (B)1~BMIs a VOUTTo VSSThe voltage of (c).
CN202210433527.8A 2022-04-24 2022-04-24 Continuous conversion ratio boost/buck type charge pump based on double-gyrator model Pending CN114785115A (en)

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