CN114783389B

CN114783389B - display panel

Info

Publication number: CN114783389B
Application number: CN202210381605.4A
Authority: CN
Inventors: 连政勤; 葛茹; 李利霞
Original assignee: TCL China Star Optoelectronics Technology Co Ltd
Current assignee: TCL China Star Optoelectronics Technology Co Ltd
Priority date: 2022-04-12
Filing date: 2022-04-12
Publication date: 2023-10-03
Anticipated expiration: 2042-04-12
Also published as: CN114783389A

Abstract

The application provides a display panel which comprises a substrate, a display circuit and a light sensing circuit, wherein a power line in the light sensing circuit is arranged in a display area in an extending mode along a first direction, so that the occupied area of the light sensing circuit can be reduced, and the penetration rate of the display panel is improved.

Description

Display panel

Technical Field

The application relates to the technical field of display, in particular to a display panel.

Background

In the coming times of 5G and Internet of things, the Internet of things becomes an unprecedented development trend. In addition to the basic functions of display, the liquid crystal display panel will also assume more interactive functions. Remote interaction is an important interaction means and has a certain application prospect.

At present, the remote interaction technology of the liquid crystal display panel is that a light ray sensing circuit is directly inserted into a display circuit, which is equivalent to the simultaneous placement of the display circuit and the light ray sensing circuit in a fixed period area, so that the area of a plurality of original pixel circuit units in the display circuit is reduced, namely the opening area is reduced, and the penetration rate is reduced.

As shown in fig. 1, fig. 1 is a schematic plan view of a display panel according to the related art, the display circuit 10 includes a plurality of pixel circuit units 101 distributed in an array, a plurality of Data lines Data, and a plurality of Scan lines Scan, after the light sensing circuit 11 is inserted into the display circuit 10, one more first power line SVDD, one more second power line SVGG, one more read line RD, and one more sensing unit 110 including a light-sensitive thin film transistor are disposed in the pixel circuit unit period, and the first power line SVDD, the second power line SVGG, and the read line RD extend along the second direction y in the display area, so that the area of the pixel circuit unit 101 is compressed, and the opening area of the pixel circuit unit 101 is reduced, which results in the decrease of the transmittance of the display panel.

In summary, the conventional display panel has the problem of decreasing the transmittance after adding the light sensing circuit. Therefore, it is necessary to provide a display panel to improve this defect.

Disclosure of Invention

The embodiment of the application provides a display panel, which can reduce the occupied area of a light sensing circuit and improve the transmittance of the display panel.

The embodiment of the application provides a display panel, which comprises a display area, and further comprises:

a substrate;

the display circuit is arranged on the substrate and comprises a plurality of pixel circuit units, the pixel circuit units are distributed in rows along a first direction at intervals in the display area, the pixel circuit units are distributed in columns along a second direction at intervals, and the first direction is different from the second direction;

the light sensing circuit sets up in on the base plate, the light sensing circuit includes:

a plurality of sensing units disposed between the plurality of pixel circuit units;

the power lines are electrically connected with the corresponding sensing units and used for transmitting constant-voltage direct-current signals to the sensing units;

at least one of the power lines extends along the first direction in the display area.

According to an embodiment of the present application, the sensing unit includes a light-sensitive thin film transistor, the power line includes a first power line and a second power line, the first power line is electrically connected to a source electrode of the light-sensitive thin film transistor, and the second power line is electrically connected to a gate electrode of the light-sensitive thin film transistor;

wherein at least one of the first power line and the second power line is disposed to extend in the first direction within the display area.

According to an embodiment of the present application, the first power line and the second power line are both disposed along the first direction in the display area.

According to an embodiment of the present application, one of the first power lines or one of the second power lines is disposed between two adjacent rows of the pixel circuit units.

According to an embodiment of the present application, adjacent rows of the pixel circuit units form a repeating unit, and the display circuit has a plurality of the repeating units;

the sensor comprises a repeating unit, wherein a row of sensing units are correspondingly arranged in the repeating unit, the sensing units are distributed at intervals along the first direction, and at least one first power line or at least one second power line is correspondingly arranged in the repeating unit.

According to an embodiment of the present application, the repeating unit is correspondingly provided with one first power line and a plurality of second power lines, and the sensing unit includes a plurality of storage capacitors corresponding to the second power lines one by one;

the second power line is electrically connected to the first polar plate of the corresponding storage capacitor, and the second polar plates of the storage capacitors are electrically connected to the drain electrode of the light-sensitive thin film transistor.

According to an embodiment of the present application, the display panel includes a gate metal layer, a gate insulating layer, and a source-drain electrode metal layer which are stacked;

the first power line and the second power line are arranged on the same layer with the grid metal layer.

According to an embodiment of the present application, the first power line is disposed in the display area and extends in the first direction, and the second power line is disposed in the display area and extends in the second direction.

the first power line and the grid electrode metal layer are arranged on the same layer, and the second power line and the source-drain electrode metal layer are arranged on the same layer.

According to an embodiment of the present application, the first power line is disposed in the display area in a manner extending in the second direction, and the second power line is disposed in the display area in a manner extending in the first direction;

the display panel comprises a grid metal layer, a grid insulating layer and a source-drain electrode metal layer which are stacked;

the first power line and the source-drain electrode metal layer are arranged on the same layer, and the second power line and the gate metal layer are arranged on the same layer.

The embodiment of the application has the beneficial effects that: the embodiment of the application provides a display panel, which comprises a substrate, a display circuit and a light sensing circuit, wherein the display circuit comprises a plurality of pixel circuit units, the pixel circuit units are distributed in rows along a first direction in the display area at intervals and are distributed in columns along a second direction in the display area at intervals, the light sensing circuit comprises a plurality of sensing units and a plurality of power lines, the power lines are electrically connected with the corresponding sensing units and are used for transmitting constant-voltage direct current signals to the sensing units, and the power lines are arranged in the display area in an extending mode along the first direction, so that the occupied area of the light sensing circuit can be reduced, the opening area of each pixel circuit unit is increased, and the penetration rate of the display panel is improved.

Drawings

In order to more clearly illustrate the embodiments or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art, it is obvious that the drawings in the following description are only some embodiments of the application, and other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic plan view of a display panel according to the related art;

fig. 2 is a schematic diagram of a first structure of a display panel according to an embodiment of the application;

fig. 3 is a schematic plan view of a display panel according to an embodiment of the application;

FIG. 4 is a circuit diagram of a light sensing circuit according to an embodiment of the present application;

fig. 5 is a schematic plan view of a second type of display panel according to an embodiment of the application;

fig. 6 is a schematic diagram of a second structure of a display panel according to an embodiment of the application;

fig. 7 is a schematic plan view of a third embodiment of a display panel;

fig. 8 is a schematic diagram of a third structure of a display panel according to an embodiment of the application.

Detailed Description

The following description of the embodiments refers to the accompanying drawings, which illustrate specific embodiments in which the application may be practiced. The directional terms mentioned in the present application, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], etc., are only referring to the directions of the attached drawings. Accordingly, directional terminology is used to describe and understand the application and is not limiting of the application. In the drawings, like elements are designated by like reference numerals.

The application will be further described with reference to the accompanying drawings and specific examples.

As shown in fig. 2, fig. 2 is a schematic diagram of a first structure of a display panel according to an embodiment of the present application, where the display panel according to an embodiment of the present application is a liquid crystal display panel, and the display panel includes an array substrate 20, a color film substrate 30, and a liquid crystal layer 40 disposed between the array substrate 20 and the color film substrate 30.

Referring to fig. 2 and fig. 3, fig. 3 is a schematic plan view of a first display panel according to an embodiment of the present application, where the array substrate 20 includes a substrate 21, and a display circuit 22 and a light sensing circuit 23 disposed on the substrate 21. The substrate 21 may be provided in direct contact with one surface of the substrate 21 or may be in indirect contact with the substrate 21.

The display panel comprises a display area and a non-display area arranged on the periphery of the display area. The display circuit 22 may include a plurality of pixel circuit units 220, and the plurality of pixel circuit units 220 are arranged in rows at intervals along a first direction x and columns at intervals along a second direction y within the display area AA, the first direction x being different from the second direction y.

In the embodiment of the present application, the first direction x may refer to a horizontal direction, and the second direction y may refer to a vertical direction.

It should be noted that fig. 3 only illustrates 4 rows by 4 columns of pixel circuit units 220, and the number, size, shape and relative positional relationship of the pixel circuit units 220 illustrated in fig. 3 do not represent the number, size, shape and relative positional relationship of the pixel circuit units 220 in the display area AA of the display panel in practical applications.

In the embodiment of the present application, the display circuit 22 includes a first pixel circuit unit 221, a second pixel circuit unit 222 and a third pixel circuit unit 223, and the first pixel circuit unit 221, the second pixel circuit unit 222 and the third pixel circuit unit 223 may be used to charge the pixel electrode of the corresponding color sub-pixel.

For example, the first pixel circuit unit 221 corresponds to a green sub-pixel, the second display circuit 222 corresponds to a blue sub-pixel, and the third display circuit 223 corresponds to a red sub-pixel.

The adjacent three first, second and third pixel circuit units 221, 222 and 223 located in the same row form one pixel period, and the pixel periods may be cyclically arranged along the first direction x.

The plurality of pixel circuit units 220 located in the same column may correspond to subpixels of the same color. For example, the first plurality of pixel circuit units 221 of the first column may each correspond to a green sub-pixel, the second plurality of pixel circuit units 222 of the second column may each correspond to a blue sub-pixel, and the third plurality of pixel circuit units 223 of the third column may correspond to a red sub-pixel, as shown in fig. 3.

Further, the light sensing circuit 23 includes a plurality of sensing units 230 and a plurality of power lines, the sensing units 230 are disposed between the plurality of pixel circuit units 220, the power lines are electrically connected to the corresponding sensing units 230, the power lines can be used for transmitting constant voltage direct current signals to the sensing units 230, and at least one of the power lines extends along the first direction x in the display area AA.

The sensing unit 230 may correspond to one or more pixel circuit units 220.

In one embodiment, the matrix unit formed by the pixel circuit units 220 every 8 rows by 6 columns may include 16 first pixel circuit units 221, 16 second pixel circuit units 222, and 16 third pixel circuit units 223, and 1 sensing unit 230 may be disposed in the matrix unit.

Further, as shown in fig. 4, fig. 4 is a circuit diagram of a light sensing circuit provided in an embodiment of the present application, the sensing unit 230 includes a light sensing thin film transistor T1, a first storage capacitor C1 and a first switch thin film transistor T2, the light sensing circuit 23 may include a plurality of first power lines SVDD, a second power line SVGG and a read line RD, the first power line SVDD is electrically connected to a source electrode of the light sensing thin film transistor T1, the second power line SVGG is electrically connected to a gate electrode of the light sensing thin film transistor T1 and a first plate of the first storage capacitor C1, and a drain electrode of the light sensing thin film transistor T1 is connected to a source electrode of the first switch thin film transistor T2 and a second plate of the first storage capacitor C1. The gate of the first switching thin film transistor T2 is connected to the Scan line Scan, and the drain of the first switching thin film transistor T2 is connected to the read line RD.

The working principle of the light sensing circuit 23 is as follows: the first power line SVDD and the second power line SVGG are constant voltage sources, and the light-sensing thin film transistor T1 may be always in an on state and charge the first storage capacitor C1. The first switching thin film transistor T2 is an addressing switch, and the Scan line Scan controls the first switching thin film transistor T2 to be turned on row by row to detect the capacitance of the first storage capacitor C1.

When light irradiates the light-sensitive thin film transistor T1, the leakage current of the light-sensitive thin film transistor T1 increases, and the capacitance of the first storage capacitor C1 changes. The first switch thin film transistor T2 detects the change of the first storage capacitor C1, and at this time, the sensing signal read by the read line RD from the first switch thin film transistor T2 is the sensing signal generated by the light sensing thin film transistor T1 due to the light, and the photosensitive position of the display panel can be determined according to the sensing signal read by the read line.

Further, the pixel circuit unit 220 may include a second switching thin film transistor T3, a second storage capacitor C2, and a third storage capacitor C3, where the second storage capacitor C2 is a liquid crystal capacitor formed between the pixel electrode and the common electrode on the color film substrate, and the third capacitor C3 is a capacitor formed between the pixel electrode and the common electrode on the array substrate 20 side.

As shown in fig. 2, the array substrate 20 may include a gate metal layer 201, a gate insulating layer 202, a semiconductor layer 203, a source-drain electrode metal layer 204, a passivation layer 205, and a pixel electrode 206 sequentially stacked on the substrate 21.

The gate metal layer 201 may include a plurality of patterned gates and a plurality of Scan lines Scan extending along the first direction x and spaced apart in the second direction y, the Scan lines Scan being connected to the gates of the second switching thin film transistors T3, and the Scan lines Scan may be used to transmit Scan control signals for controlling the second switching thin film transistors T3 to be turned on and off.

The material of the gate metal layer 201 may be any one or more of copper, aluminum, silver, molybdenum, titanium, magnesium, and the like. The gate metal layer 201 may be a single-layer metal thin film structure formed of any one of the above-mentioned metal materials or alloy materials, or may be a multi-layer metal thin film structure formed by sequentially stacking the above-mentioned at least two metal materials or alloy materials.

The gate insulating layer 202 is formed of a transparent inorganic material, which may be any one or a combination of silicon nitride, silicon oxide, or silicon oxynitride.

The semiconductor layer 203 includes a plurality of semiconductor patterns disposed opposite to the gate electrode, and the material of the semiconductor layer 203 is amorphous silicon (a-Si).

The source-drain electrode metal layer 204 may include a plurality of patterned source electrodes, a plurality of patterned drain electrodes, and a plurality of Data lines Data extending along the second direction y and distributed at intervals in the first direction x, wherein the Data lines Data are connected to the source electrodes of the second switching thin film transistors T3, the drain electrodes of the second switching thin film transistors T3 are electrically connected to the corresponding pixel electrodes, and when the second switching thin film transistors T3 are turned on, the pixel electrodes 206 may be charged through the Data lines Data.

The source/drain electrode metal layer 204 may be made of any one or more of copper, aluminum, silver, molybdenum, titanium, magnesium, and the like. The source-drain electrode metal layer may be a single-layer metal thin film structure formed by any one of the above metal materials or alloy materials, or may be a multi-layer metal thin film structure formed by sequentially stacking at least two of the above metal materials or alloy materials.

Further, at least one of the first power line SVDD and the second power line SVGG is disposed in the display area AA extending along the first direction x.

In one embodiment, as shown in fig. 3, the first power line SVDD extends along the first direction x in the display area AA, and the second power line SVGG extends along the second direction y in the display area AA.

The plurality of first power lines SVDD may be disposed between any two adjacent columns of the pixel circuit units 220 in the display area, so that the area occupied by the light sensing circuit in the display area may be reduced, thereby improving the aperture ratio of the display circuit and the transmittance of the display panel.

The plurality of first power lines SVDD may be connected together in the non-display area after extending from the display area to the non-display area along the first direction x.

Specifically, the plurality of first power lines SVDD may be connected to the same signal trace in the non-display area, and the signal trace may be electrically connected to a power source to receive a first power signal provided by the power source, where the first power signal may be a constant voltage dc signal.

The second power lines SVGG may extend in the second direction y to the non-display area in the display area and are electrically connected to a power source to receive a second power signal provided by the power source, where the second power signal may be a constant voltage dc signal capable of turning on the light sensing thin film transistor T1.

In the embodiment of the present application, as shown in fig. 2, the first power line SVDD and the gate metal layer 201 are disposed on the same layer, and the first power line SVDD and the gate metal layer 201 may be formed by the same metal film forming process. The second power line SVGG and the source-drain electrode metal layer 204 are disposed on the same layer, and the second power line SVGG and the source-drain electrode metal layer 204 may be formed by the same metal film forming process.

In one embodiment, as shown in fig. 5, fig. 5 is a second schematic plan view of a display panel according to an embodiment of the present application, and the structure of the second schematic plan view is substantially the same as that of the display panel shown in fig. 3, except that: the first power line SVDD extends in the second direction y in the display area AA, and the second power line SVGG extends in the first direction x in the display area AA.

The second power lines SVGG may be disposed between any two adjacent columns of the pixel circuit units 220 in the display area, so as to reduce the area occupied by the light sensing circuit in the display area, thereby improving the aperture ratio of the display circuit and the transmittance of the display panel.

The second power lines SVGG may be connected together in the non-display area after extending from the display area to the non-display area along the first direction x.

Specifically, a plurality of the second power lines SVGG may be connected to the same signal trace in the non-display area, and the signal trace may be electrically connected to a power source to receive a second power signal provided by the power source.

The first power lines SVDD may extend in the second direction y to the non-display area in the display area and be electrically connected to the power source to receive the second power signal provided by the power source.

In the embodiment of the present application, as shown in fig. 6, fig. 6 is a schematic diagram of a second structure of the display panel provided in the embodiment of the present application, where the second power line SVGG and the gate metal layer 201 are disposed on the same layer, and the second power line SVGG and the gate metal layer 201 may be formed by the same metal film forming process. The first power line SVDD and the source-drain electrode metal layer 204 are disposed on the same layer, and the first power line SVDD and the source-drain electrode metal layer 204 may be formed by the same metal film forming process.

In one embodiment, as shown in fig. 7, fig. 7 is a third schematic plan view of a display panel according to an embodiment of the present application, and the structure of the third schematic plan view is substantially the same as that of the display panel shown in fig. 3, except that: the first power line SVDD extends in the second direction y in the display area AA, and the second power line SVGG extends in the second direction y in the display area AA.

The plurality of first power lines SVDD may be disposed between any two adjacent columns of the pixel circuit units 220 in the display area, the plurality of second power lines SVGG may also be disposed between any two adjacent columns of the pixel circuit units 220 in the display area, and may be disposed in parallel with the Scan lines Scan at intervals, so that an area occupied by the light sensing circuit in the display area may be reduced, thereby improving an aperture ratio of the display circuit, and improving a transmittance of the display panel.

The plurality of first power lines SVDD may be connected together after extending from the display area to the non-display area along the first direction x, and the plurality of second power lines SVGG may be connected together after extending from the display area to the non-display area along the first direction x.

Specifically, a plurality of the first power lines SVDD may be connected to the same signal trace in the non-display area, and the signal trace may be electrically connected to a power source to receive a first power signal provided by the power source. The second power lines SVGG may be connected to the same signal trace in the non-display area, and the signal trace may be electrically connected to a power source to receive a second power signal provided by the power source.

In the embodiment of the present application, as shown in fig. 8, fig. 8 is a schematic diagram of a third structure of the display panel provided in the embodiment of the present application, where the first power line SVDD and the second power line SVGG are disposed on the same layer as the gate metal layer 201, and the first power line SVDD and the second power line SVGG may be formed by the same metal film forming process with the gate metal layer 201.

Further, one of the first power lines SVDD or one of the second power lines SVGG is disposed between two adjacent rows of the pixel circuit units 220.

In one embodiment, only one first power line SVDD or only one second power line SVGG is disposed between two adjacent rows of the pixel units 220.

As shown in fig. 7, only one second power line SVGG is disposed between the first row of pixel units and the second row of pixel units, only one first power line SVDD is disposed between the fourth row of pixel units and the fifth row of pixel units (not shown in the drawings), and so on, other power lines not shown may be described with reference to the above embodiments, and no description is given here. Therefore, the area of the pixel units can be prevented from being compressed due to the fact that the number of the power lines between the two adjacent rows of pixel units is too large, and meanwhile, the same number of the power lines can be arranged between any two adjacent rows of pixel units, so that the light transmittance between any two adjacent columns of pixel units is equal or close to that of the light transmittance between any two adjacent columns of pixel units.

Further, the adjacent rows of pixel circuit units 220 form a repeating unit, the display circuit has a plurality of repeating units, a row of sensing units 230 are correspondingly disposed in the repeating unit, the sensing units are distributed at intervals along the first direction, and at least one first power line SVDD or at least one second power line SVGG is correspondingly disposed in the repeating unit.

In one embodiment, as shown in fig. 7, four adjacent rows of pixel units 220 shown in fig. 7 may form a repeating unit, where a row of sensing units 230 may be correspondingly disposed in the repeating unit, and one first power line SVDD and three second power lines SVGG may be correspondingly disposed in the repeating unit, where the one first power line SVDD and the three second power lines SVGG are respectively disposed between two adjacent rows of display units in the repeating unit or on one side of any one of the first and the last two rows of display units.

The sensing unit 230 includes a plurality of first storage capacitors C1 corresponding to the second power lines SVGG one to one, the second power lines SVGG are electrically connected to the corresponding first plates of the first storage capacitors C1, and the second plates of the plurality of first storage capacitors C1 are electrically connected to the drains of the light-sensitive thin film transistors T1, so as to connect the plurality of first storage capacitors C1 in the sensing unit 230 in parallel, thereby improving the capacitance value of the storage capacitors in the sensing unit 230.

In other embodiments, three first power lines SVDD and one second power line SVGG may be correspondingly disposed in the repeating unit; alternatively, the repeating units may be correspondingly provided with the first power lines SVDD and the second power lines SVGG with equal or unequal numbers, which are not described herein.

According to the display panel provided by the embodiment of the application, the embodiment of the application also provides an electronic device, which comprises the display panel provided by the embodiment of the application, and the electronic device can be a mobile terminal, such as a color electronic paper, a color electronic book, a smart phone and the like, and can also be a wearable terminal, such as a smart watch, a smart bracelet and the like, and can also be a fixed terminal, such as a color electronic billboard, a color electronic poster and the like.

The embodiment of the application has the beneficial effects that: the embodiment of the application provides a display panel, which comprises a substrate, a display circuit and a light ray sensing circuit, wherein the display circuit comprises a plurality of pixel circuit units, the pixel circuit units are distributed in rows along a first direction at intervals in a display area and are distributed in columns along a second direction at intervals, the first direction is different from the second direction, the light ray sensing circuit comprises a plurality of sensing units and a plurality of power wires, the power wires are electrically connected with the corresponding sensing units and are used for transmitting constant-voltage direct current signals to the sensing units, and the area occupied by the light ray sensing circuit can be reduced by extending the power wires along the first direction in the display area, so that the opening area of the display circuit is increased, and the penetration rate of the display panel is improved.

In summary, although the present application has been described in terms of the preferred embodiments, the preferred embodiments are not limited to the above embodiments, and various modifications and alterations can be made by those skilled in the art without departing from the spirit and scope of the application, and the scope of the application is defined by the appended claims.

Claims

1. A display panel comprising a display area, the display panel further comprising:

a substrate;

the display circuit is arranged on the substrate and comprises a plurality of pixel circuit units, the pixel circuit units are distributed in rows along a first direction at intervals in the display area, the pixel circuit units are distributed in columns along a second direction at intervals, the first direction is different from the second direction, adjacent rows of pixel circuit units form a repeating unit, and the display circuit is provided with a plurality of repeating units;

the sensing units are arranged among the pixel circuit units and comprise light-sensitive thin film transistors;

the plurality of power lines are electrically connected with the corresponding sensing units and used for transmitting constant-voltage direct-current signals to the sensing units, the power lines comprise a first power line and a second power line, the first power line is electrically connected with the source electrode of the light-sensitive thin film transistor, the second power line is electrically connected with the grid electrode of the light-sensitive thin film transistor, and the first power line and the second power line are arranged in the display area in an extending mode along the first direction;

the pixel circuit comprises pixel circuit units, wherein a first power line or a second power line is arranged between every two adjacent rows of pixel circuit units, a row of sensing units which are distributed along the first direction at intervals are correspondingly arranged in each repeating unit, a first power line and a plurality of second power lines are correspondingly arranged in each repeating unit, each sensing unit comprises a plurality of storage capacitors which are in one-to-one correspondence with the second power lines, each second power line is electrically connected with a corresponding first polar plate of each storage capacitor, and a plurality of second polar plates of each storage capacitor are electrically connected with drain electrodes of the light-sensitive thin film transistors.

2. The display panel according to claim 1, wherein the display panel includes a gate metal layer, a gate insulating layer, and a source-drain electrode metal layer which are stacked;