CN114781295B

CN114781295B - Logic circuit scale reduction method and device

Info

Publication number: CN114781295B
Application number: CN202210700998.0A
Authority: CN
Inventors: 邵中尉; 张吉锋
Original assignee: Shanghai Guowei Silcore Technology Co ltd
Current assignee: Shanghai Sierxin Technology Co.,Ltd.
Priority date: 2022-06-21
Filing date: 2022-06-21
Publication date: 2022-09-09
Anticipated expiration: 2042-06-21
Also published as: CN114781295A

Abstract

The embodiment of the application provides a method and a device for reducing the scale of a logic circuit, wherein resource evaluation is performed on an example tree of the logic circuit, namely resource quantity information of each node in the example tree is obtained to obtain the resource distribution condition of the example tree, one or more pruning positions are automatically determined in the example tree based on the relation between the node resource quantity and a resource threshold interval and the internal compactness of the node, and then the example tree is pruned at the pruning positions, so that the scale reduction of the logic circuit is completed. According to the scheme in the embodiment of the application, the pruning position can be scientifically calculated and automatically pruned by means of the node resource amount, the resource threshold interval, the node internal compactness and the like, so that the efficiency during scale reduction operation is improved, and the pruning position is more reasonable and accurate, so that the effect of scale reduction operation is improved, and the processing difficulty and the complexity of processes such as follow-up segmentation can be effectively reduced.

Description

Logic circuit scale reduction method and device

Technical Field

The present disclosure relates to the field of integrated circuit technologies, and in particular, to a method and an apparatus for scaling down a logic circuit.

Background

Often, the user's logic circuit design exists in the form of RTL (register transfer level) or netlist, and after being parsed by the parser, the user's logic circuit design forms a tree structure in the memory, called an instance tree. In the example tree, the top node represents the top module of the user, the node directly connected with the next layer of the node is called a child node of the node, and the corresponding node is called a parent node of the next layer of the node. The module corresponding to the child node is instantiated within the parent node, i.e., declared within the module corresponding to the parent node. The bottommost node, i.e., the node without children, is called a leaf node. An example tree is shown with reference to fig. 1.

In a prototype verification system that requires multiple FPGAs (Field Programmable Gate arrays), a large-scale instance tree is usually formed after a user large-scale logic circuit design is analyzed, and subsequent EDA processes are processed based on the entire instance tree. However, many operations performed on a large-scale instance tree consume a large amount of time, placing a large load on the CPU and memory of the computer. If the size of the instance tree is not reduced, that is, the entire instance tree is used as an object for operation, a large amount of memory resources are occupied to keep the entire instance tree in a state of being accessible at any time, and meanwhile, various operations such as searching, traversing, boundary determination, connection relation extraction and the like need to consume a large amount of CPU computing resources to access a large-scale range. Meanwhile, the huge scale is not beneficial to the processes of parallel logic synthesis, layout and wiring and the like of the RTL level instance tree by the existing parallel tool. For current segmentation tools, fast layout planning is the main functional location, rather than consuming a lot of unnecessary time to process the whole tree and carefully analyze the parts. Therefore, it is necessary to perform a scale reduction process on the large-scale instance tree, which is a planning work before a subsequent series of operations such as logic synthesis, segmentation, incremental processing, etc., and determines the processing complexity and mode of the whole processing flow.

From the perspective of the example tree, the scale-down operation can be visually regarded as pruning the tree, i.e. the tree structure cuts all its descendant nodes from a certain (or some) node, the subtree formed by the node and its descendant nodes is cut and then stored in another position, and the original cutting position is replaced by a new leaf node, which integrally represents the part of the cut subtree and has the same external port with the subtree vertex. The scaled-down instance tree is referred to as the remainder tree. By pruning, the size of the original tree is reduced. As an example, refer to fig. 2 to fig. 3, in fig. 2, the subtree with the node a as the vertex is cut from the original tree and then saved, and the position a of the original tree is replaced by a new node T, as shown in fig. 3, T represents the originally existing subtree, i.e. represents all the nodes that are cut, and the external interfaces of T, i.e. the ports, which may include, for example, the direction, width, number, type, name, etc. of the communication signal are completely consistent with a.

The inventor finds that in the prior art, the scale of the instance tree can be reduced only by a simple method, the selection of the cutting positions and the number of the cuts depend on manual experience, scientific basis is lacked, so that the processing efficiency is low during scale reduction, the effect of scale reduction is greatly reduced, nodes with overlarge resources appear in the tree structure after scale reduction frequently, or subtrees with tight internal connection relations are omitted, and the like. The node with too large resource will affect the quality of the solution of the subsequent segmentation result, resulting in too large weight sum of the Cut links. If the subtrees with close internal connection relations are not cut and exist in the residual trees, the selection of the partition boundaries and the acquisition and partition processes of the connection relations of the boundary nodes are more costly, and the close connection relations are exposed in the processes, so that the processing difficulty and complexity are increased. In addition, in the prior art, the scale reduction process cannot be automatically processed, the instance tree structure needs to be manually modified, the external port of the shearing position needs to be reset, and the efficiency is low and errors are easy to occur.

Disclosure of Invention

The application provides a method and a device for reducing the scale of a logic circuit, which are used for solving the problems of poor effect and low efficiency when the scale reduction operation is carried out on the logic circuit.

According to a first aspect of embodiments of the present application, there is provided a logic circuit scale-down method, the method including:

parsing a logic circuit design of a user through a parser to form an instance tree in a memory;

acquiring resource quantity information of each node in the example tree, wherein the resource quantity information of the node comprises resource quantities of various resources consumed by a logic circuit module corresponding to the node;

acquiring resource threshold interval information, wherein the resource threshold interval information comprises resource quantity threshold intervals of various resources;

determining one or more pruning positions in the example tree according to the resource threshold interval information and the resource amount information of the nodes and combining the internal compactness of the nodes, wherein the internal compactness is used for indicating the compactness of the internal connection relation of the nodes;

pruning the instance tree at the pruning location to accomplish logic circuit scaling.

Optionally, the obtaining resource amount information of each node in the instance tree includes:

acquiring resource amount information of each node layer by layer from the bottommost layer of the example tree to the topmost node;

if the current node is not a leaf node, the resource amount information of the current node comprises the resource amounts of all sub-nodes of the current node and communication resources consumed by all connecting lines except sub-modules in the current module, wherein the current module is a logic circuit module corresponding to the current node, and the sub-modules are logic circuit modules corresponding to the sub-nodes of the current node;

and if the current node is a leaf node, the resource amount information of the current node comprises the resource amount of various resources consumed by the logic circuit module corresponding to the current node.

Optionally, determining one or more pruning positions in the instance tree according to the resource threshold interval information and the resource amount information of the node and by combining the internal compactness of the node includes:

accessing nodes which are not accessed in the example tree from the top to the bottom from the topmost node;

for the current node being accessed, if the current node is a leaf node, skipping, continuing to access the next node which is not accessed, and if the current node is not a leaf node, judging whether the current node is a legal resource node or not according to the resource threshold interval information and the resource quantity information of the current node;

if the current node is a resource legal node, then: obtaining the internal compactness of the current node, if the internal compactness of the current node exceeds a preset compactness threshold, marking the current node as the sub-node of the pruning position and not accessing the current node, if the internal compactness of the current node does not exceed the compactness threshold, further judging whether the sub-nodes of the current node are all legal resources, if the sub-nodes of the current node are all legal resources, continuing to access the sub-node of the current node, and if the sub-nodes of the current node are not all legal resources, marking the current node as the sub-node of the pruning position and not accessing the current node;

and if the current node is not the legal resource node, continuing to access the child node of the current node.

Optionally, the determining, according to the resource threshold interval information and the resource amount information of the current node, whether the current node is a legal resource node includes:

and if the resource quantity of each type of resource of the current node is in the range of the corresponding threshold interval in the resource threshold interval information, judging that the current node is a legal resource node.

Optionally, obtaining the internal compactness of the current node includes:

according to the following steps:

obtaining the internal compactness T of the current node A _A Where n is the number of connections between the sub-nodes of node A in the circuit diagram, Nnodes _i Representing the number of nodes on the ith line, Source _ij Representing the resource value of the jth node on the ith connecting line, wherein the resource value is the sum of the resource amount of various types of resources of the node multiplied by corresponding coefficients respectively, and the source _ avg _i Represents the average value of the resource values of all the nodes on the ith connecting line, K, B is a preset constant.

Optionally, the method further includes:

for the current node which is accessed, before judging whether the current node is a legal resource node, judging whether the current node is a special node;

if the current node is a special node, marking the current node as the pruning position and not accessing the child node of the current node;

the special node is a node at a pruning position designated by a user or a node which cannot enter the special node.

Optionally, pruning the example tree at the pruning position includes:

and cutting off and storing a subtree at the pruning position from the example tree, and replacing the subtree at the pruning position with a new leaf node, wherein the subtree comprises a node corresponding to the pruning position and all descendant nodes thereof, and the new leaf node and the vertex of the subtree have the same external port.

Optionally, pruning and saving the subtree at the pruning position from the instance tree, and replacing the subtree at the pruning position with a new leaf node, including:

for RTL level logic circuit design:

copying a target module, renaming and storing, wherein the target module is a logic circuit module corresponding to the vertex of the subtree;

deleting the logic whole in the original target module and only keeping the specified information of the logic whole;

for netlist level logic circuit design:

cutting a target netlist and all descendant netlists thereof, and saving the target netlist after renaming, wherein the target netlist is a netlist corresponding to the pruning position;

and newly building a netlist top layer with the same name as the original target netlist, rebuilding an external communication port of the newly built netlist according to the input port and the output port of the original target netlist top layer, and recovering the connection relation between the connecting line and the port in the father netlist of the newly built netlist.

According to a second aspect of embodiments of the present application, there is provided a logic circuit scale reduction apparatus, the apparatus including:

the example tree generation unit is used for analyzing the logic circuit design of the user through the syntax parser to form an example tree in the memory;

the resource counting unit is used for acquiring the resource amount information of each node in the example tree, wherein the resource amount information of the node comprises the resource amounts of various resources consumed by the logic circuit module corresponding to the node;

a resource threshold interval obtaining unit, configured to obtain resource threshold interval information, where the resource threshold interval information includes a resource amount threshold interval of each type of resource;

a pruning position determining unit, configured to determine one or more pruning positions in the instance tree according to the resource threshold interval information and the resource amount information of the node in combination with an internal closeness of the node, where the internal closeness is used to indicate a closeness degree of an internal connection relationship of the node;

and the pruning unit is used for pruning the example tree at the pruning position so as to finish the scale reduction of the logic circuit.

Optionally, the resource statistics unit is specifically configured to:

Optionally, the pruning position determining unit is specifically configured to:

for the current node being accessed, if the current node is a leaf node, skipping, continuing to access the next node which is not accessed, and if the current node is not the leaf node, judging whether the current node is a legal resource node according to the resource threshold interval information and the resource quantity information of the current node;

if the current node is a resource legal node, then: obtaining the internal compactness of the current node, if the internal compactness of the current node exceeds a preset compactness threshold, marking the current node as the pruning position and not accessing the child nodes of the current node, if the internal compactness of the current node does not exceed the compactness threshold, further judging whether the child nodes of the current node are all legal resources nodes, if the child nodes of the current node are all legal resources nodes, continuing accessing the child nodes of the current node, and if the child nodes of the current node are not all legal resources nodes, marking the current node as the pruning position and not accessing the child nodes of the current node;

and if the current node is not the legal node of the resource, continuing to access the child node of the current node.

Optionally, when the pruning position determining unit is configured to determine whether the current node is a legal resource node according to the resource threshold interval information and the resource amount information of the current node, the pruning position determining unit is specifically configured to:

Optionally, when the pruning position determining unit is configured to obtain the internal compactness of the current node, the pruning position determining unit is specifically configured to:

according to the following steps:

Optionally, the pruning position determining unit is further configured to:

if the current node is a special node, marking the current node as the pruning position and not accessing the child node of the current node any more;

Optionally, the pruning unit is specifically configured to:

and cutting off and storing the subtree at the pruning position from the example tree, and replacing the subtree at the pruning position with a new leaf node, wherein the subtree comprises a node corresponding to the pruning position and all descendant nodes thereof, and the new leaf node and the vertex of the subtree have the same external port.

Optionally, the pruning unit is configured to, when the subtree at the pruning position is pruned from the instance tree and stored, and the subtree is replaced with a new leaf node at the pruning position, specifically:

for RTL level logic circuit design:

deleting the logic whole in the original target module and only keeping the appointed information of the logic whole;

for netlist level logic circuit design:

and newly building a netlist top layer with the same name as the original target netlist, rebuilding an external communication port of the newly built netlist according to the input and output ports of the top layer of the original target netlist, and restoring the connection relation between the connecting lines and the ports in the father netlist of the newly built netlist.

The technical scheme provided by the embodiment of the application can have the following beneficial effects:

in the embodiment of the application, resource quantity information of each node in the instance tree is obtained, namely, the instance tree is subjected to resource evaluation to obtain the resource distribution condition of the instance tree, then one or more pruning positions are automatically determined in the instance tree based on the relation between the resource quantity of the node and the resource threshold interval and the internal compactness of the node, and then the instance tree is pruned at the pruning positions, so that the scale reduction of the logic circuit is completed. According to the scheme in the embodiment, the pruning position can be scientifically calculated and automatically pruned by means of the node resource amount, the resource threshold interval, the node internal compactness and the like, so that the efficiency during scale reduction operation is improved, and the pruning position is more reasonable and accurate, so that the effect of scale reduction operation is improved, and the processing difficulty and complexity of processes such as follow-up segmentation can be effectively reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive labor. Furthermore, these descriptions should not be construed as limiting the embodiments, wherein elements having the same reference number designation are identified as similar elements throughout the figures, and the drawings are not to scale unless otherwise specified.

FIG. 1 is an example tree diagram;

FIG. 2 is a schematic illustration of example tree pruning;

FIG. 3 is a schematic representation of an example tree after pruning;

FIG. 4 is a schematic flow chart diagram of a method for scaling a logic circuit according to an embodiment of the present application;

FIG. 5 is a schematic diagram of a node and its children in an embodiment of the present application;

FIG. 6 is a schematic diagram of a connection relationship between child nodes in an embodiment of the present application;

FIG. 7 is another schematic flow chart diagram of a method for scaling down a logic circuit according to an embodiment of the present application;

fig. 8 is a schematic diagram of a logic circuit scale reduction apparatus according to an embodiment of the present application.

Detailed Description

The following describes technical solutions in the embodiments of the present application in detail with reference to the drawings in the embodiments of the present application. When referring to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise specified. It should be apparent that the examples described below are only a part of examples of the present application and not all examples, or that the embodiments described in the following exemplary examples do not represent all embodiments consistent with the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

When the terms "first", "second", "third", and the like appear in the description, the claims, and the above-described drawings of the embodiments of the present application, they are used to distinguish different objects, and not to limit a specific order. In the embodiments of the present application, words such as "exemplary" or "for example" are used to mean serving as an example, instance, or illustration. Any embodiment or design described herein as "exemplary" or "e.g.," should not be construed as preferred or advantageous over other embodiments or designs. Rather, use of the word "exemplary" or "such as" is intended to present concepts related in a concrete fashion.

Fig. 4 is a schematic flow chart of a method for scaling down a logic circuit according to an embodiment of the present application. Referring to fig. 4, the method may include:

in step S401, the user' S logic circuit design is parsed by a parser to form an instance tree in memory.

The user's logic circuit design often exists in the form of RTL or netlist, and after being parsed by the parser, the user's logic circuit design forms an instance tree in the memory. The embodiment is not limited to how the parser is used to parse the logic circuit design of the user, and for example, an existing parser may be used.

In step S402, resource amount information of each node in the instance tree is obtained, where the resource amount information of a node includes resource amounts of various types of resources consumed by the logic circuit module corresponding to the node.

The resource amount of each resource consumed by the logic circuit module corresponding to the node is also the resource amount of each resource consumed after the node is allocated to the FPGA.

For example, in the instance tree, resource evaluation can be performed according to syntax statements, device declarations, connection types, declarations of sub-modules in each node, that is, resources consumed after being allocated to the FPGA, such as IO, LUT, BUFF, FF, and the like.

As an example, in this embodiment or some other embodiments of the present application, the instance tree node resources may be evaluated from bottom to top, that is:

acquiring resource amount information of each node in the instance tree may specifically include:

and acquiring the resource amount information of each node layer by layer from the bottommost layer of the example tree to the topmost node.

Based on whether it is a leaf node, there are two cases:

and if the current node is not a leaf node, the resource amount information of the current node comprises the resource amounts of all sub-nodes of the current node and communication resources consumed by all connecting lines except the sub-modules in the current module, wherein the current module is a logic circuit module corresponding to the current node, and the sub-modules are logic circuit modules corresponding to the sub-nodes of the current node. In other words, if the current node is not a leaf node, the current module includes sub-modules, and the connections between the sub-modules and the connection between the sub-modules and the edge of the current module consume communication resources in addition to the sub-modules themselves, so that the connections need to be counted when calculating the resource amount of the current module.

By way of example, the classes of resources may include LUT, FF, PIO, INT, DCM, BRAM, DSP, PPC, TBUF, and like types of device resources.

In step S403, resource threshold interval information is obtained, where the resource threshold interval information includes a resource amount threshold interval of each resource type.

For example, corresponding threshold intervals, which are collectively referred to as resource threshold interval information, may be set for the types of device resources such as LUT, FF, PIO, INT, DCM, BRAM, DSP, PPC, TBUF, and the like. The threshold interval for each resource represents the amount of such resources that the leaf nodes of the remaining trees have that should be within the threshold interval. In principle, if the resources of the leaf nodes of the remaining trees are too large, the scale reduction is excessive, the scale of the remaining trees is too small, and excessive connection detail information is ignored, so that too few boundary nodes are involved in the segmentation process, the segmentation quality is not high, and the interconnection lines of a multi-logic array segmentation system are increased; if the resources of the leaf nodes of the remaining trees are too small, the scale of the remaining trees is too large, the shearing degree is too small, the scale of the original trees cannot be effectively reduced, and the effect of reducing the processing complexity cannot be achieved.

In step S404, one or more pruning positions are determined in the instance tree according to the resource threshold interval information and the resource amount information of the node, and in combination with the internal closeness of the node, where the internal closeness is used to indicate the closeness of the internal connection relationship of the node. This step also determines the pruning position.

As an example, in this embodiment or some other embodiments of the present application, determining pruning positions, that is, determining one or more pruning positions in the instance tree according to the resource threshold interval information and the resource amount information of the node and by combining the internal closeness of the node, may specifically include:

a) and accessing the nodes which are not accessed in the example tree from the top to the bottom from the topmost node.

b) And for the current node being accessed, if the current node is a leaf node, skipping, continuing to access the next node which is not accessed, and if the current node is not the leaf node, judging whether the current node is a legal resource node according to the resource threshold interval information and the resource quantity information of the current node.

As an example, if the resource amount of each type of resource of the current node is within the range of the corresponding threshold interval in the resource threshold interval information, it is determined that the current node is a legal node of the resource.

It is easy to understand that if the current node is a leaf node, i.e. there is no child node, it is not necessary to determine whether it is a legal node of the resource, because it is meaningless to cut at the leaf node. The leaf node may be skipped at this point and the next unvisited node may be selected for continued processing.

c) If the current node is a resource legal node, then: obtaining the internal compactness of the current node, if the internal compactness of the current node exceeds a preset compactness threshold, marking the current node as the pruning position and not accessing the child nodes of the current node, if the internal compactness of the current node does not exceed the compactness threshold, further judging whether the child nodes of the current node are all legal resources, if the child nodes of the current node are all legal resources, continuing accessing the child nodes of the current node, and if the child nodes of the current node are not all legal resources, marking the current node as the pruning position and not accessing the child nodes of the current node.

d) And if the current node is not the legal node of the resource, continuing to access the child node of the current node.

Through the above access and traversal, the positions where pruning can be performed can be found.

In addition, some special nodes can be directly marked as pruning positions, that is, the method also comprises the following steps:

if the current node is a special node, the current node is marked as the pruning position and does not access the child nodes of the current node any more.

As an example, the special node may be a node at a pruning location specified by a user or a node that is inaccessible inside thereof.

The fix node at the pruning position specified by the user is a node fixedly distributed in a certain FPGA in the splitting process of the instance tree, and the node is directly used as a residual tree leaf node because the node and the interior (namely, a lower layer node) of the node are integrally distributed according to the information specified by the user and cannot be split by cutting. The node which can not enter the node, namely the IP core node, is a third-party source code in user design, and a user does not want to enter the node to perform any analysis and processing, only wants to interface with a communication port of the node and can not enter the node to be cut naturally.

In step S405, the instance tree is pruned at the pruning location to complete logic circuit scaling.

After the pruning position is determined, the embodiment is not limited to a specific pruning operation, and those skilled in the art can select and design according to different requirements/different scenarios, and these choices and designs can be used herein without departing from the spirit and scope of the present application.

As an example, pruning the example tree at the pruning position may specifically include:

In a particular implementation, both RTL and netlist cases may be encountered, and the processing may be slightly different. Specifically, pruning and saving the subtree at the pruning location from the instance tree, replacing the subtree at the pruning location with a new leaf node, may include:

for RTL level logic circuit design:

deleting the logic whole in the original target module, and only keeping the appointed information (such as port direction, bit width, signal name, resource amount information and the like) of the logic whole;

for netlist level logic circuit design:

Some further explanation of the internal tightness follows:

the internal tightness is used for indicating the tightness of the connection relation in the node. The larger the value is, the tighter the internal connection of the node is, at this time, if the subtree taking the node as the vertex is cut down as a whole, the complex connection relation in the node can be prevented from being exposed, and the scale reduction effect is better; conversely, the smaller the value, the more clipping can be done deep inside the node because its internal connections are simple. In the actual implementation process, a person skilled in the art can select and design the specific definition of the internal compactness according to different requirements/different scenarios, and the embodiment is not limited.

An exemplary definition of internal tightness is given below:

can be based on the following equation:

obtaining the internal compactness T of the current node A _A Where n is the number of connections between the sub-nodes of node A in the circuit diagram, Nnodes _i Representing the number of nodes on the ith connection, Source _ij Representing the resource value of the jth node on the ith connecting line, wherein the resource value is the sum of the resource amount of various types of resources of the node multiplied by corresponding coefficients respectively, and the source _ avg _i Represents the average value of the resource values of all the nodes on the ith connecting line, K, B is a preset constant.

Reference may be made to fig. 5-6 for example. Fig. 5 is a schematic diagram of a node and its child nodes in the embodiment of the present application. Fig. 6 is a schematic diagram of a connection relationship between child nodes in an embodiment of the present application.

In fig. 5, node a has 4 child nodes B, C, D, E. If the internal affinity of node A is to be computed, the resource values of its children are computed first. Taking the node B as an example, the resources of the node B may be represented as a resource _ B as a whole, and the resource _ B, that is, the resource value of the node B, may be set as a sum of various resource amounts of the node B multiplied by a scaling coefficient preset by a user (that is, a sum of the resource amounts of various resources multiplied by corresponding coefficients, respectively).

Then look at the circuit connection relationship of the child nodes. The circuit connection relationship of the node B, C, D, E is represented by a connection line (wires) in the logic circuit module (module) corresponding to the a node, and a B, C, D, E circuit connection relationship diagram can be obtained according to the connection relationship, as shown in fig. 6 as an example, and one connection line in the circuit diagram can connect more than two nodes. In FIG. 6, there are two lines, a and b, where the line a connects to the node B, C and the line b connects to the node D, C, E.

The internal tightness of the node a can be calculated according to the above formula, where n represents the total number of the connection lines in the circuit diagram, and n is 2 in fig. 6; nnodes _i Representing the total number of nodes on the ith connecting line; K. b is a configurable fixed constant; sour _ij Resource value, Source _ avg, representing the jth node in the ith connection _i And representing the average value of the resource values of all the nodes associated with the ith connecting line.

Representing the balance of the resource size distribution for all nodes associated with the ith line. T is _A Is the cumulative sum of the products of the number of nodes on each link and the resource balance, T _A The comprehensive effect of the resource distribution balance degree and the interconnection quantity of all the child nodes of the node A is represented.

The meaning of the internal compactness calculation formula is explained further below:

the internal compactness of a node is related to the number of connecting lines among child nodes in the node, the number of connecting line associated nodes and the resource difference degree among the nodes, and the greater the number of connecting lines of the child nodes is, the greater the number of connecting line associated nodes is, the closer the resource size among the nodes is, the greater the internal compactness of the father node A is. The internal compactness is also related to the resource balance among the child nodes, because if the resource is not uniform among the nodes, the resource of some nodes on the connecting line is overlarge, and for the nodes with large resource, the connection function and effect of the connecting line connected with the nodes with large resource are weakened. If the inside of the node with large resources is further analyzed and the node with large resources (namely the lower layer) is entered for carrying out the shearing operation, the method is more favorable for obtaining a resource-balanced residual tree leaf node set.

In the embodiment, resource amount information of each node in the instance tree is obtained, namely, the instance tree is subjected to resource evaluation to obtain the resource distribution condition of the instance tree, then one or more pruning positions are automatically determined in the instance tree based on the relation between the resource amount of the node and the resource threshold interval and by combining the internal compactness of the node, and then the instance tree is pruned at the pruning positions, so that the scale reduction of the logic circuit is completed. According to the scheme in the embodiment, the pruning position can be scientifically calculated and automatically pruned by means of the node resource amount, the resource threshold interval, the node internal compactness and the like, so that the efficiency during scale reduction operation is improved, and the pruning position is more reasonable and accurate, so that the effect of scale reduction operation is improved, and the processing difficulty and complexity of processes such as follow-up segmentation can be effectively reduced.

The scheme of the present application is further described below with reference to specific application scenarios. Of course, the following application scenarios are only exemplary, and in practical applications, the application scenarios may also be applied to other application scenarios.

The general idea of this embodiment is to perform fast resource evaluation on an instance tree, automatically select a clipping position based on the node resources and the connection tightness between nodes, and perform scale reduction operation and interface processing programmatically.

Resource evaluation of an instance tree:

1. and (5) modularization. If the design is RTL level, all the glue logics (the statements of assign and always) of assign and always and the like in the circuit are modularized, namely the left side of the assign symbol of assign or always is used as the output signal of a new module, the signal of the right side of the assign symbol is used as the input signal of the new module, and the glue logics of assign and always and the like are used as the interior of the new module to realize. The entire circuit is thus composed entirely of modules. No modular processing is required for netlist level user designs.

2. And logically synthesizing all leaf nodes, and then counting the LUT, FF, PIO, INT, DCM, BRAM, DSP, PPC, TBUF and other types of device resources consumed by the leaf nodes to obtain the resource quantity information of all the leaf nodes. No logic synthesis process is required for netlist level user designs.

3. And calculating layer by layer from the bottom layer of the example tree to the top node to obtain the resource amount information of the father node. The resource of the father node can be divided into two parts, one part is the sum of the resources of all the child nodes, and the other part is the communication resource consumption caused by the number and bit width of all the connecting lines contained in the module corresponding to the father node except the child nodes.

The resource amount information and the module name of the calculated module can be recorded, and if the encountered module is in the record, the result in the record is directly utilized; and if an unfamiliar module is encountered, saving the record after the calculation is finished. Because a large number of same modules are reused in chip design under normal conditions, the dynamic programming concept can be utilized to reduce a large number of repeated calculations by utilizing the characteristic.

Thus, the resource quantity information of each node in the example tree is obtained through calculation layer by layer from bottom to top.

(II) size reduction:

1. resource threshold interval information is input.

2. A closeness threshold inside the input node.

3. Determining a pruning position:

as an example, referring to the flow shown in fig. 7, the step of determining the pruning position may comprise:

s701, building a residual tree leaf node set and initializing the residual tree leaf node set to be empty, adding the example tree vertex into the set, and marking the example tree vertex as an unprocessed node.

The example tree after the size reduction is called a residual tree, namely, the part of the example tree left after pruning is called the residual tree.

For example, the Set may be named Set _ left _ tree _ leaves. When the flow is over, all the nodes in the set are leaf nodes of the remaining trees, that is, the boundaries of the remaining trees can be determined through the set.

S702, judging whether unprocessed nodes exist in the set.

If there are unprocessed nodes, the process goes to step S703, otherwise, the process ends.

S703, selecting an unprocessed node in the set as a current node.

The idea of this process is to traverse the unprocessed nodes in the set until all the nodes in the set have been processed.

S704, judging whether the current node is a leaf node.

If the current node is a leaf node, the current node is marked as a processed node, left in the set as a final result, and then returns to step S702.

S705, judging whether the current node is a special node.

If the current node is a special node, the current node is marked as a processed node and left in the set, and then the step S702 is returned.

As an example, the special node may be a node at a pruning location specified by the user or a node that is not accessible inside, i.e. a fix node or an IP core node specified by the user.

S706, judging whether the current node is a resource legal node. Namely, whether the current node is a legal resource node is judged according to the resource threshold interval information and the resource quantity information of the current node.

If the current node is a resource-legal node, the process proceeds to step S707.

If the current node is not a legal node (i.e., an illegal node), the process proceeds to step S710.

And S707, acquiring the internal compactness of the current node.

S708, judging whether the internal compactness of the current node exceeds the compactness threshold.

If the internal affinity of the current node exceeds the affinity threshold, the current node is marked as a processed node, left in the set, and then returns to step S702.

If the internal affinity of the current node does not exceed the affinity threshold, step S709 is entered.

S709, judging whether all child nodes of the current node are legal resources.

If all child nodes of the current node are the nodes with legal resources, step S710 is entered.

If all child nodes of the current node are not the resource legal nodes, the current node is marked as a processed node and left in the set, and then the step S702 is returned.

S710, deleting the current node in the set, adding all child nodes of the current node into the set and marking as unprocessed nodes, and then returning to the step S702.

Through the iteration and the traversal, when the set has no unprocessed nodes, the nodes left in the set are final results, namely leaf nodes of the residual tree, namely, the boundaries of the residual tree can be determined through the nodes, and therefore pruning can be achieved. Specifically, for a node in the set, if the node itself is a leaf node, no processing is required and the node is directly used as a leaf node of the residual tree, and if the node is a non-leaf node, the node is a pruning position and becomes a leaf node of the residual tree after pruning.

In the above, how to determine the leaf nodes of the remaining trees is schematically and exemplarily described, if an error occurs or other special conditions are encountered in the specific iteration process, for example, if nodes which do not meet some special requirements of the user occur in the set, corresponding processing may be performed according to the specific conditions, and details are not described here. For example, if an unprocessed node with each resource smaller than the threshold appears in the set, or a node with each resource larger than the threshold and the affinity larger than the threshold appears in the set, or a node with an illegal resource does not have a child node in the set, etc., an operation such as reporting may be performed.

(III) processing a shearing interface:

for vertices of a pruned subtree:

if the module is an RTL-level module, such as "test (clkp, clkn, rstn, led)", copying the module and modifying the name of the copied module to be "test _ bb (clkp, clkn, rstn, led)", and saving the test _ bb; deleting the logic whole in the original module, namely the test, only keeping the port direction, bit width, signal name and resource amount information of the module, forming a new module with the same name of the test, replacing the original vertex module, and finishing scale reduction.

For user design at netlist level, cutting the netlist (for example, the netlist is test) and all descendant netlists of the netlist, modifying the name of the netlist to be test _ bb and storing the modified netlist, simultaneously creating the top layer of the test netlist with the same name, reconstructing an external communication port of the new test netlist according to the input and output ports of the original top netlist, reconstructing and restoring the connection relation between a connecting line and the port in the parent netlist of the test, and completing scale reduction.

Netlist-level downscaling differs from RTL in that: in the netlist level, all descendant netlists of the top netlist are cut, and the layers are continued until the devices can not be divided; and finally, restoring the original connection relation in the parent netlist of the cut subtree vertex netlist.

In the embodiment, resource quantity information of each node in the instance tree is obtained, namely, the instance tree is subjected to resource evaluation to obtain the resource distribution condition of the instance tree, then one or more pruning positions are automatically determined in the instance tree based on the relation between the node resource quantity and the resource threshold interval and by combining the internal compactness of the nodes, and then the instance tree is pruned at the pruning positions, so that the reduction of the scale of the logic circuit is completed. According to the scheme in the embodiment, the pruning position can be scientifically calculated and automatically pruned by means of the node resource amount, the resource threshold interval, the node internal compactness and the like, so that the efficiency during scale reduction operation is improved, and the pruning position is more reasonable and accurate, so that the effect of scale reduction operation is improved, and the processing difficulty and complexity of processes such as follow-up segmentation can be effectively reduced.

The following are embodiments of the apparatus of the present application that may be used to perform embodiments of the method of the present application. For details which are not disclosed in the embodiments of the apparatus of the present application, reference is made to the embodiments of the method of the present application.

Fig. 8 is a schematic diagram of a logic circuit size reduction apparatus according to an embodiment of the present application. Referring to fig. 8, the apparatus may include:

an instance tree generation unit 801, configured to parse the logic circuit design of the user through a parser to form an instance tree in the memory;

a resource counting unit 802, configured to obtain resource amount information of each node in the instance tree, where the resource amount information of a node includes resource amounts of various resources consumed by a logic circuit module corresponding to the node;

a resource threshold interval obtaining unit 803, configured to obtain resource threshold interval information, where the resource threshold interval information includes a resource amount threshold interval of each type of resource;

a pruning position determining unit 804, configured to determine one or more pruning positions in the instance tree according to the resource threshold interval information and the resource amount information of the node and by combining an internal closeness of the node, where the internal closeness is used to indicate a closeness degree of an internal connection relationship of the node;

a pruning unit 805 configured to prune the instance tree at the pruning location to complete logic circuit size reduction.

As an example, in this embodiment or some other embodiments of the present application, the resource statistics unit is specifically configured to:

acquiring the resource amount information of each node layer by layer from the bottommost layer of the example tree to the topmost node;

As an example, in this embodiment or some other embodiments of the present application, the pruning-position determining unit is specifically configured to:

For example, in this embodiment or some other embodiments of the present application, when the pruning position determining unit is configured to determine whether the current node is a legal resource node according to the resource threshold interval information and the resource amount information of the current node, specifically, the pruning position determining unit is configured to:

For example, in this embodiment or some other embodiments of the present application, when the pruning position determining unit is configured to obtain the internal closeness of the current node, it is specifically configured to:

according to the following steps:

obtaining the internal compactness T of the current node A _A Where n is each subsection of node A in the circuit diagramNumber of connections between points, Nnodes _i Representing the number of nodes on the ith connection, Source _ij Representing the resource value of the jth node on the ith connecting line, wherein the resource value is the sum of the resource amount of various types of resources of the node multiplied by corresponding coefficients respectively, and the source _ avg _i Represents the average value of the resource values of all the nodes on the ith connecting line, K, B is a preset constant.

In this embodiment or in some other embodiments of the present application, by way of example, the pruning-position determination unit is further configured to:

for a current node which is being accessed, before judging whether the current node is a legal resource node, judging whether the current node is a special node;

As an example, in this embodiment or some other embodiments of the present application, the pruning unit is specifically configured to:

For example, in this embodiment or some other embodiments of the present application, the pruning unit, when being configured to prune and save the subtree at the pruning position from the instance tree, and replace the subtree at the pruning position with a new leaf node, is specifically configured to:

for RTL level logic circuit design:

for netlist level logic circuit design:

With regard to the apparatuses in the above embodiments, the specific manner in which each unit performs operations has been described in detail in the embodiments of the related method, and is not described herein again. In the present application, the names of the above-mentioned units do not limit the units themselves, and in practical implementation, the units may appear by other names as long as the functions of the respective units are similar to the present application, and all the units are within the scope of the claims of the present application and the equivalent technology.

Although the present application has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the application, and all changes, substitutions and alterations that fall within the spirit and scope of the application are to be understood as being covered by the following claims.

Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the aspects disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.

It will be understood that the present application is not limited to the precise arrangements that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims

1. A method of logic circuit scaling, the method comprising:

parsing the logic circuit design of the user through a parser to form an instance tree in memory;

acquiring resource quantity information of each node in the example tree, wherein the resource quantity information of the node comprises the resource quantity of various resources consumed by a logic circuit module corresponding to the node;

determining one or more pruning positions in the instance tree according to the resource threshold interval information and the resource quantity information of the nodes and by combining the internal compactness of the nodes, wherein the internal compactness is used for indicating the tightness of the internal connection relation of the nodes;

pruning the example tree at the pruning position to finish logic circuit scale reduction;

determining one or more pruning positions in the instance tree according to the resource threshold interval information and the resource quantity information of the nodes and by combining the internal compactness of the nodes, wherein the method comprises the following steps:

accessing nodes which are not accessed in the instance tree from the top to the bottom from the topmost node;

2. The method of claim 1, wherein obtaining the resource amount information of each node in the instance tree comprises:

3. The method of claim 1, wherein determining whether the current node is a legal resource node according to the resource threshold interval information and the resource amount information of the current node comprises:

4. The method of claim 1, wherein obtaining the internal closeness of the current node comprises:

according to the following steps:

obtaining the internal compactness T of the current node A _A Where n is the number of connections between the sub-nodes of node A in the circuit diagram, Nnodes _i Representing the number of nodes on the ith line, Source _ij Representing the resource value of the jth node on the ith connecting line, wherein the resource value is the sum of the resource amount of various types of resources of the node multiplied by corresponding coefficients respectively, and the source _ avg _i Represents the average value of the resource values of all the nodes on the ith connection line, K, B is a preset constant.

5. The method of claim 1, further comprising:

6. The method of claim 1, wherein pruning the instance tree at the pruning location comprises:

7. The method of claim 6, wherein pruning and saving the subtree at the pruning location from the instance tree, replacing the subtree at the pruning location with a new leaf node, comprises:

for RTL level logic circuit design:

for netlist level logic circuit design:

8. A logic circuit downscaling apparatus, the apparatus comprising:

the example tree generating unit is used for analyzing the logic circuit design of the user through the syntax parser to form an example tree in the memory;

a pruning unit, configured to prune the instance tree at the pruning position to complete logic circuit scale reduction;

wherein the pruning position determining unit is specifically configured to:

9. The apparatus according to claim 8, wherein the resource statistics unit is specifically configured to:

10. The apparatus of claim 8, wherein when the pruning-position determining unit is configured to determine whether the current node is a legal resource node according to the resource threshold interval information and the resource amount information of the current node, the pruning-position determining unit is specifically configured to:

and if the resource quantity of each type of resources of the current node is within the range of the corresponding threshold interval in the resource threshold interval information, judging that the current node is a legal resource node.

11. The apparatus according to claim 8, wherein when said pruning position determination unit is configured to obtain the internal closeness of the current node, it is specifically configured to:

according to the following steps:

12. The apparatus of claim 8, wherein the pruning position determination unit is further configured to:

13. The apparatus according to claim 8, wherein the pruning unit is specifically configured to:

14. The apparatus of claim 13, wherein the pruning unit, when configured to prune and save the subtree at the pruning location from the instance tree, and replace the subtree at the pruning location with a new leaf node, is specifically configured to:

for RTL level logic circuit design:

for netlist level logic circuit design:

cutting a target netlist and all descendant netlists thereof, renaming the target netlist and storing the target netlist, wherein the target netlist is a netlist corresponding to the pruning position;