CN114780461B

CN114780461B - Storage method and device of single chip microcomputer parameters and electronic equipment

Info

Publication number: CN114780461B
Application number: CN202210683245.3A
Authority: CN
Inventors: 王素梅; 高琰; 李杨; 王涛; 王广洲; 张丽红; 赵鹏; 周锋; 滕欣怡; 万鹏飞; 苏艺; 赵龙
Original assignee: Shandong Polytechnic College
Current assignee: Shandong Polytechnic College
Priority date: 2022-06-17
Filing date: 2022-06-17
Publication date: 2022-09-02
Anticipated expiration: 2042-06-17
Also published as: CN114780461A

Abstract

The invention provides a method and a device for storing parameters of a single chip microcomputer and electronic equipment, belonging to the technical field of electronics and comprising the following steps: acquiring operation parameters of a data acquisition system, storing the latest operation parameters into a cache region of a single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters; determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to the timing signal. When the storage method of the single chip microcomputer parameters is used for storing the operation parameters, the storage process is simple, the data storage speed is accelerated, and the technical problems that the storage process of the existing storage method of the single chip microcomputer parameters is complex and the data storage speed is slow are solved.

Description

Storage method and device of single chip microcomputer parameters and electronic equipment

Technical Field

The invention relates to the technical field of electronics, in particular to a method and a device for storing parameters of a single chip microcomputer and electronic equipment.

Background

Along with the development of electronic technology and the improvement of living standard, more and more electronic products are popularized and used by consumers, and in order to meet the requirements of various consumers, electronic products produced by manufacturers are also various, wherein the electronic products carrying a single chip microcomputer system are also widely used, and in the electronic products carrying the single chip microcomputer system, the single chip microcomputer system is generally combined with a storage chip to store operation parameters. Especially in a data acquisition system, the acquired signal values need to be subjected to coefficient correction, or the baud rate of a serial port needs to be modified, or different signal channels need to be selected, and the like, which are operating parameters of a single chip microcomputer system.

With the development of memory chips, there are also multiple storage modes for storing operation parameters, such as EEROM storage, SD card storage, FLASH storage, etc., EEROM storage is the most convenient storage mode, and can be written in many times conveniently and quickly, but EEROM has a small storage capacity and cannot store a large amount of data; the SD card is the most intelligent storage mode and supports reading and writing of a computer, but the FAT file system of the SD card needs a large amount of embedded codes for supporting, which is a fatal defect for embedded software of a single chip microcomputer; in the existing FLASH memory, a free physical page needs to be inquired and acquired first, then the physical page is erased, and meanwhile, whether a storage address corresponding to an instruction is consistent with an actual address of the free physical page needs to be judged, if the storage address corresponding to the instruction is not consistent with the actual address of the free physical page, a logical page corresponding to the free physical page needs to be updated by using a target logical page, and a mapping relation table needs to be updated to write the logical page once, so that the storage process is complex, and the data storage speed is low.

In conclusion, the existing storage method for the parameters of the single chip microcomputer has the technical problems of complex storage process and low data storage speed.

Disclosure of Invention

In view of this, the present invention aims to provide a method for storing parameters of a single chip to alleviate the technical problems of complex storage process and slow data storage speed of the existing method for storing parameters of a single chip.

In a first aspect, an embodiment of the present invention provides a method for storing parameters of a single chip microcomputer, which is applied to a single chip microcomputer of a data acquisition system, the single chip microcomputer is connected to a FLASH memory chip through an SPI bus, the FLASH memory chip includes a plurality of operating parameter storage sectors, each of the operating parameter storage sectors includes a plurality of storage pages, and the method includes:

acquiring operation parameters of the data acquisition system according to a preset sampling frequency, storing the latest operation parameters into a cache region of the single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters;

determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to a timing signal;

determining the current storage page of the FLASH storage chip comprises the following steps:

if the FLASH memory chip is the first time data writing, taking a first memory page of a first operation parameter memory sector as the current memory page;

if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array;

if the cache array is new, taking a next storage page of a current operation parameter storage sector as the current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of a data packet to which the cache array belongs;

if the current storage page is not the new cache array, determining that the current storage page does not exist, and not writing the cache array;

and if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet.

Further, the method further comprises:

performing hash operation on the cache array and the identifier to obtain a hash value;

and storing the hash value serving as a check value into the current storage page.

Further, the method further comprises:

and determining the number of the operation parameter storage sectors contained in the FLASH storage chip, the number of the storage pages contained in each operation parameter storage sector and the number of the bytes which can be written in each storage page according to the byte number of the cache array and the size of the data packet to which the cache array belongs.

Further, the method further comprises:

reading a cache array stored in the FLASH storage chip according to a data query command;

and after the reading of the cache array stored in the target operation parameter storage sector is finished, automatically erasing the cache array of the target operation parameter storage sector so as to continuously use the target operation parameter storage sector for the writing of the parameters of the single chip microcomputer.

In a second aspect, an embodiment of the present invention further provides a storage device for parameters of a single chip microcomputer, which is applied to a single chip microcomputer of a data acquisition system, the single chip microcomputer is connected to a FLASH memory chip through an SPI bus, the FLASH memory chip includes a plurality of operating parameter memory sectors, each of the operating parameter memory sectors includes a plurality of memory pages, and the device includes:

the acquisition and storage unit is used for acquiring the operating parameters of the data acquisition system according to a preset sampling frequency, storing the latest operating parameters into a cache region of the single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operating parameters;

a write-in unit, configured to determine a current storage page of the FLASH storage chip, store the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially write multiple frames of data in the cache array into the current storage page according to a timing signal;

wherein the write unit is further to: if the FLASH memory chip is written with data for the first time, taking a first memory page of a first operation parameter memory sector as the current memory page; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the current operation parameter storage sector is a new cache array, taking a next storage page of the current operation parameter storage sector as the current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of data packets to which the cache array belongs; if the current storage page is not the new cache array, determining that the current storage page does not exist, and not writing the cache array;

the apparatus is further configured to: and if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet.

In a third aspect, an embodiment of the present invention further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the steps of the method according to any one of the first aspect.

In the embodiment of the invention, a method for storing parameters of a single chip microcomputer is provided, which is applied to the single chip microcomputer of a data acquisition system, the single chip microcomputer is connected with a FLASH memory chip through an SPI bus, the FLASH memory chip comprises a plurality of operating parameter memory sectors, and each operating parameter memory sector comprises a plurality of memory pages, the method comprises the following steps: acquiring operation parameters of a data acquisition system according to a preset sampling frequency, storing the latest operation parameters into a cache region of a single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters; determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to the timing signal; determining the current storage page of the FLASH storage chip comprises the following steps: if the FLASH memory chip is used for writing data for the first time, taking a first memory page of a first operation parameter memory sector as a current memory page; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the cache array is new, taking the next storage page of the current operation parameter storage sector as the current storage page, wherein the next storage page is the next storage page of the storage page in which data is written last time, and the current operation parameter storage sector can be written into all the cache arrays of the data packet to which the cache array belongs; if the current storage page does not exist, the current storage page is determined to be not existed, and the cache array is not written in; and if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet. According to the above description, when the storage method of the single chip microcomputer parameters is used for storing the operation parameters, the storage process is simple, the data storage speed is accelerated, and the technical problems that the storage process of the existing storage method of the single chip microcomputer parameters is complex and the data storage speed is slow are solved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.

Fig. 1 is a flowchart of a method for storing parameters of a single chip microcomputer according to an embodiment of the present invention;

fig. 2 is a schematic view of a connection structure between a single chip microcomputer and a FLASH memory chip according to an embodiment of the present invention;

fig. 3 is a flowchart for determining a current storage page of a FLASH memory chip according to an embodiment of the present invention;

fig. 4 is a schematic diagram of a storage device for parameters of a single chip microcomputer according to an embodiment of the present invention;

fig. 5 is a schematic diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

The technical solutions of the present invention will be described clearly and completely with reference to the following embodiments, and it should be understood that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, belong to the protection scope of the present invention.

In the existing storage method of the parameters of the single chip microcomputer, EEROM storage can be written in conveniently and rapidly for multiple times, but the EEROM storage capacity is small, and a large amount of data cannot be stored; the SD card supports reading and writing of a computer, but the FAT file system of the SD card needs a large amount of embedded codes for supporting, which is a fatal defect for embedded software of a single chip microcomputer; and the storage process of FLASH storage is complex, and the data storage speed is slow.

Therefore, the embodiment provides the storage method of the parameters of the single chip microcomputer, and when the method is used for storing the operation parameters, the storage process is simple, and the data storage speed is increased.

In order to facilitate understanding of the embodiment, a detailed description is first given to a method for storing parameters of a single chip microcomputer disclosed in the embodiment of the present invention.

The first embodiment is as follows:

it should be noted that, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in an order different from that shown or described herein.

Fig. 1 is a flowchart of a method for storing parameters of a single chip according to an embodiment of the present invention, and as shown in fig. 1, the method includes the following steps:

step S102, collecting operation parameters of a data collection system according to a preset sampling frequency, storing the latest operation parameters into a cache region of a single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters;

in the embodiment of the invention, the method for storing the parameters of the single chip microcomputer is applied to the single chip microcomputer of a data acquisition system, referring to fig. 2, the single chip microcomputer is connected with a FLASH memory chip through an SPI bus, the FLASH memory chip comprises a plurality of operation parameter storage sectors, and each operation parameter storage sector comprises a plurality of storage pages.

The single chip microcomputer collects the operation parameters of the data acquisition system according to a preset sampling frequency, wherein the preset sampling frequency can be the operation parameters of the data acquisition system collected every 5 minutes.

And after the single chip microcomputer obtains the operation parameters, storing the operation parameters into a cache region of the single chip microcomputer according to a preset format. The preset format may specifically include: the type of parameter (type of physical quantity), time, data length, data type (character string type, floating point type, or the like), storage format (8-bit and 8-bit storage, or 16-bit and 16-bit storage), and the like.

For example: the operation parameters of the preset format are as follows:

a parameter main body structure:

union {

struct{

uchar pwer;

uchar airtmpr_humi;

uchar wind_visi;

…

uchar road_state;

uchar road_run_state;

}p;

uchar c[248];

}RUN_PARA;

a parameter head structure body:

union {

struct{

fluid year// year

uchar month

……

}p;

uchar chr[4];

}PAGE_head;

Parameter tail structure:

union {

struct{

fluid year// year

uchar month

……

}p;

uchar chr[4];

}PAGE_hotl;

It should be noted that: when the latest operation parameter is acquired, the latest operation parameter covers the data of the last period in the cache area of the single chip microcomputer. I.e. the new cache array covers the last cycle of cache data.

The cache region is two combined structural bodies built in the single chip microcomputer and is used as a cache region for writing and reading each operation parameter. In addition, the single chip processor puts the latest identifier into the buffer area, and the latest identifier is used for indicating the sampling time of the latest operation parameter.

And step S104, determining the current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as the initial identifier corresponding to the cache array, and sequentially writing the multi-frame data in the cache array into the current storage page according to the timing signal.

The following describes the process of determining the current storage page of the FLASH memory chip in detail, and is not described herein again.

Because the FLASH memory chip comprises a plurality of operation parameter memory sectors, each operation parameter memory sector comprises a plurality of memory pages, and in view of the characteristics that the structure of FLASH is divided into the operation parameter memory sectors and the memory pages, the latest identifier (which can also be added with the corresponding sector number) is written in before each memory page starts to write data, and the latest identifier is used as the starting identifier corresponding to the cache array. Therefore, when the cache array is stored, the storage pages are used as operation units, each storage page has a similar storage structure, but the sequence before and after the identification can be distinguished through the sector numbers and the time labels, and the effectiveness of data retrieval can be greatly improved.

Writing the multi-frame data in the buffer array into the current storage page in sequence according to the timing signal may be: and when the time interval of 5 minutes is reached, sequentially writing the multi-frame data in the cache array of the cache area into the current storage page.

In an optional embodiment of the present invention, referring to fig. 3, the step S104 mentioned above for determining the current storage page of the FLASH memory chip specifically includes the following steps:

step S301, if the FLASH memory chip is the first time data is written, taking the first memory page of the first operating parameter memory sector as the current memory page;

in implementation, each operation parameter storage sector and each storage page can be numbered in advance, so that different operation parameter storage sectors and different storage pages can be distinguished.

Step S302, if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array;

specifically, although the single chip microcomputer is set to acquire the operation parameters according to the preset sampling frequency, in practice, the single chip microcomputer reads the operation parameters in real time, which may be calculated according to microseconds, and if the operation parameters are just in the gaps of acquisition of new and old operation parameters, the acquired operation parameters are not new operation parameters, that is, the cache array is not a new cache array, and writing is not needed.

Step S303, if the cache array is new, taking the next storage page of the current operation parameter storage sector as the current storage page, wherein the next storage page is the next storage page of the storage page in which data is written last time;

that is, when the operation parameters are written, a group of cache arrays are stored in a storage page, and all storage pages of the operation parameter storage sectors are polled, so that the subsequent data retrieval is facilitated, the effectiveness of the data retrieval is improved, and in addition, the purpose of averagely using each storage page (so as to realize uniform wear) is achieved, so that the FLASH memory chip can reach the maximum service life.

Step S304, if the current storage page is not the new cache array, it is determined that the current storage page does not exist, and the cache array is not written into.

In an alternative embodiment of the present invention, the current operating parameter storage sector is capable of writing all cache arrays of the data packet to which the cache array belongs.

Specifically, the single chip microcomputer judges whether cross-sector storage exists in the storage of the data packet according to the length of the current data packet, for example, a cache array of a part of other data packets is already stored in one operation parameter storage sector, but the cache array of the current data packet cannot be completely stored in the remaining operation parameter storage sectors, so that cross-sector storage exists, that is, the maximum address of the operation parameter storage sector is exceeded, and then the starting address of the next operation parameter storage sector is used as the starting storage address of the current data packet, so that the purpose that the current operation parameter storage sector can write all cache arrays of the data packet to which the cache array belongs is achieved.

The storage mode can facilitate subsequent data retrieval, improve the data retrieval speed and ensure the accuracy of data storage.

In an optional embodiment of the present invention, if the data packet to which the cache array belongs is a cache array of a next data packet, the next operation parameter storage sector of the current operation parameter storage sector is used as a write-in area of the cache array of the next data packet to be written in, wherein during writing, each cache array of the next data packet is sequentially written in each storage page of the next operation parameter storage sector.

Because the data writing frequency of the FLASH memory chip is limited, when the FLASH memory chip is applied, all the operation parameter storage sectors and all the storage pages are required to be used averagely (so that uniform abrasion is realized) to enable the FLASH memory chip to reach the maximum working life.

In the embodiment of the invention, a method for storing parameters of a single chip microcomputer is provided, which is applied to the single chip microcomputer of a data acquisition system, the single chip microcomputer is connected with a FLASH memory chip through an SPI bus, the FLASH memory chip comprises a plurality of operating parameter memory sectors, and each operating parameter memory sector comprises a plurality of memory pages, the method comprises the following steps: acquiring operation parameters of a data acquisition system according to a preset sampling frequency, storing the latest operation parameters into a cache region of a single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters; determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to the timing signal; determining the current storage page of the FLASH storage chip comprises the following steps: if the FLASH memory chip is used for writing data for the first time, taking a first memory page of a first operation parameter memory sector as a current memory page; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the cache array is new, taking a next storage page of the current operation parameter storage sector as a current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of a data packet to which the cache array belongs; if the current storage page is not the new cache array, determining that the current storage page does not exist, and not writing the cache array; and if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet. According to the above description, when the storage method of the single chip microcomputer parameters is used for storing the operation parameters, the storage process is simple, the data storage speed is accelerated, and the technical problems that the storage process of the existing storage method of the single chip microcomputer parameters is complex and the data storage speed is slow are solved.

In an optional embodiment of the invention, the method further comprises: performing hash operation based on the cache array and the identifier to obtain a hash value; and storing the hash value serving as a check value into the current storage page.

The method comprises the steps of maintaining a lookup table of the corresponding relation between the hash value and the identifier, synchronizing the hash value and the identifier with a FLASH storage chip in real time in the lookup table, correspondingly updating the newly generated hash value and the identifier in the lookup table when new cache data are stored, and deleting the corresponding relation in the lookup table when the data are deleted. The lookup table may be stored in a cache, and a dedicated area may be created for storing the lookup table. Specifically, the identifier may be a time identifier, and may be stored in the lookup table according to a time sequence. When the latest identifier is stored in the current storage page, a response of successful storage may be returned, based on the response, a hash operation may be performed based on the cache array and the identifier to obtain a hash value, and the obtained hash value is stored in the lookup table.

When there is a need to query data, a time period of the data to be queried may be determined, and based on the time period of the data to be queried, a corresponding hash value set may be queried in the lookup table, where the hash value set may include one or more hash values, and a time identifier corresponding to the one or more hash values covers the time period of the data to be queried. And inquiring in the FLASH storage chip based on the hash value group as an index to obtain corresponding data to be inquired, and returning the data to be inquired.

Specifically, the check value is used to check the integrity of the data in the current storage page.

In an optional embodiment of the present invention, the number of the operating parameter storage sectors included in the FLASH memory chip, the number of the storage pages included in each operating parameter storage sector, and the number of bytes writable in each storage page are determined according to the size of the number of bytes of the cache array and the size of the data packet to which the cache array belongs.

Specifically, if the byte number of the cache array is 200 bytes, the number of bytes that can be written in each memory page may be 256, so that one memory page can store one complete cache array, and the data packet to which the cache array belongs includes 250 cache arrays, then one operating parameter storage sector may include 256 memory pages, so that data of one complete data packet can be stored, and the number of the operating parameter storage sectors included in the FLASH memory chip may also be determined according to the number of the data packets and the space size of the FLASH memory chip.

The storage procedure of the operating parameters of the present invention is described in detail below in a specific embodiment:

the storage method of the single chip microcomputer parameters is realized under a C8051F020 single chip microcomputer, a FLASH chip is W25Q128, the size of a storage space of the FLASH chip is 16M, the FLASH chip is divided into 256 operation parameter storage sectors, each operation parameter storage sector is provided with 256 storage pages, and each storage page can store 256 bytes. The operation parameters which can be stored in one storage page are 248 bytes, 4 page head identifiers and 4 page tail identifiers.

The group of cache array data of the operation parameter generally does not exceed 200 bytes, one storage page of the FLASH storage chip can store 256 bytes, the necessary page head and page tail identifiers are removed, the available bytes can be up to 248 bytes, and the FLASH memory chip can be configured to 128 double-byte memory numbers (int type parameters) or 64 four-byte parameters (FLOAT type parameters). If the number of bytes occupied by the operating parameter of a certain data acquisition system is large, the number of bytes stored in the storage page can be adjusted according to needs, that is, the storage space of the storage page is adjusted, and the setting is performed according to actual needs, or the number of the storage pages included in one sector and the number of the sectors are set according to actual needs.

Due to the manufacturing process, the FLASH memory can be written with one or more bytes at a time, but during erasing, the operating parameter storage sector or the storage page must be used as a unit, or the whole FLASH memory chip is erased simultaneously, and the number of operations is limited, so that during application, uniform wear is generally realized, and each operating parameter storage sector is used on average (in a polling manner) to achieve the maximum working life.

When the data acquisition system is photovoltaic power plant, the operating parameters that the singlechip will gather include: the temperature, the time, the solar radiation amount and the pressure are collected once (can be set) within 5 minutes at a preset sampling frequency, and after the single chip microcomputer collects the operation parameters, the voltage output and the current output of the follow-up photovoltaic module power generation are further judged. During implementation, the operation data from 9 am to 4 pm can be defined as a data packet (which can be set), the temperature, the time, the solar radiation amount and the pressure collected every 5 minutes are used as a group of operation data, the operation data are stored in a cache region of the single chip microcomputer according to a preset format, the group of operation data correspond to a group of cache arrays, and a certain parameter can be used as a frame of data in the group of cache arrays.

For example, the temperature collected at the 9 point is 35 ℃, the temperature is converted into a format which can be identified by a computer and is a preset number of bytes (for example, 8 bytes), and then the data is used as a frame of data, the frame of data is stored in a preset position of the buffer area, and meanwhile, the similar processing and storage are performed on other parameters, and then after a time sequence signal for data writing is reached, multi-frame data in the buffer array of the buffer area is sequentially written into the current storage page of the FLASH memory chip. During writing, judging whether the FLASH memory chip is the first time data writing; if yes, writing the multi-frame data in the cache array into a first storage page of a first operation parameter storage sector in sequence, before writing, writing the corresponding sector number and the latest identifier (i.e. a time tag, such as 9 points) into the forefront of the storage page, and then writing by taking one frame of data as a unit until all the cache arrays in one group are written into the first storage page; and when a new group of cache arrays is acquired again, continuously writing the second storage page of the first operation parameter storage sector according to the mode, thus performing polling writing on all the storage pages of the first operation parameter storage sector, and completely writing the operation parameters of a data packet into the first operation parameter storage sector (the sector can completely store the operation parameters of the data packet). Each sector stores an end flag with 0xFFFF FFFF as the local sector.

Other data packets may be stored in other operation parameter storage sectors in the manner described above, and will not be described herein again.

In an optional embodiment of the invention, the method further comprises: reading a cache array stored in the FLASH storage chip according to the data query command; and after the reading of the cache array stored in the target operation parameter storage sector is finished, automatically erasing the cache array of the target operation parameter storage sector so as to continuously use the target operation parameter storage sector for the writing of the parameters of the singlechip.

When the historical cache array is queried, determining an initial time according to the time point of the queried historical cache array, for example, if the time point of the queried historical cache array is 9 points, then the initial time is 9 points, determining a corresponding storage page, then reading the cache array stored in the storage page, and reading one complete cache array each time until the end; if one storage page is completely read, the next storage page is automatically switched to, when the operation parameter storage sector is completely read, the sector is automatically erased, and when a new cache array is acquired, a new round of writing is started.

The storage method of the parameters of the single chip microcomputer has the following advantages:

1. the method is characterized in that the externally acquired operation parameters are dynamically solidified and written into the storage pages of the corresponding operation parameter storage sectors of the FLASH storage chip, the storage pages are equivalent to the constants of the single chip microcomputer for storage, a complex storage process is not needed, and the operation parameters stored in the corresponding storage pages are directly read during data reading, so that the data reading efficiency is improved, a certain amount of data storage can be realized, a large number of storage codes are not needed, and the data reading efficiency is improved;

2. based on the structural characteristics that a FLASH memory chip can store sectors and memory pages in a divided manner, the latest acquired operating parameters are firstly placed in a specified cache according to a preset format and a sequence, and then a cache array (namely the operating parameters of the preset format) of a cache region is written into the memory pages of the FLASH memory chip according to a time sequence signal, so that a certain number of acquired parameters are embedded into a single chip microcomputer system for data caching through extended FLASH storage, and a large number of storage codes are not needed;

3. and when the operation parameters are stored, the storage page area is used as an operation unit, and the sectors are reasonably divided. The sequence before and after the sector number and the time tag are identified, when a storage page is full of data, the data is stored in the next storage page continuously until the data in the data packet of the sector is stored, if new operation parameters exist subsequently, the data can be stored in the next sector continuously, if all the sectors are stored, the sector which is used earliest is searched, and when the data in the sector is read or the data reaches the failure time, the data of the sector can be cleared and is continuously used for storing the operation parameters, so that the uniform abrasion of the operation parameter storage sector or the storage page of the FLASH storage chip is realized, the maximum service life of the FLASH storage chip is prolonged under the condition that the operation times of the FLASH storage chip are limited, and the safety and reliability of data acquisition and operation are improved;

4. the running data in each storage sector of the data stored in the FLASH storage chip is complete, and the cross-sector storage condition does not exist, so that the correctness of the data is ensured when the FLASH is covered and reused; meanwhile, the data are strictly arranged according to the stored operation sequence and the ascending sequence of the natural time of the collected data, so that the direction uniqueness of the retrieval keywords is realized, and the data reading correctness and efficiency are greatly promoted.

Example two:

the embodiment of the invention also provides a storage device of the parameters of the single chip microcomputer, which is mainly used for executing the storage method of the parameters of the single chip microcomputer provided by the first embodiment of the invention.

Fig. 4 is a schematic diagram of a storage device for parameters of a single chip according to an embodiment of the present invention, and as shown in fig. 4, the device mainly includes: acquisition and storage unit 10 and writing unit 20, wherein:

the writing-in unit is used for determining the current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as the initial identifier corresponding to the cache array, and sequentially writing the multi-frame data in the cache array into the current storage page according to the timing signal;

the writing unit is also used for taking a first storage page of the first operation parameter storage sector as a current storage page if the FLASH storage chip is used for writing data for the first time; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the cache array is new, taking a next storage page of the current operation parameter storage sector as a current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of a data packet to which the cache array belongs; if the current storage page does not exist, the current storage page is determined to be not existed, and the cache array is not written in;

the apparatus is also configured to: and if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet.

In the embodiment of the invention, a storage device of single chip microcomputer parameters is provided, which is applied to a single chip microcomputer of a data acquisition system, the single chip microcomputer is connected with a FLASH memory chip through an SPI bus, the FLASH memory chip comprises a plurality of operation parameter storage sectors, each operation parameter storage sector comprises a plurality of storage pages, the device comprises: acquiring operation parameters of a data acquisition system according to a preset sampling frequency, storing the latest operation parameters into a cache region of a single chip microcomputer according to a preset format to obtain a cache array, and updating the latest identifier in the cache region, wherein the cache array comprises multi-frame data, and the latest identifier is used for indicating the sampling time of the latest operation parameters; determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to the timing signal; determining the current storage page of the FLASH storage chip comprises the following steps: if the FLASH memory chip is used for writing data for the first time, taking a first memory page of a first operation parameter memory sector as a current memory page; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the cache array is new, taking a next storage page of the current operation parameter storage sector as a current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of a data packet to which the cache array belongs; if the current storage page does not exist, the current storage page is determined to be not existed, and the cache array is not written in; and if the data packet to which the cache array belongs is the cache array of the next data packet, taking the next operation parameter storage sector of the current operation parameter storage sector as a write-in area of the cache array of the next data packet for writing. According to the above description, when the storage device for the parameters of the single chip microcomputer stores the operation parameters, the storage process is simple, the data storage speed is accelerated, and the technical problems that the storage process of the existing storage method for the parameters of the single chip microcomputer is complex and the data storage speed is low are solved.

Optionally, the apparatus is further configured to: performing hash operation based on the cache array and the identifier to obtain a hash value; and storing the hash value serving as a check value into the current storage page.

Optionally, the apparatus is further configured to: and determining the number of the operating parameter storage sectors contained in the FLASH storage chip, the number of the storage pages contained in each operating parameter storage sector and the number of the bytes which can be written in each storage page according to the byte number of the cache array and the size of the data packet to which the cache array belongs.

Optionally, the apparatus is further configured to: reading a cache array stored in the FLASH storage chip according to the data query command; and after the reading of the cache array stored in the target operation parameter storage sector is finished, automatically erasing the cache array of the target operation parameter storage sector so as to continuously use the target operation parameter storage sector for the writing of the parameters of the singlechip.

The device provided by the embodiment of the present invention has the same implementation principle and technical effect as the method embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the method embodiments without reference to the device embodiments.

As shown in fig. 5, an electronic device 600 provided in an embodiment of the present application includes: the storage device comprises a processor 601, a memory 602 and a bus, wherein the memory 602 stores machine-readable instructions executable by the processor 601, when the electronic device runs, the processor 601 and the memory 602 communicate through the bus, and the processor 601 executes the machine-readable instructions to execute the steps of the storage method of the parameters of the single chip microcomputer.

Specifically, the memory 602 and the processor 601 can be general memories and processors, which are not limited to specific embodiments, and when the processor 601 runs a computer program stored in the memory 602, the storage method of the above-mentioned one-chip microcomputer parameter can be executed.

The processor 601 may be an integrated circuit chip having signal processing capabilities. In implementation, the steps of the above method may be performed by integrated logic circuits of hardware or instructions in the form of software in the processor 601. The Processor 601 may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. The steps of the method disclosed in connection with the embodiments of the present application may be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software module may be located in ram, flash memory, rom, prom, or eprom, registers, etc. storage media as is well known in the art. The storage medium is located in the memory 602, and the processor 601 reads the information in the memory 602 and completes the steps of the method in combination with the hardware thereof.

Corresponding to the storage method of the single chip microcomputer parameters, the embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium stores machine executable instructions, and when the computer executable instructions are called and run by a processor, the computer executable instructions cause the processor to run the steps of the storage method of the single chip microcomputer parameters.

The storage device for the parameters of the single chip microcomputer provided by the embodiment of the application can be specific hardware on equipment or software or firmware installed on the equipment and the like. The device provided by the embodiment of the present application has the same implementation principle and technical effect as the foregoing method embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the foregoing method embodiments where no part of the device embodiments is mentioned. It can be clearly understood by those skilled in the art that, for convenience and simplicity of description, the specific working processes of the system, the apparatus and the unit described above may all refer to the corresponding processes in the method embodiments, and are not described herein again.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.

For another example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing an electronic device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the vehicle marking method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a portable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other media capable of storing program codes.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus once an item is defined in one figure, it need not be further defined and explained in subsequent figures, and moreover, the terms "first", "second", "third", etc. are used merely to distinguish one description from another and are not to be construed as indicating or implying relative importance.

Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present application, and are used for illustrating the technical solutions of the present application, but not limiting the same, and the scope of the present application is not limited thereto, and although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope disclosed in the present application; such modifications, changes or substitutions do not depart from the scope of the embodiments of the present application. Are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A method for storing parameters of a single chip microcomputer is characterized in that the method is applied to the single chip microcomputer of a data acquisition system, the single chip microcomputer is connected with a FLASH memory chip through an SPI bus, the FLASH memory chip comprises a plurality of operation parameter memory sectors, and each operation parameter memory sector comprises a plurality of memory pages, and the method comprises the following steps:

if the data packet to which the cache array belongs is the cache array of the next data packet, writing the next operation parameter storage sector of the current operation parameter storage sector as a writing area of the cache array of the next data packet;

the method further comprises the following steps:

2. The method of claim 1, further comprising:

3. The method of claim 1, further comprising:

4. The utility model provides a storage device of singlechip parameter which characterized in that, is applied to the singlechip of data acquisition system, the singlechip passes through the SPI bus and is connected with FLASH memory chip, FLASH memory chip contains a plurality of operation parameter memory sector, every operation parameter memory sector contains a plurality of memory pages, the device includes:

the writing unit is used for determining a current storage page of the FLASH storage chip, storing the latest identifier in the current storage page as an initial identifier corresponding to the cache array, and sequentially writing multi-frame data in the cache array into the current storage page according to a time sequence signal;

wherein the write unit is further to: if the FLASH memory chip is the first time data writing, taking a first memory page of a first operation parameter memory sector as the current memory page; if the FLASH memory chip is not the first time data writing, determining whether the cache array is a new cache array; if the current operation parameter storage sector is a new cache array, taking a next storage page of the current operation parameter storage sector as the current storage page, wherein the next storage page is a next storage page of a storage page in which data is written last time, and the current operation parameter storage sector can be written into all cache arrays of data packets to which the cache array belongs; if the current storage page is not the new cache array, determining that the current storage page does not exist, and not writing the cache array;

the apparatus is further configured to: if the data packet to which the cache array belongs is the cache array of the next data packet, taking the next operation parameter storage sector of the current operation parameter storage sector as a write-in area of the cache array of the next data packet for writing;

the apparatus is further configured to: performing hash operation on the cache array and the identifier to obtain a hash value; and storing the hash value serving as a check value into the current storage page.

5. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the steps of the method of any of the preceding claims 1 to 3 are implemented when the computer program is executed by the processor.