CN114779625B - VRFT-based PD controller design method and device and electronic equipment - Google Patents

VRFT-based PD controller design method and device and electronic equipment Download PDF

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CN114779625B
CN114779625B CN202210649782.6A CN202210649782A CN114779625B CN 114779625 B CN114779625 B CN 114779625B CN 202210649782 A CN202210649782 A CN 202210649782A CN 114779625 B CN114779625 B CN 114779625B
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controller
vrft
time lag
optimization problem
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CN114779625A (en
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王文海
张奕楠
嵇月强
张益南
孙优贤
陈敏
万向成
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Hangzhou Uwntek Automation System Co ltd
Zhejiang University ZJU
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Zhejiang University ZJU
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B11/00Automatic controllers
    • G05B11/01Automatic controllers electric
    • G05B11/36Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential
    • G05B11/42Automatic controllers electric with provision for obtaining particular characteristics, e.g. proportional, integral, differential for obtaining a characteristic which is both proportional and time-dependent, e.g. P.I., P.I.D.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
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Abstract

The invention belongs to the technical field of controllers, and discloses a method and a device for designing a PD controller based on VRFT (virtual router redundancy test), and electronic equipment, wherein the method comprises the following steps: designing a reference model based on VRFT according to the dynamic characteristics of a PD controller and a non-self-balancing time lag object; obtaining an optimization problem expression equation capable of solving the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter; testing the non-self-balancing time lag object to obtain input and output data of the test; substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters; and calculating to obtain the parameters of the PD controller through the optimal adjustable parameters. The PD controller with good set value tracking effect can be designed without a non-self-balancing time-lag object model only through data acquisition and solving calculation.

Description

VRFT-based PD controller design method and device and electronic equipment
Technical Field
The application relates to the technical field of controllers, in particular to a method and a device for designing a PD controller based on VRFT (virtual router redundancy protocol) and electronic equipment.
Background
With the ever-increasing quality requirements of users on products, the operating parameters and the set values of the process flow are changed frequently, which increases higher requirements on the control effect of the controller in the scene of the change of the set values. Since the non-self-balancing time lag object is often used to express systems such as a heating boiler, a batch chemical reactor, and a liquid storage tank, it is very important to study the dynamics of the non-self-balancing time lag object and design a controller having an excellent effect of tracking a set value in a targeted manner.
In recent years, some experts propose a model-driven method for a non-self-balancing time lag object, and design a set point tracking PID controller of the object by using a method such as internal model control or relay control according to specific parameters of a transfer function of the non-self-balancing time lag object. On the other hand, data-driven methods such as VRFT have also been widely studied, but have not yet been expanded to be generalized to the non-self-balancing time lag object.
In the process of implementing the invention, the inventor finds that at least the following problems exist in the prior art:
the prior art requires model identification of non-self-balancing time-lag objects, and the performance of the controller is highly dependent on the accuracy of the identification model. Therefore, once the system cannot be accurately identified, it is difficult to design an excellent controller by using the existing model-driven technology. On the other hand, in the conventional data driving methods such as VRFT, a reference model is not designed for a non-self-balancing time lag object, and the reference model for the non-self-balancing time lag object cannot design a controller for the object. Finally, the prior art usually designs a PID controller for the object, and the existence of the integral controller makes it better to track the change of the set value without the PD controller.
Disclosure of Invention
The embodiment of the application aims to provide a method and a device for designing a PD controller based on VRFT (virtual router function), and electronic equipment, so as to solve the technical problems that a non-self-balancing time lag object is difficult to accurately model, the tracking capability of a controller set value is insufficient and the like in the related technology.
According to a first aspect of embodiments of the present application, there is provided a VRFT-based PD controller design method, including:
designing a reference model based on VRFT according to the dynamic characteristics of a PD controller and a non-self-balancing time lag object;
obtaining an optimization problem expression equation capable of solving the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter;
testing the non-self-balancing time lag object to obtain input and output data of the test;
substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters;
and calculating to obtain the parameters of the PD controller through the optimal adjustable parameters.
Optionally, the designing to obtain a reference model based on VRFT according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object includes:
obtaining an ideal control loop transfer function according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
simplifying the transfer function of the ideal control loop by taking the minimum integral absolute error IAE as a target function and applying a genetic algorithm to obtain the target function with the only adjustable parameter
Figure DEST_PATH_IMAGE001
Simplified ideal loop transfer function of (1);
and obtaining a VRFT-based reference model based on the structural relation between the VRFT reference model and the simplified ideal loop transfer function.
Optionally, the ideal control loop transfer function
Figure 164840DEST_PATH_IMAGE002
Comprises the following steps:
Figure DEST_PATH_IMAGE003
in the formula (I), the compound is shown in the specification,
Figure 396101DEST_PATH_IMAGE004
the process gain for a non-self-balancing time-lag object,
Figure DEST_PATH_IMAGE005
is a proportional parameter of the PD controller,
Figure 967897DEST_PATH_IMAGE006
is a differential parameter of the PD controller,
Figure DEST_PATH_IMAGE007
a time lag constant of a non-self-balancing time lag object;
the simplified ideal loop transfer function
Figure 813362DEST_PATH_IMAGE008
Comprises the following steps:
Figure 100002_DEST_PATH_IMAGE009
the VRFT-based reference model
Figure 916447DEST_PATH_IMAGE010
Comprises the following steps:
Figure DEST_PATH_IMAGE011
optionally, the expression equation of the optimization problem of the solvable target PD controller is as follows:
Figure 872771DEST_PATH_IMAGE012
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE013
the value of the objective function is,
Figure 377701DEST_PATH_IMAGE014
the PD control parameters are designed for the target,
Figure DEST_PATH_IMAGE015
Figure 396998DEST_PATH_IMAGE016
is the frequency domain input of the non-self-balancing time-lag object,
Figure DEST_PATH_IMAGE017
a frequency domain input of an ideal non-self-balancing time-lag object;
Figure DEST_PATH_IMAGE019
in the formula (I), the compound is shown in the specification,
Figure 908750DEST_PATH_IMAGE020
is the frequency domain output of the non-self-balance time-lag object.
Optionally, the testing the non-self-balancing time lag object to obtain the input and output data of the test includes:
if the closed-loop test is carried out on the non-self-balance time lag object, a pulse excitation signal is given to the whole control system unit to obtain input and output data of the non-self-balance time lag object in the closed-loop test;
if the open loop test is carried out on the non-self-balance time lag object, the unit time unit pulse excitation signal of the non-self-balance time lag object is given, and then the unit time reverse unit pulse excitation signal of the non-self-balance time lag object is given, so that the input and output data of the non-self-balance time lag object in the open loop test are obtained.
Optionally, substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameter to obtain an optimal adjustable parameter, including:
giving the range of adjustable parameters, substituting the input and output data of the test into the expression equation of the optimization problem, and solving the corresponding data under each adjustable parameterOptimization of
Figure DEST_PATH_IMAGE021
And its objective function value;
obtaining an optimal adjustable parameter by comparing the objective function values, and optimizing under the optimal adjustable parameter
Figure 668765DEST_PATH_IMAGE021
Corresponding to the optimal PD controller parameters.
According to a second aspect of the embodiments of the present application, there is provided a VRFT-based PD controller designing apparatus, including:
the design module is used for designing and obtaining a VRFT-based reference model according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
the problem expression module is used for obtaining an optimization problem expression equation of the target PD controller based on the target function of the VRFT method and the reference model, and the optimization problem expression equation contains an adjustable parameter;
the data acquisition module is used for testing the non-self-balancing time lag object to obtain input and output data of the test;
the solving module is used for substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters;
and the calculation module is used for calculating the parameters of the PD controller according to the optimal adjustable parameters.
According to a third aspect of embodiments of the present application, there is provided an electronic apparatus, including:
one or more processors;
a memory for storing one or more programs;
when executed by the one or more processors, cause the one or more processors to implement a method as described in the first aspect.
According to a third aspect of embodiments herein, there is provided a computer readable storage medium having stored thereon computer instructions which, when executed by a processor, implement the steps of the method according to the first aspect.
The technical scheme provided by the embodiment of the application can have the following beneficial effects:
according to the embodiment, the reference model of the non-self-balancing time lag object based on the VRFT is designed and obtained through the research on the dynamic characteristics of the PD controller and the non-self-balancing time lag object, and the VRFT method is extended to the non-self-balancing time lag object; based on the target function of the VRFT method and the reference model, an optimization problem expression equation containing an adjustable parameter is obtained, and accordingly, the design method of the PD controller is obtained and simplified; the method supports open-loop and closed-loop tests of the non-self-balancing object, and provides methods for obtaining input and output data of the open-loop/closed-loop tests respectively, so that the test convergence speed is increased; and substituting the tested input and output data into the optimization problem expression equation and solving an optimal adjustable parameter, and calculating the parameters of the ideal PD controller according to the optimal adjustable parameter, thereby achieving the technical effect of completing the design of the ideal PD controller without a non-self-balancing time-lag object transfer function.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.
Fig. 1 is a flow chart illustrating a VRFT-based PD controller design method according to an exemplary embodiment.
Fig. 2 is a flowchart illustrating S11 according to an exemplary embodiment.
Fig. 3 is a flowchart illustrating S13 according to an exemplary embodiment.
Fig. 4 is a closed loop data diagram of S141 shown according to an exemplary embodiment.
Fig. 5 is an open-loop data diagram of S142 shown in accordance with an example embodiment.
Fig. 6 is a flowchart illustrating S14 according to an exemplary embodiment.
FIG. 7 is a control effect verification comparison diagram according to an illustrative embodiment.
Fig. 8 is a block diagram illustrating a VRFT-based PD controller design apparatus according to an example embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
Fig. 1 is a flowchart illustrating a VRFT-based PD controller design method according to an exemplary embodiment, which may include the following steps, as shown in fig. 1:
s11: designing a reference model based on VRFT according to the dynamic characteristics of a PD controller and a non-self-balancing time lag object;
s12: obtaining an optimization problem expression equation capable of solving the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter;
s13: testing the non-self-balancing time lag object to obtain input and output data of the test;
s14: substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters;
s15: and calculating to obtain the parameters of the PD controller through the optimal adjustable parameters.
According to the embodiment, the reference model of the non-self-balancing time lag object based on the VRFT is designed and obtained through the research on the dynamic characteristics of the PD controller and the non-self-balancing time lag object, and the VRFT method is extended to the non-self-balancing time lag object; based on the target function of the VRFT method and the reference model, an optimization problem expression equation containing an adjustable parameter is obtained, and accordingly, the design method of the PD controller is obtained and simplified; the method supports the open-loop and closed-loop tests of the non-self-balancing object, and provides a method for obtaining the input and output data of the open-loop/closed-loop tests respectively, so that the test convergence speed is improved; and substituting the tested input and output data into the optimization problem expression equation and solving an optimal adjustable parameter, and calculating the parameters of the ideal PD controller according to the optimal adjustable parameter, thereby achieving the technical effect of completing the design of the ideal PD controller without a non-self-balancing time-lag object transfer function.
In a specific implementation of S11: designing a reference model based on VRFT according to the dynamic characteristics of a PD controller and a non-self-balancing time lag object; referring to fig. 2, this step may include the following sub-steps:
s111: obtaining an ideal control loop transfer function according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
in particular, the ideal control loop transfer function
Figure 293781DEST_PATH_IMAGE002
Comprises the following steps:
Figure 12207DEST_PATH_IMAGE003
in the formula (I), the compound is shown in the specification,
Figure 355464DEST_PATH_IMAGE004
is a non-self-balancing time lag objectThe gain of the process of (2) is,
Figure 997798DEST_PATH_IMAGE005
is a proportional parameter of the PD controller,
Figure 932780DEST_PATH_IMAGE006
is a differential parameter of the PD controller,
Figure 369578DEST_PATH_IMAGE007
is the time lag constant of the non-self-balancing time lag object.
The design is based on the transfer function of a universal non-self-balancing time lag object and the transfer function of a PD controller, the whole ideal control loop transfer function fully considers the series integration of the non-self-balancing time lag object and the PD controller, and the ideal control loop transfer function has strong universality and is suitable for low-order high-order non-self-balancing time lag objects because the transfer function of the non-self-balancing time lag object is universal.
S112: simplifying the transfer function of the ideal control loop by taking the minimum integral absolute error IAE as a target function and applying a genetic algorithm to obtain the target function with only adjustable parameters
Figure 200131DEST_PATH_IMAGE022
Simplified ideal loop transfer function of (1);
in particular, the simplified ideal loop transfer function
Figure 833106DEST_PATH_IMAGE008
Comprises the following steps:
Figure 167136DEST_PATH_IMAGE009
through simplification of an IAE objective function, the ideal loop transfer functions of four adjustable parameters are simplified into one adjustable parameter, so that the calculation amount of the whole method is greatly reduced, and the use is more convenient. On the other hand, the IAE is a main evaluation means for measuring the tracking control of the set value, and the simplification by taking the IAE as an objective function can ensure that the designed parameters have good control effect.
S113: and obtaining a VRFT-based reference model based on the structural relation between the VRFT reference model and the simplified ideal loop transfer function.
In particular, the VRFT-based reference model
Figure 774835DEST_PATH_IMAGE010
Comprises the following steps:
Figure 92683DEST_PATH_IMAGE011
thus, the input-output relation of the whole control system can be directly used by the reference model
Figure 263771DEST_PATH_IMAGE010
And (4) showing.
In a specific implementation of S12: obtaining an optimization problem expression equation capable of solving the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter;
in particular, a reference model is utilized
Figure 717886DEST_PATH_IMAGE010
The output of the ideal PD controller can be found as:
Figure 762065DEST_PATH_IMAGE024
when in use
Figure 754161DEST_PATH_IMAGE017
And
Figure 276409DEST_PATH_IMAGE016
the closer the reference model is
Figure 850610DEST_PATH_IMAGE017
The closer the PD control parameter in (1) is to the idealDesign values. Thus, the design problem of the PD controller is converted into
Figure 267290DEST_PATH_IMAGE017
And
Figure 28572DEST_PATH_IMAGE016
the minimization of the difference, a complex design problem, can be translated into an easily understood mathematical expression.
The expression equation of the optimization problem of the solvable target PD controller is as follows:
Figure 620090DEST_PATH_IMAGE012
in the formula (I), the compound is shown in the specification,
Figure 235748DEST_PATH_IMAGE013
the value of the objective function is,
Figure 356151DEST_PATH_IMAGE014
the PD control parameters are designed for the target,
Figure 135888DEST_PATH_IMAGE015
Figure 452469DEST_PATH_IMAGE016
is the frequency domain input of the non-self-balancing time-lag object,
Figure 470104DEST_PATH_IMAGE017
a frequency domain input of an ideal non-self-balancing time-lag object;
Figure 292566DEST_PATH_IMAGE019
in the formula (I), the compound is shown in the specification,
Figure 480971DEST_PATH_IMAGE020
is the frequency domain output of the non-self-balance time-lag object.
In a specific implementation of S13: testing the non-self-balancing time lag object to obtain tested input and output data; referring to fig. 3, this step may include the steps of:
s131: if the closed-loop test is carried out on the non-self-balance time lag object, a pulse excitation signal is given to the whole control system unit to obtain input and output data of the non-self-balance time lag object in the closed-loop test;
in particular, as in a proportional controller
Figure 148713DEST_PATH_IMAGE026
Non-self-balancing time-lag object under control
Figure 286433DEST_PATH_IMAGE028
Giving the closed-loop system unit a pulse excitation signal, giving a sufficient test time until the output data of the object is stable, and acquiring the input and output data of the object with non-self-balance time lag in the test, as shown in fig. 4, wherein u1 is the object with non-self-balance time lag after the pulse excitation signal is given to the closed-loop system unit
Figure DEST_PATH_IMAGE029
Y1 is a non-self-balancing time-lag object in the closed-loop test
Figure 938519DEST_PATH_IMAGE029
A corresponding output signal. Because most non-self-balancing time lag objects are under closed-loop control, closed-loop testing is usually easier to perform on the objects, and the output data of the closed-loop control can be converged faster, i.e., the testing time is shorter.
S132: if the open loop test is carried out on the non-self-balance time lag object, the unit time unit pulse excitation signal of the non-self-balance time lag object is given, and then the unit time reverse unit pulse excitation signal of the non-self-balance time lag object is given, so that the input and output data of the non-self-balance time lag object in the open loop test are obtained.
Specifically, the open loop test is performed on the non-self-balanced time lag object, such as the non-self-balanced time lag object
Figure 427269DEST_PATH_IMAGE028
Giving the unit time unit pulse excitation signal to the non-self-balance time lag object and then giving the unit time reversal unit pulse excitation signal to the non-self-balance time lag object to obtain the input and output data of the non-self-balance time lag object in the open loop test, as shown in fig. 5, wherein u2 is given to the non-self-balance time lag object
Figure 882390DEST_PATH_IMAGE029
Y2 is the non-self-balancing time-lag object in the open-loop test
Figure 77879DEST_PATH_IMAGE029
A corresponding output signal. By means of the excitation signal input, the non-self-balance time-lag object can be enabled to obtain the converged output, and faster convergence is achieved, namely the test time is shorter.
In a specific implementation of S14: substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters; referring to fig. 6, this step may include the steps of:
s141: giving the range of adjustable parameters, substituting the input and output data of the test into the expression equation of the optimization problem, and solving the corresponding optimal value under each adjustable parameter
Figure 242144DEST_PATH_IMAGE014
And its objective function value;
specifically, the test output data is processed
Figure 936299DEST_PATH_IMAGE020
Substituting into the formula of S12 to obtain the corresponding
Figure 149106DEST_PATH_IMAGE030
The above-mentioned
Figure 526998DEST_PATH_IMAGE030
And the test input data
Figure 580273DEST_PATH_IMAGE016
Substituting the optimization problem expression equation to give a range of adjustable parameters, e.g. for the non-self-balancing time-lag object
Figure 981299DEST_PATH_IMAGE029
Given is
Figure DEST_PATH_IMAGE031
Calculating the corresponding optimal value under each adjustable parameter
Figure 515573DEST_PATH_IMAGE014
And its objective function value. Thereby, the optimal adjustable parameter corresponding to the optimal objective function value obtained by comparison can be obtained
Figure DEST_PATH_IMAGE033
S142: obtaining an optimal adjustable parameter by comparing the objective function values, and optimizing under the optimal adjustable parameter
Figure 154496DEST_PATH_IMAGE034
Corresponding to the optimal PD controller parameters.
Specifically, after the optimal parameters are determined, the corresponding optimal W can be obtained accurately, that is, after the optimal parameters are determined, the optimal W is obtained
Figure 644252DEST_PATH_IMAGE033
Corresponding to the minimum objective function
Figure DEST_PATH_IMAGE035
The optimal PD controller is
Figure 1415DEST_PATH_IMAGE036
In a specific implementation of S15: and calculating to obtain the parameters of the PD controller through the optimal adjustable parameters.
In particular, a PD controller will be obtained
Figure 602029DEST_PATH_IMAGE036
With said non-self-balancing time-lag object
Figure 688934DEST_PATH_IMAGE029
A closed-loop negative feedback Control system is constructed, a unit step excitation is given to the system, and two model-driven PD controller design methods of non-self-balancing time-lag objects of Ye (from Ye, Zhen, et al, "Relay feedback analysis for a class of service and Applications 334.1 (2007)) and Visoli (from Visoli, A." Optimal tuning of PID controllers for integrating and unsettling processes. "IEE Procedent-Control Theory and Applications 148.2 (2001): 180 @ 184.) are selected as a comparison, see FIG. 7, where y is the output signal of the Control system under the excitation. As can be seen, the present method gives better control than the two methods.
Corresponding to the aforementioned embodiments of the VRFT-based PD controller design method, the present application also provides embodiments of a VRFT-based PD controller design apparatus.
Fig. 8 is a block diagram illustrating a VRFT-based PD controller design apparatus according to an example embodiment. Referring to fig. 8, the apparatus includes a design module 21, a problem expression module 22, a data acquisition module 23, a solving module 24, and a calculation module 25.
The designing module 21 is configured to design a reference model based on the VRFT according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
the problem expression module 22 is used for obtaining an optimization problem expression equation of the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter;
the data acquisition module 23 is configured to test the non-self-balancing time lag object to obtain input and output data of the test;
a solving module 24, configured to substitute the input and output data of the test into the optimization problem expression equation and solve the optimization problem expression equation by changing the adjustable parameter, so as to obtain an optimal adjustable parameter;
and a calculating module 25, configured to calculate a PD controller parameter according to the optimal adjustable parameter.
With regard to the apparatus in the above embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be described in detail here.
For the device embodiments, since they substantially correspond to the method embodiments, reference may be made to the partial description of the method embodiments for relevant points. The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of the application. One of ordinary skill in the art can understand and implement it without inventive effort.
Correspondingly, the present application also provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; when executed by the one or more processors, cause the one or more processors to implement the VRFT based PD controller design method as described above.
Accordingly, the present application also provides a computer readable storage medium having stored thereon computer instructions, wherein the instructions, when executed by a processor, implement the VRFT-based PD controller design method as described above.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It will be understood that the present application is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims (8)

1. A method for designing a VRFT-based PD controller is characterized by comprising the following steps:
designing a reference model based on VRFT according to the dynamic characteristics of a PD controller and a non-self-balancing time lag object;
obtaining an optimization problem expression equation capable of solving the target PD controller based on the target function of the VRFT method and the reference model, wherein the optimization problem expression equation contains an adjustable parameter;
testing the non-self-balancing time lag object to obtain input and output data of the test;
substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters;
calculating to obtain parameters of the PD controller according to the optimal adjustable parameters;
the VRFT-based reference model is designed and obtained according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object, and comprises the following steps:
obtaining an ideal control loop transfer function according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
simplifying the transfer function of the ideal control loop by taking the minimum integral absolute error IAE as a target function and applying a genetic algorithm to obtain the target function with the only adjustable parameter
Figure 219192DEST_PATH_IMAGE001
Simplified ideal loop transfer function of (1);
obtaining a reference model based on VRFT based on the architectural relation between the reference model in VRFT and the simplified ideal loop transfer function;
the expression equation of the optimization problem of the solvable target PD controller is as follows:
Figure 981611DEST_PATH_IMAGE002
in the formula (I), the compound is shown in the specification,
Figure 100877DEST_PATH_IMAGE003
the value of the objective function is,
Figure 759392DEST_PATH_IMAGE004
the PD control parameters are designed for the target,
Figure 832783DEST_PATH_IMAGE005
Figure 133315DEST_PATH_IMAGE006
is the frequency domain input of the non-self-balancing time-lag object,
Figure 107087DEST_PATH_IMAGE007
a frequency domain input of an ideal non-self-balancing time-lag object;
Figure 936503DEST_PATH_IMAGE008
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE009
the frequency domain output is a non-self-balancing time-lag object;
Figure 697523DEST_PATH_IMAGE010
to simplify the ideal loop transfer function.
2. The method of claim 1, wherein the ideal control loop transfer function is:
Figure 536166DEST_PATH_IMAGE011
in the formula (I), the compound is shown in the specification,
Figure 161182DEST_PATH_IMAGE012
in order to be an ideal control loop transfer function,
Figure DEST_PATH_IMAGE013
the process gain for a non-self-balancing time-lag object,
Figure 364762DEST_PATH_IMAGE014
is a proportional parameter of the PD controller,
Figure 442439DEST_PATH_IMAGE015
is a differential parameter of the PD controller,
Figure 789500DEST_PATH_IMAGE016
a time lag constant of a non-self-balancing time lag object;
the simplified ideal loop transfer function
Figure 269023DEST_PATH_IMAGE010
Comprises the following steps:
Figure 971400DEST_PATH_IMAGE017
the VRFT-based reference model
Figure 739636DEST_PATH_IMAGE018
Comprises the following steps:
Figure 185661DEST_PATH_IMAGE019
3. the method of claim 1, wherein testing the non-self-balancing time-lag object to obtain tested input-output data comprises:
if the closed-loop test is carried out on the non-self-balance time lag object, a pulse excitation signal is given to the whole control system unit to obtain input and output data of the non-self-balance time lag object in the closed-loop test;
if the open loop test is carried out on the non-self-balance time lag object, the unit time unit pulse excitation signal of the non-self-balance time lag object is given, and then the unit time reverse unit pulse excitation signal of the non-self-balance time lag object is given, so that the input and output data of the non-self-balance time lag object in the open loop test are obtained.
4. The method of claim 1, wherein substituting the input and output data of the test into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters comprises:
giving the range of adjustable parameters, substituting the input and output data of the test into the expression equation of the optimization problem, and solving the corresponding optimal value under each adjustable parameter
Figure 519690DEST_PATH_IMAGE020
And its objective function value;
obtaining an optimal adjustable parameter by comparing the objective function values, and optimizing under the optimal adjustable parameter
Figure 829186DEST_PATH_IMAGE020
I.e. the corresponding optimal PD controller parameter.
5. A VRFT-based PD controller design apparatus, comprising:
the design module is used for designing and obtaining a VRFT-based reference model according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
the problem expression module is used for obtaining an optimization problem expression equation of the target PD controller based on the target function of the VRFT method and the reference model, and the optimization problem expression equation contains an adjustable parameter;
the data acquisition module is used for testing the non-self-balancing time lag object to acquire input and output data of the test;
the solving module is used for substituting the tested input and output data into the optimization problem expression equation and solving the optimization problem expression equation by changing the adjustable parameters to obtain optimal adjustable parameters;
the calculation module is used for calculating to obtain parameters of the PD controller through the optimal adjustable parameters;
the VRFT-based reference model is designed and obtained according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object, and comprises the following steps:
obtaining an ideal control loop transfer function according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
simplifying the transfer function of the ideal control loop by taking the minimum integral absolute error IAE as a target function and applying a genetic algorithm to obtain the target function with the only adjustable parameter
Figure 147035DEST_PATH_IMAGE001
Simplified ideal loop transfer function of (1);
obtaining a reference model based on VRFT based on the architectural relation between the reference model in VRFT and the simplified ideal loop transfer function;
the expression equation of the optimization problem of the solvable target PD controller is as follows:
Figure 68855DEST_PATH_IMAGE002
in the formula (I), the compound is shown in the specification,
Figure 522970DEST_PATH_IMAGE003
the value of the objective function is,
Figure 567149DEST_PATH_IMAGE004
the PD control parameters are designed for the target,
Figure 811442DEST_PATH_IMAGE005
Figure 599270DEST_PATH_IMAGE006
is the frequency domain input of the non-self-balancing time-lag object,
Figure 907891DEST_PATH_IMAGE007
a frequency domain input of an ideal non-self-balancing time-lag object;
Figure 60655DEST_PATH_IMAGE008
in the formula (I), the compound is shown in the specification,
Figure 87517DEST_PATH_IMAGE009
outputting the frequency domain of the non-self-balance time-lag object;
Figure 616718DEST_PATH_IMAGE010
to simplify the ideal loop transfer function.
6. The apparatus of claim 5, wherein the reference model based on VRFT is designed according to the dynamics of PD controller and non-self-balancing time lag object, comprising:
obtaining an ideal control loop transfer function according to the dynamic characteristics of the PD controller and the non-self-balancing time lag object;
simplifying the transfer function of the ideal control loop by taking the minimum integral absolute error IAE as a target function and applying a genetic algorithm to obtain the target function with the only adjustable parameter
Figure 278382DEST_PATH_IMAGE001
Simplified ideal loop ofA transfer function;
and obtaining a VRFT-based reference model based on the structural relation between the VRFT reference model and the simplified ideal loop transfer function.
7. An electronic device, comprising:
one or more processors;
a memory for storing one or more programs;
when executed by the one or more processors, cause the one or more processors to implement the method of any one of claims 1-4.
8. A computer-readable storage medium having stored thereon computer instructions, which when executed by a processor, carry out the steps of the method according to any one of claims 1-4.
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