CN114759788A - Buck type converter digital controller design method adopting interference filtering compensation - Google Patents

Buck type converter digital controller design method adopting interference filtering compensation Download PDF

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CN114759788A
CN114759788A CN202210476644.2A CN202210476644A CN114759788A CN 114759788 A CN114759788 A CN 114759788A CN 202210476644 A CN202210476644 A CN 202210476644A CN 114759788 A CN114759788 A CN 114759788A
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interference
buck
type converter
attraction
error
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梅盼
邬玲伟
雷必成
林志明
苏娜
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Taizhou University
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Taizhou University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/14—Arrangements for reducing ripples from dc input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582—Buck-boost converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a design method of a Buck type converter digital controller adopting interference filtering compensation. An interference compensator based on a moving average filtering technology is adopted and embedded into a constraint variable speed attraction law to construct an ideal error dynamic with interference suppression capability; and dynamically designing a digital controller according to the ideal error, and using the calculated control signal as a control input signal of the Buck-type converter. The specific parameter setting work of the controller can be carried out according to the indexes of the system attraction process, and an expression representing the absolute attraction layer and the steady-state error band boundary of the system attraction process is given. The invention provides a digital controller design method which can effectively inhibit various interference signals such as system flutter, nonlinearity and the like, effectively reduce output voltage ripples and has inductive current constraint hardware protection.

Description

Buck type converter digital controller design method adopting interference filtering compensation
Technical Field
The invention relates to a Buck type converter digital controller design method adopting interference filtering compensation, which is suitable for a voltage reduction type direct current power supply and a DC-DC power supply in industrial control.
Background
A Buck-type converter is a power electronic device that implements dc circuit voltage conversion. The Buck converter has the advantages of simple and light system structure, stable voltage reduction, safety, reliability and the like, and is widely applied to the industrial fields of electric automobile charging, LED driving, aerospace and the like.
The conventional Buck converter voltage control is usually a linear proportional-integral-derivative (PID) control method, but the Buck converter has various interferences such as load sudden change, input voltage sudden change, model parameter perturbation and the like, so that high-performance control cannot be realized. The sliding mode control is a nonlinear control method and has the advantages of simple control realization, fast output response, good robustness and the like. However, the sliding mode control has inherent buffeting problem, and the ripple of the output voltage becomes large when the sliding mode control is applied to the Buck converter. Therefore, how to reduce the system buffeting is a research focus of the sliding mode control.
The sliding mode control approach law method adopts an approach law, the dynamic response process of a closed loop system is divided into an approach process and a sliding mode, and the stability and the convergence of the closed loop system are determined by the specific approach law and a sliding mode function. The attraction law method directly adopts a tracking error signal, a sliding mode function does not need to be defined, and the design of the controller becomes more direct and simpler. The dynamic response process of a closed loop system is determined only by the attraction law. In the presence of interference, interference suppression measures are "embedded" into the attraction law, constructing an ideal error dynamics with interference suppression. The discrete time controller is dynamically designed according to the ideal error, so that the closed-loop system has the error dynamic characteristic described by the ideal error dynamic, and the anti-interference capability and the tracking performance of the control system are improved. When the discrete controller is designed by an attraction law method, two indexes of transient and steady-state behaviors of the tracking error can be given by the attraction law: absolute attraction layers and steady state error bands. In practice, the specific values of the two indicators depend on the controller parameters. Given the specific form of the attraction law, specific expressions of two indexes can be given in advance, and the method can be used for parameter setting of the controller.
The Buck converter has various disturbances (sudden load change, sudden input voltage change and the like), and effective compensation and suppression processing needs to be performed on each disturbance signal. The current disturbance compensation suppression method is a one-step delay interference estimation technology. The technology can play an effective compensation and inhibition role in constant/slow time-varying disturbance. However, this processing method has the problem of measurement noise amplification, which reduces the control accuracy and stability of the Buck converter. In addition, if the inductance current of the Buck converter is too large, the risk of hardware burnout is not negligible. The overcurrent protection is considered in the design of the system controller, which is also a design difficulty. Therefore, how to effectively improve the interference suppression capability of the Buck converter, restrain the inductor current, and reduce the output voltage ripple (reduce the steady-state error) is a focus problem of the controller design, and is also a difficult problem to be solved urgently.
Disclosure of Invention
The invention provides a design method of a Buck-type converter digital controller adopting interference filtering compensation, aiming at solving the problems of large output voltage ripple, noise amplification and the like of the existing control method. Interference filtering suppression technology is adopted and embedded into an attraction law, so that ideal error dynamics with disturbance suppression capability are constructed, and various interferences such as noise, model nonlinearity and the like can be effectively suppressed. The Buck converter digital control technology adopting interference filtering compensation can realize accurate reference signal tracking task, simultaneously ensure that the inductive current is constrained within a given constraint value, and has anti-interference capability and effectively reduces the ripple of output voltage.
The technical scheme adopted by the invention for solving the technical problems is as follows:
a Buck type converter digital controller design method adopting interference filtering compensation comprises the following steps:
1) the mathematical model of the Buck type converter control system is established as follows:
Figure BDA0003625916110000021
wherein, Vk+1,Vk,Vk-1Is the output voltage at the moment k +1, k, k-1 of the Buck converter, ukControl input signal, T, representing the k-time of a Buck convertersR, L and C are respectively the resistance, the inductance and the capacitance of the Buck type converter; vinIs the input voltage; w is ak+1The total interference signal of the system at the moment k + 1;
2) construction of the following restraint variable-speed suction law
Figure BDA0003625916110000022
Wherein e isk＝rk-VkSystematic tracking error at time k, rkFor a given reference signal at time k, VkThe actual output signal of the system at the moment k; alpha is more than 0 and less than 1 and less than beta, epsilon is more than 0, delta is more than 0, the convergence speed of the tracking error is adjusted to be
Figure BDA0003625916110000023
3) The interference filtering compensation measure is embedded into the attraction law (2), and the specific expression is
Figure BDA0003625916110000024
Wherein the content of the first and second substances,
Figure BDA0003625916110000025
the interference compensator based on the moving average filtering technology is used for further filtering high-frequency interference signals while inhibiting constant-value and slow time-varying interference, and n is a filter coefficient; w is ak+1-iA system interference signal at the time k + 1-i; interference filtering compensation error
Figure BDA0003625916110000026
Satisfy the requirements of
Figure BDA0003625916110000027
Where Δ is the supremum of the interference compensation error, the convergence rate of the tracking error is
Figure BDA0003625916110000028
4) The expression of the discrete controller of the Buck-type converter obtained by replacing the formula (1) with the formula (4) is shown as
Figure BDA0003625916110000031
Wherein, the first and the second end of the pipe are connected with each other,
Figure BDA0003625916110000032
5) will ukAs the control input signal of the Buck-type converter, the voltage output signal V of the Buck-type converter can be measuredkFollows the reference signal rkThe dynamic behavior of the variation, the system tracking error is characterized by equation (4), and the inductor current iLIs constrained at
Figure BDA0003625916110000033
Within the limits;
furthermore, in order to represent the attraction process of the attraction law, the invention provides expressions of 2 indexes, namely an absolute attraction layer boundary and a steady-state error band boundary; these 2 indicators can be used to guide controller parameter tuning, where the absolute attraction layer boundary and the steady state error band boundary are defined as follows:
1) absolute attraction layer boundary ΔAAL
|ek+1|＜|ekI, when ek|＞ΔAAL (8)
2) Steady state error band boundary ΔSSE
|ek+1|≤ΔSSEWhen | ek|≤ΔSSE(9) Here,. DELTA.AALTo absolute attraction layer boundary, ΔSSEIs a steady state error band boundary. The expression of each index is as follows:
1) absolute attraction layer boundary ΔAALExpressed as:
Figure BDA0003625916110000034
2) steady state error band boundary ΔSSEExpressed as:
Figure BDA0003625916110000041
the technical conception of the invention is as follows: a Buck converter digital controller design method adopting interference filtering compensation. Interference filtering compensation measures based on the moving average filtering technology are embedded into an attraction law, and ideal error dynamics with interference suppression effect are formed. And dynamically designing a discrete time controller according to the ideal error to realize accurate tracking of the given reference signal.
The control effect of the invention is mainly shown in that: and interference filtering compensation technology is adopted to inhibit interference so as to improve tracking accuracy. Meanwhile, the discrete time suction law is adopted to realize constraint convergence and restrain system buffeting, so that the system has better control performance.
Drawings
FIG. 1 is a flow chart of a Buck-type converter attraction law design method.
Fig. 2 is a circuit schematic diagram of a Buck converter.
Fig. 3 is a block diagram of a digital controller of a Buck converter.
FIG. 4 shows the law of constant velocity suction ek+1＝ek-εsgn(ek) And the proposed law of attraction
Figure BDA0003625916110000042
The convergence rate of (2) is compared with that of (3).
FIG. 5 illustrates interference filter compensation errors
Figure BDA0003625916110000043
FIG. 6 illustrates the interference wkTracking error when ═ 0.2sin (π k/2) cos (π k/3) and controller parameters ε ═ 0.3, α ═ 0.1, β ═ 3, and δ ═ 1.
FIG. 7 illustrates the interference wkTracking error at 0.2sin (pi k/2) cos (pi k/3) and controller parameter, 0.4, 0.5, 3, 2.
FIG. 8 illustrates the interference wkTracking error at 0.2sin (pi k/2) cos (pi k/3) and controller parameter, 0.5, 3, 1.
FIG. 9 shows the input voltage signal V when the digital controller (20) is used in the case of sudden change of the input voltageinAnd an output voltage signal Vout。
FIG. 10 shows an error signal e of an output voltage when the digital controller (20) is used in the case of a sudden change of an input voltage k(output voltage ripple).
FIG. 11 shows the input voltage signal V when the digital controller (21) is used in the case of sudden change of the input voltageinAnd an output voltage signal Vout。
FIG. 12 shows an error signal e of the output voltage when the digital controller (21) is used in the case of an abrupt change of the input voltagek(output voltage ripple).
FIG. 13 shows the input voltage signal V when the digital controller (20) is used in the case of sudden load changeinAnd an output voltage signal Vout。
FIG. 14 is an error signal e of the output voltage when the digital controller (20) is used in the case of a sudden load changek(output voltage ripple).
FIG. 15 shows the input voltage signal V when the digital controller (21) is used in the case of a sudden load changeinAnd an output voltage signal Vout。
FIG. 16 shows the error signal e of the output voltage when the digital controller (21) is used in the case of sudden load changek(output voltage ripple).
Detailed Description
The following further describes embodiments of the present invention with reference to the accompanying drawings.
Referring to fig. 1-16, a method for designing a Buck converter digital controller using interference filtering compensation, as shown in fig. 1, includes the following steps:
step 1: establishing mathematical model of Buck converter
FIG. 2 is a schematic circuit diagram of a Buck converter, in which V inIs a direct current input voltage; r, L and C are respectively the resistance, the inductance and the capacitance of the Buck type converter; i.e. iLIs the inductor current; vTIs a power switch tube; vDIs a diode; v0Is the output voltage of a continuous system. According to kirchhoff voltage and current laws, when a switch is closed and a tube is disconnected, models of a Buck type converter control system are respectively as follows:
a) and (3) closing a switch:
Figure BDA0003625916110000051
b) and (3) turning off a switch:
Figure BDA0003625916110000052
the average model is
Figure BDA0003625916110000053
Where u is the duty cycle, which is provided as a control signal by the pulse-width modulated signal. From equation (3), the following voltage equation can be obtained:
Figure BDA0003625916110000054
by using the Euler approximation method, equation (4) becomes
Figure BDA0003625916110000061
Wherein, Vk+1,Vk,Vk-1For the discrete system output voltage u of Buck type converter at the moment of k +1, k, k-1kRepresenting the control input signal, T, at time k of the Buck convertersR, L and C are respectively the resistance, the inductance and the capacitance of the Buck type converter; vinIs the input voltage; Δ wk+1Is a discrete error.
Considering the uncertainty disturbance of the Buck-type converter system and the measurement error of R, L and C, the second-order input-output system model of the Buck-type converter becomes
Figure BDA0003625916110000062
Wherein, the measurement errors of the R, the L and the C are respectively. A mathematical model of the buck dc converter can be obtained from equation (6):
Figure BDA0003625916110000063
Wherein wk+1The specific expression of the total interference signal of the system at the moment of k +1 is
Figure BDA0003625916110000064
And 2, step: structure constrained variable speed suction law
Construction of the following restraint variable-speed suction law
Figure BDA0003625916110000065
Wherein e isk＝rk-VkSystematic tracking error at time k, rkGiven reference for time kSignal, VkThe actual output signal of the system at the moment k; alpha is more than 0 and less than 1 and less than beta, epsilon is more than 0, delta is more than 0, the convergence speed of the tracking error is adjusted to be
Figure BDA0003625916110000066
And step 3: interference filtering compensation strategy
In order to improve the anti-interference capability of the system, interference filtering compensation measures are embedded into an attraction law (9), and the specific expression is
Figure BDA0003625916110000067
Wherein the content of the first and second substances,
Figure BDA0003625916110000068
the interference compensator based on the moving average filtering technology is used for further filtering high-frequency interference signals while inhibiting constant-value and slow time-varying interference, and n is a filter coefficient; w is ak+1-iA system interference signal at the time k + 1-i; interference filtering compensation error
Figure BDA0003625916110000071
Satisfy the requirement of
Figure BDA0003625916110000072
Where Δ is the supremum of the interference compensation error, the convergence rate of the tracking error is
Figure BDA0003625916110000073
And 4, step 4: controller design
The expression of the discrete controller of the Buck-type converter obtained by replacing the formula (7) with the formula (11) is shown as
Figure BDA0003625916110000074
Wherein the content of the first and second substances,
Figure BDA0003625916110000075
will ukAs the control input signal of the Buck-type converter, the voltage output signal V of the Buck-type converter can be measured kFollows the reference signal rkThe dynamic behavior of the system tracking error is characterized by equation (11), and the inductor current iLThe constraint is within a limited range:
Figure BDA0003625916110000076
for Buck converter, output voltage VkIs greater than zero and less than the input voltage VinIn the range, given a constant reference signal, combined with equation (12) having
Figure BDA0003625916110000077
Therefore, the temperature of the molten metal is controlled,
Figure BDA0003625916110000078
and 5: performance analysis
In order to represent the attraction process of the attraction law, the invention provides expressions of 2 indexes, namely an absolute attraction layer boundary and a steady-state error band boundary; these 2 indicators can be used to guide controller parameter tuning, where the absolute attraction layer boundary and the steady state error band boundary are defined as follows:
1) absolute attraction layer boundary ΔAAL
|ek+1|＜|ekI, when ek|＞ΔAAL (16)
2) Steady state error band boundary ΔSSE
|ek+1|≤ΔSSEWhen | ek|≤ΔSSE(17) Here,. DELTA.AALIs a heat insulationFor attraction layer boundary, ΔSSEIs a steady state error band boundary. The expression of each index is as follows:
1) absolute attraction layer boundary ΔAALExpressed as:
Figure BDA0003625916110000081
2) steady state error band boundary ΔSSEExpressed as:
Figure BDA0003625916110000082
and furthermore, after the design of the discrete controller of the Buck-type converter is finished, the controller parameters in the Buck-type converter need to be set. The adjustable parameters epsilon, delta, alpha and beta can be adjusted according to 2 indexes representing the attraction process of the attraction law.
Examples
And performing closed-loop control on the output waveform of the Buck type direct current converter. The Buck converter is composed of a given signal part, a digital controller, a PWM modulation part, a Buck converter main control circuit, a signal conditioning circuit and an AD sampling circuit, and is shown in FIG. 3. The given signal, the digital controller and the PWM module are all realized by an ARM control board, and the rest parts are all realized by a Buck type converter hardware circuit. The whole Buck converter control system is provided with an expected signal required to be output by an ARM, and drives a high-low pulse signal of a power switch tube of the Buck converter after PWM modulation, so that connection and disconnection are realized. The Buck-type converter output signal collects required voltage signal data through the signal conditioning circuit and the AD module and returns to the ARM, then the input signal (required PWM signal) is corrected under the action of the digital controller, high-performance accurate tracking control of the Buck-type converter is achieved, and nonlinear interference and various disturbances (load sudden change, input voltage sudden change and the like) of a Buck-type converter model are effectively inhibited.
The following is a design process of a discrete sliding mode controller of a buck-type dc converter.
Firstly, constructAnd (5) establishing a system mathematical model. The method is characterized in that a main control circuit, a sampling circuit and a low-pass filter of the Buck converter are used as objects to perform mechanism modeling, and the switching period is Ts20us, load resistance R100 Ω, inductance L101 uH, capacitance C470 uF, control period T0.2 ms, and input voltage V in30V, given a reference signal rk＝10V。
The digital controller based on the equal-speed attraction law and the one-step delay interference estimation is as follows:
Figure BDA0003625916110000091
the digital controller of the interference compensator based on the constraint variable speed attraction law and the moving average filtering technology is as follows:
Figure BDA0003625916110000092
the present embodiment will illustrate the effectiveness and superiority of the digital controller design method provided by the present invention through numerical verification and Buck converter experimental results, respectively.
First, the effectiveness of the present invention in restricting the variable speed attraction law (9) is demonstrated by numerical results, and is comparable to the constant speed attraction law ek+1＝ek-εsgn(ek) By comparison, the invention is further explained to give the superiority of the restraint variable speed suction law (9). In the simulation, the initial error is eoThe controller parameters are selected to be e 0.5, δ 1, α 0.1, β 3, and the numerical simulation results are shown in fig. 4. The solid line in fig. 4 is a restricted variable speed suction law (9) curve, and the broken line is a constant speed suction law curve. As can be seen from fig. 4, the restricted variable-speed suction law (9) according to the present invention has a faster convergence rate and less chattering than the constant-speed suction law.
Given a position reference signal of rkInterference is w ═ 3k0.2sin (π k/2) cos (π k/3). Under the action of the digital controller (21) provided by the invention, different controller parameters epsilon, delta, alpha and beta are selected, and boundary layers in the convergence process of the system are different. Filter elementThe filter coefficients are selected to be n-3, and the supremum Δ of the interference compensation error is 0.1667, as shown in fig. 5. To verify the absolute attraction layer boundary Δ given by the present patentAALAnd steady state error band boundary ΔSSEThe numerical simulation is carried out on the expression (2).
1) When the controller parameter e is 0.3, α is 0.1, β is 3, and δ is 1, the two boundaries are respectively
Figure BDA0003625916110000093
ΔSSEAnd 0.1967. The simulation is shown in FIG. 6.
2) When the controller parameter e is 0.4, α is 0.5, β is 3, and δ is 2, the two boundaries are respectively
Figure BDA0003625916110000094
ΔSSEAnd 0.3667. The simulation is shown in FIG. 7.
3) When the controller parameter e is 0.5, α is 0.5, β is 3, and δ is 1, the two boundaries are respectively
Figure BDA0003625916110000095
The simulation is shown in FIG. 8.
The block diagram of the digital controller of the Buck-type converter used for the experiment is shown in FIG. 3, and is used for verifying the effectiveness and superiority of the digital controller design method provided by the invention when the load suddenly changes or the input voltage suddenly changes.
(1) Input voltage abrupt change situation
The load R remains constant at 100 Ω, the input voltage changes from 30V to 20V and back to 30V, and the other parameters remain constant. Under the action of the digital controller (20), the controller parameter is selected to be epsilon 0.5, and the experimental result is shown in fig. 9 and fig. 10. The experimental data of FIG. 9 are input voltages V, respectively inAnd an output voltage VoutFig. 10 shows an error signal (output voltage ripple) of the output voltage. During the process that the input voltage changes from 30V to 20V and then returns to 30V, the output voltage ripples are respectively 2 deltaSSE128mV,88mV,128 mV. Under the action of the digital controller (21), the parameters of the controller are selected to be beta-2, epsilon-alpha-delta-0.5 and n-3, and the experimental results are shown in fig. 11 and the graph12. The experimental data of FIG. 11 are the input voltage signals V, respectivelyinAnd an output voltage VoutFig. 12 shows an error signal (output voltage ripple) of the output voltage. During the process that the input voltage changes from 30V to 20V and returns to 30V, the output voltage ripples are respectively 2 deltaSSE102mV,78mV,102 mV. As can be seen from fig. 10 and 12, the digital controller (21) of the present invention can obtain smaller output voltage ripple than the conventional digital controller (20).
(2) Load break situation
Input voltage VinThe load is changed from R100 Ω to R25 Ω and back to R100 Ω, while the other parameters remain unchanged. Under the action of the digital controller (20), the controller parameter is selected to be epsilon 0.5, and the experimental result is shown in fig. 13 and fig. 14. The experimental data of FIG. 13 are the output currents I, respectivelyoutAnd an output voltage VoutFIG. 14 shows an error signal of an output voltage (output voltage ripple 2 Δ) SS). During the process of changing the load from R to 100 Ω to R to 25 Ω and back to R to 100 Ω, the output voltage ripple is 2 ΔSSE116mV,128mV,116 mV. Under the action of the numerical controller (21), the controller parameters are selected to be beta-2, epsilon-alpha-delta-0.5 and n-3, and the experimental results are shown in fig. 15 and fig. 16. The experimental data of FIG. 15 are the output currents I, respectivelyoutAnd an output voltage VoutFig. 16 shows an error signal (output voltage ripple) of the output voltage. During the process of changing the load from R to 100 Ω to R to 25 Ω and back to R to 100 Ω, the output voltage ripple is 2 ΔSSE88mV,116mV,88 mV. As can be seen from fig. 14 and 16, the digital controller (21) proposed by the present invention can obtain smaller output voltage ripple than the conventional digital controller (20).

Claims (2)

1. A Buck type converter digital controller design method adopting interference filtering compensation is characterized by comprising the following steps:
1) the mathematical model of the Buck type converter control system is established as follows:
Figure FDA0003625916100000011
wherein, Vk+1,Vk,Vk-1Is the output voltage at the moment k +1, k, k-1 of the Buck converter, ukControl input signal, T, representing the k-time of a Buck convertersR, L and C are respectively the resistance, the inductance and the capacitance of the Buck type converter; v inIs the input voltage; w is ak+1The total interference signal of the system at the moment k + 1;
2) structure constrained variable speed suction law
Figure FDA0003625916100000012
Wherein e isk＝rk-VkSystematic tracking error at time k, rkFor a given reference signal at time k, VkThe actual output signal of the system at the moment k; alpha is more than 0 and less than 1 and less than beta, epsilon is more than 0, delta is more than 0, the convergence speed of the tracking error is adjusted to be
Figure FDA0003625916100000013
3) The interference filtering compensation measure is embedded into the attraction law (2), and the specific expression is
Figure FDA0003625916100000014
Wherein the content of the first and second substances,
Figure FDA0003625916100000015
the interference compensator based on the moving average filtering technology is used for further filtering high-frequency interference signals while inhibiting constant-value and slow time-varying interference, and n is a filter coefficient; w is ak+1-iA system interference signal at the time k + 1-i; interference filtering compensation error
Figure FDA0003625916100000016
Satisfy the requirement of
Figure FDA0003625916100000017
Where Δ is the supremum of the interference compensation error, the convergence rate of the tracking error is
Figure FDA0003625916100000018
4) The expression of the discrete controller of the Buck-type converter obtained by replacing the formula (1) with the formula (4) is shown as
Figure FDA0003625916100000019
Wherein the content of the first and second substances,
Figure FDA0003625916100000021
5) will ukAs the control input signal of the Buck-type converter, the voltage output signal V of the Buck-type converter can be measuredkFollows the reference signal rkThe dynamic behavior of the variation, the system tracking error is characterized by equation (4), and the inductor current iLIs constrained at
Figure FDA0003625916100000022
Within the limits of the ranges.
2. The method of claim 1, wherein the Buck converter digital controller design method using interference filtering compensation comprises the following steps: the adjustable parameters epsilon, delta, alpha and beta of the discrete controller are set according to indexes representing the attraction process of an attraction law, and the indexes representing the attraction process of a system comprise absolute attraction layer boundaries deltaAALAnd steady state error band boundary ΔSSE；
1) Absolute attractive layer boundary ΔAALExpressed as:
Figure FDA0003625916100000023
2) steady state error band boundary ΔSSEExpressed as:
Figure FDA0003625916100000024
where delta is the supremum of the interference compensation error.
CN202210476644.2A 2022-04-30 2022-04-30 Buck type converter digital controller design method adopting interference filtering compensation Withdrawn CN114759788A (en)

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