CN114744871A - Differential flat system design method of Buck converter based on extended state observer - Google Patents
Differential flat system design method of Buck converter based on extended state observer Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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Abstract
The invention discloses a design method of a differential flat system of an interleaved parallel Buck converter based on an extended state observer, which is characterized in that a direct current system is converted into the differential flat system of a double closed-loop structure through coordinate transformation, the error feedback control is carried out on a differential term in the flat system, and the load current in an outer loop is observed and compensated through an Extended State Observer (ESO), so that the impact of the fluctuation of a load side on the system is inhibited, wherein the differential flat system of the double closed-loop structure comprises a current inner loop differential flat system and a voltage outer loop differential flat system. The invention improves the stability and dynamic characteristic of the system, ensures the flow equalization of each phase and obviously improves the stability of the system and the capability of resisting internal and external disturbance.
Description
Technical Field
The invention belongs to the technical field of converters, and particularly relates to a differential flat system design method of a staggered parallel Buck converter based on an extended state observer.
Background
With the development of new energy technology and power electronic technology, the direct current micro-grid integrating distributed energy, energy storage equipment, load, current conversion module and the like is receiving wide attention[1-2]. Compared with an alternating-current micro-grid, the direct-current micro-grid does not need conversion when supplying power to the power electronic load, and the problems of reactive power and phase do not exist, so that the power supply reliability is fundamentally improved. FIG. 1 shows a DC microgrid configuration wherein distributed energy sources are connected to a DC bus via respective converters, energy storage devices are connected to the bus via bidirectional converters, and the loads include resistive loads connected directly to the bus and indirect loads connected via convertersConstant Power Load (CPL) of the incoming bus. With the large amount of CPL connected to the DC micro-grid, the negative impedance characteristic of CPL can make the bus voltage oscillate, and then the stable operation of the bus voltage is affected.
The steady-state control of the CPL access direct-current micro-grid mainly comprises passive damping and active damping. In which the addition of passive damping devices to the converter increases the system damping, but this approach introduces additional losses to the system. The active damping method adds virtual damping in the controller to replace a passive device, and although the stability of the constant power system is improved, the method of controlling the output impedance through the active damping can reduce the dynamic characteristic of the system.
At present, scholars at home and abroad research CPL systems mainly focus on the aspects of steady-state performance and stable range of closed-loop control parameters, and the research on the dynamic performance of CPL systems is little. Compared with linear control, the transient performance of nonlinear control after the direct-current micro-grid is subjected to external impact is more advantageous. Among them, the Differential flat control (DFBC) is widely applied to the converter due to its advantages of simple control implementation, fast flat output, accurate reference trajectory following, and the like. Study of the Li Gang, Li Shuwei, Qiu Wei (Li Gang, Li Shuwei, Qiu Wei) Boost PFC with constant power load control method (Research on the control method of Boost PFC with constant power load) [ J ] Electric Drive (Electric Drive), 2021, 51 (15): 31-38, a differential flat system is established for the booster circuit with constant power output, and the system under DFBC is proved to have good stability, but single-loop control limits the dynamic performance of the system. The documents of Mungpon P, Sikkabt S, Yodwong B, et al, Photonic power controlled based on differential deflection approach of multiple phase interconnected switches [ C ]// International Conference on Clean electric Power. IEEE, 2015 adopt a double-ring structure combining DFBC with maximum power point tracking control, thereby improving the stability of the system and simultaneously enhancing the robustness; literature Xu material, royal gunn, lie, etc. (Xu Liangcai, Huangfu yingeng, Li Qian, et al.) Research on high gain DC-DC converter robust control for fuel cells based on differential flat theory (Research on robust control of high gain DC-DC converter for fuel cell based on differential planar simulation) (J.) chinese electro-mechanical engineering (Proceedings of the CSEE), 2020, 40 (21): 6828 and 6839(in Chinese) introduces a nonlinear disturbance observer into the differential flat control, and suppresses external disturbance of the input voltage and the output current, but both of the above documents only consider the case of resistive load, and do not consider the control effect when the system is in the CPL range.
Disclosure of Invention
The invention aims to provide a design method of a differential flat system of a staggered parallel Buck converter based on an extended state observer, and the designed differential flat system ensures the flow equalization of each phase and simultaneously remarkably improves the stability of the differential flat control system and the capability of resisting internal and external disturbance.
The technical scheme adopted by the invention is that the staggered parallel Buck converter is based on a differential flat system design method of an extended state observer, a direct current system is converted into a differential flat system of a double closed-loop structure through coordinate transformation, error feedback control is carried out on a differential term in the flat system, and load current in an outer loop is observed and compensated through an extended state observer ESO, so that the impact of load side fluctuation on the system is inhibited, wherein the differential flat system of the double closed-loop structure comprises a current inner loop differential flat system and a voltage outer loop differential flat system, and the method specifically comprises the following steps:
step 1: modeling a direct current micro-grid control system and obtaining a system state equation;
step 2: the current inner loop differential flattening system ensures that the inductive current of each branch circuit follows the current reference value, and calculates an error feedback term in the inner loop control law;
and step 3: the voltage outer ring differential flat system keeps the voltage output of the bus constant, and an error feedback term in an outer ring control law is calculated;
and 4, step 4: selecting control parameters of a current inner ring differential flat system and a voltage outer ring differential flat system according to an error feedback term in an inner ring control law and an error feedback term in an outer ring control law;
and 5: and designing the extended state observer, analyzing the error of the extended state observer, calculating each gain of the extended state observer, and finishing the design.
The present invention is also characterized in that,
the step 1 specifically comprises the following steps:
the distributed energy is used as a power supply, a direct current bus, a CPL (complex programmable logic device) and a resistive load are controlled by a DC-DC converter to be simultaneously connected into a direct current micro-grid, the DC-DC converter is an interleaved parallel Buck converter, the interleaved parallel Buck converter adopts an interleaved control technology, and two branch switching tubes S in the interleaved parallel Buck converter1、S2Conducting at 180 degrees in a staggered mode, constructing a direct current micro-grid control system model, and obtaining a direct current micro-grid control system state equation
In the formula (1), E and voInput voltage and bus voltage respectively; i all right angleL1、iL2Respectively a cross parallel Buck converter through which energy storage inductor L flows1、L2The current of (a); rL、PCPLRespectively a resistance load and a constant power load; i all right angleoIn order to be the load current,
the step 2 specifically comprises the following steps:
in order to realize the current-sharing control of the staggered parallel Buck converter, an inductive current reference value is determined to be
iLref=IL1=IL2 (2)
In the formula (2), IL1、IL2Are respectively iL1、iL2A steady state quantity of (c);
the control goal of the current inner loop is to ensure that the inductive current of each branch circuit follows the current reference value, so that the inductive current is set as the flat output y of the current loopcTo further simplify the calculation, the inductor current is selected as the state variable xcThe control object of the current loop is the switching duty ratio d1、d2Thus selecting the duty cycle as the input ucThen, then
In the formula (3), gamma1Is xcAbout ycThe smooth mapping function of (2);
substituting formula (3) into formula (1) to obtain a current control law as follows:
from the equations (3) and (4), the variable x is selectedc、ycAnd ucThe flatness requirement is met, so the current inner loop system is a differential flat system;
when the temperature is higher than the set temperatureyc accurately following the reference trajectory ycdThe relationship between the error of the flat output and its reference trajectory is
In the formula (5), k1,k2Is an inner loop controller parameter;
defining a current loop error as ec=yc-ycdThen formula (5) is simplified to
After laplace transform of the formula (6), error feedback control is performed by using the following expected characteristic equation p(s), where p(s) is expressed as
Combined vertical type (6) and formula (7)
Xi in the formula (8)cDamping ratio of inner ring system, omegancIs the inner ring oscillation frequency;
thus, the error feedback term in the inner loop control law is expressed as
The step 3 specifically comprises the following steps:
the control of the voltage outer loop aims at keeping the bus voltage output constant, thus choosing the bus voltage as the flat output y of the voltage loopvTo simplify the calculation, the output voltage is also selected as the input quantity xvThe control object of the voltage ring is the given value of the inner ring, so that the reference value of the inductive current is selected as the control quantity uvThen, then
In the formula (10), γ2Is xvAbout yvThe smooth mapping function of (2);
by substituting formula (10) for formula (1), the voltage loop control law u can be obtainedvIs composed of
As can be seen from the formulas (10) and (11), the variable x is selectedv、yvAnd uvThe flatness requirement is met, so the voltage outer ring system is a differential flat system;
so that y in formula (11)vAccurately following reference track yvdPerforming error feedback design on its differential term when yvProgressive trend yvdHour, outer ring transmissionThe error between the quantities and the desired values is given by the following equation
In formula (12), k3,k4Is an outer loop controller parameter;
let the voltage outer loop error be ev=yv-yvd,k3、k4Configured by the desired characteristic equation, i.e.
Is obtained by the formula (13)
In the formula (14), xivAnd ωnvThe damping ratio and the oscillation frequency of the outer ring system are respectively, the error feedback term in the outer ring control law can be obtained as
In step 4, in order to ensure that the response speed reaches the fastest speed, an inner ring xi of the current is selectedc0.707; in order to ensure the stability of the output voltage, the outer ring xi of the voltage is selectedv1, and, ωnc、ωnvAnd the switching frequency fsWorking bandwidth omega of switching tubesSatisfy the following relationship
ωnv<<ωnc<<ωs=2πfs (16)。
The step 5 specifically comprises the following steps:
step 5.1: as is clear from the formula (11), i is present in the flatness controloIs easily influenced by the load side, namely the disturbance of the load side, so that the extended state observer model is designed to disturb the loadCompensating, and applying the obtained observation value to the flatness control;
Design ESO expression as
In equation (18), the extended state observer gain matrix is L ═ diag [ L ═ d [ ]1 l2 l3 l4];
When the system is stable, existThe extended state observer model for the interleaved parallel Buck converter is expressed as
In the formula (19), z1、z2、z3、z4Are each x1、x2、x3、x4The observed value of (a);
And step 5.2: the ESO error equation obtained by subtracting the equation (19) from the equation (20) is
Expressing the formula (21) in a matrix form to obtain
The closed-loop characteristic equation of the known matrix A-LC based on the formula (27) is
D(s)=a4s4+a3s3+a2s2+a1s+a0=0 (23)
a3=l1+l2+l3+l4,a4=1;
from Lyapunov stability, when the eigenvalues of the matrix A-LC are all smaller than zero, the observer error converges and finally approaches zero, and the size of the characteristic root determines the observer gain, the speed of the observer tracking the actual value is faster along with the increase of the characteristic root of the ESO error, but when the characteristic root is too large, the system has the side effect of saturation or noise, so the response speed of the observer is controlled through pole allocation, namely the observer response speed is controlled through pole allocation
det[λI-(A-LC)]=(s+ω0)4 (24)
Selecting observer configuration bandwidth omega0Is 188495.6radS, will be ω0In the expressions (23) and (24), the gain of each extended state observer is l1=l2=132981,l3=104457,l4=131982。
The invention has the beneficial effects that:
the invention relates to a differential flat system design method of a staggered parallel Buck converter based on an extended state observer, which aims at the problem that the stability of a system is reduced due to the fact that CPL is too large in an accessed direct-current micro-grid, adopts a double-loop control strategy based on a differential flat theory, and designs ESO to observe the disturbance of output current in an outer loop; theoretical analysis and simulation results show that the double-ring differential flat controller enables the system to have good current sharing characteristics in a steady state and under transient impact, so that the stability of the system is improved; the fluctuation of the load side is compensated through the ESO, so that the dynamic characteristic of the system is improved; compared with the traditional double-loop PI control and single-loop differential flat control, the double-loop DFBC strategy based on the ESO obviously improves the anti-interference capability and the transient response speed of the system.
Drawings
Fig. 1 is a double-loop control block diagram of an interleaved parallel Buck converter of the present invention;
FIG. 2 is a simplified block diagram of a DC microgrid;
FIG. 3 is a bus voltage waveform plot for different control strategies, where FIG. 3(a) is a bus voltage overall plot, FIG. 3(b) is a partial enlarged view at startup, and FIG. 3(c) is a partial enlarged view of the perturbation process;
fig. 4 is a bus voltage waveform diagram when an input voltage abruptly changes, in which fig. 4(a) is a bus voltage waveform diagram when an ESO-based double-loop DFBC input voltage abruptly changes, and fig. 4(b) is a bus voltage waveform diagram when a single-loop DFBC input voltage abruptly changes;
fig. 5 is a bus voltage waveform diagram of a sudden change of a constant power load, wherein fig. 5(a) is a bus voltage waveform diagram of a sudden change of a double-ring DFBC constant power load based on ESO, and fig. 5(b) is a bus voltage waveform diagram of a sudden change of a single-ring DFBC constant power load;
fig. 6 is a bus voltage waveform diagram of sudden resistive load change, where fig. 6(a) shows a bus voltage waveform of sudden resistive load change based on an ESO double-ring DFBC, and fig. 6(b) shows a bus voltage waveform of sudden resistive load change based on a single-ring DFBC;
FIG. 7 is a diagram of current sharing effect during steady state operation of the system;
fig. 8 is a current waveform diagram when the system is disturbed, in which fig. 8(a) is a current waveform diagram when the input voltage abruptly changes, and fig. 8(b) is a current waveform diagram when the load abruptly changes.
Detailed Description
The invention is described in detail below with reference to the drawings and the detailed description.
The differential flatness control essentially converts a nonlinear system into a linear system. Assuming a non-linear system exists, the mathematical model can be expressed as
And a set of flat quantities y and their finite sub-differentials can be found, x and u can be expressed linearly, i.e. as
The system is then called a differential flat system. In the formula (26), x ∈ Rm,u∈Rn,y∈RnM and n are positive integers, and m is more than or equal to n.
The differential flatness control mainly comprises an error feedback design part and a feedforward design part, wherein the feedforward part obtains an inverse dynamic equation of the system based on a mathematical model so as to obtain a reference track; error feedback is a derivative term that determines the flat output using a linear feedback method, ensuring that it follows the reference trajectory quickly.
The invention relates to a design method of a differential flat system of a staggered parallel Buck converter based on an extended state observer, which is shown in figure 1, and is characterized in that a direct current system is converted into the differential flat system of a double closed-loop structure through coordinate transformation, error feedback control is carried out on a differential term in the flat system, and observation and compensation are carried out on load current in an outer loop through an Extended State Observer (ESO), so that the impact of fluctuation on the system at a load side is inhibited, wherein the differential flat system of the double closed-loop structure comprises a current inner loop differential flat system and a voltage outer loop differential flat system, and the design method specifically comprises the following steps:
step 1: modeling a direct current micro-grid control system and obtaining a system state equation;
as shown in FIG. 2, distributed energy is used as a power supply, a DC bus, CPL and resistive load are controlled to be simultaneously connected into a DC micro-grid through a DC-DC converter, the DC-DC converter is an interleaved parallel Buck converter which adopts an interleaved control technology, and two branch switching tubes S in the interleaved parallel Buck converter1、S2Conducting at 180 degrees in a staggered mode, constructing a direct current micro-grid control system model, and obtaining a direct current micro-grid control system state equation
In the formula (1), E and voInput voltage and bus voltage respectively; i.e. iL1、iL2Energy storage inductors L respectively flow through the interleaved parallel Buck converters1、L2The current of (a); rL、PCPLRespectively a resistance load and a constant power load; i.e. ioIn order to be the load current,
step 2: the current inner loop differential flattening system ensures that the inductive current of each branch circuit follows a current reference value, and an error feedback term in an inner loop control law is calculated;
in order to realize the current-sharing control of the staggered parallel Buck converter, an inductive current reference value is determined to be
iLref=IL1=IL2 (2)
In the formula (2), IL1、IL2Are respectively iL1、iL2A steady state quantity of (c);
current inner ringThe control objective of (1) is to ensure that the inductive current of each branch follows the current reference value, thus setting the inductive current as the flat output y of the current loopcTo further simplify the calculation, the inductor current is selected as the state variable xcThe control object of the current loop is the switching duty ratio d1、d2Thus selecting the duty cycle as the input ucThen, then
In the formula (3), gamma1Is xcAbout ycThe smooth mapping function of (2);
substituting formula (3) into formula (1) to obtain a current control law as follows:
from the equations (3) and (4), the variable x is selectedc、ycAnd ucThe flatness requirement of equation (26) is satisfied, so the current inner loop system is a differential flat system;
when the system is interfered internally and externally, the inductive current is necessarily disturbed, so that the steady-state error of the inner ring needs to be reduced as much as possible, and when y iscAccurately following reference track ycdThe relationship between the error of the flat output and its reference trajectory is
In the formula (5), k1,k2Is an inner loop controller parameter;
defining a current loop error as ec=yc-ycdThen the formula (5) is simplified into
After laplace transform of the formula (6), error feedback control is performed by using the following expected characteristic equation p(s), where p(s) is expressed as
Combined vertical type (6) and formula (7)
In the formula (8), xicDamping ratio of inner ring system, omegancIs the inner ring oscillation frequency;
thus, the error feedback term in the inner loop control law is expressed as
And step 3: the voltage outer ring differential flat system keeps the voltage output of the bus constant, and an error feedback term in an outer ring control law is calculated;
the control objective of the voltage outer loop is to keep the bus voltage output constant, thus choosing the bus voltage as the flat output y of the voltage loopvTo simplify the calculation, the output voltage is also selected as the input quantity xvThe control object of the voltage ring is the given value of the inner ring, so that the reference value of the inductive current is selected as the control quantity uvThen, then
In the formula (10), γ2Is xvAbout yvThe smooth mapping function of (2);
by substituting formula (10) for formula (1), a voltage loop control law u can be obtainedvIs composed of
As can be seen from the formulas (10) and (11), the variable x is selectedv、yvAnd uvThe flatness requirement of equation (26) is satisfied, so the voltage outer ring system is a differential flatness system;
so that y in formula (11)vAccurately following reference track yvdPerforming error feedback design on its differential term when yvProgressive trend yvdThe error between the output of the outer loop and the desired value is given by the following equation
In formula (12), k3,k4Is an outer loop controller parameter;
let the voltage outer loop error be ev=yv-yvd,k3、k4Configured by the desired characteristic equation, i.e.
Is obtained by the formula (13)
In the formula (14), xivAnd ωnvThe damping ratio and the oscillation frequency of the outer ring system are respectively, the error feedback term in the outer ring control law can be obtained as
And 4, step 4: selecting control parameters of the current inner ring differential flat system and the voltage outer ring differential flat system according to an error feedback term in an inner ring control law and an error feedback term in an outer ring control law;
in step 4, controlling the damping ratio and vibration of the parametersThe selection of the oscillation frequency determines the dynamic characteristic of the controller system, and the damping ratio of the second-order control system is generally selected to be 0.4-0.8 under the condition of comprehensively considering factors such as overshoot, adjusting time and the like; in order to ensure that the response speed reaches the fastest speed, the current inner ring xi is selectedc0.707; in order to ensure the stability of the output voltage, the outer ring xi of the voltage is selectedv1, and, ωnc、ωnvAnd the switching frequency fsWorking bandwidth omega of switching tubesSatisfy the following relationship
ωnv<<ωnc<<ωs=2πfs (16)。
And 5: and designing the extended state observer, analyzing the error of the extended state observer, calculating each gain of the extended state observer, and finishing the design.
Step 5.1: as can be seen from the equation (11), i is present in the flatness controloThe method is easily influenced by a load side, namely disturbance of the load side, so that an extended state observer model is designed, the load disturbance is compensated, and an obtained observation value acts on the flat control;
Design ESO expression as
In equation (18), the extended state observer gain matrix is L ═ diag [ L ═ d [ ]1 l2 l3 l4];
When the system is stable, existThe extended state observer model for the interleaved parallel Buck converter is represented as
In the formula (19), z1、z2、z3、z4Are respectively x1、x2、x3、x4The observed value of (a);
Step 5.2: subtracting the equation (19) and the equation (20) to obtain an ESO error equation of
Expressing the formula (21) in a matrix form to obtain
The closed-loop characteristic equation of the known matrix A-LC based on the formula (27) is
D(s)=a4s4+a3s3+a2s2+a1s+a0=0 (23)
a3=l1+l2+l3+l4,a4=1;
from Lyapunov stability, when the eigenvalues of the matrix A-LC are all smaller than zero, the observer error converges and finally approaches zero, and the size of the eigenvalue root determines the observer gain, the speed of the observer tracking the actual value is faster with the increase of the eigenvalue root of the ESO error, but when the eigenvalue root is too large, the system has the side effect of saturation or noise, therefore, the observer response speed is controlled through pole allocation, namely, the observer response speed is controlled through pole allocation
det[λI-(A-LC)]=(s+ω0)4 (24)
Comprehensively considering the stability and the rapidity requirements of the observer tracking real-time value, selecting the observer configuration bandwidth omega0At 188495.6rad/s, let ω be0In the expressions (23) and (24), the gain of each extended state observer is l1=l2=132981,l3=104457,l4=131982。
Simulation verification
(one) different control strategy simulation
A structural model of the ESO-based double-ring DFBC parallel Buck converter system is built in PSIM simulation software, and a simulation result is compared with a traditional single-ring differential flat control result. The circuit parameters are: E50V, PCPL=12.5W,RL=1Ω,Vref=24V,fs=100kHz,L1=L2150 μ H, C100 μ F, and the controller parameters are shown in table 1, and the conventional single-loop differential flatness control parameters are consistent with the voltage outer-loop parameters.
TABLE 1 controller parameters
Under the condition that the bandwidths of the converters are the same, simulation comparison is carried out on the double-ring DFBC strategy based on the ESO and the traditional double-ring PI control and single-ring DFBC strategy. Fig. 3(a) shows output voltage waveforms for 3 control strategies, and fig. 3(b) and 3(c) are partially enlarged views at startup and at disturbance, respectively. Reference value V of bus voltage at 0.005srefFrom 24V to 30V, table 2 shows the performance parameters under 3 control strategies. Wherein σ1、σ2Are each VrefOvershoot before and after mutation; t is t1、t2Are each VrefAdjustment time before and after mutation; Δ VoIs a VrefSteady state output voltage ripple before the sudden change.
TABLE 2 Performance parameters under three control strategies
Analyzing fig. 3(a) - (b) and table 2, it is known that the ESO-based dual-loop DFBC strategy of the present invention has a significantly reduced overshoot, a shortened regulation transition time, and an effective suppression of output voltage ripple, compared to the other two control strategies.
(II) different disturbance simulation
When the input voltage of the converter suddenly changes, the stability of the bus voltage of the system is affected, so that the function of the controller for suppressing the external disturbance is important. Simulation analysis of different perturbations is performed below.
The steady state value of the output voltage of the interleaved Buck converter is set to be 24V, the input voltage is suddenly increased from 50V to 70V at the time of 0.01s, and the input voltage is suddenly decreased from 70V to 50V at the time of 0.02 s. When the input voltage is suddenly changed, the effect of the dual-loop DFBC strategy based on the ESO on the output voltage waveform is shown in fig. 4(a), and the effect of the single-loop DFBC strategy is shown in fig. 4 (b). Analysis of fig. 4 shows that, compared with the single-loop DFBC strategy, the bus voltage overshoot is reduced to 0.008% under the ESO-based double-loop DFBC strategy, and the suppression capability on input voltage disturbance is stronger.
When the CPL on the load side increases to a certain value, the resistive load is negligible. When the CPL in the system suddenly increases, the oscillation of the output voltage is easily caused to cause instability, so the regulation capability of the controller about the sudden change of the CPL is verified in a simulation way.
The steady-state value of the output voltage of the interleaved Buck converter is set to be 24V, CPL is suddenly increased from 12.5W to 112.5W at the time of 0.04s, and CPL is increased from 112.5W to 212.5W at the time of 0.05 s. When CPL abruptly changes, the output voltage waveform exhibits a double-loop DFBC effect based on ESO as shown in fig. 5(a), and a single-loop DFBC effect as shown in fig. 5 (b). Analysis of FIG. 5 reveals that the output voltage at P is in the case of single-loop DFBCLAfter the surge, oscillation phenomenon appears, and the bus voltage of the ESO-based double-ring DFBC strategy is PLAnd is kept at 24V after the sudden increase. Therefore, the control strategy provided by the invention has a wider CPL stable range, smaller overshoot and shorter recovery time.
The change of the resistive load also causes the fluctuation of the output voltage, so the following simulation verifies the adjusting capability of the controller for the sudden change of the resistive load.
The steady state value of the output voltage of the interleaved Buck converter is set to be 24V, the CPL is constant to be 12.5W, and the resistance is 1 omega during stable work. The resistive load is suddenly reduced from 1 omega to 0.8 omega at the time of 0.07s, and is suddenly increased from 0.8 omega to 1 omega at the time of 0.08 s; the average value of the output current abruptly increases from 24.44A to 30.46A at time 0.07s and abruptly decreases from 30.46A to 24.44A at time 0.08 s. When the resistive load suddenly changes, the effect of the dual-ring DFBC strategy of which the output voltage waveform is based on ESO is shown in fig. 6(a), and the effect of single-ring DFBC is shown in fig. 6 (b).
Analyzing fig. 6, it can be seen that the conventional single-loop DFBC has an overshoot of 8.33% after being disturbed at time 0.07s, and an overshoot of 8.15% at time 0.08 s; and the dual-loop DFBC based on ESO can quickly return to the expected value after being subjected to overshoot of 2.50% at 0.07s and overshoot of 3.14% at 0.08s respectively, so that the influence of disturbance on the load side on the system response is effectively inhibited.
Simulation of current sharing characteristics of system III
The stable operation of the interleaved parallel Buck converter is influenced by the problem of the circulation of each phase of inductive current, so that the steady-state and dynamic current-sharing characteristics of the system under the double-ring DFBC based on ESO are subjected to simulation verification. FIG. 7 shows the current sharing effect during steady state operation of the system. Analysis of fig. 7 shows that the control strategy can achieve steady-state current sharing, and the ripple of the inductor current is obviously reduced.
Fig. 8 shows the dynamic current sharing effect when the system is disturbed, in which fig. 8(a) shows the current waveform of the input voltage suddenly increased from 50V to 70V at the time of 0.005s, and fig. 8(b) shows the current waveform of the resistive load suddenly decreased from 1 Ω to 0.8 Ω at the time of 0.01 s. Analysis of fig. 8 shows that each phase of inductor current can quickly follow a new steady-state value when the system is disturbed internally and externally, and the dynamic current sharing characteristic is good.
According to the content, the traditional differential flat control design idea of the staggered parallel Buck converter is to approximate control variables at a balance point, so that a multiphase staggered parallel Buck circuit can be equivalent to a single-phase Buck converter to solve the control law, namely single closed-loop DFBC control, and the control method can only suppress small-amplitude disturbance such as power supply and load due to the fact that high-frequency components are ignored, so that the suppression capability of large-range load disturbance is limited; and the current of each phase is passively current-sharing controlled, so that the current-sharing effect of the interleaved parallel converter is difficult to ensure.
The double-ring DFBC based on ESO designed by the differential flat system design method based on the extended state observer of the staggered parallel Buck converter overcomes the defects of the single closed-loop DFBC control, and obviously improves the anti-interference capability and the transient response speed of the system while ensuring the current sharing of each phase.
Claims (6)
1. The design method of the differential flat system of the interleaved parallel Buck converter based on the extended state observer is characterized in that a direct current system is converted into a differential flat system of a double closed-loop structure through coordinate transformation, error feedback control is carried out on a differential term in the flat system, and observation and compensation are carried out on load current in an outer loop through an Extended State Observer (ESO), so that impact of fluctuation on a load side on the system is restrained, wherein the differential flat system of the double closed-loop structure comprises a current inner loop differential flat system and a voltage outer loop differential flat system, and the method specifically comprises the following steps:
step 1: modeling a direct current microgrid control system and obtaining a system state equation;
step 2: the current inner loop differential flattening system ensures that the inductive current of each branch circuit follows a current reference value, and an error feedback term in an inner loop control law is calculated;
and step 3: the voltage outer ring differential flat system keeps the voltage output of the bus constant, and an error feedback term in an outer ring control law is calculated;
and 4, step 4: selecting control parameters of the current inner ring differential flat system and the voltage outer ring differential flat system according to an error feedback term in an inner ring control law and an error feedback term in an outer ring control law;
and 5: and designing the extended state observer, analyzing the error of the extended state observer, calculating each gain of the extended state observer, and finishing the design.
2. The design method of the interleaved parallel Buck converter differential flat system based on the extended state observer according to claim 1, wherein the step 1 specifically comprises:
the distributed energy is used as a power supply, a direct current bus, a CPL (complex programmable logic device) and a resistive load are controlled by a DC-DC converter to be simultaneously connected into a direct current micro-grid, the DC-DC converter is an interleaved parallel Buck converter, the interleaved parallel Buck converter adopts an interleaved control technology, and two branch switching tubes S in the interleaved parallel Buck converter1、S2Conducting at 180 degrees in a staggered mode, constructing a direct current micro-grid control system model, and obtaining a direct current micro-grid control system state equation
In the formula (1), E and voInput voltage and bus voltage respectively; i.e. iL1、iL2Are respectively connected in parallel in a staggered wayEnergy storage inductor L flows through in type Buck converter1、L2The current of (a); rL、PCPLRespectively a resistance load and a constant power load; i.e. ioIn order to be the load current,
3. the design method of the interleaved parallel Buck converter differential flat system based on the extended state observer according to claim 2, wherein the step 2 is specifically as follows:
in order to realize the current-sharing control of the staggered parallel Buck converter, an inductive current reference value is determined to be
iLref=IL1=IL2 (2)
In the formula (2), IL1、IL2Are respectively iL1、iL2A steady state quantity of (c);
the control goal of the current inner loop is to ensure that the inductive current of each branch circuit follows the current reference value, so that the inductive current is set as the flat output y of the current loopcTo further simplify the calculation, the inductor current is selected as the state variable xcThe control object of the current loop is the switching duty ratio d1、d2Thus selecting the duty cycle as the input ucThen, then
In the formula (3), gamma1Is xcAbout ycThe smooth mapping function of (2);
substituting formula (3) into formula (1) to obtain a current control law:
from the equations (3) and (4), the selected variable xc、ycAnd ucThe flatness requirement is met, so the current inner loop system is a differential flat system;
when y iscAccurately following reference track ycdThe relationship between the error of the flat output and the reference trajectory is
In the formula (5), k1,k2Is an inner loop controller parameter;
defining a current loop error as ec=yc-ycdThen formula (5) is simplified to
After laplace transform of the formula (6), error feedback control is performed by using the following expected characteristic equation p(s), where p(s) is expressed as
Combined vertical type (6) and formula (7)
In the formula (8), xicDamping ratio of inner ring system, omegancIs the inner ring oscillation frequency;
thus, the error feedback term in the inner loop control law is expressed as
4. The design method of the interleaved parallel Buck converter differential flat system based on the extended state observer according to claim 3, wherein the step 3 is specifically as follows:
the control of the voltage outer loop aims at keeping the bus voltage output constant, thus choosing the bus voltage as the flat output y of the voltage loopvTo simplify the calculation, the output voltage is also selected as the input quantity xvThe control object of the voltage ring is the inner ring given value, so that the reference value of the inductive current is selected as the control quantity uvThen, then
In the formula (10), γ2Is xvAbout yvThe smooth mapping function of (2);
by substituting formula (10) for formula (1), the voltage loop control law u can be obtainedvIs composed of
As is clear from the expressions (10) and (11), the variable x is selectedv、yvAnd uvThe flatness requirement is met, so the voltage outer ring system is a differential flat system;
so that y in formula (11)vAccurately following reference track yvdPerforming error feedback design on its differential term when yvProgressive trend yvdThe error column equation between the outer loop output and the desired value is as follows
In formula (12), k3,k4Is an outer loop controller parameter;
let the voltage outer loop error be ev=yv-yvd,k3、k4Configured by the desired characteristic equation, i.e.
Is obtained by formula (13)
Xi in the formula (14)vAnd ωnvThe damping ratio and the oscillation frequency of the outer ring system are respectively, the error feedback term in the outer ring control law can be obtained as
5. The design method of the differential flat system of the interleaved parallel Buck converter based on the extended state observer as claimed in claim 4, wherein in the step 4, in order to ensure that the response speed is fastest, an inner current ring ξ is selectedc0.707; to ensure the stability of the output voltage, an outer ring xi of the voltage is selectedv1, and ωnc、ωnvAnd the switching frequency fsAnd the working bandwidth omega of the switching tubesSatisfy the following relationship
ωnv<<ωnc<<ωs=2πfs (16)。
6. The design method of the interleaved parallel Buck converter differential flat system based on the extended state observer according to claim 3, wherein the step 5 specifically comprises:
step 5.1: as can be seen from the equation (11), i is present in the flatness controloThe method is easily influenced by a load side, namely disturbance of the load side, so that an extended state observer model is designed, the load disturbance is compensated, and an obtained observation value acts on the flat control;
Design ESO expression as
In equation (18), the extended state observer gain matrix is L ═ diag [ L ═ d [ ]1 l2 l3 l4];
When the system is stable, there isThe extended state observer model for the interleaved parallel Buck converter is expressed as
In the formula (19), z1、z2、z3、z4Are respectively x1、x2、x3、x4The observed value of (a);
Step 5.2: the ESO error equation obtained by subtracting the equation (19) from the equation (20) is
Expressing the formula (21) in a matrix form to obtain
The closed-loop characteristic equation based on the known matrix A-LC of the formula (27) is
D(s)=a4s4+a3s3+a2s2+a1s+a0=0 (23)
a3=l1+l2+l3+l4,a4=1;
from Lyapunov stability, when the eigenvalues of the matrix A-LC are all smaller than zero, the observer error converges and finally approaches zero, and the size of the eigenvalue root determines the observer gain, the speed of the observer tracking the actual value is faster with the increase of the eigenvalue root of the ESO error, but when the eigenvalue root is too large, the system has the side effect of saturation or noise, therefore, the observer response speed is controlled through pole allocation, namely, the observer response speed is controlled through pole allocation
det[λI-(A-LC)]=(s+ω0)4 (24)
Selecting viewDetector configuration bandwidth omega0At 188495.6rad/s, let ω be0In the expressions (23) and (24), the gain of each extended state observer is l1=l2=132981,l3=104457,l4=131982。
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