CN114726238A

CN114726238A - Sampling holding structure, controller, AC-to-DC switching power supply and sampling method

Info

Publication number: CN114726238A
Application number: CN202210504052.7A
Authority: CN
Inventors: 刘艳涛
Original assignee: Xi'an Zhixin Microelectronics Co ltd
Current assignee: Xi'an Zhixin Microelectronics Co ltd
Priority date: 2022-05-10
Filing date: 2022-05-10
Publication date: 2022-07-08

Abstract

The invention provides a sampling and holding structure, a controller, an alternating current-to-direct current switching power supply and a sampling method, wherein the sampling and holding structure comprises a charging module, a discharging module, a control module and a sampling module, the discharging module comprises an energy storage element and a discharging unit, the charging module is used for charging the energy storage element, the discharging unit is used for discharging the energy storage element, the sampling module is used for collecting the voltage of a feedback end of a transformer auxiliary winding of the alternating current-to-direct current switching power supply, the control module is used for sending a sampling signal to the sampling module at a set proportion of the demagnetization time of the secondary side of the transformer, and the set proportion is in direct proportion to the ratio of the charging current when the energy storage element is charged and the discharging current when the energy storage element is discharged. The invention can determine the sampling time of the period according to the degaussing time of the period, and is not influenced by the change and the size of the primary side peak current of any period.

Description

Sampling holding structure, controller, AC-to-DC switching power supply and sampling method

Technical Field

The invention relates to the technical field of switching power supplies, in particular to a sampling and holding structure, a controller, an alternating current-to-direct current switching power supply and a sampling method.

Background

Compared with the traditional secondary feedback switching power supply mechanism structure, the primary feedback (PSR) mode AC-DC control technology has the greatest advantage of saving an isolation feedback device, so that the space on a circuit board is saved, the cost is reduced, the reliability of a system is improved, and the primary feedback (PSR) mode AC-DC control technology is widely applied to medium and small power chargers, adapters and LED driving.

FIG. 1 is a block diagram of a prior art primary side feedback AC-DC power supply. As shown in fig. 1, the primary side feedback AC-DC driving power supply includes a rectifier bridge BR, an input capacitor Cin, a start resistor R4, a power supply rectifier diode D1, a power supply capacitor C1, an upper voltage-dividing resistor R1, a lower voltage-dividing resistor R2, a controller, a transformer 200, a power tube N1, a current detection resistor Rcs, a schottky rectifier tube D2, and an output capacitor Cout; the transformer comprises a primary winding Np, an auxiliary winding Na and a secondary winding Ns; the upper voltage-dividing resistor R1 and the lower voltage-dividing resistor R2 form a sampling circuit, the FB pin is an auxiliary winding Na voltage feedback leading-in pin of the transformer, and signals are obtained from the sampling circuit formed by the upper voltage-dividing resistor R1 and the lower voltage-dividing resistor R2. Inside the controller, the FB pin is held and controls the operating frequency via a sampling control circuit. When the power tube is conducted, the primary side of the transformer is conducted, the transformer stores energy, and because the polarity of the primary side winding Np of the transformer is opposite to the dotted ends of the auxiliary winding Na and the secondary winding Ns, the FB pin is a negative voltage when the primary side is conducted; when the power tube turn-off system is in the degaussing stage, the secondary side of the transformer releases energy, because the polarity of the auxiliary winding Na is the same as that of the dotted terminal of the secondary winding Ns, the FB voltage is therefore positive, and the voltage of the secondary winding of the transformer is Vs Vo + Vz, wherein Vo is the output voltage of the transformer, Vz is the voltage drop of the schottky rectifier D2, the auxiliary winding voltage Va is Vs × (NA/NS) ═ VFB × R2/(R1+ R2), thus Vo is VFB × R2 × NS/[ (R1+ R2) × NA ] -Vz, wherein NA is the number of turns of the auxiliary winding, NS is the number of turns of the secondary winding, VFB is the feedback voltage of the auxiliary winding NA, i.e. the output voltage is a function of the feedback voltage VFB, the controller samples the VFB voltage at that time, comparing with the reference voltage, and controlling the switching frequency to stabilize the output voltage Vo at a set value; and in the degaussing stage, the secondary side current decreases along with time, when the secondary side current decreases to 0, the secondary side degaussing is finished, at the moment, if the primary side power tube N1 is not conducted again, FB enters resonance, and the time of the secondary side degaussing is recorded as Tons.

In order to accurately detect the output voltage, FB voltage sampling is very important. In the secondary side demagnetization stage, the secondary side power flows through the schottky D2 to generate a voltage drop Vz, and the forward voltage drop of the Vz is reduced along with the reduction of the current, so that sampling is performed as close as possible to the end of demagnetization, the Vz can be reduced as much as possible, and the detected output voltage Vo is as close as possible to the real output voltage.

Fig. 2 shows a conventional sampling control circuit, where PFM is a primary side conducting signal, Tons is a secondary side demagnetizing signal, and these two signals are used to generate three narrow pulse signals pulse1-3 through a pulse generator for controlling the switching tubes K1, K2, and K3, specifically: pulse1 is generated at the falling edge of PFM, pulse2 is generated at the falling edge of Tons, and pulse3 is generated after delay, and the delay and the narrow pulse duration are both very short and negligible relative to the duration of Tons.

Fig. 3 is a schematic diagram of an operating waveform of the sampling control circuit, when the PFM falling edge of the nth period comes, pulse1 comes, switch K1 is turned on briefly, capacitor C2 is discharged to 0, the system enters the demagnetization phase of the nth period, toss controls switch K0 to be turned on, and during the entire demagnetization phase toss (N) of the nth period, current I charges capacitor C2, and it is assumed that at the end of toss (N), charge is performed until V2(N) ═ I toss (N)/C2 ═ I × toss (N)/(2C); at the end of tons (N), the narrow pulse2 comes to control K2 to conduct briefly, so as to discharge the capacitor C3 to 0, and then after a very short time delay, the narrow pulse3 comes to control K3 to conduct briefly, so that the capacitors C2 and C3 are connected together, since C2 is 2C and C3 is C, V2(N) is V3(N) (2/3) va (N), and then the voltage on C3 is kept at V3 (N);

when the PFM of the (N +1) th cycle is finished and Tons comes, the narrow pulse pump 1 comes again, the switch K2 is turned on briefly, the capacitor C2 is discharged to 0V, then the constant current source I starts to charge the capacitor C2, the enable end of the comparator receives Tons enable at the moment and starts to work, when the voltage on the capacitor C2 rises to V3(N), the comparator is turned over, cmp _ out is changed from low level to high level, and the pulse generator sends out a sampling signal SH; then the sampling time of the (N +1) th cycle is V3(N) × C2/I ═ V2/3) × va (N) × 2C/I ═ (2/3) tons (N), that is, the sampling time of the (N +1) th cycle is 2/3 of the demagnetization time of the nth cycle.

If the tos of each period is the same when the primary side feedback AC-DC power supply works, namely, the tos (N) is equal to the tos (N +1), the equivalent sampling time is 2/3 of the tos of the period, and thus, the sampling method can accurately sample the output voltage every period; to keep the same for each period Tons, it is necessary to ensure the same peak value and the same output voltage for each period CS (Current Sense) under the condition of fixed system component parameters. Therefore, in the conventional primary-side feedback scheme, adjacent periods CS cannot change significantly, otherwise, assuming that the nth period tos is 9us, the sampling time of the (N +1) th period is 6us, but if the (N +1) th period CS is decreased, tos (N +1) is also decreased proportionally, at this time, if the (N +1) th period CS is still sampled at 6us, the situation of the sampled voltage changes, and in an extreme case, if the (N +1) th period CS is decreased beyond 1/3, tos (N +1) <6us, which is sampled at 6us, the degaussing is already finished, FB enters resonance, and the sampled voltage cannot reflect the magnitude of the output voltage at all, that is, sampling error. That is, the conventional sampling scheme can only be applied to the case that the adjacent periods CS cannot have significant changes.

Along with the increasing requirements of people on a power supply system, the performance of a primary side feedback system needs to be further improved, and particularly when a load has dynamic response, a PSR system is required to quickly respond to the change requirement of the load, so that not only can the working frequency of the PSR system be required to be quickly changed, but also a CS peak value is required to be quickly changed, namely when the load is suddenly lightened, the CS peak value in the next period needs to be quickly reduced, and on the contrary, when the load is lightened, the CS peak value in the next period needs to be quickly increased, and the PSR system can obtain good dynamic response performance through quick response; because two adjacent periods CS can change rapidly, the degaussing time can also change in the same proportion, and the existing sampling mode can not meet the requirement of rapid response when the adjacent periods CS change rapidly.

Disclosure of Invention

The invention provides a sampling and holding structure, aiming at one or more problems in the prior art, and the sampling and holding structure comprises a charging module, a discharging module, a control module and a sampling module, wherein the discharging module comprises an energy storage element and a discharging unit, the charging module is used for charging the energy storage element of the discharging module, the discharging unit is used for discharging the energy storage element, the sampling module is used for collecting the voltage of a feedback end of an auxiliary winding of a transformer of an AC-to-DC switching power supply, the control module is used for sending a sampling signal to the sampling module at a set proportion of demagnetization time of the secondary side of the transformer, and the set proportion is in direct proportion to the ratio of charging current when the charging module charges the energy storage element and discharging current when the discharging unit discharges the energy storage element.

According to an aspect of the invention, the charging module includes a first current mirror, a first constant voltage source, and a first switch, where the first constant voltage source is configured to make a voltage at a feedback end of the ac-to-dc switching power supply constant, collect an output current of an auxiliary winding of a transformer of the ac-to-dc switching power supply, the first current mirror amplifies the output current, and the first switch controls a current amplified by the first current mirror to charge an energy storage element of the discharging module.

According to an aspect of the present invention, the first current mirror includes two MOS transistors, preferably, the MOS transistors are PMOS transistors, the first PMOS transistor 12 is connected to the gate of the second PMOS transistor 13, the drain and the gate of the first PMOS transistor 12 are electrically connected to the first constant voltage source, and the drain of the second PMOS transistor 13 is electrically connected to the first switch 11.

According to an aspect of the present invention, the first constant voltage source includes a first transistor 14, a second transistor 15, and a constant current source 16, wherein bases of the first transistor 14 and the second transistor 15 are connected, a collector of the first transistor is electrically connected to the first current mirror, and the constant current source 16 is electrically connected to a collector and a base of the second transistor, and preferably, the first transistor 14 and the second transistor 15 are NPN transistors.

According to an aspect of the invention, the discharge unit includes a second current mirror and a second constant voltage source, the energy storage element is electrically connected to the second constant voltage source, the second constant voltage source is electrically connected to the second current mirror and provides a voltage for an input end and an output end of the second current mirror, and the voltage provided by the second constant voltage source for the output end of the second current mirror is a multiple of the voltage provided for the input end.

Preferably, the second current mirror includes two MOS transistors, and further preferably, the MOS transistors are NMOS transistors, and the first NMOS transistor 22 is connected to the gate of the second NMOS transistor 23.

Preferably, the second constant voltage source includes a second switch 24, a first operational amplifier 25), a third switch 26, a second capacitor 27, a third NMOS transistor 28 and a fourth switch 29, the forward input end of the first operational amplifier is electrically connected to the feedback end of the ac-to-dc switching power supply through the second switch, the forward input end of the first operational amplifier is further electrically connected to the input end of the second current mirror, the reverse input end of the first operational amplifier is electrically connected to the output end of the second current mirror, the output end of the first operational amplifier is electrically connected to the gates of the second capacitor and the third NMOS transistor through the third switch, the source of the third NMOS transistor is electrically connected to the output end of the second current mirror, and the drain of the third NMOS transistor is electrically connected to the energy storage element through the fourth switch; preferably, the energy storage element is a capacitor.

According to an aspect of the present invention, the control module includes a comparator 31 and a timing generator 32, one input end of the comparator is electrically connected to the energy storage element, a voltage value of the other end of the comparator is a first set value, an output end of the comparator is electrically connected to the timing generator, when the voltage of the energy storage element is less than the first set value, an output end of the comparator is turned over, and the timing generator controls the sampling module to sample.

According to an aspect of the present invention, the sampling module includes a fifth switch 42 and a third capacitor 41, and the third capacitor is electrically connected to the feedback end of the ac-to-dc switching power supply through the fifth switch.

According to an aspect of the present invention, the charging module includes a first switch 11, a first current mirror and a first constant voltage source, the first current mirror includes a first PMOS transistor 12 and a second PMOS transistor 13, the first constant voltage source includes a first triode 14, a second triode 15 and a constant current source 16; the discharging module comprises a first capacitor, a second current mirror and a second constant voltage source, wherein the second current mirror comprises a first NMOS (N-channel metal oxide semiconductor) tube 22 and a second NMOS tube 23, and the second constant voltage source comprises a second switch 24, a first operational amplifier 25, a third switch 26, a second capacitor 27, a third NMOS tube 28 and a fourth switch 29; the control module comprises a comparator 31 and a timing generator 32; the sampling module comprises a fifth switch 42 and a third capacitor 41; the feedback end of the alternating current-to-direct current switching power supply is electrically connected with the emitter of the first triode, the non-inverting input end of the first operational amplifier through the second switch, and the third capacitor through the fifth switch; the grid electrode of the first PMOS tube is electrically connected with the grid electrode of the second PMOS tube, the drain electrode and the grid electrode of the first PMOS tube are respectively electrically connected with the collector electrode of the first triode, the drain electrode of the second PMOS tube is electrically connected with the input end of the first switch, the base electrodes of the first triode and the second triode are connected, and the constant current source is electrically connected with the base electrode and the collector electrode of the second triode; the output end of the first switch and the input end of the fourth switch are respectively and electrically connected with a first capacitor, the output end of the fourth switch is electrically connected with the drain electrode of a third NMOS tube, the grid electrode of the third NMOS tube and the output end of a third switch are respectively and electrically connected with a second capacitor, the source electrode of the third NMOS tube is electrically connected with the drain electrode of a second NMOS tube, the reverse input end of a first operational amplifier is electrically connected with the drain electrode of the second NMOS tube, the output end of the first operational amplifier is electrically connected with the input end of the third switch, the grid electrodes of the first NMOS tube and the second NMOS tube are connected, the in-phase input end of the first operational amplifier is electrically connected with the drain electrode of the first NMOS tube, one input end of the comparator is electrically connected with the first capacitor, the other input end of the comparator is a first set value, the output end of the comparator is electrically connected with a time sequence generator, and the time sequence generator acquires an output signal of the comparator, The feedback end outputs a signal and a PFM signal of the first switch, the timing generator sends out control signals of the second switch, the third switch, the fourth switch and the fifth switch and a secondary side degaussing time signal of the AC-to-DC switching power supply, and preferably, the set proportion is the ratio of the amplification multiples of the first current mirror and the second current mirror.

According to a second aspect of the present invention, there is provided a controller comprising the sample and hold structure described above.

According to a third aspect of the present invention, there is provided an ac to dc switching power supply comprising a transformer and the above controller.

According to a fourth aspect of the present invention, there is provided a method for sampling an ac-to-dc switching power supply by using the above sample-and-hold structure, comprising:

and acquiring the voltage of a feedback end of the auxiliary winding of the transformer at a set proportion of the degaussing time of the secondary side of the transformer in the same period, wherein the set proportion is in direct proportion to the ratio of the charging current of the energy storage element during charging and the discharging current of the energy storage element during discharging.

According to a fourth aspect of the present invention, the step of collecting the voltage at the feedback end of the auxiliary winding of the transformer at the set proportion of the transformer secondary side demagnetizing time of the same period comprises:

when the primary side of a transformer of the AC-DC switching power supply is switched on, the feedback end is used for detecting the negative voltage of the auxiliary winding, converting the negative voltage into current, and charging the energy storage element from a first set value until the primary side is switched off;

starting a first set time period in a degaussing stage, wherein a feedback end is used for converting positive voltage of an auxiliary winding into current to discharge the energy storage element;

and in the degaussing stage after the first time period, the feedback end is used for detecting the output voltage of the transformer and is sampled and held as the feedback voltage when the voltage of the energy storage element is smaller than the first set value so as to ensure that the output voltage of the transformer is maintained at a second set value.

The sampling holding structure enables the sampling unit to sample at the set proportion of the demagnetizing time of the secondary side of the transformer by controlling the charging and discharging of the energy storage element, can determine the sampling time of the period according to the demagnetizing time of the period, and is not influenced by the change and the size of the primary side peak current of any period.

The controller adopting the holding structure, the AC-to-DC switching power supply and the sampling method divide a voltage feedback signal FB through the time division multiplexing auxiliary winding, when a primary side is conducted, a feedback end is used for detecting a negative voltage Va of the auxiliary winding and is converted into current through an upper voltage dividing resistor R1, a first capacitor is charged from an initial voltage of a first set value, and the whole charging is continued until the primary side is turned off; in a first set time period at the beginning of a degaussing phase, a feedback end is used for converting the positive voltage Va of the auxiliary winding into current through R1, discharging is carried out on a first capacitor, the discharging current is maintained to be constant in current magnitude through a sampling and holding mode after the first set time period, the first capacitor continues to be discharged until the voltage of the first capacitor is smaller than a first set value, meanwhile, in the degaussing phase after the first set time period, the FB signal recovers normal partial pressure of the Va through R1 and R2 for detecting the output voltage Vo and is sampled and held at the moment when the voltage of the first capacitor is smaller than the first set value, a negative feedback loop of an AC-DC switching power supply is used for adjusting, so that the output voltage is maintained to be close to a second set value, sampling at the set proportion of the degaussing time Tons in the period can be realized without being influenced by the change and the magnitude of the primary side peak current in any period, and the requirement of quick response when the adjacent period CS is changed quickly is met.

Drawings

Other objects and results of the present invention will become more apparent and readily appreciated by reference to the following detailed description when taken in conjunction with the accompanying drawings. In the drawings:

FIG. 1 is a block diagram of a prior art primary side feedback AC-DC power supply;

FIG. 2 is a schematic diagram of a prior art sampling control circuit;

FIG. 3 is a schematic diagram of the signals of a prior art primary side feedback AC-DC power supply;

FIG. 4 is a schematic diagram of a sample and hold structure according to the present invention;

FIG. 5 is a schematic diagram of an AC to DC switching power supply according to the present invention;

fig. 6 is a schematic diagram of signals of the ac-dc switching power supply according to the present invention.

Detailed Description

In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of one or more embodiments. It may be evident, however, that such embodiment(s) may be practiced without these specific details.

Various embodiments according to the present invention will be described in detail below with reference to the accompanying drawings.

Example 1: sample and hold structure 1

Fig. 4 is a schematic diagram of the sample-and-hold structure of the present invention, and as shown in fig. 4, the sample-and-hold structure 1 samples the voltage at the feedback end of the transformer at a set proportion of the transformer secondary side demagnetizing time, so as to sample and hold the output voltage of the transformer in a functional relationship with the voltage at the feedback end. The sampling and holding structure 1 comprises a charging module 10, a discharging module 20, a control module 30 and a sampling module 40, wherein the discharging module comprises an energy storage element and a discharging unit, the charging module is used for charging the energy storage element of the discharging module, the discharging unit is used for discharging the energy storage element, the collecting module is used for collecting the voltage of the feedback end of an auxiliary winding of a transformer of an AC-to-DC switching power supply, the control module is used for sending a sampling signal to the sampling module at a set proportion of the demagnetization time of the secondary side of the transformer, and the set proportion is in direct proportion to the ratio of the charging current when the charging module charges the energy storage element and the discharging current when the discharging unit discharges the energy storage element.

In one embodiment, the charging module is configured to input a pulse frequency modulation signal to control charging of the energy storage element, and the control module is configured to collect a feedback signal at a feedback end of the ac-to-dc switching power supply, and control time-sharing conduction of the discharging unit and the sampling module according to the feedback signal and the pulse frequency modulation signal, specifically: when the feedback signal and the pulse frequency modulation signal represent that the secondary side of a transformer of the AC-to-DC switching power supply is demagnetized, the control module controls an energy storage element of the discharging module to discharge, and when the voltage of the energy storage element is smaller than a first set value, the control module controls the sampling module to sample and hold the voltage of the feedback end of the AC-to-DC switching power supply, so that the output voltage in a functional relation with the voltage of the feedback end is sampled and held; and the first set value is the voltage of the energy storage element when the discharge time of the energy storage element reaches the set proportion of the secondary side degaussing time.

The specific configuration of the sample-and-hold structure of the present embodiment is described in detail below.

Charging module 10

As shown in fig. 4, the charging module 10 includes a first current mirror, a first constant voltage source, and a first switch 11, where the first constant voltage source is configured to make a voltage at a feedback end of the ac-to-dc switching power supply constant, collect an output current of an auxiliary winding of a transformer of the ac-to-dc switching power supply, the first current mirror amplifies the output current, and the first switch controls a current amplified by the first current mirror to charge an energy storage element of the discharging module.

In one embodiment, the first current mirror includes two MOS transistors, preferably, the MOS transistors are PMOS transistors, as shown in fig. 4, a first PMOS transistor 12 and a second PMOS transistor 13, the first PMOS transistor 12 is connected to a gate of the second PMOS transistor 13, a drain and a gate of the first PMOS transistor 12 are electrically connected to a first constant voltage source, and a drain of the second PMOS transistor 13 is electrically connected to the first switch 11.

In one embodiment, as shown in fig. 4, the first constant voltage source includes a first transistor 14, a second transistor 15, and a constant current source 16, wherein bases of the first transistor 14 and the second transistor 15 are connected, a collector of the first transistor is electrically connected to the first current mirror, and the constant current source 16 is electrically connected to a collector and a base of the second transistor, and preferably, the first transistor 14 and the second transistor 15 are NPN transistors.

Discharge module 20

The module of discharging is including discharge unit and energy storage component, the discharge unit includes second current mirror and second constant voltage source, energy storage component is connected with second constant voltage source electricity, second constant voltage source is connected with the second current mirror electricity, provides voltage for the input and the output of second current mirror, the voltage that second constant voltage source provided for the second current mirror output is the multiple that provides voltage for the input.

As shown in fig. 4, the second current mirror includes two MOS transistors, preferably, the MOS transistors are NMOS transistors, a first NMOS transistor 22 and a second NMOS transistor 23. As shown in fig. 4, the first NMOS transistor 22 is connected to the gate of the second NMOS transistor 23.

As shown in fig. 4, the second constant voltage source includes a second switch 24, a first operational amplifier 25, a third switch 26, a second capacitor 27, a third NMOS transistor 28 and a fourth switch 29, a forward input end of the first operational amplifier is electrically connected to a feedback end of the ac-to-dc switching power supply through the second switch 24, a forward input end of the first operational amplifier is further electrically connected to an input end of the second current mirror, a reverse input end of the first operational amplifier is electrically connected to an output end of the second current mirror, an output end of the first operational amplifier is electrically connected to gates of the second capacitor and the third NMOS transistor through the third switch, a source of the third NMOS transistor is electrically connected to an output end of the second current mirror, and a drain of the third NMOS transistor is electrically connected to the energy storage element through the fourth switch.

As shown in fig. 4, the energy storage element is a capacitor, i.e. a first capacitor 21.

Control module 30

As shown in fig. 4, the control module 30 includes a comparator 31 and a timing generator 32, one input end of the comparator is electrically connected to the energy storage element, a voltage value of the other end of the comparator is a first set value, an output end of the comparator is electrically connected to the timing generator, when the voltage of the energy storage element is smaller than the first set value, an output end of the comparator is turned over, and the timing generator controls the sampling module to sample.

Sampling module 40

As shown in fig. 4, the sampling module 40 includes a fifth switch 42 and a third capacitor 41, and the third capacitor is electrically connected to the feedback end of the ac-to-dc switching power supply through the fifth switch.

In a preferred embodiment, as shown in fig. 4, the charging module 10 includes a first switch 11, a first current mirror including a first PMOS transistor 12 and a second PMOS transistor 13, and a first constant voltage source including a first transistor 14, a second transistor 15, and a constant current source 16; the discharging module 20 comprises a first capacitor 21, a second current mirror and a second constant voltage source, wherein the second current mirror comprises a first NMOS transistor 22 and a second NMOS transistor 23, and the second constant voltage source comprises a second switch 24, a first operational amplifier 25, a third switch 26, a second capacitor 27, a third NMOS transistor 28 and a fourth switch 29; the control module 30 includes a comparator 31 and a timing generator 32; the sampling module 40 comprises a fifth switch 42 and a third capacitor 41; a feedback end FB of the AC-to-DC switching power supply is electrically connected with an emitter of the first triode, is electrically connected with a non-inverting input end of the first operational amplifier through the second switch, and is electrically connected with the third capacitor through the fifth switch; the grid electrode of the first PMOS tube is electrically connected with the grid electrode of the second PMOS tube, the drain electrode and the grid electrode of the first PMOS tube are respectively electrically connected with the collector electrode of the first triode, the drain electrode of the second PMOS tube is electrically connected with the input end of the first switch, the base electrodes of the first triode and the second triode are connected, and the constant current source is electrically connected with the base electrode and the collector electrode of the second triode; the output end of the first switch and the input end of the fourth switch are respectively and electrically connected with a first capacitor, the output end of the fourth switch is electrically connected with the drain electrode of a third NMOS tube, the grid electrode of the third NMOS tube and the output end of a third switch are respectively and electrically connected with a second capacitor, the source electrode of the third NMOS tube is electrically connected with the drain electrode of a second NMOS tube, the reverse input end of a first operational amplifier is electrically connected with the drain electrode of the second NMOS tube, the output end of the first operational amplifier is electrically connected with the input end of the third switch, the grid electrodes of the first NMOS tube and the second NMOS tube are connected, the non-inverting input end of the first operational amplifier is electrically connected with the drain electrode of the first NMOS tube, one input end of a comparator is electrically connected with the first capacitor, the other input end of the comparator is a first set value, the output end of the comparator is electrically connected with a time sequence generator, and the time sequence generator acquires output signals (disc) and (disc) of the comparator, The feedback end outputs a signal (FB) and a PFM signal of the first switch, and the timing generator sends out a control signal (Tons _ delay2) of the second switch, a control signal (Tons _ delay1) of the third switch, a control signal (Tons _ disc) of the fourth switch, a control Signal (SH) of the fifth switch, which is also a sampling signal sent out by the control module to the sampling module, and a secondary side degaussing time signal (Tons) of the AC-DC switching power supply.

Preferably, the set proportion in the sampling at the set proportion of the transformer secondary side demagnetizing time is a ratio of amplification factors of the first current mirror and the second current mirror.

The existing sampling control circuit delays sampling according to the degaussing condition of the next side of the last period, and the degaussing time of two adjacent periods is basically the same to ensure that the sampling of the period is not invalid and cannot immediately react to the sudden change condition (such as load sudden change or input voltage sudden change).

Example 2: controller 100

As shown in fig. 5, the controller according to the present invention is used for controlling the PFM frequency and sample-holding the feedback terminal FB of the transformer auxiliary winding group, and the controller 100 includes the sample-and-hold structure 1 according to the above embodiments.

As shown in fig. 5, the controller 100 further includes a second operational amplifier 2, a frequency control module 3, an RS flip-flop 4, a driving unit 5, and a cycle-by-cycle current limiting unit 6, where the frequency control module sends an initial pulse frequency modulation signal (PFM signal) to a sample-and-hold structure, the sample-and-hold structure is used to collect a feedback signal at a feedback end of an ac-to-dc switching power supply, and the second operational amplifier is used to amplify a difference between a sampling signal (FB _ sh) and a reference signal (FB _ ref) and output a continuous analog signal; the frequency control module is used for controlling the frequency of the pulse frequency modulation signal to be continuously changed according to the continuous analog signal output by the second operational amplifier; the RS trigger is used for sending a pulse frequency modulation signal to the driving unit; the driving unit is used for amplifying the pulse frequency modulation signal output by the RS trigger so as to control the conduction and the closing of the primary side of the transformer; the cycle-by-cycle current limiting unit is used for comparing the current value (CS) of the primary side of the transformer with a current limiting reference (CS _ ref) in each cycle, and when the current value of the primary side of the transformer reaches the current limiting reference, the cycle is turned off.

The second operational amplifier determines the working frequency of the controller, the higher the working frequency is, the larger the transmitted energy is, when the output voltage is lower than the reference, the working frequency is increased, the transmitted energy is increased, the output voltage is increased, when the output voltage is higher than the reference, the working frequency is reduced, the transmitted energy is reduced, and the output voltage is reduced; the controller controls the output power of the transformer by adjusting the operating frequency.

Preferably, the controller also includes a built-in power supply 7 to provide internal power for the holding circuit.

The controller can accurately realize sampling at the fixed proportion of the secondary side demagnetization time Tons in the period, and the proportion of the sampling time can not change along with the change of parameters no matter how the CS, the output voltage and the input voltage in any period change.

Example 3: AC-DC switching power supply

As shown in fig. 5, the ac-to-dc switching power supply includes a transformer 200 and the controller 100 of each embodiment described above.

As shown in fig. 5, the transformer 200 includes a primary winding Np, an auxiliary winding Na, and a secondary winding Ns, wherein the polarity of the primary winding is opposite to the same-name terminals of the auxiliary winding and the secondary winding, and the auxiliary winding is electrically connected to the sample-and-hold structure as a feedback terminal.

As shown in fig. 5, the ac-to-dc switching power supply further includes a rectifier bridge BR, a rectifier diode D2, a smoothing capacitor Cout, a power tube N1, and a current detection resistor Rcs, where ac is input to the rectifier bridge, an output of the rectifier bridge is electrically connected to one end of a primary winding of the transformer, another end of the primary winding is electrically connected to an input end of the power tube, a control end of the power tube is electrically connected to the controller, an output end of the power tube is electrically connected to the current detection resistor, and the rectifier diode and the smoothing capacitor are connected in series and then connected in parallel to two ends of a secondary winding of the transformer.

Preferably, the transformer 200 further includes an upper voltage-dividing resistor R1 and a lower voltage-dividing resistor R2 connected in series, the upper voltage-dividing resistor and the lower voltage-dividing resistor are connected in series to the auxiliary winding of the transformer, and a feedback terminal FB is led out from between the upper voltage-dividing resistor R1 and the lower voltage-dividing resistor R2.

Example 4: sampling method

In one embodiment, a method for sampling an ac-to-dc switching power supply by using the sample and hold structure of the above embodiments includes:

and acquiring the voltage of the feedback end of the auxiliary winding of the transformer at a set proportion of the secondary side degaussing time of the transformer in the same period, wherein the set proportion is in direct proportion to the ratio of the charging current of the energy storage element during charging and the discharging current of the energy storage element during discharging.

The sampling time of the invention is completely fixed at the set proportion of the demagnetization time of the period, and can be immediately reflected according to the sudden change condition of the period, and the sampling failure can not occur in the face of any sudden change condition.

Preferably, the step of collecting the voltage at the feedback end of the auxiliary winding of the transformer at a set proportion of the transformer secondary side demagnetizing time of the same period comprises:

and in the degaussing stage after the first time period, the feedback end is used for detecting the output voltage of the transformer and is sampled and held as the feedback voltage when the voltage of the energy storage element is smaller than the first set value so as to ensure that the output voltage is maintained in a set error range of a second set value.

Preferably, the first setting time period is not more than 1/6Tons to 1/2Tons, the first setting time period is too short to be affected by resonance at the beginning of demagnetization, and the sampling is affected by too long of the first setting time period.

The primary side feedback of the AC-DC switching power supply is divided into a front part and a rear part in time sequence, and the front part is used for sampling and holding the feedback voltage of the auxiliary winding of the transformer; the invention controls the sampling time of the front part at the set proportion of the period, and dynamically responds to the degaussing time of the secondary winding of the transformer of the period, thereby realizing the effective and rapid sampling and holding of the feedback voltage.

In one embodiment, as shown in fig. 4-6, the charge module 10 of the sample-and-hold structure 1 is composed of a first PMOS transistor 12, a second PMOS transistor 13, a first transistor (NPN)14, a second transistor 15, a constant current source 16, and a first switch 11, wherein the sources of the first PMOS transistor 12 and the second PMOS transistor 13 are both connected to the internal power VDD of the controller 100, the gates of the first PMOS transistor 12 and the second PMOS transistor 13 are connected together and connected to the drain of the first PMOS transistor 12 and the collector of the first transistor 14, the drain of the second PMOS transistor 13 is connected to one end of the first switch 11, the other end of the first switch 11 is connected to the upper plate of the first capacitor 21 of the discharge module 20 and one end of the fourth switch 29 and the positive input end of the comparator 31 of the control module, the emitter of the first transistor 14 is connected to the pin FB, the bases of the first transistor 14 and the second transistor 15 are connected to the collector of the second transistor 15 and one end of the constant current source 16, the emitter of the second triode 15 is grounded, and the other end of the constant current source 16 is connected with the internal power supply VDD. When the primary side of the transformer 200 is turned on, the voltage Va of the auxiliary winding is a negative voltage, since the emitter of the second transistor 15 is grounded, the base voltage Vb of the second transistor is equal to Vbe26, Vbe26 is the base-emitter bias voltage of the second transistor 15, FB voltage VFB is equal to Vb-Vbe25, Vbe25 is the base-emitter bias voltage of the first transistor 14, since Vbe of the transistor and collector current Ic are in an exponential relationship, when the collector current deviation of the first transistor 14 and the second transistor 15 is not very large, it can be considered that Vbe25 is equal to Vbe26, VFB is equal to 0V, both ends of the lower divider resistor R2 are 0V, so there is no current in R2, the current flowing through the upper divider resistor R1 is equal to I1,

wherein Vin is the input voltage of the primary winding of the transformer, NP is the number of turns of the primary winding of the transformer, and R1 is the resistance value of the upper divider resistor;

the first current mirror composed of the first PMOS transistor 12 and the second PMOS transistor 13 is N1 times,

wherein, I2 is the first current mirror output current, and N1 is the current amplification factor of the first current mirror;

in addition, the primary side conduction time tonp of the transformer is:

wherein, Ipp is the peak current of the primary winding of the transformer, and Lp is the inductance of the primary winding of the transformer.

The first switch 11 controlled by the PFM signal charges the first capacitor 21 during the primary side on time, ton, and the fourth switch 29 is turned off, so that the first current mirror output current I2 charges the first capacitor 21 during the ton time by the following charge amount:

after the primary side on-time tonp is finished, the secondary side demagnetization stage is started, the FB voltage VFB is greater than 0, the current I1 is equal to 0, and meanwhile, after the PFM is turned off, the PFM becomes a low level, the first switch 11 is turned off, and the charging is finished.

The discharging module 20 is composed of a first capacitor 21, a first NMOS transistor 22, a second NMOS transistor 23, a second switch 24, a first operational amplifier 25, a third switch 26, a second capacitor 27, a third NMOS transistor 28, and a fourth switch 29, wherein one end of the second switch 24 is connected to FB, the other end is connected to the drain terminal of the first NMOS transistor 22 and the forward input terminal of the first operational amplifier 25, the control terminal of the second switch 24 is connected to the signal Tons _ delay2 of the timing generator 32, the gates of the first NMOS transistor 22 and the second NMOS transistor 23 are both connected to VDD, the source terminals are both grounded, the first NMOS transistor 22 and the second NMOS transistor 23 operate in a linear region, which is equivalent to two switching transistors, and whose Vds is very small, and is several tens of millivolts, the drain terminal of the second NMOS transistor 23 is connected to the source terminal of the third NMOS transistor 28 and the reverse input terminal of the first operational amplifier 25, the output terminal of the first operational amplifier 25 is connected to one end of the third switch 26, the other end of the third switch 26 is connected to the upper plate of the second capacitor 27 and the gate of the third NMOS transistor 28, the lower plate of the second capacitor 27 is grounded, the drain of the third NMOS transistor 28 is connected to one end of the fourth switch 29, the other end of the fourth switch 29 is connected to the first capacitor 21, and the control end of the fourth switch 29 is connected to the signal Tons _ disc of the timing generator 32. When primary side conduction is finished and secondary side demagnetization is started, within a first set time period (1.1us) when demagnetization (Tons) is started, the second switch 24 and the third switch 26 are conducted, gates of the first NMOS tube 22 and the second NMOS tube 23 are connected with an internal power supply VDD and are in a linear region, conducting impedances Rds _ on of the first NMOS tube 22 and the second NMOS tube are small, a current I3 flows through the first NMOS tube 22 through the upper divider resistor R1 and the second switch from an auxiliary winding voltage Va, due to the fact that conducting impedance of the first NMOS tube 22 is small, a drain-source voltage Vds of the first NMOS tube 22, namely Vb2 in the graph 4 is about dozens of millivolts, can be ignored relative to the Va voltage, and resistance values of R1 and R2 are equivalent in magnitude, only dozens of millivolts are available on the R2, and the current can be ignored relative to R1, and therefore the current I3 is obtained

Where Va is the auxiliary winding voltage, Vs is the secondary winding voltage, Vo is the output voltage, and Vz is the voltage drop across output rectifier diode D2.

The secondary side demagnetizing time Tons can be obtained by the following formula:

wherein Ips is the secondary side peak current of the transformer, and Ls is the inductance of the secondary side winding of the transformer.

At this time, since the third switch 26 is turned on, the output Vg1 of the first operational amplifier 25 is Vg2, the first operational amplifier 25 adjusts the output voltage Vg1 through negative feedback so that Vb2 is Vb3, that is, Vds of the first NMOS transistor 22 and the second NMOS transistor 23 is equal, and Vgs thereof is also equal (equal to VDD), so that the leakage current of the second NMOS transistor 23 is equal to N2 times of the leakage current of the first NMOS transistor 22, that is, I4 is N2 × I3, at a time of a second set time period (the second set time period is less than a first set time period, for example, 1us) after the demagnetization starts, the Vg of the second NMOS _ delay1 is inverted from high level to low level, the third switch 26 is turned off, the voltage of the first operational amplifier 2 is sampled and held on the second capacitor 27, so that the I4 maintains the previous current, from the time of the next demagnetization, the time when the ton _ disc is inverted to high level, the fourth switch 29 is turned on, the I4 is discharged to the first capacitor 21, and the first set voltage V5 is lower than V5, the comparator 31 output toggles until. The amount of charge I4 discharged to first capacitor 21 over time is as follows:

wherein t is the discharge time of the first capacitor.

If the charge and discharge amount of the first capacitor is made equal in each period, i.e. Qc equals Qdisc, then

The control module consists of a comparator 31 and a timing generator 32. Wherein, the positive input end of the comparator 31 is connected to the upper plate of the first capacitor 21, i.e. the Vsaw signal, the negative input end is connected to the first setting value, the output end disc is used as the input end of the timing generator 32, the other two input ends of the timing generator 32 are respectively connected to the PFM signal and the FB pin, and 5 output signals of the timing generator 32 are respectively: a secondary edge degaussing time signal Tons, a first delay signal Tons _ delay1 (e.g., about 1us) and a second delay signal Tons _ delay2 (e.g., about 1.1us) of the secondary edge degaussing signal, a signal Tons _ disc from the beginning of Tons to the end of disc flip time, and a sampling signal SH. When the degaussing stage is on, the first capacitor 21 is discharged, the Vsaw is decreased, and when the Vsaw is decreased to be slightly smaller than a first set value, the output disc of the comparator 31 is inverted from a high level to a low level, the Tons _ disc signal is also inverted from the high level to the low level, the fourth switch 29 is turned off, the discharging is finished, and the Vsaw is maintained at the first set value, wherein the first set value inverted by the comparator 31 of the control module is a set proportion of the secondary degaussing time Tons, and the set proportion is a ratio of the amplification factor of the first current mirror of the charging module to the amplification factor of the second current mirror of the discharging module; when the primary side is turned on in the next cycle, the charging starts, and Vsaw also rises from the first set value, and so on. Fig. 6 shows the operating waveforms of the signals of the time-sharing sampling of the ac-to-dc switching power supply according to the present invention.

The sampling module 40 is composed of a fifth switch 42 and a third capacitor 41, one end of the fifth switch 42 is connected to the FB pin, the other end is connected to the upper plate of the third capacitor 41, the control end of the fifth switch 42 is a sampling signal SH, and the lower plate of the third capacitor 41 is grounded. At the secondary side demagnetizing time Tons

And the timing generator sends out a sampling narrow pulse signal SH, the fifth switch 42 is switched on briefly, and the FB voltage signal at the moment is sampled and held on the third capacitor 41 to be used as an output voltage feedback sampling signal and sent to the input end of the chip operational amplifier to participate in loop control.

The method for sampling the AC-DC switching power supply by the sampling and holding structure is a time-sharing sampling control method for a side feedback (PSR) AC-DC (AC-DC) switching power supply, and the method can accurately realize sampling at a fixed proportion of the degaussing time of the period by utilizing time-sharing multiplexing of an auxiliary winding voltage division feedback signal.

In one embodiment of the method of manufacturing the optical fiber,

the discharge time of the first capacitor 21 is t 0.8 times Tons, the first capacitor is discharged to 0.5V, at this time, the comparator 31 is turned over, Tons _ disc is turned over to low level, the fourth switch 29 is turned off, the voltage Vsaw on the first capacitor 21 is maintained at 0.5V, the charging in the next period is started from 0.5V, and the values are time-division multiplexed by the above steps and are taken

Under the condition of (2), 80% of the degaussing time in the period can be accurately detected, and then sampling is carried out at 80%, and the proportion of 80% of the degaussing time can not be changed due to the change of the parameters regardless of the magnitude of the primary side current in the period and the length of the Tons. The Tons _ delay2 also toggles low about 100ns after Tons _ delay1 so that there is no current coming in and out of the FB pin and FB reverts to the Va divided voltage as a feedback sample signal for the output voltage, which is sampled and takes part in the loop regulation in the latter part of the degaussing phase.

The sampling method of the prior art primary side feedback AC-DC converter first detects the demagnetizing time Tons (n-1) of the previous period, and then takes a fixed proportion (for example, 2/3) of the demagnetizing time of the previous period as the sampling time when the period is demagnetized, which has the disadvantages that there is a certain error in detecting Tons between two adjacent periods, and if the change of the primary side peak current of two adjacent periods is obvious (for example, the load changes dynamically, and in extreme cases, the load is switched from no-load to full-load or the full-load is switched to no-load), the sampling will fail, that is, the sampling time in the prior art depends on the demagnetizing time of the previous period, and the sampling is effectively applied on the premise that the demagnetizing time of two adjacent periods must be the same or only a slight change is allowed, otherwise the sampled signal will jump, inaccurate, if the degaussing time of the period changes greatly, the sampling signal of the period is referenced to the degaussing time of the previous period, and is completely unrelated to the degaussing time of the period, so that defects exist in the sampling time, and even sampling failure can be caused.

Aiming at the problems in the prior art, the sampling time is fixed at the set proportion of the demagnetization time of the period by taking the demagnetization time of the period as a reference, and is irrelevant to the previous period; no matter how the degaussing time of the period changes, the sampling is carried out at the set position, and the output voltage can be accurately sampled.

While the foregoing disclosure shows illustrative embodiments of the invention, it should be noted that various changes and modifications could be made herein without departing from the scope of the invention as defined by the appended claims. Furthermore, although elements of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to a single element is explicitly stated.

Claims

1. The utility model provides a sampling hold structure, its characterized in that, includes charge module, discharge module, control module and sampling module, the module of discharging includes energy storage element and the unit of discharging, the module of charging is used for right the energy storage element's of the module of discharging charges, the unit of discharging is used for discharging to energy storage element, sampling module is used for gathering the voltage of exchanging the feedback end of changing DC switch power supply's transformer auxiliary winding, control module is used for sending sampling signal for sampling module at the settlement proportion department of transformer secondary side degaussing time, the settlement proportion is directly proportional with the ratio of the charging current when the module of charging energy storage element and the discharging current when the unit of discharging discharges energy storage element.

2. The sample-and-hold structure of claim 1, wherein the charging module comprises a first current mirror, a first constant voltage source, and a first switch, the first constant voltage source is configured to make a voltage at a feedback end of the ac-to-dc switching power supply constant, collect an output current of an auxiliary winding of a transformer of the ac-to-dc switching power supply, the first current mirror amplifies the output current, and the first switch controls a current amplified by the first current mirror to charge an energy storage element of the discharging module.

3. The sample-and-hold structure of claim 2, characterized in that the first current mirror comprises two MOS transistors, preferably, the MOS transistors are PMOS transistors, the first PMOS transistor (12) is connected to the gate of the second PMOS transistor (13), the drain and gate of the first PMOS transistor (12) are electrically connected to the first constant voltage source, and the drain of the second PMOS transistor (13) is electrically connected to the first switch (11);

preferably, the first constant voltage source comprises a first triode (14), a second triode (15) and a constant current source (16), bases of the first triode (14) and the second triode (15) are connected, a collector of the first triode is electrically connected with the first current mirror, the constant current source (16) is electrically connected with a collector and a base of the second triode, and further preferably, the first triode (14) and the second triode (15) are NPN tubes.

4. The sample-and-hold structure of claim 1, wherein the discharge unit comprises a second current mirror and a second constant voltage source, the energy storage element is electrically connected to the second constant voltage source, the second constant voltage source is electrically connected to the second current mirror and provides a voltage to the input terminal and the output terminal of the second current mirror, the voltage provided by the second constant voltage source to the output terminal of the second current mirror is a multiple of the voltage provided to the input terminal, preferably, the second current mirror comprises two MOS transistors, preferably, the MOS transistors are NMOS transistors, and the first NMOS transistor (22) is connected to the gate of the second NMOS transistor (23); preferably, the second constant voltage source comprises a second switch (24), a first operational amplifier (25), a third switch (26), a second capacitor (27), a third NMOS tube (28) and a fourth switch (29), the positive input end of the first operational amplifier is electrically connected with the feedback end of the ac-to-dc switching power supply through the second switch, the positive input end of the first operational amplifier is further electrically connected with the input end of the second current mirror, the reverse input end of the first operational amplifier is electrically connected with the output end of the second current mirror, the output end of the first operational amplifier is electrically connected with the gates of the second capacitor and the third NMOS tube through the third switch, the source of the third NMOS tube is electrically connected with the output end of the second current mirror, and the drain of the third NMOS tube is electrically connected with the energy storage element through the fourth switch; preferably, the energy storage element is a capacitor.

5. The sample-and-hold structure according to claim 1, wherein the control module comprises a comparator (31) and a timing generator (32), one input end of the comparator is electrically connected with the energy storage element, the voltage value of the other end of the comparator is a first set value, the output end of the comparator is electrically connected with the timing generator, when the voltage of the energy storage element is smaller than the first set value, the output end of the comparator is inverted, and the timing generator controls the sampling module to sample.

6. The sample-and-hold architecture of claim 1, wherein the sampling module comprises a fifth switch (42) and a third capacitor (41), the third capacitor being electrically connected to the feedback terminal of the ac-to-dc switching power supply via the fifth switch.

7. The sample-and-hold structure of claim 1, characterized in that the charging module comprises a first switch (11), a first current mirror comprising a first PMOS transistor (12) and a second PMOS transistor (13), and a first constant voltage source comprising a first transistor (14), a second transistor (15), and a constant current source (16); the discharging module comprises a first capacitor, a second current mirror and a second constant voltage source, the second current mirror comprises a first NMOS (N-channel metal oxide semiconductor) tube (22) and a second NMOS tube (23), and the second constant voltage source comprises a second switch (24), a first operational amplifier (25), a third switch (26), a second capacitor (27), a third NMOS tube (28) and a fourth switch (29); the control module comprises a comparator (31) and a timing generator (32); the sampling module comprises a fifth switch (42) and a third capacitor (41); the feedback end of the alternating current-to-direct current switching power supply is electrically connected with the emitter of the first triode, the non-inverting input end of the first operational amplifier through the second switch, and the third capacitor through the fifth switch; the grid electrode of the first PMOS tube is electrically connected with the grid electrode of the second PMOS tube, the drain electrode and the grid electrode of the first PMOS tube are respectively electrically connected with the collector electrode of the first triode, the drain electrode of the second PMOS tube is electrically connected with the input end of the first switch, the base electrodes of the first triode and the second triode are connected, and the constant current source is electrically connected with the base electrode and the collector electrode of the second triode; the output end of the first switch and the input end of the fourth switch are respectively and electrically connected with a first capacitor, the output end of the fourth switch is electrically connected with the drain electrode of a third NMOS tube, the grid electrode of the third NMOS tube and the output end of a third switch are respectively and electrically connected with a second capacitor, the source electrode of the third NMOS tube is electrically connected with the drain electrode of a second NMOS tube, the reverse input end of a first operational amplifier is electrically connected with the drain electrode of the second NMOS tube, the output end of the first operational amplifier is electrically connected with the input end of the third switch, the grid electrodes of the first NMOS tube and the second NMOS tube are connected, the in-phase input end of the first operational amplifier is electrically connected with the drain electrode of the first NMOS tube, one input end of the comparator is electrically connected with the first capacitor, the other input end of the comparator is a first set value, the output end of the comparator is electrically connected with a time sequence generator, and the time sequence generator acquires an output signal of the comparator, The feedback end outputs a signal and a PFM signal of the first switch, the timing generator sends out control signals of the second switch, the third switch, the fourth switch and the fifth switch and a secondary side degaussing time signal of the AC-to-DC switching power supply, and preferably, the set proportion is the ratio of the amplification multiples of the first current mirror and the second current mirror.

8. A controller comprising a sample and hold structure as claimed in any one of claims 1 to 7.

9. An ac to dc switching power supply comprising a transformer and the controller of claim 8.

10. A method of sampling an ac-to-dc switching power supply using the sample and hold structure of claim 1, comprising:

collecting the voltage of a feedback end of an auxiliary winding of the transformer at a set proportion of the secondary side degaussing time of the transformer in the same period, wherein the set proportion is in direct proportion to the ratio of the charging current of the energy storage element during charging and the discharging current of the energy storage element during discharging;