CN114721879B - SOC (System on chip), data backup method for SOC and electronic equipment - Google Patents
SOC (System on chip), data backup method for SOC and electronic equipment Download PDFInfo
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Abstract
The application provides an SOC (system on chip), a data backup method for the SOC and electronic equipment, and relates to the technical field of computer chips. The SOC chip includes: the system comprises a main processor, a nonvolatile program memory, a volatile data memory, an auxiliary processor and a nonvolatile backup memory; the main processor is used for executing the program instructions stored in the program memory to process preset tasks and storing subtask data generated when the tasks are processed into the data memory; and the auxiliary processor is preset with a backup instruction set and used for backing up the subtask data in the data memory to the backup memory in real time according to the backup instruction set so as to restore the tasks according to the backed-up subtask data after the main processor is shut down and restarted. According to the method and the device, after the chip downtime is restarted, the tasks can be recovered by using the task data backed up in the backup memory, and the influence of abnormal downtime on the SOC chip task execution progress is reduced.
Description
Technical Field
The application relates to the technical field of computer chips, in particular to an SOC chip, a data backup method for the SOC chip and electronic equipment.
Background
SOC is an abbreviation for System on Chip, with the transliteration being "System-on-Chip", often simply "System-on-Chip", which is an integrated circuit containing a processor, memory, and on-Chip logic.
The SOC chip can directly run a built-in program to execute a specific task, the running scene is complex and various, downtime is often caused by reasons of unstable power supply, overheating and the like, data of executed part of tasks are lost after downtime, and the tasks need to be executed again after reboot, so that the task execution efficiency is reduced.
In view of the above problems, it is desirable to provide a technical solution capable of recovering a task to the maximum extent after the SOC chip is abnormally shut down and restarted, so as to improve the disaster resistance and the task execution efficiency of the SOC chip.
Disclosure of Invention
The application aims to provide an SOC chip, a data backup method for the SOC chip and electronic equipment.
The present application provides in a first aspect an SOC chip comprising: the system comprises a main processor, a nonvolatile program memory, a volatile data memory, an auxiliary processor and a nonvolatile backup memory;
the main processor is respectively connected with the program memory and the data memory and is used for executing program instructions stored in the program memory to process preset tasks and storing subtask data generated when the tasks are processed into the data memory;
the auxiliary processor is connected with the data memory and the backup memory respectively, and a backup instruction set is preset in the auxiliary processor and used for backing up the subtask data in the data memory to the backup memory in real time according to the backup instruction set, so that the tasks are recovered according to the backed-up subtask data after the main processor is down and restarted.
A second aspect of the present application provides a data backup method for an SOC chip, which is applied to the SOC chip of the first aspect, and the method includes:
the main processor executes program instructions stored in the program memory to process preset tasks and stores subtask data generated when the tasks are processed into the data memory;
and the auxiliary processor backs up the subtask data in the data memory to a backup memory in real time according to a backup instruction set, so that the tasks are recovered according to the backed-up subtask data after the main processor is down and restarted.
A third aspect of the present application provides an electronic device, where the electronic device is configured with the SOC chip of the first aspect of the present application, and is capable of executing the data backup method for the SOC chip of the second aspect of the present application.
Compared with the prior art, according to the SOC chip provided by the application, the main processor and the auxiliary processor are arranged in the SOC chip, after the main processor stores the task data into the volatile data memory, the task data stored in the data memory can be automatically backed up into the nonvolatile backup memory through the auxiliary processor, so that after the SOC chip is restarted due to abnormal downtime, the task can be recovered by using the task data backed up in the backup memory, the influence of the abnormal downtime on the task execution progress of the SOC chip is reduced, and the disaster resistance and the task execution efficiency of the SOC chip are improved.
The data backup method for the SOC chip provided in the second aspect of the present application and the electronic device provided in the third aspect of the present application have the same advantageous effects as the SOC chip provided in the first aspect of the present application based on the same inventive concept.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the application. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 illustrates a schematic structure diagram of an SOC chip provided in some embodiments of the present application;
FIG. 2 illustrates a flow chart of a method for data backup for SOC chips provided by some embodiments of the present application;
FIG. 3 illustrates a flow chart of a task recovery method provided by some embodiments of the present application;
FIG. 4 illustrates a flow chart of another task recovery method provided by some embodiments of the present application.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which this application belongs.
In addition, the terms "first" and "second", etc. are used to distinguish different objects, rather than to describe a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
The embodiment of the application provides a data backup method, a task recovery method, an SOC chip and an electronic device for the SOC chip, and the following description is given by way of example with reference to the embodiments and the accompanying drawings.
In order to facilitate understanding of the overall technical concept of the present application, the SOC chip provided in the embodiments of the present application is first exemplarily described as follows:
referring to fig. 1, which shows a schematic structural diagram of an SOC chip provided in some embodiments of the present application, as shown in fig. 1, the SOC chip may include: a main processor 101, a non-volatile program memory 102, a volatile data memory 103, a secondary processor 104, and a non-volatile backup memory 105;
the main processor 101 is connected to the program memory 102 and the data memory 103, respectively, and is configured to execute a program instruction stored in the program memory 102 to process a preset task, and store subtask data generated when the task is processed into the data memory 103;
the auxiliary processor 104 is connected to the data memory 103 and the backup memory 105, respectively, and the auxiliary processor 104 has a preset backup instruction set, and is configured to backup the subtask data in the data memory 103 to the backup memory 105 in real time according to the backup instruction set, so that the task is recovered according to the backed-up subtask data after the main processor 101 is down and restarted.
Compared with the prior art, according to the SOC chip provided in the embodiment of the present application, the main processor 101 and the auxiliary processor 104 are arranged in the SOC chip, and after the main processor 101 stores the task data in the volatile data memory 103, the auxiliary processor 104 can automatically backup the task data stored in the data memory 103 to the nonvolatile backup memory 105, so that after the SOC chip is restarted due to abnormal downtime, the task data backed up in the backup memory 105 can be used to recover the task, the influence of the abnormal downtime on the task execution progress of the SOC chip is reduced, and the disaster resistance and the task execution efficiency of the SOC chip are improved.
It should be noted that the chip provided in this application embodiment may be generated based on a haver structure, the main processor may be directly connected to the program memory and the data memory through a fast transmission channel, so as to achieve fast reading and accessing of data, the data memory is implemented by a volatile memory, so as to greatly improve data storage and access efficiency, and meet task processing requirements of the main processor, and the backup memory may be connected to the main processor through a slower transmission channel, so as to mainly play a role of backup.
In some embodiments, the SOC chip provided by the present application may be powered by an energy collection manner, such as electromagnetic induction wireless power supply, radio radiation power supply, piezoelectric power supply, human body thermal energy power supply, and the like, and these power supply manners have the problems of unstable power supply and high probability of downtime, so that by using the scheme provided by the embodiments of the present application, the disaster-resistant and power-outage-resistant capability of the SOC chip may be effectively improved, and the task execution efficiency may be improved.
In some variations of the embodiments of the present application, the main processor 101 is further connected to the auxiliary processor 104;
the main processor 101 is further configured to send storage location information of the subtask data in the data memory 103 to the auxiliary processor 104 after the subtask data is stored in the data memory 103;
the auxiliary processor 104 is specifically configured to read the subtask data from the data storage 103 according to the storage location information, and store the subtask data in the backup storage 105.
The storage location information may refer to an address of a data block where the subtask data is located in the data storage 103.
Through the embodiment, the main processor 101 can trigger the auxiliary processor 104 to perform the backup operation in real time after the subtask data is stored each time, and the storage location information is sent to the auxiliary processor 104, so that the auxiliary processor 104 can read the subtask data in a targeted manner and quickly perform the backup, thereby improving the backup efficiency and the real-time performance, and reducing the data loss caused by the downtime of the chip.
On the basis of the foregoing embodiment, in some modified embodiments, the main processor 101 is further configured to send a subtask identifier corresponding to the subtask data to the secondary processor 104 after storing the subtask data in the data storage 103;
the auxiliary processor 104 is specifically configured to store the subtask identifier and the subtask data binding in the backup memory 105.
In the embodiment, the subtask identifier and the subtask data are backed up together, which is helpful for the main processor 101 to identify the backed-up subtask data according to the subtask identifier and perform task recovery after the downtime of the chip is restarted, so that the efficiency and the accuracy of task recovery are improved.
On the basis of any of the foregoing embodiments, in some modified embodiments, the data storage 103 is provided with a plurality of source data blocks for storing the subtask data, and the backup storage 105 is provided with a plurality of backup data blocks, where the plurality of backup data blocks are the same in number as the plurality of source data blocks and are mapped one by one;
the auxiliary processor 104 is specifically configured to backup the subtask data to the backup data block corresponding to the source data block according to the source data block in which the subtask data is located.
In this embodiment, the data storage 103 and the backup storage 105 are both divided into a plurality of data blocks, and the data blocks are used to store the subtask data, wherein the backup data blocks and the source data blocks are mapped one by one, and the subtask data can be backed up into the backup data blocks mapped with the source data blocks according to the preset mapping relationship, so as to omit operations such as address allocation, and the like, thereby effectively improving the backup efficiency.
In some embodiments, the source data block and the backup data block have the same address but different memory identifications in their respective memories,
the auxiliary processor 104 is specifically configured to replace, by executing a preset memory identifier replacement instruction, the identifier of the data memory 103 in the first location information with the identifier of the backup memory 105 to generate second location information, and backup the subtask data to the backup data block corresponding to the source data block according to the second location information, where the first location information is location information of the source data block in which the subtask data is stored, and the second location information is location information of the backup data block for backing up the subtask data.
For example, the first location information includes the identifier of the data storage 103 and the address of the source data block storing the subtask data in the data storage 103, and the second location information includes the identifier of the backup storage 105 and the address of the backup data block for backing up the subtask data in the backup storage 105, which are the same, with the difference that the identifier of the data storage 103 is different from the identifier of the backup storage 105, so that, by means of the preset storage identifier replacement instruction, the secondary processor 104 can be enabled to automatically replace the identifier of the data storage 103 in the first location information with the identifier of the backup storage 105, thereby generating the second location information, and backing up the subtask data according to the second location information.
Through the implementation mode, the second position information can be conveniently and quickly determined to realize backup only by simply replacing the memory identifier, the backup efficiency of the subtask data can be effectively improved, and the method and the device have the advantages of simplicity in implementation and easiness in implementation.
Considering that in some fields, the execution of a program in an SOC chip includes many subtasks, the capacity of the data storage 103 is not enough to store all data generated by the subtasks, and with the continuous execution of the subtasks, it is necessary to erase the old data in the data storage 103 according to a preset erasure logic to write new data, but after the chip is down and restarted, because part of the old subtask data has been deleted, the remaining subtask data is not enough to restore the task process, therefore, in some modification embodiments of the present application, the data storage 103 is provided with a plurality of source data blocks for storing the subtask data, the backup storage 105 is provided with a plurality of backup data block sets, and each backup data block set includes a plurality of backup data blocks which are the same in number as the plurality of source data blocks and are mapped one by one;
the auxiliary processor 104 is specifically configured to select a target data block set from the multiple backup data block sets according to a preset sequence, and write the subtask data into a backup data block in the target data block set, where the backup data block corresponds to a source data block where the subtask data is located.
Through the above embodiment, the source data block and the backup data block form a one-to-many relationship, so that when the source data block is full of data and needs to be erased and rewritten, the subtask data that has been backed up in the backup data block does not need to be erased, but the subtask data that is newly written in the source data block can be backed up in the backup data block in the next backup data block set, thereby retaining more old subtask data as much as possible, reducing erasure of the subtask data backed up in the backup memory 105 by the currently running task, and contributing to improving the success rate of task recovery.
On the basis of the foregoing embodiments, in some specific embodiments, the auxiliary processor 104 is further specifically configured to select a next target data block set from the multiple backup data block sets according to a preset erasing and writing sequence after the target data block set is completely written, and write newly acquired subtask data into a backup data block corresponding to a source data block where the subtask data is located in the next target data block set.
Through the above embodiment, when the source data block is full of writes and needs to be erased and rewritten, the subtask data that has been backed up in the backup data block does not need to be erased, but the subtask data that is newly written into the source data block can be backed up in the backup data block in the next backup data block set, so that more old subtask data can be retained as much as possible, the erasure of the subtask data backed up in the backup memory 105 by the currently running task is reduced, and the success rate of task recovery can be improved.
In some of the foregoing embodiments, an embodiment is given in which the main processor 101 triggers the auxiliary processor 104 to backup the subtask data, but the present application is not limited to this backup triggering manner, and the auxiliary processor 104 may trigger the backup subtask data by itself, for example, in other embodiments, the data storage 103 is provided with a plurality of source data blocks for storing the subtask data;
the auxiliary processor 104 is specifically configured to monitor the states of the multiple source data blocks according to the backup instruction set, and trigger to backup the newly written subtask data in the backup memory 105 after it is monitored that new subtask data is written in any one of the source data blocks.
The embodiment of backing up the newly written subtask data in the backup memory 105 may be understood with reference to the description of any of the foregoing embodiments, and details are not described here.
By the embodiment, the auxiliary processor 104 can automatically back up the subtask data without information interaction between the main processor 101 and the auxiliary processor 104, and the execution of the task and the backup of the data are completely separated, so that the main processor 101 concentrates the resource processing task, the task execution efficiency is improved, the operation load caused by the triggering of the backup operation by the main processor 101 can be saved, and the resource utilization rate of the main processor 101 is improved.
The above description mainly provides an exemplary description for the data backup stage of the SOC chip, and the following description continues to provide an exemplary description for the task recovery portion, where the task recovery portion has at least the following two embodiments, which are respectively described below:
the first scheme is as follows: the subtask data is restored to the data memory 103 by the sub processor 104, and the subtask data restoration task is read from the data memory 103 by the main processor 101.
Specifically, on the basis of any of the above embodiments, the main processor 101 is further configured to send a data recovery triggering instruction to the auxiliary processor 104 after the SOC chip is down and restarted;
the secondary processor 104 is further configured to restore the subtask data stored in the backup memory 105 to the data memory 103 in response to the data restoration triggering instruction;
the main processor 101 is further configured to recover the task executed before downtime according to the subtask data stored in the data storage 103.
By the embodiment, the backup and recovery work of the subtask data is performed by the auxiliary processor 104, and the main processor 101 can concentrate on executing the program task, so that the execution and recovery of the task are completely separated from the backup and recovery of the subtask data, the main processor 101 concentrates the resource processing task, the task execution efficiency is improved, the operation load caused by triggering the backup operation by the main processor 101 and reading the backup data from the backup memory 105 can be saved, and the resource utilization rate of the main processor 101 is improved.
In some modified embodiments of the embodiment of the present application, the data storage 103 is provided with a plurality of source data blocks for storing the subtask data, and the backup storage 105 is provided with a plurality of backup data blocks, where the plurality of backup data blocks are the same in number as the plurality of source data blocks and are mapped one by one;
the auxiliary processor 104 is specifically configured to, in response to the data recovery triggering instruction, detect a backup data block in the backup memory 105, where subtask data is stored, and recover the subtask data in the backup data block to a source data block corresponding to the backup data block.
In this embodiment, the data storage 103 and the backup storage 105 are divided into a plurality of data blocks, and the data blocks are used to store the subtask data, wherein the backup data blocks and the source data blocks are mapped one by one, so that the subtask data can be directly restored from the backup storage 105 to the data storage 103 according to the preset mapping relationship, which can effectively improve the recovery efficiency of the subtask data.
In some specific embodiments, the source data block and the backup data block have the same address in the respective memories but different memory identifications;
the auxiliary processor 104 is specifically configured to replace, by executing a preset memory identifier replacement instruction, a backup memory 105 identifier in second location information with a data memory 103 identifier to generate first location information, and restore the subtask data to the source data block corresponding to the backup data block according to the first location information, where the first location information is location information of the source data block storing the subtask data, and the second location information is location information of a backup data block used for backing up the subtask data.
Through the embodiment, the first position information can be conveniently and quickly determined to realize the recovery of the subtask data only by simply replacing the memory identifier, the recovery efficiency of the subtask data can be effectively improved, and the method and the device have the advantages of being simple to implement and easy to realize.
It should be noted that, for the case that the backup memory 105 is provided with multiple backup data block sets, the auxiliary processor 104 only needs to restore the subtask data in the backup data block set where the subtask data that is backed up most recently is located, and does not need to restore the data in other backup data block sets, so as to achieve the same effect as the foregoing embodiment.
It is easy to understand that multiple subtasks may be executed in parallel or in series, and for the case of serial execution, only the latest subtask data is needed when a task is recovered, and it is not necessary to use the previous subtask data, for which, in some modified embodiments of the embodiment of the present application, a subtask identifier is bound to the subtask data backed up in the backup memory 105;
the auxiliary processor 104 is further configured to, in response to the data recovery triggering instruction, send a latest backup subtask identifier corresponding to a latest backup subtask data to the main processor 101, receive an essential subtask identifier sent by the main processor 101, and select, according to the essential subtask identifier, a corresponding subtask data from the backup memory 105 to be recovered to the data memory 103, where the essential subtask identifier is a subtask identifier corresponding to the subtask data required to recover the task, which is determined according to the task progress after the main processor 101 determines a task progress before downtime according to the latest backup subtask identifier.
Through the embodiment, the auxiliary processor 104 may perform information interaction with the main processor 101 at first, so that the main processor 101 determines the task progress before downtime according to the latest backup subtask identifier, and determines subtask data necessary for recovering the task according to the task progress, so that the auxiliary processor 104 can specifically recover part of subtask data necessary for the task, and thus, the task can be recovered without recovering all subtask data, thereby effectively avoiding the invalid work of the auxiliary processor 104, improving the resource utilization rate, and improving the task recovery efficiency as a whole.
It should be noted that, the above embodiment is applicable to the case where the backup memory 105 is provided with a plurality of backup data block sets, and since the task recovery may use the subtask data generated by a plurality of subtasks before and after the task, the auxiliary processor 104 may query and recover all subtask data necessary for the recovery task in all backup data block sets, thereby effectively improving the success rate of task recovery.
In addition, since the recovery of the subtask data is implemented by the auxiliary processor 104, in some embodiments, the main processor 101 is specifically configured to trigger the task that is executed before the recovery is down according to the subtask data stored in the data memory 103 after receiving the subtask data recovery completion information sent by the auxiliary processor 104.
Through the embodiment, the auxiliary processor 104 can send subtask data recovery completion information to the main processor 101 after recovering the subtask data, and the main processor 101 triggers the recovery task after receiving the information, so that the task recovery failure caused by incomplete data due to task recovery in advance is avoided, and the task recovery success rate is improved.
The second scheme is as follows: the subtask data recovery task is read directly from the backup memory 105 by the main processor 101.
Specifically, on the basis of any of the above embodiments, the main processor 101 is further configured to detect whether sub-task data to be recovered exists in the backup memory 105 after the SOC chip is down and restarted, if so, recover the tasks executed before being down according to the sub-task data stored in the backup memory 105, and if not, read the program instructions from the program memory 102 to execute the new tasks.
By the embodiment, the main processor 101 can directly read the subtask data from the backup memory 105 and recover the task after being restarted, the implementation is simple, the task recovery efficiency is high, and after the task is recovered, the main processor 101 can be quickly put into the continuous execution of the task, so that the task execution efficiency is improved.
In some modified embodiments, the main processor 101 is further configured to control the external multimedia device to send a task recovery trigger request when detecting that there is subtask data to be recovered in the backup memory 105, and after detecting a task recovery trigger operation input by a user for the task recovery trigger request, recover a task that was executed before the downtime according to the subtask data stored in the backup memory 105, or after detecting that no task recovery trigger operation is input by the user for the task recovery trigger request or detecting a new task trigger operation input by the user, read program instructions from the program memory 102 to execute the new task.
By the aid of the method and the device, whether the recovery task is triggered or not can be determined by a user in a man-machine interaction mode, autonomous operation requirements of the user are met, and higher flexibility and freedom are achieved.
In addition, since the main processor 101 directly reads the subtask data recovery task from the backup memory 105 in the embodiment of the present application, the embodiment is particularly suitable for the case where a plurality of backup data block sets are set in the backup memory 105, so that all subtask data required by the recovery task can be searched from more and more comprehensive backup data blocks and the task recovery can be completed, and the success rate of task recovery can be effectively improved.
In the above embodiment, an SOC chip is provided, and in view of the same inventive concept, the present application further provides a data backup method for the SOC chip. The data backup method for the SOC chip provided in the embodiment of the present application can be implemented based on the SOC chip, and please refer to fig. 2, which shows a flowchart of a data backup method for the SOC chip provided in some embodiments of the present application. Since the method embodiment is basically similar to the product embodiment, the description is simple, and the relevant points can be referred to the partial description of the product embodiment. The method embodiments described below are merely illustrative.
As shown in fig. 2, a data backup method for an SOC chip may include the following steps:
step S101: the main processor executes program instructions stored in the program memory to process preset tasks and stores subtask data generated when the tasks are processed into the data memory;
step S102: and the auxiliary processor backs up the subtask data in the data memory to a backup memory in real time according to a backup instruction set, so that the tasks are recovered according to the backed-up subtask data after the main processor is down and restarted.
Wherein, in some variant embodiments, the primary processor is further connected to the secondary processor;
the method further comprises the following steps:
after the main processor stores the subtask data in the data memory, the main processor sends storage position information of the subtask data in the data memory to the auxiliary processor;
the auxiliary processor backs up the subtask data in the data memory to a backup memory in real time according to a backup instruction set, and the method comprises the following steps:
and the auxiliary processor reads the subtask data from the data memory according to the storage position information and stores the subtask data into the backup memory.
In addition to the above embodiments, in some variations, the method further comprises:
after storing the subtask data in the data memory, the main processor sends a subtask identifier corresponding to the subtask data to the auxiliary processor;
the secondary processor storing the subtask data in the backup memory, including:
and the auxiliary processor binds and stores the subtask identification and the subtask data into the backup memory.
In some modified embodiments of the present application, the data storage is provided with a plurality of source data blocks for storing the subtask data, the backup storage is provided with a plurality of backup data blocks, and the plurality of backup data blocks and the plurality of source data blocks are the same in number and are mapped one by one;
the auxiliary processor backs up the subtask data in the data memory to the backup memory in real time according to the backup instruction set, and the method comprises the following steps:
and the auxiliary processor backups the subtask data to the backup data block corresponding to the source data block according to the source data block where the subtask data is located.
On the basis of the above embodiment, in some modified embodiments, the source data block and the backup data block have the same address in their respective memories but different memory identifications,
the backup of the subtask data to the backup data block corresponding to the source data block by the auxiliary processor according to the source data block where the subtask data is located includes:
the auxiliary processor replaces a data storage identifier in the first position information with a backup storage identifier by executing a preset storage identifier replacement instruction to generate second position information, and backs up the subtask data to the backup data block corresponding to the source data block according to the second position information, wherein the first position information is position information of the source data block storing the subtask data, and the second position information is position information of the backup data block for backing up the subtask data.
In some modified embodiments of the present application, the data storage is provided with a plurality of source data blocks for storing the subtask data, the backup storage is provided with a plurality of backup data block sets, and each backup data block set includes a plurality of backup data blocks that are the same in number as the plurality of source data blocks and are mapped one by one;
the auxiliary processor backs up the subtask data in the data memory to the backup memory in real time according to the backup instruction set, and the method comprises the following steps:
and the auxiliary processor selects a target data block set from the plurality of backup data block sets according to a preset sequence, and writes the subtask data into a backup data block corresponding to the source data block where the subtask data is located in the target data block set.
In addition to the above embodiments, in some variations, the method further comprises:
and after the target data block set is fully written by the auxiliary processor, selecting a next target data block set from the plurality of backup data block sets according to a preset erasing and writing sequence, and writing the newly acquired subtask data into a backup data block corresponding to the source data block where the subtask data is located in the next target data block set.
In some variations of the embodiments of the present application, the data storage is provided with a plurality of source data blocks for storing the subtask data;
the auxiliary processor backs up the subtask data in the data memory to the backup memory in real time according to the backup instruction set, and the method comprises the following steps:
and the auxiliary processor monitors the states of the source data blocks according to the backup instruction set, and triggers to backup the newly written subtask data into the backup memory after monitoring that any source data block writes new subtask data.
The data backup method for the SOC chip provided in the embodiment of the present application has the same or corresponding beneficial effects as the SOC chip provided in the foregoing embodiment of the present application based on the same inventive concept, and is not repeated here.
In addition, the application also provides a task recovery method based on the same inventive concept. Referring to fig. 3, a flowchart of a task recovery method provided in some embodiments of the present application is shown. Since the method embodiment is basically similar to the product embodiment, the description is simple, and the relevant points can be referred to the partial description of the product embodiment. The method embodiments described below are merely illustrative.
As shown in fig. 3, a task recovery method may include the steps of:
step S201: after the SOC chip is delayed and restarted, the main processor sends a data recovery triggering instruction to the auxiliary processor;
step S202: the auxiliary processor responds to the data recovery triggering instruction and recovers the subtask data stored in the backup memory into the data memory;
step S203: and the main processor recovers the tasks executed before downtime according to the subtask data stored in the data storage.
Through the embodiment, the backup and recovery work of the subtask data is executed by the auxiliary processor, and the main processor can be dedicated to executing the program task, so that the execution and recovery of the task are completely separated from the backup and recovery of the subtask data, the main processor concentrates the resource processing task, the task execution efficiency is improved, the operation load caused by triggering the backup operation by the main processor and reading the backup data from the backup memory can be saved, and the resource utilization rate of the main processor is improved.
In some modified implementation manners of the embodiments of the present application, the data storage is provided with a plurality of source data blocks for storing the subtask data, the backup storage is provided with a plurality of backup data blocks, and the plurality of backup data blocks and the plurality of source data blocks are the same in number and are mapped one by one;
the auxiliary processor responds to the data recovery triggering instruction and recovers the subtask data stored in the backup memory into the data memory, and the method comprises the following steps:
and the auxiliary processor responds to the data recovery triggering instruction, detects a backup data block in which subtask data are stored in the backup memory, and recovers the subtask data in the backup data block to a source data block corresponding to the backup data block.
In this embodiment, the data storage and the backup storage are both divided into a plurality of data blocks, and the data blocks are used to store the subtask data, wherein the backup data blocks and the source data blocks are mapped one to one, so that the subtask data can be directly restored from the backup storage to the data storage according to a preset mapping relationship, thereby effectively improving the restoration efficiency of the subtask data, and the source data blocks and the backup data blocks are mapped one to one, thereby realizing the corresponding restoration of the subtask data and improving the task restoration efficiency.
On the basis of the above embodiment, in some modified embodiments, the source data block and the backup data block have the same address in the respective memories but different memory identifications,
the restoring, by the auxiliary processor, the subtask data in the backup data block to the source data block corresponding to the backup data block includes:
the auxiliary processor replaces a backup memory identifier in second position information with a data memory identifier by executing a preset memory identifier replacement instruction to generate first position information, and restores the subtask data to the source data block corresponding to the backup data block according to the first position information, wherein the first position information is position information of the source data block storing the subtask data, and the second position information is position information of the backup data block for backing up the subtask data.
Through the embodiment, the first position information can be conveniently and quickly determined to realize the recovery of the subtask data only by simply replacing the memory identifier, the recovery efficiency of the subtask data can be effectively improved, and the method and the device have the advantages of being simple to implement and easy to realize.
It should be noted that, for the situation that the backup memory is provided with a plurality of backup data block sets, the auxiliary processor only needs to restore the subtask data in the backup data block set where the latest backup subtask data is located, and does not need to restore the data in other backup data block sets, so that the same effect as the foregoing embodiment can be achieved.
It is easy to understand that multiple subtasks may be executed in parallel or in series, and for the case of serial execution, only the latest subtask data is needed when a task is recovered, and it is not necessary to use the previous subtask data, for which, in some modified embodiments of the embodiment of the present application, a subtask identifier is bound to the subtask data backed up in the backup memory;
the auxiliary processor responds to the data recovery triggering instruction and recovers the subtask data stored in the backup memory into the data memory, and the method comprises the following steps:
the auxiliary processor responds to the data recovery triggering instruction and sends a latest backup subtask identifier corresponding to the latest backup subtask data to the main processor;
and the auxiliary processor receives an essential subtask identifier sent by the main processor, and selects corresponding subtask data from the backup memory to be restored to the data memory according to the essential subtask identifier, wherein the essential subtask identifier is the subtask identifier corresponding to the subtask data required by the task to be restored, which is determined according to the task progress after the main processor determines the task progress before the downtime according to the latest backup subtask identifier.
Through the embodiment, the auxiliary processor can firstly perform information interaction with the main processor, so that the main processor judges the task progress before downtime according to the latest backup subtask identifier, and determines subtask data necessary for recovering the task according to the task progress, so that the auxiliary processor can pertinently recover the necessary part of subtask data, and thus, the task can be recovered without recovering all subtask data, the invalid work of the auxiliary processor can be effectively avoided, the resource utilization rate is improved, and the task recovery efficiency is integrally improved.
It should be noted that, the foregoing embodiment is applicable to the case where the backup memory is provided with a plurality of backup data block sets, and since the task recovery may use the subtask data generated by a plurality of subtasks before and after the task, the auxiliary processor may query and recover all subtask data necessary for the recovery task in all backup data block sets, thereby effectively improving the success rate of task recovery.
In addition, since the recovery of the subtask data is implemented by the auxiliary processor, in some modified implementation manners of the embodiment of the present application, the recovering, by the main processor, the tasks executed before the downtime according to the subtask data stored in the data storage includes:
and after receiving the subtask data recovery completion information sent by the auxiliary processor, the main processor triggers the task executed before the downtime is recovered according to the subtask data stored in the data storage.
Through the embodiment, the auxiliary processor can send subtask data recovery completion information to the main processor after recovering the subtask data, and the main processor triggers the recovery task after receiving the information, so that the failure of task recovery caused by incomplete data due to the fact that the task is recovered in advance is avoided, and the task recovery success rate is improved.
The task recovery method provided by the embodiment of the present application and the SOC chip provided by the foregoing embodiment of the present application have the same or corresponding beneficial effects, and are not described herein again.
In addition, the application also provides another task recovery method based on the same inventive concept. Referring to fig. 4, a flowchart of another task recovery method provided in some embodiments of the present application is shown. Since the method embodiment is basically similar to the product embodiment, the description is simple, and the relevant points can be referred to the partial description of the product embodiment. The method embodiments described below are merely illustrative.
As shown in fig. 4, a task recovery method may include the following steps:
step S301: after the SOC chip is delayed and restarted, the main processor detects whether subtask data to be recovered exist in the backup memory or not;
step S302: if yes, the main processor restores the tasks executed before the downtime according to the subtask data stored in the backup memory;
step S303: if not, the main processor reads the program instructions from the program memory to execute the new task.
Through the embodiment, the main processor can directly read the subtask data from the backup memory and recover the task after being restarted, the implementation is simple, the task recovery efficiency is high, and the main processor can be quickly put into the continuous execution of the task after the task is recovered, so that the task execution efficiency is improved.
In some modified embodiments, if the task exists, the step S302 of restoring the task executed before the downtime according to the subtask data stored in the backup memory includes:
if yes, controlling the external multimedia equipment to send a task recovery triggering request;
after detecting the task recovery triggering operation input by the user aiming at the task recovery triggering request, recovering the tasks executed before the downtime according to the subtask data stored in the backup memory;
and after the task recovery triggering operation input by the user aiming at the task recovery triggering request is not detected or the new task triggering operation input by the user is detected, reading the program instruction from the program memory to execute the new task.
By the aid of the method, whether the recovery task is triggered or not can be determined by a user in a man-machine interaction mode, autonomous operation requirements of the user are met, and higher flexibility and freedom are obtained.
In addition, because the main processor directly reads the subtask data from the backup memory to recover the task, the embodiment of the application is particularly suitable for the situation that a plurality of backup data block sets are arranged in the backup memory, so that all subtask data required by the recovery task can be searched from more and more comprehensive backup data blocks and the task recovery can be completed, and the success rate of task recovery can be effectively improved.
The task recovery method provided by the embodiment of the present application and the SOC chip provided by the foregoing embodiment of the present application have the same or corresponding beneficial effects, and are not described herein again.
The present embodiment also provides an electronic device corresponding to the SOC chip provided in any of the foregoing embodiments, where the SOC chip provided in any of the foregoing embodiments is configured in the electronic device, and the data backup method and the task recovery method provided in any of the foregoing embodiments can be executed.
The electronic device provided by the embodiment of the present application and the SOC chip provided by the foregoing embodiment of the present application have the same or corresponding advantages based on the same inventive concept, and are not described herein again.
It should be noted that the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It can be clearly understood by those skilled in the art that, for convenience and simplicity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, and various media capable of storing program codes.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present disclosure, and the present disclosure should be construed as being covered by the claims and the specification.
Claims (8)
1. An SOC chip, comprising: the system comprises a main processor, a nonvolatile program memory, a volatile data memory, an auxiliary processor and a nonvolatile backup memory;
the main processor is connected with the program memory and the data memory respectively and is used for executing program instructions stored in the program memory to process preset tasks and storing subtask data generated during processing the tasks into the data memory;
the auxiliary processor is connected with the data memory and the backup memory respectively, and a backup instruction set is preset in the auxiliary processor and used for backing up the subtask data in the data memory into the backup memory in real time according to the backup instruction set, so that the main processor can restore the tasks according to the backed-up subtask data after the SOC chip is down and restarted;
wherein, the auxiliary processor backups the subtask data in the data memory to the backup memory in real time, including: the auxiliary processor reads the subtask data from the data memory and stores the subtask data into the backup memory;
the data storage is provided with a plurality of source data blocks for storing the subtask data, the backup storage is provided with a plurality of backup data blocks, the plurality of backup data blocks and the plurality of source data blocks are same in number and are mapped one by one, and the source data blocks and the backup data blocks have the same addresses in the respective storages but different storage identifications;
the auxiliary processor is specifically configured to replace a data storage identifier in the first location information with a backup storage identifier by executing a preset storage identifier replacement instruction to generate second location information, and backup the subtask data to the backup data block corresponding to the source data block according to the second location information, where the first location information is location information of the source data block where the subtask data is stored, and the second location information is location information of the backup data block used for backing up the subtask data.
2. The SOC chip of claim 1, wherein the main processor is further connected to the auxiliary processor;
the main processor is further used for sending storage position information of the subtask data in the data memory to the auxiliary processor after the subtask data is stored in the data memory;
the auxiliary processor is specifically configured to read the subtask data from the data storage according to the storage location information, and store the subtask data in the backup storage.
3. The SOC chip of claim 2, wherein the main processor is further configured to send a subtask identifier corresponding to the subtask data to the auxiliary processor after the subtask data is stored in the data storage;
the auxiliary processor is specifically configured to store the subtask identifier and the subtask data in a bound manner in the backup memory.
4. The SOC chip of claim 1, wherein the data storage is configured with a plurality of source data blocks for storing the subtask data, the backup storage is configured with a plurality of backup data block sets, each backup data block set comprises a plurality of backup data blocks which are the same in number as the plurality of source data blocks and are mapped one by one;
the auxiliary processor is specifically configured to select a target data block set from the multiple backup data block sets according to a preset sequence, and write the subtask data into a backup data block, corresponding to a source data block where the subtask data is located, in the target data block set.
5. The SOC chip of claim 4, wherein the auxiliary processor is further configured to select a next target data block set from the multiple backup data block sets according to a preset erasure order after the target data block set is fully written, and write newly acquired subtask data into a backup data block corresponding to a source data block in which the subtask data is located in the next target data block set.
6. The SOC chip of claim 1, wherein the data memory is provided with a plurality of source data blocks for storing the subtask data;
the auxiliary processor is specifically configured to monitor states of the plurality of source data blocks according to the backup instruction set, and trigger to backup the newly written subtask data to the backup memory after it is monitored that new subtask data is written in any one of the source data blocks.
7. A data backup method for an SOC chip, for use in the SOC chip of any one of claims 1 to 6, the method comprising:
the main processor executes program instructions stored in the program memory to process preset tasks and stores subtask data generated when the tasks are processed into the data memory;
the auxiliary processor backs up the subtask data in the data memory to a backup memory in real time according to a backup instruction set, so that the main processor can restore the tasks according to the backed-up subtask data after the SOC chip is down and restarted;
wherein, the auxiliary processor backups the subtask data in the data memory to the backup memory in real time, including: and the auxiliary processor reads the subtask data from the data memory and stores the subtask data into the backup memory.
8. An electronic device, characterized in that the electronic device is provided with the SOC chip of any one of claims 1 to 6.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101499028A (en) * | 2009-03-18 | 2009-08-05 | 成都市华为赛门铁克科技有限公司 | Data protection method and apparatus based on non-volatile memory |
| CN101777013A (en) * | 2009-01-12 | 2010-07-14 | 成都市华为赛门铁克科技有限公司 | Solid state disk and data read-write method |
| CN207380246U (en) * | 2017-09-26 | 2018-05-18 | 四川车联互通信息技术有限公司 | Hand-held gis data management system |
| CN111276720A (en) * | 2018-12-05 | 2020-06-12 | 武汉众宇动力系统科技有限公司 | Fuel cell control device and failure processing method thereof |
| CN114328027A (en) * | 2021-12-31 | 2022-04-12 | 重庆电子工程职业学院 | Internet of vehicles safety control backup system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2505185A (en) * | 2012-08-21 | 2014-02-26 | Ibm | Creating a backup image of a first memory space in a second memory space. |
| CN114261355B (en) * | 2021-12-31 | 2023-05-16 | 重庆电子工程职业学院 | Automobile central control safety control system |
-
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101777013A (en) * | 2009-01-12 | 2010-07-14 | 成都市华为赛门铁克科技有限公司 | Solid state disk and data read-write method |
| CN101499028A (en) * | 2009-03-18 | 2009-08-05 | 成都市华为赛门铁克科技有限公司 | Data protection method and apparatus based on non-volatile memory |
| CN207380246U (en) * | 2017-09-26 | 2018-05-18 | 四川车联互通信息技术有限公司 | Hand-held gis data management system |
| CN111276720A (en) * | 2018-12-05 | 2020-06-12 | 武汉众宇动力系统科技有限公司 | Fuel cell control device and failure processing method thereof |
| CN114328027A (en) * | 2021-12-31 | 2022-04-12 | 重庆电子工程职业学院 | Internet of vehicles safety control backup system |
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