CN114710118A - Hidden attractor generating circuit with direct-current bias voltage - Google Patents
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- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
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Abstract
The invention relates to the technical field of electronic information, in particular to a hidden attractor generating circuit with direct-current bias voltage, which comprises the direct-current bias voltage and a memristive Chua's circuit, wherein the direct-current bias voltage is electrically connected with the memristive Chua's circuit to obtain the direct-current voltage bias memristive Chua's circuit for generating hidden dynamics, and the memristive Chua's circuit comprises: memristor equivalent circuit, resistor R and capacitor C1Capacitor C2And an inductance L. Based on the existing chaotic oscillating circuit, the invention reasonably applies direct current bias voltage to obtain the physical oscillating circuit with hidden dynamics.
Description
Technical Field
The invention relates to the technical field of electronic information, in particular to a hidden attractor generating circuit with direct-current bias voltage.
Background
The hidden attractor is a special kinetic that is of great interest in mathematical, physical and engineering applications. Unlike self-excited attractors, the suction basin of a hidden attractor is far from the neighborhood of stable and unstable equilibrium points and is difficult to identify and locate by a standard calculation program. The identification, localization, control and application of hidden kinetic behaviors becomes a key issue worthy of intensive research. The Chua's circuit is considered as an example of generating and studying chaos due to its simple circuit structure and physical feasibility. In early 2010, Leonov and Kuznetsov found hidden chaotic attractors in zeiss circuits based on piecewise non-linear zeiss diodes and smooth non-linear zeiss diodes. Then, researchers have proposed a variety of zeiss circuits that can generate hidden attractors by adjusting the piecewise linear slope of the zeiss diode, designing a multi-segment piecewise linear zeiss diode, and the like. The circuits generally adopt Zea diodes with special piecewise nonlinear characteristics, and the design and the circuit implementation of the circuits have certain complexity. In order to simplify the acquisition path of the hidden attractor in the physical circuit, the invention provides a nonlinear circuit design method for generating the hidden attractor by using a direct-current bias voltage, and a non-ideal Chua's memristor circuit is taken as an example to illustrate the implementation method and the effectiveness.
Disclosure of Invention
Aiming at the defects of the existing algorithm, the invention reasonably applies direct current bias voltage based on the existing chaotic oscillating circuit to obtain the physical oscillating circuit with hidden dynamics.
The technical scheme adopted by the invention is as follows: a hidden attractor generating circuit with a dc bias voltage, comprising: the direct-current bias voltage and the memristive Chua's circuit are electrically connected, and the direct-current bias voltage which generates the hidden attractor biases the memristive Chua's circuit is obtained.
The memristive Chua's circuit comprises: memristor equivalent circuit, resistor R and capacitor C1Capacitor C2And an inductor L, wherein the anode of the DC bias voltage is connected with the inductor L, and the other end of the inductor L is connected with a capacitor C2The positive electrode of (1) is connected; the two ends of the resistor R are connected with C2And C1The input end of the memristor equivalent circuit is connected with C1The positive electrode of (1); c1、C2The negative pole of the direct current bias voltage is grounded;
the memristor equivalent circuit is a memristor simulator M;
the circuit has 4 dynamic elements, each of which is a capacitor C1Capacitor C2The three corresponding state variables are voltage v at two ends of a capacitor1、v2、v0Current i flowing through inductor L3。
The invention has the beneficial effects that:
the method has the advantages that a direct-current voltage bias method which is easy to implement is provided, and a direct-current voltage bias memristor Chua's circuit with hidden dynamics is successfully constructed; when the circuit does not introduce direct-current bias voltage, the circuit has three unstable balance points, and a symmetrical double-vortex-shaped attractor can be formed; with the addition of the direct current bias voltage, three unstable balance points of the circuit become asymmetric, and two external unstable balance points gradually evolve into stable balance points, so that self-excitation and a coexisting attractor are generated; when the dc bias voltage is large enough, the circuit has only one stable equilibrium point, resulting in the generation of a hidden co-existing attractor.
Drawings
FIG. 1 is a direct current voltage bias memristor Chua's circuit diagram of the present invention;
FIG. 2 is an ideal memristive equivalent circuit schematic;
FIG. 3 is the distribution and stability of the equilibrium point under the DC bias voltage;
fig. 4 is a diagram of coexisting attractor trajectories obtained by numerical simulation, where e is 0.38, and initial state values are (-2.2,0.38, -2.5,1.1), (0.5,0.38,0.5,0), (0.01,0,0,0), and (0.01,0,5,0), respectively;
fig. 5 is a graph of a point attraction and coexisting hidden attractor trajectory obtained by numerical simulation when e is 0.42 and the initial state values are (0.01,0,2,0), (0.01,0,5,0), (0.01,0, 0), respectively;
fig. 6 is a diagram of the coexisting attractor phase trajectory obtained by circuit simulation, where (a) E is 0.381V, and initial state values are (-2.2V,0.38V, -1.25mA,1.1V), (0.5V,0.38V,0.25mA,0V), (0.01V, 0mA,0V), and (0.01V,0V,2.5mA,0V), respectively; (b) the coexistent attractor trajectory diagram when E is 0.422V and the initial state values are (0.01V,0V,1mA,0V), (0.01V,0V,2.5mA,0V), (0.01V, 0mA,0V), respectively.
Detailed Description
The invention will be further described with reference to the accompanying drawings and examples, which are simplified schematic drawings and illustrate only the basic structure of the invention in a schematic manner, and therefore only show the structures relevant to the invention.
As shown in fig. 1 and 2, a hidden attractor generating circuit with dc bias voltage includes: the device comprises a direct-current bias voltage and a memristive Chua's circuit, wherein the direct-current bias voltage is electrically connected with the memristive Chua's circuit to obtain the direct-current voltage bias memristive Chua's circuit generating hidden dynamics.
The memristive Chua's circuit comprises: memristor simulator M, resistor R and capacitor C1Capacitor C2And an inductor L, wherein the anode of the DC bias voltage is connected with the inductor L, and the other end of the inductor L is connected with a capacitor C2The positive electrode of (1) is connected; the two ends of the resistor R are connected with C2And C1The input end of the memristor M is connected with C1The positive electrode of (1); c1、C2And the negative pole of the direct current bias voltage is grounded.
The circuit of the invention has 4 dynamic elements, each of which is a capacitor C1Capacitor C2The memory resistance simulator M and the inductor L, and the corresponding three state variables are a capacitor C1、C2And C0Voltage v across1、v2And v0And a current i flowing through the inductor3. The mathematical model derivation of this circuit is:
in the formula (1), E is a DC bias voltage appearing in an inductor current i3In the third differential equation of (a), v1Is a capacitor C1Voltage across, v2Is a capacitor C2Voltage across, v0For recalling comparator U in resistance simulator M2Output voltage of i3Is the current, g, flowing through the inductor L1,g2Respectively as multipliers M in memristive simulators M1And M2Gain of R1，R2，R3For recalling resistance in the resistive simulator M；
The circuit element parameters of the invention are as follows: 16mH, 2k omega, C1＝6.8nF，C2＝68nF，R1＝10kΩ，C0＝1nF，R2＝5kΩ，R3＝1.5kΩ，R4＝R52k Ω; multiplier M in memristor simulator1And M2Respectively is g1＝1,g2＝0.1。
Setting a reference voltage Vr to 1V, and introducing four new state variables
x＝v1/Vr,y＝v2/Vr,z＝Ri3/Vr,u＝v0/Vr, (2a)
And normalizing the circuit parameters
The dimensionless equation of state of the circuit is obtained as follows:
the corresponding normalized system parameters are calculated as:
the equilibrium point S of the system (3) is:
the x-axis coordinate ζ of the equilibrium point in equation (5) satisfies ζ from the system parameter calculated in equation (4)3-10 ζ -30e ═ 0; therefore, the balance point of the circuit shown in fig. 1 corresponding to the normalization system (3) and the stability thereof continuously evolve with the change of the normalization direct current bias voltage e; when e varies from-0.8 to 0.8,the position and stability evolution characteristics of the balance point are shown in fig. 3; the result indicates that when | e<0.4057, the circuit has 3 asymmetric balance points, and the peripheral index 2 saddle focus balance point gradually evolves into stable coking balance point, which can generate the dynamic behavior of self-excitation and hidden attractor coexistence; when | e | ═ 0.4057, the circuit has 2 asymmetric balance points. With further increase of DC bias voltage, | e>0.4057, the circuit has only 1 stable coking equilibrium point, and can generate the dynamic behavior of the coexistence of a plurality of hidden attractors.
Numerical simulation diagram and circuit experiment diagram
Numerical simulation: carrying out numerical simulation analysis on a normalization system (3) of the direct-current voltage bias memristor Chua circuit by using an MATLAB simulation software platform; selecting a Runge Kutta (ODE45) algorithm to solve the system equation;
the DC bias voltage e is selected to be 0.38, and the system only has an exponential 2 saddle focus balance point S2An index of 1 saddle focus balance point S0And a stable coking equilibrium point S1(ii) a Setting initial conditions to (-2.2,0.38, -2.5,1.1), (0.5,0.38,0.5,0), (0.01,0,0,0) and (0.01,0,5,0), the circuit can generate a self-excited left chaotic attractor (SE-LCA), a stable Point Attractor (PA), a self-excited right multi-cycle attractor (SE-RMA) and a hidden periodic attractor (H-LP 1); the phase trajectory of the projection of these coexisting attractors onto the x-y plane is shown in FIG. 4 (a); the suction basin profiles through the three equilibrium points are shown in fig. 4(b), 4(c) and 4(d), respectively; the self-excitation and hiding characteristics of the coexisting attractor are verified by the position relation of the attractor and the balance point; the result shows that the circuit can generate the dynamic behavior of coexistence of the self-excitation attractor and the hidden attractor when the e is 0.38.
The DC bias voltage e is selected to be 0.42, and the system only has one stable coking balance point S1At this time, the period or chaotic attractor generated by the circuit is a hidden attractor; setting the initial conditions to (0.01,0,2,0), (0.01,0,5,0) and (0.01,0,0,0), the circuit can generate a stable Point Attractor (PA), a hidden right multi-period attractor (H-RMA) and a hidden period attractor (H-LP 1); these coexistThe phase trajectory of the attractor projected in the x-y plane is shown in FIG. 5; the result shows that the circuit can generate the coexisting hidden dynamic behavior when the e is 0.42.
Circuit simulation:
considering that a hidden attractor is extremely sensitive to an initial value, the design adopts Multisim 12.0 to complete the circuit construction and simulation operation work, the discrete devices adopt AD711JN operational amplifiers and AD633JN multipliers with the power supply voltage of +/-15V working voltage, and the discrete elements adopt resistors and capacitors; the graphs of the coexisting multi-attractor trajectories when E is 0.381V and E is 0.422V are obtained by simulation as shown in fig. 6(a) and 6(b), respectively; when circuit simulation is carried out, parameters during circuit simulation need to be finely adjusted in order to obtain a result matched with the numerical simulation due to the problem of parameter difference between a circuit simulation platform and a numerical simulation platform; specifically, the inductance L is adjusted from 16mH to 16.2mH, the bias voltage E is adjusted to 0.381V and 0.422V, and the normalized bias voltage parameter E is respectively equal to 0.38 and 0.42 when the numerical value is simulated; meanwhile, it is noted that according to the formula (2a), the state initial values of the circuit system model (1) and the dimensionless system (3) have the following conversion relationship
Comparing the results of fig. 4(a), fig. 5 and fig. 6, it can be found that the circuit simulation result is basically consistent with the numerical simulation result, and the correctness of the theoretical analysis and the numerical analysis can be verified;
therefore, the nonlinear circuit design method for generating the hidden attractor by using the direct-current bias voltage provides an effective way for the generation of the hidden dynamics, and has a positive promoting effect on the deep research of the hidden dynamics.
In light of the foregoing description of the preferred embodiment of the present invention, many modifications and variations will be apparent to those skilled in the art without departing from the spirit and scope of the invention. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.
Claims (5)
1. A hidden attractor generating circuit with a dc bias voltage, comprising: the direct-current bias voltage and the memristive Chua's circuit are electrically connected, and the direct-current bias voltage which generates the hidden attractor biases the memristive Chua's circuit is obtained.
2. The hidden attractor generating circuit with dc bias voltage of claim 1, wherein the memristive chua circuit comprises: memristor equivalent circuit, resistor R and capacitor C1Capacitor C2And an inductor L, wherein the anode of the DC bias voltage is connected with the inductor L, and the other end of the inductor L is connected with a capacitor C2The positive electrode of (1) is connected; the two ends of the resistor R are connected with C2And C1The input end of the memristor equivalent circuit is connected with C1The positive electrode of (1); c1、C2And the negative pole of the direct current bias voltage is grounded.
3. The hidden attractor generating circuit with the direct-current bias voltage as claimed in claim 1, wherein a circuit equation of the direct-current bias memristive Chua's circuit is as follows:
wherein E is DC bias voltage v1Is a capacitor C1Voltage across, v2Is a capacitor C2Voltage across, v0For recalling comparator U in resistance simulator M2Output voltage of i3Is the current, g, flowing through the inductor L1,g2Respectively as multipliers M in memristive simulators M1And M2Gain of R1，R2，R3Is the resistance in the memristive simulator M.
4. The hidden attractor generating circuit with the direct-current bias voltage as claimed in claim 3, wherein the dimensionless state equation of the direct-current bias memristive Chua's circuit is:
wherein a, b, c, alpha, beta and e are control parameters of a dimensionless state equation, x, y, z and u are state variables,
is the derivative of the x, y, z, u state variables over time τ.
5. The hidden attractor generating circuit with DC bias voltage of claim 4, the balance point S of the dimensionless equation of state being:
zeta is the x-axis coordinate of the balance point, and c and d are circuit equation parameters.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103684264A (en) * | 2013-11-14 | 2014-03-26 | 常州大学 | Switchable chaotic signal source by memristor circuit and nonlinear circuit |
| CN106921344A (en) * | 2017-04-26 | 2017-07-04 | 常州大学 | A kind of self-oscillation chaos system based on broad sense memristor |
| CN110826294A (en) * | 2019-11-11 | 2020-02-21 | 常州大学 | Super multi-stability reconstruction method of memristor circuit based on Wakuse domain |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103684264A (en) * | 2013-11-14 | 2014-03-26 | 常州大学 | Switchable chaotic signal source by memristor circuit and nonlinear circuit |
| CN106921344A (en) * | 2017-04-26 | 2017-07-04 | 常州大学 | A kind of self-oscillation chaos system based on broad sense memristor |
| CN110826294A (en) * | 2019-11-11 | 2020-02-21 | 常州大学 | Super multi-stability reconstruction method of memristor circuit based on Wakuse domain |
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