CN114699091A - Electroencephalogram detection device, impedance detection method, and storage medium - Google Patents

Electroencephalogram detection device, impedance detection method, and storage medium Download PDF

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CN114699091A
CN114699091A CN202210359884.4A CN202210359884A CN114699091A CN 114699091 A CN114699091 A CN 114699091A CN 202210359884 A CN202210359884 A CN 202210359884A CN 114699091 A CN114699091 A CN 114699091A
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electroencephalogram
impedance
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processing unit
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张明哲
赵志勇
熊飞
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Shenzhen Delica Medical Equipment Co ltd
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    • A61B5/053—Measuring electrical impedance or conductance of a portion of the body
    • A61B5/0531—Measuring skin impedance
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
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    • A61B5/25—Bioelectric electrodes therefor
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    • A61B5/291—Bioelectric electrodes therefor specially adapted for particular uses for electroencephalography [EEG]
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    • A61B5/30—Input circuits therefor
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    • A61B5/30—Input circuits therefor
    • A61B5/307—Input circuits therefor specially adapted for particular uses
    • A61B5/31—Input circuits therefor specially adapted for particular uses for electroencephalography [EEG]
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    • A61B5/7225—Details of analog processing, e.g. isolation amplifier, gain or sensitivity adjustment, filtering, baseline or drift compensation
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    • A61B5/7235—Details of waveform analysis
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Abstract

The invention discloses an electroencephalogram detection device, an impedance detection method and a storage medium, wherein the electroencephalogram detection device comprises an impedance network, a switch circuit unit, an analog processing unit, an analog-to-digital conversion unit and a digital processing unit; the signal output end of the impedance network is electrically connected with the signal input end of the analog processing unit, the driven end of the impedance network is electrically connected with the driving end of the analog processing unit, the signal output end of the analog processing unit is electrically connected with the signal input end of the analog-to-digital conversion unit, the signal output end of the analog-to-digital conversion unit is connected with the signal input end of the digital processing unit, the switching circuit unit is connected between the signal output end of the impedance network and the signal input end of the analog processing unit in series, and the controlled end of the switching circuit unit is electrically connected with the control end of the digital processing unit. The method and the device can ensure that the result of the acquisition and processing of the electroencephalogram signals is stable and reliable.

Description

Electroencephalogram detection device, impedance detection method, and storage medium
Technical Field
The invention relates to an electroencephalogram detection device for detecting electroencephalogram signals in the medical field, in particular to an electroencephalogram detection device, an impedance detection method and a storage medium.
Background
The living body tissue cells always produce very weak bioelectricity, the brain electrical signal is the general effect of the electrical activity of a large number of brain nerve cells on the cerebral cortex in a highly coherent state, the electrical activity of the brain cells is led out by using electrodes arranged on the scalp and is analyzed and recorded after being amplified by brain electrical detection equipment, and the brain electrical signal contains certain waveforms, amplitudes, frequencies and phases and is changed, namely electroencephalogram analysis. When the brain tissue is functionally changed, the wave curve is correspondingly changed, thereby providing a basis for clinical diagnosis and treatment.
Because the electroencephalogram signal is very weak, the quality of the electroencephalogram signal is inevitably influenced by artifacts and noise caused by various external factors in the measurement process. Interference and power frequency interference caused by poor contact between the electrode and the scalp and amplified channel noise are three interference sources with the largest influence in electroencephalogram detection. Some traditional electroencephalogram detection equipment does not have the function of monitoring the electrode connection condition, and other traditional electroencephalogram detection equipment can only partially measure the lead electrode connection condition, and cannot measure all lead electrode connections.
Disclosure of Invention
The invention provides an electroencephalogram detection device, an impedance detection method and a storage medium, and aims to solve the technical problem that the processing result of an electroencephalogram signal is unstable.
In order to achieve the purpose, the invention provides an electroencephalogram detection device which comprises an impedance network, a switch circuit unit, an analog processing unit, an analog-to-digital conversion unit and a digital processing unit; the signal output end of the impedance network is electrically connected with the signal input end of the analog processing unit, the driven end of the impedance network is electrically connected with the driving end of the analog processing unit, the signal output end of the analog processing unit is electrically connected with the signal input end of the analog-to-digital conversion unit, the signal output end of the analog-to-digital conversion unit is connected with the signal input end of the digital processing unit, the switch circuit unit is connected between the signal output end of the impedance network and the signal input end of the analog processing unit in series, and the controlled end of the switch circuit unit is electrically connected with the control end of the digital processing unit.
Furthermore, the electroencephalogram detection device further comprises an auxiliary circuit unit, and the auxiliary circuit unit is connected between the impedance network and the switch circuit unit in series.
Optionally, the electroencephalogram detection device further comprises a power supply module, wherein the power supply module comprises a positive power supply and a first resistor; the positive power supply is a constant current source, the constant current source is connected with the switch circuit unit, one end of the first resistor is connected with the switch circuit unit, and the other end of the first resistor is grounded.
Further, the digital processing unit includes:
the switch control subunit is electrically connected with the controlled end of the switch circuit unit;
the impedance detection subunit is electrically connected with the signal output end of the analog-to-digital conversion unit and comprises a test signal filter and an impedance calculator which are mutually connected;
and the electroencephalogram signal processing subunit is electrically connected with the signal output end of the analog-to-digital conversion unit and comprises an electroencephalogram signal filter and an electroencephalogram signal processor which are mutually connected.
Specifically, the analog processing unit includes a filtering amplifying circuit and a driving circuit, a signal input end of the filtering amplifying circuit is connected with a signal input end of the impedance network, a signal output end of the filtering amplifying circuit is connected with a signal input end of the analog-to-digital conversion unit, and a driving end of the driving circuit is connected with a driven end of the impedance network.
Specifically, the impedance network comprises at least two electroencephalogram signal testing electrodes, an impedance testing auxiliary electrode and a driving auxiliary electrode, the electroencephalogram signal testing electrodes are respectively connected with the signal input end of the filtering amplification circuit, the impedance testing auxiliary electrode is connected with the signal input end of the filtering amplification circuit, and the driving auxiliary electrode is connected with the driving end of the driving circuit.
Furthermore, the switch circuit unit comprises at least two groups of signal test switches and first switches, the signal test switches correspond to the electroencephalogram signal test electrodes one to one, the signal test switches comprise first signal test switches and second signal test switches, one end of each first signal test switch is connected with the signal output end of the electroencephalogram signal test electrode, the signal input end of the filtering and amplifying circuit and the node of the second signal test switch, and the other end of each first signal test switch is connected with the positive power supply; one end of the second signal test switch is connected with the signal output end of the electroencephalogram signal test electrode, the signal input end of the filtering amplification circuit and a node of the first signal test switch, the other end of the second signal test switch is connected with the nodes of the driving end of the driving circuit and the driven end of the impedance network, one end of the first switch is connected with the first resistor, and the other end of the first switch is connected with the signal input end of the filtering amplification circuit.
In order to achieve the above object, the present application further provides an impedance detection method for an electroencephalogram detection device, where the impedance detection method for an electroencephalogram detection device includes:
acquiring a control instruction, and selecting a working mode of the electroencephalogram detection device according to the control instruction;
if the electroencephalogram acquisition mode is selected, acquiring electroencephalogram signals, and generating an electroencephalogram signal processing result according to the electroencephalogram signals;
if the impedance detection mode is selected, a power supply test signal is obtained, an impedance detection signal is generated according to the power supply test signal, and theoretical contact impedance is obtained based on the impedance detection signal.
Optionally, acquiring a current amplitude and a circuit amplification gain of the positive power supply;
acquiring a first resistance value of a first resistor;
and calculating theoretical contact impedance according to the voltage amplitude, the first resistance value, the circuit amplification gain and the impedance detection signal.
In order to achieve the above object, the present application further provides a storage medium, in which an impedance detection program of an electroencephalogram detection device is stored, and the impedance detection program of the electroencephalogram detection device is executed by a processor to implement the electroencephalogram detection device.
In the application, the electroencephalogram detection device is provided, and the electroencephalogram detection device comprises the impedance network, the switch circuit unit, the analog processing unit, the analog-to-digital conversion unit and the digital processing unit which are connected with one another, so that the electroencephalogram signal can be processed through the electroencephalogram detection device, and the internal impedance of the device can be detected, and therefore the electroencephalogram signal can be acquired and processed stably and reliably.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic block diagram of an electroencephalogram detection device according to an embodiment of the present invention;
FIG. 2 is a schematic block diagram of an electroencephalogram detection device according to another embodiment of the present invention;
FIG. 3 is a schematic block diagram of an electroencephalogram detection apparatus according to yet another embodiment of the present invention;
FIG. 4 is a schematic block diagram of an electroencephalogram detection device according to yet another embodiment of the present invention;
FIG. 5 is a flowchart of an impedance detection method of the electroencephalogram detection apparatus according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of an electroencephalogram detection device according to an embodiment of the present invention.
The reference numbers illustrate:
Figure BDA0003584595800000041
the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are only for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "connected," "secured," and the like are to be construed broadly, and for example, "secured" may be a fixed connection, a removable connection, or an integral part; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In addition, the technical solutions in the embodiments of the present invention may be combined with each other, but it must be based on the realization of the technical solutions by those skilled in the art, and when the technical solutions are contradictory to each other or cannot be realized, such a combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
Various embodiments of the method of the present invention are presented in terms of the above-described hardware architecture.
The living body tissue cells always produce very weak bioelectricity, the brain electrical signal is the general effect of the electrical activity of a large number of brain nerve cells on the cerebral cortex in a highly coherent state, the electrical activity of the brain cells is led out by using electrodes arranged on the scalp and is analyzed and recorded after being amplified by brain electrical detection equipment, and the brain electrical signal contains certain waveform, amplitude, frequency and phase and is changed, namely, electroencephalogram analysis. When the brain tissue is functionally changed, the wave curve is correspondingly changed, thereby providing a basis for clinical diagnosis and treatment.
Because the electroencephalogram signal is very weak, the quality of the electroencephalogram signal is inevitably influenced by artifacts and noise caused by various external factors in the measurement process. Interference and power frequency interference caused by poor contact between the electrode and the scalp and amplified channel noise are three interference sources with the largest influence in electroencephalogram detection. Some traditional electroencephalogram detection equipment does not have the function of monitoring the electrode connection condition, and other traditional electroencephalogram detection equipment can only partially measure the lead electrode connection condition, and cannot measure all lead electrode connections.
In order to solve the above problem, the present application provides an electroencephalogram detection apparatus, and referring to fig. 2, in a first embodiment of the electroencephalogram detection apparatus of the present invention, the electroencephalogram detection apparatus includes: the device comprises an impedance network 1, a switch circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4 and a digital processing unit 5; the signal output end of the impedance network 1 is electrically connected with the signal input end of the analog processing unit 3, the driven end of the impedance network 1 is electrically connected with the driving end of the analog processing unit 3, the signal output end of the analog processing unit is electrically connected with the signal input end of the analog-to-digital conversion unit 4, the signal output end of the analog-to-digital conversion unit 4 is connected with the signal input end of the digital processing unit 5, the switch circuit unit 2 is connected in series between the signal output end of the impedance network 1 and the signal input end of the analog processing unit 3, and the controlled end of the switch circuit unit 2 is electrically connected with the control end of the digital processing unit 5.
In this embodiment, the electroencephalogram detection device includes: an impedance network 1, a switching circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4, and a digital processing unit 5. The impedance network 1 comprises at least four lead electrodes and is used for being placed on the scalp to collect electroencephalogram signals of brain cells, and the electroencephalogram signals are the overall effect of electrical activity of a large number of brain nerve cells in a highly coherent state on cerebral cortex.
The signal output end of the impedance network 1 is electrically connected with the signal input end of the analog processing unit 3, the electroencephalogram signal is transmitted to the analog processing unit 3 after the electroencephalogram signal is acquired by the impedance network 1, and the analog processing unit 3 is used for filtering, amplifying and the like of the electroencephalogram signal; in addition, the driving end of the analog processing unit 3 is connected with the driven end of the impedance network 1 and is used for keeping the trackability of the electroencephalogram signals.
The signal output end of the analog processing unit is electrically connected with the signal input end of the analog-to-digital conversion unit 4, the electroencephalogram signals enter the analog-to-digital conversion unit 4 after being filtered and amplified, and the analog-to-digital conversion unit 4 carries out digital quantization and coding on the electroencephalogram signals. In one embodiment, the analog processing units are a plurality of identical operational amplifiers.
The signal output end of the analog-to-digital conversion unit 4 is connected with the signal input end of the digital processing unit 5, the electroencephalogram signal after digital quantization and coding is input into the digital processing unit 5 by the analog-to-digital conversion unit 4, and the digital processing unit 5 can perform signal processing on the electroencephalogram signal to obtain the waveform of an electroencephalogram. In one embodiment, the analog-to-digital conversion unit 4 is an AD converter.
In addition, the switch circuit unit 2 is connected in series between the signal output end of the impedance network 1 and the signal input end of the analog processing unit 3, and is used for controlling the on and off of the electroencephalogram signal detection process.
The application provides an electroencephalogram detection device, which comprises an impedance network 1, a switch circuit unit 2, an analog processing unit 3, an analog-to-digital conversion unit 4 and a digital processing unit 5 which are connected with one another, wherein the electroencephalogram detection device can complete the processing of electroencephalogram signals and the detection of internal impedance of the device, so that the acquisition of the electroencephalogram signals and the result of the processing are stable and reliable.
In one embodiment, the electroencephalogram detection apparatus further includes an auxiliary circuit unit 6, and the auxiliary circuit unit 6 is connected in series between the impedance network 1 and the switch circuit unit 2.
In this embodiment, the auxiliary circuit unit 6 is connected in series between the impedance network 1 and the switch circuit unit 2, and before the electroencephalogram signal acquired by the impedance network 1 is transmitted to the switch circuit unit 2, the electroencephalogram signal is transmitted to the auxiliary circuit unit 6, the auxiliary circuit unit 6 is used for defibrillation and ESD defibrillation, namely, harmful large signals in the electroencephalogram signal are limited, and then the electroencephalogram signal is transmitted to the switch circuit unit 2.
In one embodiment, the electroencephalogram detection apparatus further comprises a power supply module 7, wherein the power supply module 7 comprises a positive power supply 71 and a first resistor 72; the positive power supply 71 is a constant current source connected to the switch circuit unit 2, one end of the first resistor 72 is connected to the switch circuit unit 2, and the other end is grounded.
The electroencephalogram detection device further comprises a power module 7. In this embodiment, the power module 7 includes a positive power source 71 and a first resistor 72, where the positive power source 71 is a constant current source, and the fundamental frequency of the constant current source is not limited, and may be an alternating current or a direct current, a sine wave or a square wave, whether in-band or out-of-band of the electroencephalogram signal, but must be in the passband of the analog processing unit 3.
In addition, the electroencephalogram detection device in the application has two working modes, the current source does not work in the electroencephalogram acquisition mode, and besides the electroencephalogram acquisition mode for acquiring and processing electroencephalogram signals, an impedance test mode for testing the impedance of the lead electrodes in the impedance network 1 also exists. In the impedance test mode, the positive power supply 71 generates a power supply test signal, the power supply test signal can form a closed loop at the scalp through the impedance network 1 to generate an impedance test signal, the impedance test signal sequentially passes through the analog processing unit 3 and the analog-to-digital conversion unit 4 to reach the digital processing unit 5, and the digital processing unit 5 can calculate the theoretical contact impedance of each lead electrode according to the impedance test signal.
In one embodiment, the digital processing unit 5 comprises:
a switch control subunit 51 electrically connected to the controlled end of the switch circuit unit 2;
an impedance detection subunit 52 electrically connected to the signal output terminal of the analog-to-digital conversion unit 4, and including a test signal filter and an impedance calculator connected to each other;
and the electroencephalogram signal processing subunit 53 is electrically connected with the signal output end of the analog-to-digital conversion unit 4 and comprises an electroencephalogram signal filter and an electroencephalogram signal processor which are mutually connected.
In this embodiment, the digital processing unit 5 includes a switch control subunit 51, an impedance detection subunit 52, and an electroencephalogram signal processing subunit 53, respectively. The control end of the switch control subunit 51 is electrically connected to the controlled end of the switch circuit unit 2, and is configured to control the on and off of each switch in the switch circuit unit 2; the signal input end of the impedance detection subunit 52 is electrically connected to the signal output end of the analog-to-digital conversion unit 4, and is configured to receive the impedance test signal output by the analog-to-digital conversion unit 4, filter out the electroencephalogram signal through the test signal filter, and calculate the theoretical contact impedance of each lead electrode through the impedance calculator.
The electroencephalogram signal processing subunit 53 is electrically connected with the signal output end of the analog-to-digital conversion unit 4, and is configured to receive the electroencephalogram signal output by the analog-to-digital conversion unit 4, filter out the impedance test signal through an electroencephalogram signal filter, and finally process the electroencephalogram signal through an electroencephalogram signal processor.
In an embodiment, the analog processing unit 3 includes a filtering and amplifying circuit 31 and a driving circuit 32, a signal input end of the filtering and amplifying circuit 31 is connected to a signal input end of the impedance network 1, a signal output end of the filtering and amplifying circuit 31 is connected to a signal input end of the analog-to-digital converting unit 4, and a driving end of the driving circuit 32 is connected to a driven end of the impedance network 1.
In this embodiment, the analog processing unit 3 includes a filtering amplifying circuit 31 and a driving circuit 32, a signal input end of the filtering amplifying circuit 31 is connected to a signal output end of the impedance network 1, and a signal output end of the filtering amplifying circuit 31 is connected to a signal input end of the analog-to-digital converting unit 4, and is configured to filter and amplify the impedance test signal and the electroencephalogram signal. The driving end of the driving circuit 32 is connected with the driven end of the impedance network 1, no matter in an electroencephalogram acquisition mode or an impedance test mode, the driving circuit 32 can extract slow change waves in electroencephalogram signals, the slow change waves reach the scalp of a user through the impedance module, negative feedback acts on the scalp to offset static voltage fluctuation on the scalp, and therefore the dynamic range of the electroencephalogram signals is compressed to be matched with the signal input range of the analog processing unit 3, and the trackability of the electroencephalogram signals is kept.
In an embodiment, the impedance network 1 includes at least two electroencephalogram signal testing electrodes Z1-Zn, an impedance testing auxiliary electrode Zref and a driving auxiliary electrode Zgnd, the electroencephalogram signal testing electrodes Z1-Zn are respectively connected to the signal input end of the filtering amplification circuit 31, the impedance testing auxiliary electrode Zref is connected to the signal input end of the filtering amplification circuit 31, and the driving auxiliary electrode Zgnd is connected to the driving end of the driving circuit 32.
In this embodiment, the impedance network 1 includes at least two electroencephalogram signal testing electrodes Z1- -Zn, at least one impedance testing auxiliary electrode Zref, and at least one driving auxiliary electrode Zgnd. The electroencephalogram signal testing electrode Z1-Zn is respectively connected with the signal input end of the filtering amplifying circuit 31, the impedance testing auxiliary electrode Zref is connected with the signal input end of the filtering amplifying circuit 31, and the driving auxiliary electrode Zgnd is connected with the driving end of the driving circuit 32. The electroencephalogram signal test electrode Z1-Zn is used for collecting electroencephalogram signals, the impedance test auxiliary electrode Zref is used for performing impedance test, and the driving auxiliary electrode Zgnd is used for assisting the driving circuit 32 to keep the trackability of the electroencephalogram signals.
In one embodiment, the switch circuit unit 2 includes at least two sets of signal testing switches S1-Sn and a first switch S0, the signal testing switches S1-Sn are in one-to-one correspondence with the electroencephalogram signal testing electrodes Z1-Zn, the signal testing switches S1-Sn include a first signal testing switch S1S 1-Sn and a second signal testing switch S2S 1-Sn, one end of the first signal testing switch S1S 1-Sn is connected to a signal output end of the electroencephalogram signal testing electrodes Z1-Zn, a signal input end of the filtering and amplifying circuit 31 and a node of the second signal testing switch S2S 1-Sn, and the other end of the first signal testing switch S1S 1-Sn is connected to the positive power supply 71; one end of the second signal testing switch S2S 1-Sn is connected to the signal output end of the electroencephalogram signal testing electrode Z1-Zn, the signal input end of the filtering amplification circuit 31, and the node of the first signal testing switch S1S 1-Sn, the other end of the second signal testing switch S2S 1-Sn is connected to the node of the driving end of the driving circuit 32 and the driven end of the impedance network 1, one end of the first switch S0 is connected to the first resistor 72, and the other end of the first switch S0 is connected to the signal input end of the filtering amplification circuit 31.
In this embodiment, as shown in fig. 6, the switch circuit unit 2 includes at least two sets of signal testing switches S1-Sn, each set of signal testing switches S1-Sn includes two, and each set of signal testing switches S1-Sn corresponds to one brain electrical signal testing electrode Z1-Zn. Specifically, each signal test switch S1- -Sn is capable of controlling whether the power test signal passes through the impedance network 1 and forms a closed loop at the scalp, producing an impedance test signal.
Further, the filtering amplifying circuit 31 includes at least three operational amplifiers, including two electroencephalogram signal testing operational amplifiers and a driving auxiliary operational amplifier, the electroencephalogram signal testing electrodes Z1 — Zn correspond to the electroencephalogram signal testing operational amplifiers one by one, and the driving auxiliary electrodes Zgnd correspond to the driving auxiliary operational amplifiers. Specifically, each electroencephalogram signal testing electrode Z1-Zn is connected with the non-inverting input end of the corresponding electroencephalogram signal testing operational amplifier, the driving auxiliary electrode Zgnd is connected with the non-inverting input end of the driving auxiliary operational amplifier, and the impedance testing auxiliary electrode Zref is connected with the inverting input ends of all the operational amplifiers.
The invention also provides an impedance detection method of the electroencephalogram detection device, which comprises the following steps:
s100, acquiring a control instruction, and selecting a working mode of the electroencephalogram detection device according to the control instruction;
step S200, if an electroencephalogram acquisition mode is selected, acquiring electroencephalogram signals, and generating an electroencephalogram signal processing result according to the electroencephalogram signals;
step S300, if the impedance detection mode is selected, obtaining a power supply test signal, generating an impedance detection signal according to the power supply test signal, and obtaining theoretical contact impedance based on the impedance detection signal.
The electroencephalogram detection device in the application has two working modes, one is an electroencephalogram acquisition mode for acquiring and processing electroencephalogram signals, and the other is an impedance test mode for testing the impedance of lead electrodes in the impedance network 1.
In the electroencephalogram acquisition mode, at least two electroencephalogram signal testing electrodes Z1-Zn in the impedance network 1 are placed on the scalp of a user and respectively acquire electroencephalogram signals on the scalp of the user, and the electroencephalogram signals can reach the switch circuit unit 2 and the auxiliary circuit unit 6 at the same time, and in the electroencephalogram acquisition mode, all switches in the switch circuit unit 2 are switched off, therefore, the power module 7 can not affect the electroencephalogram collection, the auxiliary circuit unit 6 limits harmful large signals in the electroencephalogram signals, then the EEG signal enters an analog processing unit 3, the EEG signal is filtered and amplified by the analog processing unit 3, the amplified EEG signal enters an analog-to-digital conversion unit 4 and is converted into a digital signal by the analog signal, and the converted EEG signal enters a digital processing unit 5 to obtain an EEG signal processing result. The electroencephalogram signal processing result can be electroencephalogram in a curvilinear figure mode or record in a character mode.
In the impedance test mode, the positive power supply 71 and the negative power supply each generate a power supply test signal. The power test signals include a positive power supply 71 test signal and a negative power supply test signal, the positive power supply 71 generates the positive power supply 71 test signal, and the negative power supply generates the negative power supply test signal. As shown in FIG. 6, in the impedance test mode, the switch S0 is closed, and S1-Sn in the switch circuit unit 2 are opened after being closed for a first preset time period in turn, so as to test the theoretical contact impedance of each electroencephalogram signal test electrode Z1-Zn in the impedance network 1 in turn, wherein the first preset time period is a time length preset by a person skilled in the art. Therefore, the power supply test signal forms a closed loop at the scalp through the impedance network 1 to generate an impedance test signal to the analog processing unit 3, the analog processing unit 3 also performs filtering and amplification on the impedance test signal, and then the impedance test signal reaches the digital processing unit 5 through the analog-to-digital conversion unit 4, and the digital processing unit 5 can calculate the theoretical contact impedance of each lead electrode according to the impedance test signal.
In one embodiment, the step of obtaining a theoretical contact impedance based on the impedance detection signal includes:
acquiring the current amplitude and the circuit amplification gain of the positive power supply 71;
obtaining a first resistance value of the first resistor 72;
and calculating theoretical contact impedance according to the voltage amplitude, the first resistance value, the circuit amplification gain and the impedance detection signal.
In this embodiment, taking fig. 6 as an example, since the positive power supply 71 is a constant current source, the current amplitude of the constant current source can be set to I, and the amplitude of the impedance detection signal received by the digital processing unit 5 can be set to U1，U2......Un-1，Un，U1g，U2gAnd the first resistance value of the first resistor 72 may be R.
Wherein, U1gAfter switch S1 is closed, through CH1 channelImpedance detecting a signal amplitude of the signal; u shape2gThe signal amplitude of the signal is detected for the impedance through the CH2 channel after the switch S2 is closed. Then the following set of equations can be listed:
Figure BDA0003584595800000111
wherein Z is1,Z2,Z3.......Zn,Zref,ZgndRespectively the theoretical contact impedance corresponding to each lead electrode. g is the circuit amplification gain of the analog processing unit 3. In I, g, R, U1、U2......Un-1、Un、U1g、 U2gAll are known quantities, the theoretical contact impedance of each lead electrode can be calculated. Based on the above calculation mode, the present application supports the contact impedance test of the zero electrode, and the present application supports the impedance test of the lead electrode of the fully differential circuit.
The invention also provides impedance detection equipment of the electroencephalogram detection device, the impedance detection equipment of the electroencephalogram detection device comprises a memory, a processor and an impedance detection program of the electroencephalogram detection device, wherein the impedance detection program of the electroencephalogram detection device is stored in the memory and can be operated on the processor, and the impedance detection program of the electroencephalogram detection device is used for executing the method in each embodiment of the invention.
The invention also provides a storage medium on which an impedance detection program of the electroencephalogram detection device is stored. The storage medium includes a computer-readable storage medium, which may be the Memory in fig. 1, and may also be at least one of a ROM (Read-Only Memory)/RAM (Random Access Memory), a magnetic disk, and an optical disk, where the storage medium includes several instructions to enable an internet of things terminal device (which may be a mobile phone, a computer, a server, an internet of things terminal, or a network device) having a processor to execute the method according to each embodiment of the present invention.
In the present invention, the terms "first", "second", "third", "fourth" and "fifth" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance, and those skilled in the art can understand the specific meanings of the above terms in the present invention according to specific situations.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in multiple embodiments or examples of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although the embodiment of the present invention has been shown and described, the scope of the present invention is not limited thereto, it should be understood that the above embodiment is illustrative and not to be construed as limiting the present invention, and that those skilled in the art can make changes, modifications and substitutions to the above embodiment within the scope of the present invention, and that these changes, modifications and substitutions should be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. The electroencephalogram detection device is characterized by comprising an impedance network, a switch circuit unit, an analog processing unit, an analog-to-digital conversion unit and a digital processing unit; the signal output end of the impedance network is electrically connected with the signal input end of the analog processing unit, the driven end of the impedance network is electrically connected with the driving end of the analog processing unit, the signal output end of the analog processing unit is electrically connected with the signal input end of the analog-to-digital conversion unit, the signal output end of the analog-to-digital conversion unit is connected with the signal input end of the digital processing unit, the switch circuit unit is connected between the signal output end of the impedance network and the signal input end of the analog processing unit in series, and the controlled end of the switch circuit unit is electrically connected with the control end of the digital processing unit.
2. The brain electrical detection device of claim 1, further comprising an auxiliary circuit unit connected in series between said impedance network and said switching circuit unit.
3. The brain electrical detection device of claim 1, further comprising a power module, said power module comprising a positive power supply and a first resistance; the positive power supply is a constant current source, the constant current source is connected with the switch circuit unit, one end of the first resistor is connected with the switch circuit unit, and the other end of the first resistor is grounded.
4. The electroencephalographic detection device of claim 3, wherein the digital processing unit comprises:
the switch control subunit is electrically connected with the controlled end of the switch circuit unit;
the impedance detection subunit is electrically connected with the signal output end of the analog-to-digital conversion unit and comprises a test signal filter and an impedance calculator which are mutually connected;
and the electroencephalogram signal processing subunit is electrically connected with the signal output end of the analog-to-digital conversion unit and comprises an electroencephalogram signal filter and an electroencephalogram signal processor which are mutually connected.
5. The electroencephalogram detection device according to claim 1, wherein the analog processing unit comprises a filter amplification circuit and a driving circuit, a signal input end of the filter amplification circuit is connected with a signal input end of the impedance network, a signal output end of the filter amplification circuit is connected with a signal input end of the analog-to-digital conversion unit, and a driving end of the driving circuit is connected with a driven end of the impedance network.
6. The electroencephalogram detection device according to claim 5, wherein the impedance network comprises at least two electroencephalogram signal test electrodes, an impedance test auxiliary electrode and a drive auxiliary electrode, the electroencephalogram signal test electrodes are respectively connected with the signal input end of the filtering and amplifying circuit, the impedance test auxiliary electrode is connected with the signal input end of the filtering and amplifying circuit, and the drive auxiliary electrode is connected with the drive end of the drive circuit.
7. The electroencephalogram detection apparatus according to claim 6, wherein the switching circuit unit includes at least two sets of signal test switches and first switches, the signal test switches correspond to the electroencephalogram signal test electrodes one to one, the signal test switches include a first signal test switch and a second signal test switch, one end of the first signal test switch is connected to a signal output end of the electroencephalogram signal test electrode, a signal input end of the filtering and amplifying circuit, and a node of the second signal test switch, and the other end of the first signal test switch is connected to the positive power supply; one end of the second signal test switch is connected with the signal output end of the electroencephalogram signal test electrode, the signal input end of the filtering amplification circuit and the node of the first signal test switch, the other end of the second signal test switch is connected with the driving end of the driving circuit and the node of the driven end of the impedance network, one end of the first switch is connected with the first resistor, and the other end of the first switch is connected with the signal input end of the filtering amplification circuit.
8. The electroencephalogram detection method based on the electroencephalogram detection device of any one of claims 1 to 7, characterized in that the steps of the impedance detection method of the electroencephalogram detection device comprise:
acquiring a control instruction, and selecting a working mode of the electroencephalogram detection device according to the control instruction;
if the electroencephalogram acquisition mode is selected, acquiring electroencephalogram signals, and generating an electroencephalogram signal processing result according to the electroencephalogram signals;
if the impedance detection mode is selected, a power supply test signal is obtained, an impedance detection signal is generated according to the power supply test signal, and theoretical contact impedance is obtained based on the impedance detection signal.
9. The electroencephalogram detection method of claim 8, wherein the step of obtaining a theoretical contact impedance based on the impedance detection signal comprises:
acquiring the current amplitude and the circuit amplification gain of the positive power supply;
acquiring a first resistance value of a first resistor;
and calculating theoretical contact impedance according to the voltage amplitude, the first resistance value, the circuit amplification gain and the impedance detection signal.
10. A storage medium having stored thereon an impedance detection program for an electroencephalogram detection apparatus, the program when executed by a processor implementing the steps of the electroencephalogram detection apparatus according to any one of claims 8 to 9.
CN202210359884.4A 2022-04-07 2022-04-07 Electroencephalogram detection device, impedance detection method, and storage medium Pending CN114699091A (en)

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