CN1146953A - Single chip integrated heat vapor ink-jet print head - Google Patents
Single chip integrated heat vapor ink-jet print head Download PDFInfo
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- CN1146953A CN1146953A CN 95103878 CN95103878A CN1146953A CN 1146953 A CN1146953 A CN 1146953A CN 95103878 CN95103878 CN 95103878 CN 95103878 A CN95103878 A CN 95103878A CN 1146953 A CN1146953 A CN 1146953A
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Abstract
A single-chip integrated ink jet print head features that its all elements comprising circuit, ink well, ink micro-rail, ink jet, heating resistor and driver circuit are integrated on only silicon chip. Said heating resistor is supported by silicon film with big transverse thermoresistance and the dismatched thermal stress of silicon film is minimized via elastic film. The print head is made up through diffusion of buried layer, epitaxial growth, forming circuit and resistor, anodizing, coating elastic film, covering rigid piece, and etching. Its advantages are high integrated degree, resolution and reliability, low power consumption, and long service life.
Description
The present invention relates to a kind of heat vapor ink-jet print head, particularly relate to a kind of single chip integrated heat vapor ink-jet print head.
The heat vapor ink-jet printer is one of non-impact printer of widespread use.Its principle of work is, utilizes the resistance heated ink groove, makes the ink vaporization in the ink groove produce bubble, and air bubble expansion pushes the ink in little ditch, and it is penetrated on the paper of falling before the spout from spout.
Compare with stylus printer, the heat vapor ink-jet printer has numerous significant advantages, mainly is the resolution height, and speed is fast, and the low and signal processing power of noise is strong etc.Comparing with laser printer also has many advantages, and such as simple in structure, cost is low, and the integrated level height is convenient to signal processing etc.
The existing many kinds of the ink-jet printer that on market, can buy at present.One of common kind, its printhead are combined by two silicon substrates up and down as shown in Figure 1.Ink flows into the inkwell of substrate down, and the little ditch between two substrates is from the spout ejaculation of last substrate.In little ditch of substrate top surface, its top faced spout under heating resistor was in.Heating resistor is a sheet resistance, and it realizes the electricity isolation by an insulation course and following substrate down, prevents the ink corrosion by a protective seam on it.
Another kind of general heat vapor ink-jet printer, its printhead also are the assemblys of two silicon substrates up and down as shown in Figure 2.Different is that ink flows into the inkwell of going up substrate, through little ditch of last substrate, from the spout ejaculation of last substrate.But heating resistor is in the upper surface of substrate down, faces little ditch of substrate.Little ditch of last substrate originally opens wide, and just its uncovered ability is sealed after two substrate bindings.Heating resistor is a sheet resistance also, depends on down substrate.
There are many important disadvantages in above-mentioned two kinds of heat vapor ink-jet printers and other existing heat vapor ink-jet printer.The first will will be processed respectively two substrates with two silicon substrates, and will the device element on two substrates accurately be aimed at two substrate bindings after the processing together.Not only the silicon chip consumption is big for this, and manufacture process is loaded down with trivial details, and main is and the manufacturing process poor compatibility of integrated circuit, can not directly utilizes existing technology of integrated circuit manufacturing firm and equipment to produce.It two is that heating resistor is support with the silicon substrate, and very big some of heat that its heating produces is taken away by the conduction of heat of substrate, and this has not only increased the power consumption of printer, and is easy to generate unnecessary thermal effect.It three is can produce the mismatch thermal stress in each thin layer because the thermal expansivity of heating resistor multi-layer solid structure is different, and the high thermal cycle of heating-up temperature is frequent in addition, the easy crack initiation of resistance film, and bubbling, even come off.It four is two silicon substrates to be bonded together cause the alignment error of heating resistor and ink groove easily, the density thereby the linearity that has limited spout is arranged, and then limited the resolution of printer.It five is that two adhesive linkages between the silicon substrate also will play the sealing ink groove, and this all requires very tight to adhesives and technique for sticking, otherwise owing to divulges between the little ditch of corrosive attack of ink to come off with adhesive linkage and be easy to take place.
Purpose of the present invention will provide a kind of heat vapor ink-jet print head exactly, and its all device elements comprise inkwell, ink groove, inkjet mouth, heating resistor with and control circuit all be integrated on the same inseparable silicon substrate of integral body, with simplified manufacturing technique, reduce production costs.
Another object of the present invention will provide a kind of heat vapor ink-jet print head exactly, and its heating resistor is supported by the silicon fiml of substrate, rather than is directly supported by substrate, and the thermal resistance of silicon fiml is much larger than the thermal resistance of substrate, thereby can reduce the power consumption of printhead greatly.
The 3rd purpose of the present invention will provide a kind of heat vapor ink-jet print head exactly, and its heating resistor is made up of the silicon fiml of substrate, thereby simplifies the structure of resistor, increases the heat of the ink transmission of resistor in microtubule and the mission life that prolongs resistor.
The 4th purpose of the present invention will provide a kind of heat vapor ink-jet print head exactly, and the mismatch thermal stress that its heating resistor produced can reduce for an elastic film, thereby the structure that prevents heating resistor is damaged by the mismatch thermal stress.
The 5th purpose of the present invention just provides a kind of heat vapor ink-jet print head, skill is compatible strong in the manufacturing of its manufacturing process and integrated circuit, its most manufacturing process can carry out on the production line of standard, and the formation of inkwell, ink groove and inkjet mouth can be arranged in last procedure of manufacturing and finishes.
The 6th purpose of the present invention just provides a kind of heat vapor ink-jet print head and has very high integrated level, and the circuit and the signal processing circuit of control heating resistor can be integrated in same silicon substrate.
In order to achieve the above object and other purpose, the heat vapor ink-jet print head of the present invention's design as shown in Figure 3 and Figure 4.This printhead is only used a silicon substrate, and all device elements all form in this same substrate.The ink groove of printhead is buried in the surface of substrate, and its inner inkwell with dark recessed substrate communicates, and appearing in the side of substrate in the outer end, promptly forms inkjet mouth.The top layer of little ditch is the silicon fiml that forms in the substrate.Heating resistor is the diffusion resistance or the ion implanted resistor of silicon fiml, and the heat that resistor produces is delivered to the ink that contacts with the silicon fiml lower surface through the silicon layer of resistor below.The wheat face of silicon fiml applies has certain flexible Kapton, and cover glass sheet on the polyimide film rises and reinforces the supporting role of polyimide film to silicon fiml.The electric current of heating resistor is provided through the switching device on the substrate by the DC current of outside, switching device is controlled by the driving circuit on the substrate, driving circuit can comprise shift register, latch and selector switch etc. all are integrated on the substrate not the position that is taken by inkwell and ink groove.
The plurality of advantages of the above-mentioned heat vapor ink-jet print head of the present invention's design is conspicuous, stresses the effect of Kapton below.
Polyimide is one of passivating film of widespread use in integrated circuit, and its thermal conductivity is 1.13 * 10
-3W/CM ℃, be approximately 8% of silicon dioxide thermal conductivity, as heat-barrier material, its performance is much better than silicon dioxide.Be understood that the part that the heat that heating resistor produces passes away by Kapton is very little.
Kapton is proportional to mismatch thermal stress and its elastic modulus that silicon fiml produces, and the elastic modulus of polyimide is 2.94 * 107 dyne/CM
2Elastic modulus 7.38 * 10 with silicon dioxide
11Dyne/CM
2Compare little four orders of magnitude.Be not difficult to calculate, under identical condition, Kapton is littler 10,000 times to the thermal stress that silicon fiml produces than silica membrane to the mismatch thermal stress that silicon fiml produces.
The thermal expansion of polyimide is 2 * 10
-6/ K, with the mismatch ratio of silicon be-0.33 * 10
-6/ K, and the mismatch ratio of silicon dioxide thermal expansivity and silicon is-2.03-1.83 * 10
-6/ K is not difficult to find out, under identical temperature variation condition, gathering and joining the imines film is the 16-18% of silica membrane to the mismatch thermal strain that silicon fiml produced to the mismatch thermal strain that silicon fiml produced.The reduction of mismatch thermal strain also helps reducing the suffered mismatch thermal stress of silicon fiml.
The tensile strength of polyimide is 1.1-1.6 * 10
9Dyne/CM
2, close with silicon dioxide, its chemical stability is fine, can keep good electric property and mechanical property 310 ℃ to 343 ℃ scopes.
In sum, both can improve the thermal loss and the thermal stress damage of heating resistor, not reduce the performance of work under its physical strength and the higher temperature again with the topped heating resistor silicon fiml of Kapton.
Below accompanying drawing is described:
Fig. 1 is the cross-sectional view of first kind of heat vapor ink-jet print head providing of prior art, and the meaning of the label representative among the figure is respectively:
101-first silicon substrate
The 102-ink groove
The 103-inkjet mouth
104-second silicon substrate
The 105-inkwell
The 106-insulation course
The 107-heating resistor
The 108-protective seam
The 109-interlayer
The 110-ink
The 111-ink droplet
Fig. 2 is the cross-sectional view of second kind of heat vapor ink-jet print head providing of prior art.The meaning of the label representative among the figure is respectively:
201-first silicon substrate
The 202-inkwell
The 203-ink groove
The 204-inkjet mouth
205-second silicon substrate
The 206-insulation course
The 207-heating resistor
The 208-protective seam
The 209-adhesive linkage
The 210-ink
The 211-ink droplet
Fig. 3 is the top view of heat vapor ink-jet print head provided by the invention.
Fig. 4 is the side view of heat vapor ink-jet print head provided by the invention.
The meaning of label representative is respectively among Fig. 3 and Fig. 4:
The lightly doped P-type of 301-silicon substrate
The lightly doped n-type of 302-silicon trap
The lightly doped n-type of 303-silicon epitaxy layer
The 304-inkjet mouth
305-first chromium thin film
The inferior film of pressing of 306-polyamides
307-second chromium thin film
The 308-glass sheet
The 309-inkwell
The 310-silicon thin film
The 311-heating resistor
The anodizing tank that the 312-polyimide is filled
The 313-switching device
The 314-selector circuit
The 315-latch circuit
The 316-shift-register circuit
The 317-pressure welding point
The 318-ink droplet
Fig. 5 A-Figure 13 A is the view in transverse section of heat vapor ink-jet print head provided by the invention in each fabrication phase.
Fig. 5 B-Figure 13 B is the longitdinal cross-section diagram of heat vapor ink-jet print head provided by the invention in each fabrication phase.
The meaning of label representative is respectively among Fig. 5 A-Figure 13 A and Fig. 5 B-Figure 13 B:
The lightly doped P-type of 401-silicon substrate
Silicon dioxide (the SiO of 402-thermal oxide growth
2) layer
The lightly doped n-type of 403-silicon trap
The heavily doped n-type of 404-silicon buried layer
The lightly doped n-type of 405-silicon epitaxy layer
406-silicon dioxide (SiO
2) and silicon nitride (Si
3N
4)
The 407-heating resistor
408-TTL circuit (TTL)
The contact of 409-aluminium
410-aluminium pressure welding point
411-first chromium thin film
The 412-anodizing tank
The 413-porous silicon
414-second chromium thin film
415-first Kapton
The 416-glass sheet
417-the 3rd chromium thin film
418-second Kapton
419-pressure welding point window
The 420-inkwell
The 421-ink groove
The 422-inkjet mouth
The 423-electroconductive resin
The 424-extension line
The manufacturing of heat vapor ink-jet print head provided by the invention can divide following nine stages to carry out, and each stage comprises some manufacturing steps.
The 1st stage is shown in Fig. 5 A and Fig. 5 B, relate generally to ion and inject formation light dope n-type silicon trap, parent material is the P-type silicon substrate in (111) crystal orientation, and its resistivity is between 10-20 Ω-CM, substrate is after conventional cleaning is cleaned, at its surface heat thick SiO of 7000 dusts that grows
2Layer, growth conditions is 1000 ℃, wet oxygen.Carry out conventional lithography process, at SiO
2Form ion in the layer and inject window.With preceding the same terms under, carry out heat growth once more to form the thick SiO of another layer 700 dust
2Layer.Ion injection this moment window covers the new oxide layer of this layer, and original SiO
2Layer is thickening further.The condition that ion injects is that phosphonium ion injects, and energy is 100Kev, and dosage is 1.5 * 10
13/ CM
3Injection subsequently advances the N at 1200 ℃
2In carry out.Consequent well depth is about 10-12 μ m, the about 2-3K Ω of sheet resistance, and technology as an alternative, lightly doped n-type silicon trap also can be obtained by phosphorous diffusion.
The 2nd stage related generally to arsenic diffusion and forms heavily doped n-type buried regions shown in Fig. 6 A and Fig. 6 B.It should be noted that buried regions only forms in long lightly doped n-type trap, its width and the degree of depth must be than the little 0.5-1.0 μ of lightly doped n-type trap m, and its length must be greater than lightly doped n-type trap 1-2 μ m.Hydrofluorite (HF) with dilution erodes the SiO that stays on last stage earlier
2Layer, again with preceding identical condition under the thick new SiO of heat growth 9000 dusts
2Layer, and carry out lithography process at SiO
2Form the diffusion window in the layer.Diffusion conditions is: As
2O
3Be the source, 480 ℃ of deposition temperatures, deposition time is 1 hour.Diffusion temperature is 1225 ℃, 16 hours diffusion times, the about 10 μ m of n-type silicon buried layer junction depth of consequent heavily doped arsenic, about 1 Ω of sheet resistance.The technology that substitutes is to carry out arsenic ion to inject, to form required heavily doped n-type silicon buried layer.
The 3rd stage related generally to the lightly doped n-type of epitaxial growth silicon epitaxy layer shown in Fig. 7 A and Fig. 7 B.With erode the SiO that stays with identical method of last stage
2Layer carries out epitaxial growth then.Growth course comprises: original position is with hydrogen chloride (HCl) corrosion 3-5 minute, to remove the thick substrate surface silicon layer of 0.2-0.5 μ m in the stove; Use SiCl
4+ H
2Be the source, use AsH
3Be adulterant, carry out epitaxial growth at 1150 ℃.The control growth time is to obtain 5-6 μ m thick epitaxial layer, and its resistivity is in 7-15 Ω-cm scope.
The 4th stage related generally to and forms heating resistor and TTL circuit shown in Fig. 8 A and Fig. 8 B, and its main manufacturing step is:
1, the thick SiO of heat growth 9000 dusts
2Layer.
2, carry out photoetching and add the formation isolated area.
3, isolate deposit and diffusion: with the BN sheet is the source, and the BN deposit is arranged, 950 ℃, and logical N
2, 20 minutes; No BN deposit, 1100 ℃, logical N
2/ O
2, 30 minutes.Diffusion temperature is 1225 ℃ again, logical N
2/ O
2, 38 minutes, produce junction depth 4.5-6.0 μ m, sheet resistance 1.5-4.0 Ω.
4, corrode original SiO
2Layer, the thick SiO of 7000 dusts that the heat growth is new
3
5, carry out lithography process and form the base.
6, base deposit and diffusion: with the BN sheet is the source, and the BN deposit is arranged, 950 ℃ of temperature, logical N
2, 20 minutes, no BN deposit, 1100 ℃ of temperature, logical N
2/ O
2, 30 minutes, diffusion temperature was 1150 ℃ again, logical wet O
2, 20 minutes, the logical O that does
2, 20 minutes, the junction depth 1.3-1.7 μ m of generation, thin resistance resistance 115-150 Ω, SiO
2About 4500 dusts of bed thickness.
7, carry out lithography process and form launch site and resistance area, comprise the heating resistor district, its resistance value is 100 Ω.
8, launch site and resistance area deposit and diffusion: with POCl
3Be the source, 11 ℃ of source temperature, deposition temperature 1050C, logical N
2/ O
2, 5 minutes, TongYuan's gas, 8 minutes, at wet O
2In 450 ℃ annealing 20 minutes, the about 1.5 μ m of the junction depth of generation, sheet resistance 4-7.5 Ω, SiO
2Bed thickness 2800-3500 dust.
9, corrode original SiO
2Layer, the thick SiO of 800 dusts that the heat growth is new
2Layer, growth conditions is 950 ℃, the logical O that does
2
10, the silicon nitride (Si that low-pressure vapor phase deposit (CVD) 1500 dusts are thick
3N
4) layer, deposition temperature is 750 ℃.
11, carry out lithography process and form contact window.
12, the thick aluminium film of electron beam evaporation deposit 1.2 μ m.
13, carry out lithography process and form contact line and pressure welding point.
14, metallization, its condition: 450 ℃ of logical N
2
The TTL manufacturing process is standardized industrial manufacture process, and the those of skill in the art of the sector are very familiar to these technologies, does not therefore need to be described in detail.
The 5th stage related generally to and forms anodic oxidation mask and anodizing tank shown in Fig. 9 A and Fig. 9 B.The material of the every HF of holding out against corrosion all can be made the anodic oxidation mask material, and chromium and gold are included, but because chromium is more cheap than gold, and use more extensively than gold at integrated circuit industry chromium, therefore select chromium for use.On substrate, use the thick chromium film of sputtering technology deposit 2000 dusts.Carry out lithography process, form anodizing tank, its process is to be mask with the photoresist earlier, uses 3HCl+H
2O
2Corrode chromium, and then corrode SiO with the HF of dilution
2, be mask with the chromium film again, with reactive ion etching technology (RIE) corrosion silicon, etching condition is: with CF
4/ O
2Be the source, pressure control is about 40Pa.The control corrosion depth is passed lightly doped n-type silicon epitaxy layer just and is arrived at heavily doped n-type buried regions under it.
The technology that substitutes corrosion silicon is the wet method anisotropic etch, as 2M potassium hydroxide (KOH) aqueous solution+25ml isopropyl alcohol with 50 ℃.Before carrying out this corrosion, the right-angle side of anodizing tank mask graph should guarantee parallel or vertical with (110) crystal orientation, and the degree of depth of groove is by the width decision of mask graph, and promptly groove depth=0.7 figure is wide.
The 6th stage related generally to anodic oxidation and generates porous silicon shown in Figure 10 A and Figure 10 B.Porous silicon be monocrystalline silicon anodic oxidation in dense HF solution form contain a large amount of diameter Distribution at the monocrystalline silicon of tens dusts to hundreds of dust micropore, anodic oxidation voltage depends on the doping type and the doping content of silicon substrate, general rule is that the silicon that the n-type mixes forms the silicon that the required anode voltage of porous silicon is higher than the doping of P-type, the required anode voltage of lightly doped n-type silicon is higher than heavily doped n-type silicon, therefore can be by the control anode voltage, the silicon that heavily doped n-type silicon on the same silicon substrate and P-type are mixed is transformed into porous silicon, and keeps lightly doped n-type silicon not to be subjected to anodised the influence.In the present embodiment, the electrolyte solution that anodic oxidation is used is 20%HF and 6M CH
3COOH (glacial acetic acid), wherein glacial acetic acid works to reduce bath surface tension force.Anode voltage is controlled at 2-3V, and reaction is at room temperature carried out.Anode reaction is from anodizing tank, and earlier equidistant expansion around heavily doped n-type silicon buried layer is when waiting to meet lightly doped n-type silicon interface, reaction promptly ends hereinto, other does not meet the direction of lightly doped n-type silicon interface, and reaction is proceeded, till meeting.In the inner of heavily doped n-type silicon buried layer, the silicon of its adjacency is not the silicon that lightly doped n-type silicon but P-type mix, and therefore reaction continues to carry out in P-type silicon.Because its distribution of current maximum of path of serial resistance minimum, therefore being reflected at the direction of carrying out in the P-type silicon is towards substrate back.The porous silicon that anode reaction generates distributes shown in Figure 11 A, it should be noted that except heavily doped n-type silicon buried layer all to be transformed into the porous silicon, connects the P-type doped silicon of buried regions the inner in addition.Anode reaction can be performed until the backside surface of substrate in principle, but present embodiment is for saving time, and the degree of depth that the control anode reaction is carried out in substrate is approximately 100 μ m.
The 7th stage related generally to the coating polyimide film and filled anodizing tank shown in Figure 11 A and Figure 11 B.The polyimide that is filled in the anodizing tank will contact with the ink of little ditch, and for the protection polyimide is not corroded by ink, the polyimide film surface must be protected with the chromium film, for this reason, and the chromium film that sputtering deposit 800 dusts are thick.Carry out photoetching and add, form Metal Contact, line and pressure welding point figure.Chromium film on the aluminium film needn't remove, and need only pattern primitive and chromium film on every side be separated with the wide ditch of about 10 μ m.This measure is in order to preserve chromium film as much as possible at substrate surface, to strengthen the adhesiveness of polyimide to substrate surface.Apply 2611 polyimide of E.I.Du Pont Company, the rotating speed of whirler is the 4K/ branch, and rotational time is 30 seconds, baking is 30 minutes before 135 ℃, carries out then applying the second time, and it applies 6 times, 400 ℃ of sclerosis 2 hours, consequent polyimide thickness was about 24 μ m at last.
The 8th stage related generally to and lays glass sheet and form the pressure welding point window shown in Figure 12 A and Figure 12 B.The thick microcrystalline glass of 200 μ m carries out cleaning and high-temperature baking before the use.Be the adhesiveness of reinforcing glass, on glass sheet, apply tackifier earlier, use the rotary process coating polyimide then polyimide.Before polyimide is not dried, the picture surface of substrate is placed on the glass sheet down, with the tweezers pressurization, to discharge the bubble between the surface of contact.Preceding baking and sclerosis are carried out at 135 ℃ and 400 ℃ respectively.Carry out lithography process, form the pressure welding point window anti-carve in glass sheet surface: with the photoresist is mask, the chromium film of sputtering deposit 2000 dusts, and the photoresist under the chromium film of wet etching window position is formed with the chrome mask of bonding window.Above-mentioned technology is called the top and takes off (Left-off) method, is that the integrated circuit of using always adds one of technology.With the chrome mask is protection, with the glass sheet at HF solution corrosion window position, uses the sulfuric acid of heating or the solution corrosion polyimide of 3 parts of sulfuric acid and 1 part of hydrogen peroxide more earlier.What substitute the corrosion polyimide is to carry out plasma etching in oxygen or air.Metal that it should be noted that the pressure welding point upper strata is a chromium, and is all unaffected in above-mentioned wet method and dry etching.
The 9th stage related generally to the back of the body picture attenuate substrate, scribing and corrosion of porous silicon shown in Figure 13 A and Figure 13 B.Substrate grinds till exposing porous silicon from the back side.Sand-wheel slice cutting machine is adopted in scribing, and the degree of depth of cutting is greater than 250 μ m, to guarantee also to go deep into the certain degree of depth of substrate except cutting glass sheet.It should be noted that this moment, porous silicon was not corroded, substrate still keeps original intensity, and scribing can be carried out as conventional ic processing, notices preventing that cutting from producing mechanical damage when being scribing.The chip that cuts down also has porous silicon to appear in the side except porous silicon is exposed in the bottom surface.The KOH solution of corrosion of porous silicon 1% at room temperature carries out.Because of porous silicon has very large interior wheat area, be easy to corrosion, only need a few minutes just can remove all porous silicons, and other position of substrate is not affected.Concentration that it should be noted that etchant solution is too not high, in order to avoid too fierce inkwell, ink groove and the inkjet mouth that forms that damage of reaction.The extension line of chip can be linked on the pressure welding point with electroconductive resin.
What provide above is best embodiment of the present invention, and under guidance of the present invention and starting, the those of skill in the art of integrated circuit fields make some change and improvement is easy to do.
Claims (12)
1, a kind of heat vapor ink-jet print head the invention is characterized in, at same as a whole and integrated on the indivisible silicon substrate:
The inkwell of single recessed substrate;
Many buried communicating with inkwell, parallel with substrate surface, and top layer is the ink groove of silicon fiml;
Manyly appear linearly aligned inkjet mouth as ink groove;
Divide the heating resistor that is in the ink groove top silicon surface;
Single heating resistor driving circuit.
2, heat vapor ink-jet print head according to claim 1 is characterized in that also coating flexible passivating film of said substrate.
3, heat vapor ink-jet print head according to claim 1 is characterized in that said substrate also adds a cover the rigid protective sheet.
4, a kind of method of making heat vapor ink-jet print head: its key step comprises:
Lightly doped P-type silicon substrate is provided;
On substrate, form the parallel lightly doped long n-type silicon trap of at least one row;
At least form heavily doped long silicon buried layer in each n-type silicon trap, it is wide, reach the one end deeply is included in the n-type silicon trap, and its other end stretches out n-type silicon trap;
On substrate, form lightly doped n-type silicon epitaxy layer;
Form heating resistor and driving circuit thereof on epitaxial loayer, heating resistor is in the top of n-type silicon buried layer, and driving circuit is in the position that does not add as yet below it;
Form the anodic oxidation mask layer and cover the entire substrate surface;
Form anodizing tank, pass anodic oxidation mask layer and n-type silicon epitaxy layer, direct reach n-type silicon buried layer;
In hydrofluoric acid solution, carry out anodic oxidation, with n-type silicon buried layer and link to each other, lead to substrate back with n-type silicon buried layer, anode current partly be transformed into porous silicon by the P-type silicon substrate in the path;
Coating polyimide covers the entire substrate surface;
One glass sheet is covered the entire substrate surface;
The pressure welding point window of glass sheet and polyimide film is passed in formation;
Attenuate substrate and scribing, the porous silicon of the exposed chip back side and side;
Erode porous silicon and form inkwell, ink groove and inkjet mouth.
5, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said lightly doped P-type silicon substrate, and its electrical resistivity range is 10-20 Ω-cm.
6, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said lightly doped n-type silicon trap, and its sheet resistance scope is 1K Ω/mouth-4K Ω/mouth.
7, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said heavily doped silicon buried layer is a P-type silicon.
8, the method for manufacturing heat vapor ink-jet print head according to claim 7, its feature three ground its sheet resistance scope of said P-type silicon buried layer is 1 Ω/mouth-150 Ω/mouth.
9, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said heavily doped silicon buried layer is a n-type silicon.
10, the method for manufacturing heat vapor ink-jet print head according to claim 9 is characterized in that said n-type silicon buried layer, and its sheet resistance scope is 1 Ω/mouth-150 Ω/mouth.
11, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said anodic oxidation is to carry out in the HF of 10W%-40W% solution.
12, the method for manufacturing heat vapor ink-jet print head according to claim 4 is characterized in that said anodic oxidation is to carry out under the anode voltage of 1-3V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 95103878 CN1146953A (en) | 1995-04-24 | 1995-04-24 | Single chip integrated heat vapor ink-jet print head |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 95103878 CN1146953A (en) | 1995-04-24 | 1995-04-24 | Single chip integrated heat vapor ink-jet print head |
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| Publication Number | Publication Date |
|---|---|
| CN1146953A true CN1146953A (en) | 1997-04-09 |
Family
ID=5074895
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 95103878 Pending CN1146953A (en) | 1995-04-24 | 1995-04-24 | Single chip integrated heat vapor ink-jet print head |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1074357C (en) * | 1998-02-26 | 2001-11-07 | 李韫言 | Front jetting single-chip integrated hot steam ink-jet printing head |
| CN1311973C (en) * | 2003-09-22 | 2007-04-25 | 飞赫科技股份有限公司 | Heat bubble type ink jet printing head and manufacturing procedure |
| CN101466547B (en) * | 2006-06-06 | 2011-03-23 | 惠普发展公司，有限责任合伙企业 | Print head with reduced adhesion stress |
-
1995
- 1995-04-24 CN CN 95103878 patent/CN1146953A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1074357C (en) * | 1998-02-26 | 2001-11-07 | 李韫言 | Front jetting single-chip integrated hot steam ink-jet printing head |
| CN1311973C (en) * | 2003-09-22 | 2007-04-25 | 飞赫科技股份有限公司 | Heat bubble type ink jet printing head and manufacturing procedure |
| CN101466547B (en) * | 2006-06-06 | 2011-03-23 | 惠普发展公司，有限责任合伙企业 | Print head with reduced adhesion stress |
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