CN114675454A - Array substrate, flexible liquid crystal display panel and pixel compensation method thereof - Google Patents

Array substrate, flexible liquid crystal display panel and pixel compensation method thereof Download PDF

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Publication number
CN114675454A
CN114675454A CN202210189668.XA CN202210189668A CN114675454A CN 114675454 A CN114675454 A CN 114675454A CN 202210189668 A CN202210189668 A CN 202210189668A CN 114675454 A CN114675454 A CN 114675454A
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voltage
pixel electrode
electrode
line
row
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Chinese (zh)
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沈婷婷
郑浩旋
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HKC Co Ltd
Mianyang HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Mianyang HKC Optoelectronics Technology Co Ltd
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Priority to CN202210189668.XA priority Critical patent/CN114675454A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306Circuit arrangements or driving methods for the control of single liquid crystal cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133305Flexible substrates, e.g. plastics, organic film
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Abstract

The application discloses an array substrate, a flexible liquid crystal display panel and a pixel compensation method thereof, wherein the array substrate comprises a plurality of data lines and scanning lines, the data lines and the scan lines intersect to define pixel regions, each of the pixel regions including a pixel electrode and a switching transistor controlling the pixel electrode, the grid electrode of the switch transistor is connected with the scanning line of the Nth row, the source electrode is connected with the data line of the Nth column, the drain electrode is connected with the pixel electrode, wherein the pixel region is further provided with a voltage sensing line and a sensing transistor which are disposed adjacent to the data line, the grid electrode of the induction transistor is connected with the scanning line of the (N-1) th row, one of the source electrode and the drain electrode is connected with the pixel electrode, the other one is connected with the voltage induction line, and the voltage induction line is connected with the control chip. With the structure, the picture display difference caused by the uneven thickness of the liquid crystal box can be reduced.

Description

Array substrate, flexible liquid crystal display panel and pixel compensation method thereof
Technical Field
The invention relates to the field of display panels, in particular to an array substrate, a flexible liquid crystal display panel and a pixel compensation method thereof.
Background
With the development of display devices, the flexibility requirements of the display industry for panels are increasing. An Organic Light Emitting Diode (OLED) Display device has a self-luminous characteristic and has a natural advantage as a flexible Display, but the OLED still has many technical difficulties at present, so that the flexible Display product cannot be widely applied.
As a mainstream Display panel in the current market, a Liquid Crystal Display (LCD) is developed for application in a flexible panel, and becomes a key project for developing LCD Display technology. The LCD flexible panel developed at present may cause uneven cell thickness (Gap) of liquid crystal when folded due to the inherent liquid crystal display principle of the LCD, thereby causing a difference in display screen.
Disclosure of Invention
The present application mainly solves the technical problem of providing an array substrate, a flexible liquid crystal display panel and a pixel compensation method thereof to reduce the picture display difference caused by uneven thickness of a liquid crystal cell.
In order to solve the above problem, the present application provides a first embodiment of an array substrate, which includes a plurality of data lines and scan lines, the data lines and the scan lines cross to define a pixel area, each pixel area includes a pixel electrode and control the switch transistor of the pixel electrode, the gate of the switch transistor is connected to the scan line in the nth row, the source is connected to the data line in the nth column, and the drain is connected to the pixel electrode, wherein the pixel area is further provided with a voltage sensing line and a sensing transistor which are adjacent to the data line, the gate of the sensing transistor is connected to the scan line in the N-1 st row, one of the source and the drain is connected to the pixel electrode, the other is connected to the voltage sensing line, and the voltage sensing line is connected to a control chip.
Therefore, the control chip can acquire the voltage of the pixel electrode in time through the voltage induction line, so that the voltage of the changed pixel electrode can be adjusted in time conveniently.
The array substrate further comprises an auxiliary scanning line, wherein the auxiliary scanning line is arranged on one side, away from the scanning line of the second row, of the scanning line of the first row, so that the voltage of the pixel electrode of the first row is induced through the voltage induction line.
Therefore, the voltage of the pixel electrode in the first row is detected by the auxiliary scanning line, and the voltage of the pixel electrode in the first row can be adjusted in time when the voltage of the pixel electrode in the first row changes.
The array substrate further comprises a substrate, a first insulating layer, an induction semiconductor layer and a second insulating layer; the grid electrode of the induction transistor is arranged between the substrate and the first insulating layer and corresponds to the induction semiconductor layer, the source electrode and the drain electrode of the induction transistor are respectively arranged between the first insulating layer and the second insulating layer and are connected through the induction semiconductor layer, one of the source electrode and the drain electrode of the induction transistor is connected with the pixel electrode, and the other one of the source electrode and the drain electrode of the induction transistor is connected with the voltage induction line.
Therefore, the sensing transistor includes a gate electrode, a source electrode and a drain electrode, and the gate electrode of the sensing transistor is controlled by the scan line, and the source electrode and the drain electrode are respectively connected to the voltage sensing line and the pixel electrode to detect the voltage of the pixel electrode through the scan line control voltage sensing line.
The pixel electrode is arranged on one side face, far away from the first insulating layer, of the second insulating layer, a through hole is formed in the second insulating layer, the through hole exposes the source electrode or the drain electrode of the sensing transistor, one of the source electrode and the drain electrode of the sensing transistor is connected with the pixel electrode through the through hole, the voltage sensing line is arranged between the first insulating layer and the second insulating layer, and the other of the source electrode and the drain electrode of the sensing transistor is connected with the voltage sensing line.
Therefore, the voltage sensing line is connected to the pixel electrode through the source and drain electrodes of the sensing transistor, so that the voltage sensing line acquires the voltage of the pixel electrode.
The application further provides a second embodiment of the flexible liquid crystal display panel, which comprises an array substrate, a liquid crystal layer and a color film substrate which are sequentially stacked, wherein the liquid crystal layer is located between the array substrate and the color film substrate, and the array substrate is the array substrate in the first embodiment.
And a common electrode is arranged on one side surface of the color film substrate close to the liquid crystal layer, corresponds to the pixel electrode and is connected with the control chip.
Therefore, when the flexible liquid crystal display panel is bent, the common electrode of the color film substrate affects the voltage of the pixel electrode, and the capacitance change between the common electrode and the pixel electrode can be detected through the control chip.
The present application further provides a third embodiment of a pixel compensation method for a flexible liquid crystal display panel, wherein the pixel compensation method includes: controlling the conduction of the induction transistor through the scanning line of the current row so as to conduct the voltage induction line with the pixel electrode of the next row, and acquiring the voltage of the pixel electrode of the next row through the voltage induction line; judging whether the voltage of the pixel electrode of the next row is equal to a preset voltage or not through a control chip; if not, adjusting the voltage of the pixel electrode of the next row; wherein, the voltage induction line is connected with the control chip.
Preferably, the preset voltage is a voltage of the pixel electrode when the flexible liquid crystal display panel is not bent.
Therefore, whether the flexible liquid crystal display panel is bent or not is judged by taking the voltage of the pixel electrode when the flexible liquid crystal display panel is not bent as a reference, and the voltage of the bent pixel electrode is adjusted, so that the problem of uneven pixel display caused by the bending of the flexible liquid crystal display panel is solved.
Preferably, the step of adjusting the voltage of the pixel electrode in the next row includes: and adjusting the voltage of the pixel electrode of the next row through the scanning line of the next row.
Therefore, the voltage of the pixel electrode of the next row is detected in the process of scanning and displaying the pixel of the previous row, so as to judge whether the flexible liquid crystal display panel corresponding to the pixel electrode of the next row is bent or whether the voltage of the pixel electrode of the next row is changed, and therefore, when the pixel of the next row is scanned and displayed, the voltage of the pixel electrode is adjusted to be the same as the display brightness of the pixel which is not bent.
The step of controlling the conduction of the sensing transistor through the scanning line of the current row to conduct the voltage sensing line with the pixel electrode of the next row and acquiring the voltage of the pixel electrode of the next row through the voltage sensing line includes: and supplying power to a grid electrode of an induction transistor through the scanning line of the current row, and turning on a source electrode and a drain electrode of the induction transistor, wherein the source electrode of the induction transistor is connected with one of the voltage induction line or the pixel electrode of the next row, and the drain electrode of the induction transistor is connected with the other of the voltage induction line and the pixel electrode of the next row, so that the pixel electrode of the next row is obtained through the voltage induction line.
Therefore, the induction tube is controlled to be opened through the scanning line of the current row so as to automatically detect the voltage of the pixel electrode of the next row, judge whether the voltage of the pixel electrode of the next row is normal or not, and adjust the voltage of the pixel electrode in time before the pixels of the next row are displayed.
The beneficial effect of this application is: the voltage induction line and the induction transistor are arranged on the array substrate, the grid electrode of the induction transistor is connected with the scanning line of the (N-1) th row, one of the source electrode and the drain electrode is connected with the pixel electrode of the Nth row, the other one of the source electrode and the drain electrode is connected with the voltage induction line, so that the voltage induction line and the pixel electrode of the Nth row form voltage induction, the voltage of the pixel electrode is detected through the voltage induction line, the detected voltage of the pixel electrode of the Nth row is sent to the control chip, the control chip adjusts the voltage of the pixel electrode of the Nth row, the pixels of the Nth row achieve average display brightness, and the picture display difference caused by uneven liquid crystal box thickness due to the fact that the flexible liquid crystal display panel is bent is reduced.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a first embodiment of an array substrate according to the present application;
fig. 2 is a schematic cross-sectional structure of the induction transistor of fig. 1;
FIG. 3 is a schematic structural diagram of a second embodiment of the first embodiment of the array substrate of the present application;
FIG. 4 is a schematic structural diagram of a first embodiment of a second embodiment of a flexible liquid crystal display panel according to the present application;
FIG. 5 is a schematic flow chart illustrating a first embodiment of a pixel compensation method for a flexible liquid crystal display panel according to a third embodiment of the present disclosure;
fig. 6 is a schematic flow chart of a second implementation of a pixel compensation method of a flexible liquid crystal display panel according to a third embodiment of the present application.
D, a data line; g scanning lines; a P/411 pixel electrode; com/431 common electrode; a T sense transistor; a T2 source electrode; a T3 drain electrode; a T1 gate; 20 a substrate; 21 a first insulating layer; 22 a sense semiconductor layer; 23 a second insulating layer; 201 a through hole; c/411 voltage induction line; g0 auxiliary scan line; 41 an array substrate; 42 a liquid crystal layer; 43 color film substrate.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plural" includes at least two in general, but does not exclude the presence of at least one.
It should be understood that the term "and/or" as used herein is merely a relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B, may represent: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that the terms "comprises," "comprising," or any other variation thereof, as used herein, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It should be noted that if directional indications (such as up, down, left, right, front, and back … …) are referred to in the embodiments of the present application, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a first embodiment of the array substrate of the present application.
As shown in fig. 1, the array substrate includes a plurality of data lines D and scan lines G, the data lines D and the scan lines G intersect to define pixel regions, and each pixel region includes a pixel electrode P and a switching transistor for controlling the pixel electrode. Wherein, the grid of the switch transistor is connected with the scanning line G of the Nth row NThe source electrode is connected with the data line D of the Nth columnNWherein N comprises a positive integer of 1, 2, 3, …, and the drain is connected to the pixel electrode P. Specifically, the switching transistor in the first row and the first column controls the pixel electrode P1 in the first row and the first column, the gate thereof is connected to the scan line G1 in the first row, the source thereof is connected to the data line D1 in the first column, and the drain thereof is connected to the pixel electrode P1 in the first row and the first column, so as to control the display of the pixel electrode P1 through the scan line G1 in the first row and the data line D1 in the first column, and so on, which is not described herein again.
In this embodiment, the pixel electrode P in each pixel region is further connected to the common electrode com on the color filter substrate through a storage capacitor. The pixel electrode P on the array substrate is arranged corresponding to the common electrode com on the color film substrate, and a liquid crystal layer is arranged between the array substrate and the color film substrate.
In the present embodiment, a voltage sensing line C and a sensing transistor T are also provided in each pixel region. Specifically, the array substrate is provided with a plurality of voltage sensing lines C and a plurality of sensing transistors T, wherein the voltage sensing lines C are adjacent to and parallel to the data lines D, so that each column of pixel electrodes P is connected with one voltage sensing line C, and each pixel electrode P is connected with one sensing transistor T.
Specifically, the gate of the current sense transistor T is connected to the scan line G of the N-1 th rowN-1One of the source and drain electrodes is connected to the pixel electrode P, and the other is connected to the voltage sensing line C. The voltage sensing line C is connected to a control chip (not shown) to detect the voltage of the pixel electrode P through the control chip.
In this embodiment, the pixel electrodes are scanned line by line, and in the process of scanning the pixels in the previous line, the voltage of the pixel electrodes in the next line can be detected, and the control chip is used to determine whether the voltage of the pixel electrodes in the next line reaches the preset voltage, that is, the preset display brightness is reached; if the voltage does not reach the preset voltage, the control chip controls the charging time of the scanning line of the next row or the charging voltage of the data line of the next row, so that the voltage of the pixel electrode of the next row reaches the preset voltage when the scanning line of the next row scans the pixel electrode of the next row.
Further, referring to fig. 2, fig. 2 is a schematic cross-sectional structure view of the induction transistor in fig. 1, as shown in fig. 2, the array substrate includes a substrate 20, a first insulating layer 21, an induction semiconductor layer 22, and a second insulating layer 23, which are sequentially stacked. The sensing transistor T includes a gate T1, a source T2, and a drain T3. Specifically, the gate electrode T1 is disposed between the substrate 20 and the first insulating layer 21, and is disposed corresponding to the sensing semiconductor 23. The source and drain electrodes T2 and T3 are disposed between the first and second insulating layers 21 and 23, and disposed at both sides of the sensing semiconductor layer 22, and connected through the sensing semiconductor layer 22. One of the source and drain electrodes T2 and T3 is connected to the pixel electrode P, and the other is connected to the voltage sensing line C.
The pixel electrode P is disposed on a side of the second insulating layer 23 away from the first insulating layer 21, so that the pixel electrode P is disposed close to the liquid crystal layer. A via hole 201 is formed on the second insulating layer 23, and the via hole 201 exposes the source electrode T2 or the drain electrode T3 of the sensing transistor T, so that the source electrode T2 or the drain electrode T3 is connected to the pixel electrode P through the via hole 201, and the other is connected to the voltage sensing line C. The voltage sensing line C is disposed between the first insulating layer 21 and the second insulating layer 23, and in the present embodiment, the voltage sensing line C and the data line D are disposed in the same layer and in parallel. In one embodiment, the via hole is disposed corresponding to the source T2 of the sensing transistor T, such that the source T2 is connected to the pixel electrode P, and the drain T3 is connected to the voltage sensing line C. In this embodiment, the pixel electrode P is disposed corresponding to the common electrode, the common electrode is disposed on a side of the liquid crystal layer away from the color filter substrate of the array substrate, and is disposed opposite to the pixel electrode, and the liquid crystal is formed between the common electrode and the pixel electrode P, which will not be described in detail herein.
In the present embodiment, the switch transistor and the sensing transistor T have the same structure, and are disposed in parallel.
In the present embodiment, the source, drain and gate of the switching transistor and the sensing transistor T are formed by metal layers.
In another embodiment, an auxiliary scan line is further disposed on the array substrate, specifically referring to fig. 3, and fig. 3 is a schematic structural diagram of a second embodiment of the first embodiment of the array substrate of the present application. As shown in fig. 3, the array substrate includes a plurality of data lines D and scan lines G, the data lines D and the scan lines G intersect to define pixel regions, each pixel region includes a pixel electrode P and a switching transistor for controlling the pixel electrode, and a gate of the switching transistor is connected to the scan line G of the nth rowNThe source electrode is connected with the data line D of the Nth columnNAnd the drain electrode is connected with the pixel electrode P.
In this embodiment, the array substrate is provided with a plurality of voltage sensing lines C and a plurality of sensing transistors T, wherein the voltage sensing lines C are disposed adjacent to and in parallel with the data lines D, so that each row of pixel electrodes P is connected to one voltage sensing line C, and each pixel electrode P is connected to one sensing transistor T. The grid of the induction transistor T is connected with the scanning line G of the (N-1) th rowN-1One of the source and drain electrodes is connected to the pixel electrode P, and the other is connected to the voltage sensing line C.
The array substrate further includes an auxiliary scan line G0 disposed on a side of the scan line G1 of the first row away from the scan line G2 of the second row, so as to sense the voltage of the pixel electrode P of the first row through the voltage sensing line C.
In this embodiment, the gate of the sensing transistor T of the pixel electrode P in the first row is connected to the auxiliary scanning line G0, one of the source and the drain is connected to the pixel electrode P in the first row, and the other is connected to the voltage sensing line C, so that the voltage sensing line C can detect the voltage of the pixel electrode P in the first row.
The beneficial effect of this embodiment is: the voltage induction line and the voltage induction line are arranged on the array substrate, the grid electrode of the induction transistor is connected with the scanning line of the N-1 th row, one of the source electrode and the drain electrode is connected with the pixel electrode of the N-1 th row, and the other one of the source electrode and the drain electrode is connected with the voltage induction line, so that when the scanning line of the N-1 th row scans the pixel electrode of the N-1 th row, the voltage induction line and the pixel electrode of the N-1 th row form voltage induction, the voltage of the pixel electrode is detected through the voltage induction line, the detected voltage of the pixel electrode of the N-1 th row is sent to the control chip, the control chip adjusts the voltage of the pixel electrode of the N-1 th row, the pixels of the N-1 th row achieve average display brightness, and the picture display difference caused by uneven liquid crystal box thickness due to the fact that the flexible liquid crystal display panel is bent is reduced. In the present embodiment, the scanning lines are scanned line by line.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a first implementation of a second embodiment of the flexible liquid crystal display panel of the present application. As shown in fig. 4, the flexible liquid crystal display panel includes an array substrate 41, a liquid crystal layer 42, and a color filter substrate 43, which are sequentially stacked, where a specific structure of the array substrate 41 is as described in the first embodiment and is not described herein again.
In this embodiment, the flexible liquid crystal display panel further includes a common electrode 431, and the common electrode 431 is disposed on a side of the color film substrate 43 close to the liquid crystal layer 42. The common electrode 431 is disposed corresponding to the pixel electrode 411 on the array substrate 41, and the pixel electrode 411 is disposed on a side surface of the array substrate 41 close to the liquid crystal layer 42. The liquid crystal layer 42 is also referred to as a liquid crystal cell, and cell thickness generally refers to the thickness of the liquid crystal layer 42. Since the array substrate 41 and the color filter substrate 43 of the flexible liquid crystal display panel are both formed of flexible substrates, they are easily bent, and thus the cell thickness is changed.
In this embodiment, the pixel electrode 411 is connected to the voltage sensing line through the sensing transistor on the array substrate, and the specific structure of the array substrate 41 is as described in the first embodiment and is not described herein again. The voltage sensing line is connected to the control chip to acquire a change in capacitance formed between the pixel electrode 411 and the common electrode 431 on the color filter substrate 43 through the control chip, and thus acquire a change in thickness of the liquid crystal layer 42.
The beneficial effect of this embodiment is: when the flexible liquid crystal display panel is bent, the voltage of the pixel electrode corresponding to the common electrode changes, the specific value of the change of the voltage of the pixel electrode is sensed through the voltage sensing line on the array substrate, and the voltage of the pixel electrode is adjusted through the scanning line, so that the voltage of the pixel electrode reaches a normal value, wherein the normal value is the voltage value when the flexible liquid crystal display panel is not bent.
The present application further provides a third embodiment of a pixel compensation method for a flexible liquid crystal display panel, and referring to fig. 5 in detail, fig. 5 is a schematic flow chart of a first implementation manner of the third embodiment of the pixel compensation method for the flexible liquid crystal display panel according to the present application. As shown in fig. 5, the pixel compensation method of the flexible liquid crystal display panel includes:
step S51: and controlling the conduction of the induction transistor through the scanning line of the current row so as to conduct the voltage induction line with the pixel electrode of the next row, and acquiring the voltage of the pixel electrode of the next row through the voltage induction line.
Wherein the voltage sense line is controlled by a sense transistor. Specifically, the gate of the sensing transistor controls the conduction of the source and the drain of the sensing transistor, and the source and the drain of the sensing transistor are respectively connected with the voltage sensing line and the pixel electrode, so that the voltage sensing line is conducted with the pixel electrode, and the voltage sensing line acquires the voltage of the pixel electrode. In this embodiment, the voltage sensing line is further connected to the control chip, and the control chip obtains the voltage of the pixel electrode through the voltage sensing line.
In this embodiment, the scan lines on the array substrate are scanned line by line. And acquiring the voltage of the pixel electrode of the next row through the voltage induction line in the process of controlling the pixels of the current row to display by the scanning line of the current row.
In this embodiment, the voltage of the pixel electrode of the first row does not need to be adjusted.
Specifically, the scanning line of the current row controls the pixel electrodes of the next row to be connected with the voltage sensing line so as to acquire the pixel electrodes of the next row through the voltage sensing line.
In one embodiment, the gate of the sensing transistor is connected to the scan line of the previous row, so that the current row voltage sensing line and the pixel electrode are controlled to be turned on by the scan line of the previous row, thereby measuring the voltage of the pixel electrode of the current row.
Step S52: and judging whether the voltage of the pixel electrode of the next row is equal to the preset voltage or not by the control chip.
The preset voltage is the voltage of the pixel electrode when the flexible liquid crystal display panel is not bent. In other embodiments, the preset voltage may also be a set voltage, which may be set by a user, and is not limited herein.
In this embodiment, the control chip is connected to the voltage sensing line, the voltage sensing line obtains the voltage of the pixel electrode in the next row, and transmits the voltage to the control chip, and the control chip determines whether the voltage of the pixel electrode is equal to a preset voltage.
Step S53: if not, adjusting the voltage of the pixel electrode of the next row.
Specifically, the scanning line of the next row controls the pixel electrodes of the next row to be conducted with the data lines so as to charge the pixel electrodes of the next row, so that the voltage of the pixel electrodes of the next row reaches a preset voltage. Specifically, the charging rate of the pixel electrode is compensated through the scanning line, so that the voltage of the pixel electrode reaches a preset voltage.
In this embodiment, since the scan lines are scanned line by line, the voltage of the pixel electrode in the next line can be obtained during the display of the pixels in the current line, so that the voltage of the pixel electrode in the next line reaches the preset voltage before the pixels in the next line are displayed, and the display brightness of the pixels in the next line is controlled, thereby achieving the technical purpose of controlling while displaying.
The array substrate comprises a switch transistor, wherein the grid electrode of the switch transistor is connected with a scanning line, the source electrode of the switch transistor is connected with a data line, and the drain electrode of the switch transistor is connected with a pixel electrode. The scan line turns on the source and drain of the switching transistor through the gate of the switching transistor, and further turns on the data line and the pixel electrode, so that the data line charges the pixel electrode to make the voltage of the pixel electrode reach a preset voltage. Specifically, the charging time of the pixel electrode is controlled by the scanning line so that the voltage of the pixel electrode reaches a preset voltage.
In another embodiment, the gate of the sense transistor of the current row is connected to the scan line of the current row, that is, when the scan line of the current row is scanned, the voltage of the pixel electrode of the current row is obtained through the voltage sense line, and when the next frame is scanned, the luminance displayed by the next pixel is adjusted through the scan line. However, the method of adjusting the measurement by this method has a delay property, and cannot adjust the voltage of the pixel electrode in time.
Step S54: if so, the voltage of the pixel electrode in the next row is not adjusted.
Specifically, if the voltage of the pixel electrode is equal to the predetermined voltage, the voltage of the pixel electrode is not adjusted.
Therefore, the beneficial effects of this embodiment are: the voltage of the pixel electrode of the next row is obtained through the scanning line of the current row, and the voltage of the pixel electrode of the next row is adjusted in time, so that the display brightness of the pixel reaches the preset brightness, and the picture display difference caused by uneven thickness of the liquid crystal box is reduced. On the other hand, whether the flexible liquid crystal display panel corresponding to the current pixel is bent or not can be judged through the preset voltage.
Referring to fig. 6 in detail, fig. 6 is a schematic flow chart of a second embodiment of a third embodiment of a pixel compensation method for a flexible liquid crystal display panel according to the present application. As shown in fig. 6, includes:
Step S61: the voltages of the pixel electrodes in the first row are obtained through the auxiliary scanning lines and the voltage induction lines.
In this embodiment mode, the voltage of the pixel electrode in the first row can be measured and adjusted by adding the auxiliary scanning line to the pixel electrode in the first row.
Step S62: and judging whether the voltage of the pixel electrode of the first row is equal to a preset voltage or not through the control chip.
The preset voltage may be a voltage of the pixel electrode when the flexible liquid crystal display panel is not bent.
Step S63: if not, adjusting the voltage of the pixel electrode of the first row through the scanning line of the first row.
Specifically, the scanning line of the first row controls the pixel electrodes of the first row to be conducted with the data line so as to charge the pixel electrodes of the first row, so that the voltage of the pixel electrodes of the first row reaches a preset voltage.
Step S64: if the voltage is equal to the first voltage, the voltage of the pixel electrode in the first row is not adjusted.
In this embodiment, since the scan lines are scanned line by line, the voltage of the pixel electrode in the first row may be obtained during the display of the pixels in the current row, so that the voltage of the pixel electrode in the first row reaches the preset voltage before the pixels in the first row are displayed, and the display brightness of the pixels in the first row is controlled, thereby achieving the technical purpose of controlling while displaying.
In the present embodiment, the voltage of the pixel electrode in the first row acquired by the auxiliary scanning line is increased to adjust the voltage of the pixel electrode in the first row, so that the display luminance of the pixel in the first row reaches the preset luminance, thereby reducing the problem of uneven screen display of the pixel in the first row.
The above embodiments are merely examples, and not intended to limit the scope of the present application, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present application, or those directly or indirectly applied to other related arts, are included in the scope of the present application.

Claims (10)

1. An array substrate comprises a plurality of data lines and scanning lines, wherein pixel regions are defined by the data lines and the scanning lines in a crossed mode, each pixel region comprises a pixel electrode and a switch transistor for controlling the pixel electrode, the grid electrode of the switch transistor is connected with the scanning line of the Nth row, the source electrode of the switch transistor is connected with the data line of the Nth column, and the drain electrode of the switch transistor is connected with the pixel electrode.
2. The array substrate of claim 1, further comprising an auxiliary scan line disposed on a side of the scan line of the first row away from the scan line of the second row to sense the voltage of the pixel electrode of the first row through the voltage sensing line.
3. The array substrate of claim 1, wherein the array substrate further comprises a substrate, a first insulating layer, a sensing semiconductor layer, and a second insulating layer;
the grid electrode of the induction transistor is arranged between the substrate and the first insulating layer and corresponds to the induction semiconductor layer, the source electrode and the drain electrode of the induction transistor are respectively arranged between the first insulating layer and the second insulating layer and are connected through the induction semiconductor layer, one of the source electrode and the drain electrode of the induction transistor is connected with the pixel electrode, and the other one of the source electrode and the drain electrode of the induction transistor is connected with the voltage induction line.
4. The array substrate of claim 3, wherein the pixel electrode is disposed on a side of the second insulating layer away from the first insulating layer, the second insulating layer having a via hole formed thereon, the via hole exposing a source or a drain of the sensing transistor, one of the source and the drain of the sensing transistor being connected to the pixel electrode through the via hole; the voltage sensing line is disposed between the first insulating layer and the second insulating layer, and the other of the source and the drain of the sensing transistor is connected to the voltage sensing line.
5. A flexible liquid crystal display panel comprises an array substrate, a liquid crystal layer and a color film substrate which are sequentially stacked, wherein the liquid crystal layer is positioned between the array substrate and the color film substrate, and the flexible liquid crystal display panel is characterized in that the array substrate is the array substrate of any one of claims 1 to 4.
6. The flexible liquid crystal display panel according to claim 5, wherein a common electrode is disposed on a side surface of the color film substrate close to the liquid crystal layer, and the common electrode is disposed corresponding to the pixel electrode and connected to the control chip.
7. A pixel compensation method of a flexible liquid crystal display panel is characterized by comprising the following steps:
controlling the conduction of the induction transistor through the scanning line of the current row so as to conduct the voltage induction line with the pixel electrode of the next row, and acquiring the voltage of the pixel electrode of the next row through the voltage induction line;
judging whether the voltage of the pixel electrode of the next row is equal to a preset voltage or not through a control chip;
if not, adjusting the voltage of the pixel electrode of the next row;
wherein, the voltage induction line is connected with the control chip.
8. The pixel compensation method of the flexible liquid crystal display panel of claim 7, wherein the predetermined voltage is a voltage of a pixel electrode when the flexible liquid crystal display panel is not bent.
9. The pixel compensation method of claim 7, wherein the step of adjusting the voltage of the pixel electrode of the next row comprises:
and adjusting the voltage of the pixel electrode of the next row through the scanning line of the next row.
10. The pixel compensation method of claim 7, wherein the step of controlling the sensing transistor to be turned on by the scan line of the current row to turn on the voltage sensing line to the pixel electrode of the next row and obtaining the voltage of the pixel electrode of the next row through the voltage sensing line comprises:
and supplying power to the grid electrode of the sensing transistor through the scanning line of the current row, and turning on the source electrode and the drain electrode of the sensing transistor, wherein the source electrode of the sensing transistor is connected with one of the voltage sensing line or the pixel electrode of the next row, and the drain electrode of the sensing transistor is connected with the other of the voltage sensing line and the pixel electrode of the next row, so as to obtain the pixel electrode of the next row through the voltage sensing line.
CN202210189668.XA 2022-02-28 2022-02-28 Array substrate, flexible liquid crystal display panel and pixel compensation method thereof Pending CN114675454A (en)

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