CN114665896A - Average value noise filtering circuit suitable for radio frequency receiver - Google Patents
Average value noise filtering circuit suitable for radio frequency receiver Download PDFInfo
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- CN114665896A CN114665896A CN202210288236.4A CN202210288236A CN114665896A CN 114665896 A CN114665896 A CN 114665896A CN 202210288236 A CN202210288236 A CN 202210288236A CN 114665896 A CN114665896 A CN 114665896A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/1027—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
Abstract
The invention discloses an average noise filtering circuit suitable for a radio frequency receiver, which comprises a first delay unit, a second delay unit and an average generating unit, wherein the first delay unit is used for generating an average noise; the first delay unit and the second delay unit are connected in sequence, a receiver output signal Vin is input to the first delay unit, the receiver output signal Vin, an output V1 of the first delay unit and an output V2 of the second delay unit are input to the average value generation unit together, and an output end of the average value generation unit is used as an output of the average value noise filtering circuit. The invention adopts the principle of average value noise reduction to delay and superpose the signals accompanied with noise and then carry out average value output, thus effectively reducing the peak-to-peak value of signal burrs, enabling the curve of the output signal to become smoother, and achieving the purposes of reducing the noise of a receiver and improving the sensitivity.
Description
Technical Field
The invention relates to a noise filtering circuit, in particular to a noise filtering circuit suitable for a radio frequency receiver.
Background
The wireless communication technology has spread all over our lives, and 5G, bluetooth and WiFi are all products under the wireless communication technology. The receiver is an important module of wireless communication and is responsible for receiving and processing complex signals received by the antenna and converting the signals from radio frequency to lower intermediate frequency, and the performance of the receiver directly influences the quality of the wireless communication.
The radio frequency receiver is a circuit system consisting of an antenna, a low noise amplifier, a mixer, a filter and a baseband processing circuit, in a microwave communication system, the receiver needs to process very weak signals, generally, if no noise interference exists, even very weak signals can be detected only by fully amplifying, but in practice, each part of the system inevitably has noise which is mainly divided into internal noise and external noise, and the internal noise is mainly generated by a feeder line in the receiver, a resistance component in the circuit, the amplifier, the mixer and the like; external noise is mainly introduced through an antenna, and various kinds of man-made interference, antenna thermal noise, antenna electric interference, cosmic interference, industrial interference and the like exist, so that weak signals are often submerged in the noise, and the sensitivity of a receiver for detecting signals is affected. The noise figure and the sensitivity of the receiver are key parameters for measuring the performance of the receiver, and the noise figure is a very basic parameter and is also a measure for measuring the noise magnitude of a receiver circuit. Sensitivity represents the ability of the receiver to capture weak signals, and since this indicator directly affects the communication range of the system, reducing the noise of the rf receiver is very critical to the system design.
The main method for reducing the noise of the radio frequency receiver in the prior art is based on a noise coefficient formula
Performing noise reduction processing, wherein FtotAs a total noise figure, F1Is the first-stage noise coefficient, and so on FiIs the i-th order noise coefficient, G1Is firstQualification power gain of the stage amplifier, and so on GiThe power gain of the i-th amplifier stage is used. The system noise coefficient obtained by a formula is greatly dependent on the first stage of a receiver link, so that the method mainly adopted is to design a high-gain low-noise amplifier to improve the system noise, but a very high-gain device often lacks linearity, the difficulty of design lies in balancing the linearity and the noise coefficient, and some low-noise amplifiers are designed by adopting an expensive gallium arsenide (GaAs) or gallium nitride (GaN) process, although the performance is improved, the design cost is also improved, so that the low-noise amplifier is not suitable for civil products.
Disclosure of Invention
The purpose of the invention is as follows: aiming at the prior art, the average value noise filtering circuit suitable for the radio frequency receiver is provided, so that the peak-to-peak value of output signal burrs is effectively reduced, the curve of the output signal becomes smoother, and the purposes of reducing the noise of the receiver and improving the sensitivity are achieved.
The technical scheme is as follows: an average value noise filtering circuit suitable for a radio frequency receiver comprises a first delay unit, a second delay unit and an average value generating unit; the first delay unit and the second delay unit are connected in sequence, a receiver output signal Vin is input to the first delay unit, the delay time of the first delay unit is the same as that of the second delay unit, the receiver output signal Vin, an output V1 of the first delay unit and an output V2 of the second delay unit are input to an average value generation unit together, the average value generation unit is used for carrying out linear addition on input signals and then averaging, and an output end of the average value generation unit is used as an output of the average value noise filtering circuit.
Further, the first delay unit and the second delay unit have the same structure, and each of the first delay unit and the second delay unit comprises an inverter D1, an inverter D2, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2; one end of a resistor R1 is used as an input end of the delay unit, the other end of the resistor R1 is simultaneously connected with an input end of an inverter D1 and one end of a capacitor C1, an output end of an inverter D1 is connected with one end of a resistor R2, the other end of the resistor R2 is simultaneously connected with an input end of an inverter D2 and one end of a capacitor C2, an output end of the inverter D2 is used as an output end of the delay unit, and the other ends of the capacitor C1 and the capacitor C2 are grounded.
Further, the average value generating unit comprises resistors R3-R10, an operational amplifier U1 and an operational amplifier U2; the resistances of the resistor R3, the resistor R4 and the resistor R5 are the same, and the resistance of the resistor R7 is equal to the resistances of the resistor R3, the resistor R4 and the resistor R531, the resistance values of the resistor R8 and the resistor R9 are equal; one end of a resistor R3, one end of a resistor R4 and one end of a resistor R5 are respectively used as a signal input end of the average value generating unit, the other end of the resistor R3, the other end of the resistor R4 and the other end of the resistor R5 are simultaneously connected to the inverting input end of the operational amplifier U1, a resistor R6 is connected between the non-inverting input end of the operational amplifier U1 and the ground in parallel, a resistor R7 is connected between the output end and the inverting input end of the operational amplifier U1 in parallel, the output end of the operational amplifier U1 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U2, a resistor R9 is connected between the output end and the inverting input end of the operational amplifier U2 in parallel, a resistor R10 is connected between the non-inverting input end of the operational amplifier U2 and the ground in parallel, and the output end of the operational amplifier U2 is used as a signal output end of the average value generating unit.
Has the beneficial effects that: 1. the invention adopts the principle of average value noise reduction to delay and superpose the signals accompanied with noise and then carry out average value output, thus effectively reducing the peak-to-peak value of the signal burr, enabling the curve of the output signal to be smoother, and achieving the purposes of reducing the noise of the receiver and improving the sensitivity.
2. The average value noise filtering circuit is independent of the receiver link, and the overall performance of the receiver cannot be influenced.
Drawings
FIG. 1 is a schematic diagram of an average value noise filtering circuit according to the present invention;
FIG. 2 is a schematic diagram of a delay cell structure;
FIG. 3 is a schematic diagram of a mean value generating unit;
FIG. 4 is a comparison graph of the effect of the average noise filtering circuit of the present invention.
Detailed Description
The invention is further explained below with reference to the drawings.
As shown in fig. 1, an average noise filtering circuit suitable for a radio frequency receiver includes a delay unit 101, a delay unit 102, and an average generating unit 103. The delay unit 101 and the delay unit 102 are connected in sequence, the receiver output signal Vin is input to the delay unit 101, the receiver output signal Vin, the output V1 of the delay unit 101, and the output V2 of the delay unit 102 are input to the average value generation unit 103, and the output end of the average value generation unit 103 is used as the output of the average value noise filtering circuit.
Specifically, the signal received by the antenna is noisy after being output by the receiver. When an output signal u (T) of a receiver accompanied by noise passes through the delay unit 101, an output signal u (T-T) is obtained, one path of the signal is input into the mean value generation unit 103 to be superposed with other signals, the other path of the signal is input into the delay unit 102, the delay unit 102 generates a corresponding delay output signal u (T-2T), the signal is input into the mean value generation unit 103 to be linearly added with the output signal u (T) of the receiver and the output signal u (T-T) of the delay unit 101, three paths of signals are input into a non-inverting input end of the signal mean value generation unit, and an output signal u (T-T) is obtained through proportional operation of an operational amplifier and a resistor
Based on the method of multiple superposition averaging of signals in digital signal processing, the invention delays the output signal of the receiver by one time unit and two time units respectively, superposes the output signal with the original signal, and outputs the superposed signal to a post-stage circuit after averaging processing, so that the noise in the output signal of the receiver can be effectively reduced by the circuit.
As shown in fig. 2, the delay units 101 and 102 of this embodiment have a function of delaying and outputting an input signal, and the delay unit 101 and the delay unit 102 have the same structure and function, and each of them includes an inverter D1, an inverter D2, resistors R1 and R2, capacitors C1 and C2, one end of the resistor R1 is used as an input end of the delay unit, the other end of the resistor R1 is simultaneously connected to the input end of the inverter D1 and one end of the capacitor C1, an output end of the inverter D1 is connected to one end of the resistor R2, the other end of the resistor R2 is simultaneously connected to the input end of the inverter D2 and one end of the capacitor C2, an output end of the inverter D2 is used as an output end of the delay unit, and the other ends of the capacitors C1 and C2 are grounded. The delay unit mainly delays the input signal Vin for a time T and outputs the time T, and the delay time can be accurately set by adjusting the values of the resistors R1 and R2 and the values of the capacitors C1 and C2.
As shown in fig. 3, the average value generating unit of the present embodiment has a function of adding the input signals and averaging the values, and includes eight linear resistors R3-R10, two operational amplifiers U1 and U2, resistors R3, R4, and R5 having the same resistance, and resistor R7 having the same resistance as resistors R3, R4, and R5
The resistance R8 and the resistance R9 are equal in value. The two operational amplifiers have the same structure and function, one end of each of resistors R3, R4 and R5 is used as a signal input end of the average value generation unit, the other end of each of resistors R3, R4 and R5 is connected to the inverting input end of the operational amplifier U1, the resistor R6 is connected between the non-inverting input end of the operational amplifier U1 and the ground in parallel, the resistor R7 is connected between the output end and the inverting input end of the operational amplifier U1 in parallel, the output end of the operational amplifier U1 is connected with one end of the resistor R8, the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U2, the resistor R9 is connected between the output end and the inverting input end of the operational amplifier U2 in parallel, the resistor R10 is connected between the non-inverting input end and the ground of the operational amplifier U2 in parallel, and the output end of the operational amplifier U2 is used as the signal output end of the average value generation unit. Inputting the three signals into the inverting input terminal of an operational amplifier U1 in the mean value generating unit, and obtaining an inverted mean value signal through proportional operation of the operational amplifier and a resistor
Then obtains the same phase through an operational amplifier U2Mean value signal
Thereby completing the function of superposition and re-averaging of the input signal and the delayed signal.
Fig. 4 is a comparison graph of the effect of the average noise filtering circuit of the present invention, where (a) is a signal without delay averaging, where d (t) is an added noise signal, s (t) is a signal without noise, and x (t) is a superposition of the above two signals, i.e. an output signal of an analog receiver accompanied by noise; in the graph (b), y (t) is an output signal after delay superposition averaging, and by comparing the fitting degree of the curve y (t) and the curve s (t) with the fitting degree of the curve x (t) and the curve s (t), the purpose of reducing the noise of the receiver and improving the sensitivity can be achieved by the average value noise filtering circuit provided by the invention.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (3)
1. An average value noise filtering circuit suitable for a radio frequency receiver is characterized by comprising a first delay unit, a second delay unit and an average value generating unit; the first delay unit and the second delay unit are connected in sequence, a receiver output signal Vin is input to the first delay unit, the delay time of the first delay unit is the same as that of the second delay unit, the receiver output signal Vin, an output V1 of the first delay unit and an output V2 of the second delay unit are input to an average value generation unit together, the average value generation unit is used for carrying out linear addition on input signals and then averaging, and an output end of the average value generation unit is used as an output of the average value noise filtering circuit.
2. The average value noise filtering circuit suitable for the radio frequency receiver according to claim 1, wherein the first delay unit and the second delay unit have the same structure, and each of the first delay unit and the second delay unit comprises an inverter D1, an inverter D2, a resistor R1, a resistor R2, a capacitor C1, and a capacitor C2; one end of a resistor R1 is used as an input end of the delay unit, the other end of the resistor R1 is simultaneously connected with an input end of an inverter D1 and one end of a capacitor C1, an output end of an inverter D1 is connected with one end of a resistor R2, the other end of the resistor R2 is simultaneously connected with an input end of an inverter D2 and one end of a capacitor C2, an output end of the inverter D2 is used as an output end of the delay unit, and the other ends of the capacitor C1 and the capacitor C2 are grounded.
3. The average noise filtering circuit for RF receiver according to claim 1, wherein the average generating unit comprises resistors R3-R10, an operational amplifier U1, and an operational amplifier U2; the resistances of the resistor R3, the resistor R4 and the resistor R5 are the same, and the resistance of the resistor R7 is equal to the resistances of the resistor R3, the resistor R4 and the resistor R5
The resistance values of the resistor R8 and the resistor R9 are equal; one end of a resistor R3, one end of a resistor R4 and one end of a resistor R5 are respectively used as a signal input end of the average value generating unit, the other end of the resistor R3, the other end of the resistor R4 and the other end of the resistor R5 are simultaneously connected to the inverting input end of the operational amplifier U1, a resistor R6 is connected between the non-inverting input end of the operational amplifier U1 and the ground in parallel, a resistor R7 is connected between the output end and the inverting input end of the operational amplifier U1 in parallel, the output end of the operational amplifier U1 is connected with one end of a resistor R8, the other end of the resistor R8 is connected with the inverting input end of the operational amplifier U2, a resistor R9 is connected between the output end and the inverting input end of the operational amplifier U2 in parallel, a resistor R10 is connected between the non-inverting input end of the operational amplifier U2 and the ground in parallel, and the output end of the operational amplifier U2 is used as a signal output end of the average value generating unit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210288236.4A CN114665896A (en) | 2022-03-23 | 2022-03-23 | Average value noise filtering circuit suitable for radio frequency receiver |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210288236.4A CN114665896A (en) | 2022-03-23 | 2022-03-23 | Average value noise filtering circuit suitable for radio frequency receiver |
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| CN114665896A true CN114665896A (en) | 2022-06-24 |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101335510A (en) * | 2008-07-28 | 2008-12-31 | 钰创科技股份有限公司 | Long delay circuit |
| CN101588193A (en) * | 2008-05-20 | 2009-11-25 | 三菱电机株式会社 | A transmission path estimation apparatus and method |
| CN102937455A (en) * | 2012-11-26 | 2013-02-20 | 昆山北极光电子科技有限公司 | Mean noise filtering method without phase delay |
| CN106443718A (en) * | 2016-09-09 | 2017-02-22 | 中国人民解放军国防科学技术大学 | Measurement zero value non-error tracking system and method based on correlation peak correction under non-ideal channel |
| CN109831183A (en) * | 2019-03-27 | 2019-05-31 | 河南天硕机电设备工程有限公司 | A kind of signal filter circuit of grain air conditioner intelligent management system |
| CN217087881U (en) * | 2022-03-23 | 2022-07-29 | 江苏稻源科技集团有限公司 | Noise filtering circuit of radio frequency receiver |
-
2022
- 2022-03-23 CN CN202210288236.4A patent/CN114665896A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101588193A (en) * | 2008-05-20 | 2009-11-25 | 三菱电机株式会社 | A transmission path estimation apparatus and method |
| CN101335510A (en) * | 2008-07-28 | 2008-12-31 | 钰创科技股份有限公司 | Long delay circuit |
| CN102937455A (en) * | 2012-11-26 | 2013-02-20 | 昆山北极光电子科技有限公司 | Mean noise filtering method without phase delay |
| CN106443718A (en) * | 2016-09-09 | 2017-02-22 | 中国人民解放军国防科学技术大学 | Measurement zero value non-error tracking system and method based on correlation peak correction under non-ideal channel |
| CN109831183A (en) * | 2019-03-27 | 2019-05-31 | 河南天硕机电设备工程有限公司 | A kind of signal filter circuit of grain air conditioner intelligent management system |
| CN217087881U (en) * | 2022-03-23 | 2022-07-29 | 江苏稻源科技集团有限公司 | Noise filtering circuit of radio frequency receiver |
Non-Patent Citations (2)
| Title |
|---|
| 佚名: "求2路输入平均值的运算电路", pages 1 - 2, Retrieved from the Internet <URL:https://www.elecfans.com/dianlutu/amp/20100508217220.html> * |
| 崔建国等: "基于cmos反相器的可精确计算延时电路", 《山西电子技术》, no. 2, pages 3 - 5 * |
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