CN114660443A - Integrated circuit ATE automatic retest system and method based on machine learning - Google Patents
Integrated circuit ATE automatic retest system and method based on machine learning Download PDFInfo
- Publication number
- CN114660443A CN114660443A CN202210567431.0A CN202210567431A CN114660443A CN 114660443 A CN114660443 A CN 114660443A CN 202210567431 A CN202210567431 A CN 202210567431A CN 114660443 A CN114660443 A CN 114660443A
- Authority
- CN
- China
- Prior art keywords
- retest
- prediction model
- training
- test
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N20/00—Machine learning
Abstract
The invention discloses an automatic retest system and method of integrated circuit ATE (automatic test equipment) based on machine learning, which comprises a test program controller, a retest monitoring program controller and a prediction model training controller, wherein a tested device set is tested according to retest information, then a prediction model generated by the prediction model training controller is called to judge whether the tested device set needs retest according to test result data, and if the retest information needs retest, the retest information is sent to the test program controller; the prediction model training controller is used for establishing a training data queue according to the retest data and generating a prediction model according to a machine learning method for calling the retest monitoring program controller. The invention can not only avoid chip damage, but also improve the yield of chips.
Description
Technical Field
The invention relates to an automatic retest system and method of integrated circuit ATE (automatic test equipment) based on machine learning, belonging to the technical field of semiconductor test.
Background
During the integrated circuit testing process, the situation of retesting often appears. The reasons for retesting may be:
the probe prick is too light or biased during the Chip Probe Test (CP).
The Wafer of the chip has dust and oil stains thereon, which results in poor contact between the chip and the probe.
Automatic Test Equipment (ATE) for short has insufficient Test stability and causes misdetection.
ATE is interfered by surrounding environment (temperature, humidity, electromagnetism and the like), and false detection exists.
And in a finished product Test (FT), a circuit pin is inclined, greasy dirt and the like.
For test failure caused by non-chip self reasons, part of chips which are actually qualified need to be filtered out through retesting, and yield loss is controlled to be the minimum.
In the traditional test method, after the whole Wafer (or the whole Lot Wafer) or the whole batch of finished product circuits are tested, all circuits with test failure (Fail) are retested once or more according to a set lower limit of yield rate, and the mistested chips or circuits are filtered out, so that the mistesting rate is reduced and the yield rate is improved.
The method has the problems of high test cost (the repeated test time cost of the failure circuit, the time cost of manual judgment, the time cost of transportation and the like, the labor cost and the like), chip Pad or circuit pin damage caused by repeated test, damage in the circuit and the like. The production management system is complex to manage and management errors such as material mixing and the like easily occur in repeated testing.
In the actual test process, the failure of the tested circuit is influenced by a plurality of factors, so that whether the failure is completely caused by the self reason of the chip cannot be defined by a simple ATE test result in the traditional failure circuit analysis process. Through the traditional test program programming, the non-chip self-reason of the failure cannot be efficiently identified (the identification process cannot take too much test time). Meanwhile, because of the many factors involved in such identification process, the required programming knowledge and capability have high requirements, and general test engineers cannot do it.
Disclosure of Invention
The purpose of the invention is as follows: in order to overcome the defects in the prior art, a retest monitoring program which runs in parallel needs to analyze the test result of a test program in real time while the normal test program runs, and tells ATE whether to retest immediately after the normal test program is tested, the invention provides an integrated circuit ATE automatic retest system and method based on machine learning, which can perform automatic retest and have high retest precision. If a certain number of circuits which fail in the normal test process need to pass through a machine learning method after retesting, relevant failure characteristics are extracted and classified failure models are established if the circuits are judged to be good products, and each type of failure model corresponds to one or more failure mechanisms. For failures caused by the reason of a non-DUT (Device Under Test, DUT for short), it can be determined that retesting is required, and a Test program controller of ATE (automatic Test Equipment, ATE for short) is notified to perform retesting immediately.
The technical scheme is as follows: in order to achieve the purpose, the invention adopts the technical scheme that:
the utility model provides an integrated circuit ATE automatic retest system based on machine learning, includes test program controller, retest control program controller, prediction model training controller, wherein:
and the test program controller is used for testing the tested device set according to the retest information and sending the tested test result data to the retest monitoring program controller.
And the retest monitoring program controller is used for calling a prediction model generated by the prediction model training controller to judge whether the tested device set needs retest according to the test result data, and sending retest information to the test program controller if the retest is needed.
The prediction model training controller is used for establishing a training data queue according to the retest data and generating a prediction model according to a machine learning method for calling the retest monitoring program controller.
Preferably: the prediction model training controller comprises a training data manager, a global data pool manager and a prediction model generator.
The training data manager comprises a training data set queue and a training data generator, and is used for receiving test data of the global data pool manager or retest data of the retest monitoring program controller, establishing a training data set and outputting the training data set for the prediction model generator to perform model training.
The global databank manager is responsible for storing test data for managing the integrated circuit ATE and the device set under test.
And the prediction model generator is responsible for acquiring a training data set from the global data pool manager to complete the training of the prediction model. And meanwhile, the method is responsible for calling the prediction model for the retest monitoring program controller or initializing the retest monitoring program controller.
Preferably: the prediction model generator includes a logistic regression function model:
wherein the content of the first and second substances,
for the predicted retest probability values corresponding to the sampled data,
is a linear accumulated value of the sampled data,
are logistic regression parameters.
Preferably: the prediction model generator includes a loss function model:
wherein the content of the first and second substances,
as a loss function, for interpreting the prediction resultThe degree of difference from the true result. The larger the difference, the larger the value.
Is the number of samples;
is as followsiThe true label of each sample, i.e., 0 or 1;
is as followsiPredicting the probability value of the retesting corresponding to each sample;
is as followsiCharacteristic values of individual samples.
Preferably, the following components: the prediction model generator is continuously updated by adopting a gradient descent method
Finally approach to
Minimum value of (c). Updating
The formula of (1) is as follows:
wherein the content of the first and second substances,
is as follows
The weight value of each of the parameters is,
are subscripts to the parameters, representing the number of parameters,
to learn the rate, it is used to control the time it takes to repeatedly calculate the equations until the loss function converges unchanged (minimum value).
Preferably, the following components: and the training data manager automatically informs the prediction model generator to start the training of a new prediction model according to the updating condition or the triggering condition of the data queue in the training data set.
An automatic retest method of integrated circuit (ATE) based on machine learning comprises the following steps:
and step 30, according to the test result input of the test program controller, judging whether the test result of the tested device set is retest data or not by the retest monitoring program controller. And outputting the test result of the retesting to the prediction model training controller.
And 31, for the normal test result of the prediction model training controller, the retest monitoring program controller calls the prediction model generated by the prediction model training controller to calculate the probability that the tested device set corresponding to the data needs retest. And giving out an instruction whether retest is needed or not for the test result with the probability value larger than the threshold value, and outputting the instruction which needs retest to the test program controller if retest is needed.
And step 32, the prediction model training controller receives the retest test result to establish a training data set, and outputs the training data set for the prediction model generator to perform model training. The prediction model generator obtains a training data set and continuously updates the training data set by adopting a gradient descent method
Judgment of
Whether the number of cycles is less than a set threshold or not, or whether the number of cycles is greater than a set number threshold or not, if so
If the number of times of circulation is smaller than the set threshold value or the number of times of circulation is larger than the set threshold value, the prediction model is output.
And step 33, the machine learning algorithm controller is used for receiving the prediction model obtained in the step 32 and updating the prediction model. And meanwhile, according to the test data input of the test program controller, calculating the probability of retesting through the updated prediction model, and outputting the probability to the retesting monitoring program controller.
Compared with the prior art, the invention has the following beneficial effects:
1. the chip is prevented from being pressed by a secondary needle or socket, and the damage of the pad of the chip or the damage of the pins of a finished product is reduced.
2. The retest probability of the wafer or the finished product batch of the chip is reduced, the yield of the wafer or the finished product batch is improved, and the effective output (route rate) of the equipment in unit time is improved, so that the test cost is reduced.
3. The difficulty of a production management system is reduced, the problems of mixing of failure products and the like in the test process are reduced, and the test quality is improved.
Drawings
FIG. 1 is a diagram of an ATE test program controller.
FIG. 2 is a schematic diagram of a predictive model training controller.
FIG. 3 is a flow chart of predictive model training controller training.
FIG. 4 is a schematic diagram of a retest monitor controller.
Detailed Description
The present invention is further illustrated by the following description in conjunction with the accompanying drawings and the specific embodiments, it is to be understood that these examples are given solely for the purpose of illustration and are not intended as a definition of the limits of the invention, since various equivalent modifications will occur to those skilled in the art upon reading the present invention and fall within the limits of the appended claims.
An automatic retest system of integrated circuit ATE based on machine learning, as shown in fig. 1-4, comprises a test program controller 2, a retest monitor program controller 4, and a prediction model training controller 6, wherein:
the Test Program Controller 2(Test Program Controller, TPC for short) is configured to Test the device set to be tested according to the retest information, and send Test result data after the Test to the retest monitoring Program Controller 4. The test system is a group of PC programs in ATE which are responsible for test program execution, hardware control, test result storage and test sorting control.
The retest monitoring program controller 4 is configured to call the prediction model generated by the prediction model training controller 6 to determine whether the device set under test needs retest according to the test result data, and send retest information to the test program controller 2 if retest is needed.
A Device Under Test (dut) is a Set of devices Under Test corresponding to a certain number of lots (wafer lot) of chips (circuits) Under the conditions of a given Device model, Test equipment model/ID number, station number, Test time period, etc. A relatively stable and accurate failure model and prediction model may be derived for test data within the collection of devices under test that meets the condition.
The test result data comprises accurate test results of various parameters of the DUT and the environment (comprising voltage, current, frequency period, signal-to-noise ratio, temperature and humidity, EMI noise, data storage time, chip position coordinates, equipment number, station number, Wafer ID, chip batch number and other information); and the DUT is test Pass (Pass) or Fail (Fail) information.
The retest notification 5 is a prediction output (whether retest is necessary) of the retest monitor controller 4, and is used to notify the test controller 2 whether retest operation is performed,
the prediction model training controller 6 is used for establishing a training data queue according to retest data, and is also used for generating a prediction model according to a machine learning method for calling of the retest monitoring program controller 4.
The predictive model training controller 6 includes a training data manager 20, a global data pool manager 21, and a predictive model generator 22.
The training data manager 20 includes a training data set queue and a training data generator, and the training data manager 20 is configured to receive test data of the global data pool manager 21 or retest data of the retest monitoring program controller 4, establish a training data set, and output the training data set for the prediction model generator to perform model training. The training data manager 20 automatically notifies the predictive model generator 22 to initiate training of a new predictive model based on an update condition (e.g., new data exceeds a certain percentage) or a trigger condition (e.g., timing) of a data queue in the training dataset.
The global pool manager 21 is responsible for holding test data that manages the integrated circuit ATE and the set of devices under test. And meanwhile, the system is responsible for outputting training data queue data to each prediction model training controller.
The prediction model generator 22 is responsible for obtaining the training data set from the global data pool manager 21 to complete the training of the prediction model. And meanwhile, the prediction model is used for calling the retest monitoring program controller 4, or the retest monitoring program controller 4 is initialized.
Note that the predictive model is trained based on the DUT type, so the data acquired is also based on data of the same DUT type.
Note that: the prediction model training controller realizes an automatic generation mechanism of the prediction model, so that an algorithm used by the retest monitoring program controller can be matched with the latest failure mode of the DUT set, and the automatic learning of the DUT set is realized. The influence of the change of the failure mode caused by the change of the DUT batch (lot), the change of the environment, the change of the station equipment and the like on the prediction accuracy in the actual test process can be automatically adapted, and the work of manual intervention is reduced.
The prediction model generator 22 adopts logistic regression as a machine learning algorithm, and adopts a supervised learning method to perform machine learning. In actual implementation, other classification algorithms may also be used.
The prediction model generator 22 employs a logistic regression function model:
wherein the content of the first and second substances,
for the predicted retest probability values of the corresponding sampled data,
is a linear accumulated value of the sampled data,
are logistic regression parameters.
The logistic regression function is established based on the linear regression function and the sigmoid function, and the subsequent prediction model is also established based on the regression function.
TABLE 1 data set queue in training data manager
As shown in table 1: wherein m represents the number of training data samples, Ne represents the total number of environmental parameters (the environmental parameters include parameters independent of a specific DUT such as machine station number, temperature and humidity, environmental noise, test time, product name, Wafer coordinate and the like), and Nt represents the total number of test parameters (the test parameters include voltage, current, frequency and signal-to-noise ratio of each DUT, whether retesting is performed or not, and the like); note that: ne + Nt = n, i.e. the total number of all parameters representing the training data set.
And (4) retesting results: the actual retest result of the DUT corresponding to the training sample data is obtained, where 1 is Pass, i.e., the test passes. And 0 is Fail, i.e. retest fails. This is the result of the supervised identification of the training data.
The predicted output outcome for each training data requires the most likely match to that outcome.
The aim of the exercise is to calculate the predicted value of the training data according to the regression function
Maximum distance of supervised identification result with training dataThe degrees are consistent. To achieve this, one needs to solve a set of solutions
So that the following loss function has a minimum value.
Loss function model:
wherein the content of the first and second substances,
is a loss function that accounts for the degree to which the predicted outcome differs from the true outcome. The larger the difference, the larger the value.
Is the number of samples;
is as followsiThe true label of each sample, i.e., 0 or 1;
is a firstiPredicting the probability value of the retesting corresponding to each sample;
is as followsiCharacteristic values of individual samples.
Continuously updating by gradient descent method
Ultimate approach
Minimum value of (c). Updating
The formula of (1) is:
wherein, the first and the second end of the pipe are connected with each other,
is as follows
The weight value of each of the parameters is,
are subscripts to the parameters, representing the number of parameters,
to learn the rate, it is used to control the time it takes to repeat the computational formula until the loss function converges to an invariant (minimum).
Finally, solve for
To solve
To a problem of (a). According to the above formula, the computer can be processed by programming cycle, so that the result can be obtained conveniently.
An automatic retest method for integrated circuit ATE based on machine learning, as shown in fig. 4, includes the following steps:
and step 30, inputting the test result of the test program controller 2, and judging whether the test result of the tested device set is retest data or not by the retest monitoring program controller 4. And outputting the test result of the retesting to the prediction model training controller 6.
In step 31, the prediction model training controller 6 calls the prediction model generated by the prediction model training controller 6 to calculate the probability that the tested device set corresponding to the data needs to be retested, for the data with the failure (Fail) test result obtained in the normal (first pass) test. And giving out an instruction whether retesting is required or not for the test result with the probability value larger than the threshold, and outputting the instruction which is required to retest to the test program controller 2 if the retesting is required.
Step 32, as shown in fig. 3, the prediction model training controller 6 receives the retested test result to establish a training data set, and outputs the training data set for the prediction model generator to perform model training. The predictive model generator 22 obtains a training data set and continuously updates the training data set by a gradient descent method
Judgment of
Whether the number of cycles is less than a set threshold or not, or whether the number of cycles is greater than a set number threshold or not, if so
If the number of cycles is smaller than the set threshold or the number of cycles is larger than the set threshold, the prediction model is output.
And step 33, the machine learning algorithm controller is used for receiving the prediction model obtained in the step 32 and updating the prediction model. Meanwhile, according to the test data input of the test program controller 2, the probability of retesting is calculated through the updated prediction model, and the probability is output to the retesting monitoring program controller 4.
In addition, in actual implementation, the predictive model training controller may be run in the same computer as the ATE, corresponding to a stand-alone run version. The method can complete automatic on-line retest judgment with lower cost for small-batch tests.
The predictive model training controller can also run in an independent server, and the predictive model training controller can receive the input of a plurality of ATE (automatic test equipment) at the same time and feed back the calculation output result. The method is suitable for large-batch and multi-ATE test scenes, and the cost is relatively high.
The failure model is established by performing machine learning on the failure characteristics of the chip retested every time. For the circuit which fails in the test, the probability of retesting is calculated through a machine learning algorithm, and whether retesting needs to be carried out immediately is automatically determined on line, so that the on-line automatic retesting in the mass production process is realized. The method realizes automatic retest in the normal test process, and brings the following meanings:
1. the chip is prevented from being pressed by a secondary needle or socket, and the damage of the pad of the chip or the damage of the pins of a finished product is reduced.
2. The retest probability of the wafer or the finished product batch is reduced, the yield of the wafer or the finished product batch is improved, and the effective yield (yield rate) of the equipment in unit time is improved, so that the test cost is reduced.
3. The difficulty of a production management system is reduced, the problems of mixing of failure products and the like in the test process are reduced, and the test quality is improved.
The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.
Claims (7)
1. The utility model provides an integrated circuit ATE automatic retest system based on machine learning which characterized in that: including test program controller (2), retest control program controller (4), prediction model training controller (6), wherein:
the test program controller (2) is used for testing the tested device set according to the retest information and sending the tested test result data to the retest monitoring program controller (4);
the retest monitoring program controller (4) is used for calling a prediction model generated by the prediction model training controller (6) to judge whether the tested device set needs retest according to the test result data, and if the retest is needed, retest information is sent to the test program controller (2);
the prediction model training controller (6) is used for establishing a training data queue according to retest data, and simultaneously is used for generating a prediction model according to a machine learning method for calling the retest monitoring program controller (4).
2. Integrated circuit ATE automatic retest system based on machine learning according to claim 1, characterized in that: the predictive model training controller (6) comprises a training data manager (20), a global data pool manager (21) and a predictive model generator (22);
the training data manager (20) comprises a training data set queue and a training data generator, and the training data manager (20) is used for receiving test data of the global data pool manager (21) or retest data of the retest monitoring program controller (4), establishing a training data set and outputting the training data set for the prediction model generator to perform model training;
the global data pool manager (21) is responsible for storing test data for managing the integrated circuit ATE and the device under test set;
the prediction model generator (22) is responsible for acquiring a training data set from the global data pool manager (21) to complete the training of the prediction model; and meanwhile, the prediction model is used for calling the retest monitoring program controller (4) or initializing the retest monitoring program controller (4).
3. Integrated circuit ATE automatic retest system based on machine learning according to claim 2, characterized in that: the prediction model generator (22) comprises a logistic regression function model:
wherein, the first and the second end of the pipe are connected with each other,
for the predicted retest probability values corresponding to the sampled data,
is a linear accumulated value of the sampled data,
are logistic regression parameters.
4. Machine learning based integrated circuit (ATE) automatic retest system according to claim 3, characterized in that: the prediction model generator (22) comprises a loss function model:
wherein the content of the first and second substances,
in order to be a function of the loss,
as to the number of samples,
is as followsiThe true label of each sample, i.e., 0 or 1;
5. The integrated circuit (ATE) automatic retest system based on machine learning of claim 4, wherein: the prediction model generator (22) is continuously updated by a gradient descent method
Ultimate approach
Minimum of (2)A value; updating
The formula of (1) is:
wherein the content of the first and second substances,
is as followsjThe weight value of each of the parameters is,
is the learning rate.
6. Machine learning based integrated circuit (ATE) automatic retest system according to claim 5, characterized in that: the training data manager (20) automatically notifies the predictive model generator (22) to initiate new predictive model training based on the update or trigger condition of the data queue in the training data set.
7. A retest method for a machine learning based integrated circuit ATE automatic retest system according to claim 5, comprising the steps of:
step 30, according to the test result input of the test program controller (2), the retest monitoring program controller (4) judges whether the test result of the tested device set is retest data; outputting the test result of the retesting to a prediction model training controller (6);
31, for a normal test result, the prediction model training controller (6) calls a prediction model generated by the prediction model training controller (6) to calculate the probability that a tested device set corresponding to the data needs retesting by the retesting monitoring program controller (4); for the test result with the probability value larger than the threshold value, giving an instruction whether retesting is needed, and if the retesting is needed, outputting the instruction to the test program controller (2);
step 32, the prediction model training controller (6) receives the retested test result to establish a training data set, and outputs the training data set for the prediction model generator to perform model training; the predictive model generator (22) obtains a training data set and continuously updates the training data set by a gradient descent method
Judgment of
Whether the number of cycles is less than a set threshold or not, or whether the number of cycles is greater than a set number threshold or not, if so
If the number of cycles is smaller than the set threshold value or the number of cycles is larger than the set threshold value, outputting a prediction model;
step 33, the machine learning algorithm controller is used for receiving the prediction model obtained in the step 32 and updating the prediction model; meanwhile, according to the test data input of the test program controller (2), the probability of retesting is calculated through the updated prediction model, and the probability is output to the retesting monitoring program controller (4).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210567431.0A CN114660443A (en) | 2022-05-24 | 2022-05-24 | Integrated circuit ATE automatic retest system and method based on machine learning |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210567431.0A CN114660443A (en) | 2022-05-24 | 2022-05-24 | Integrated circuit ATE automatic retest system and method based on machine learning |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114660443A true CN114660443A (en) | 2022-06-24 |
Family
ID=82036891
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210567431.0A Pending CN114660443A (en) | 2022-05-24 | 2022-05-24 | Integrated circuit ATE automatic retest system and method based on machine learning |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114660443A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116774017A (en) * | 2023-08-22 | 2023-09-19 | 南京宏泰半导体科技股份有限公司 | Chip test efficiency improving system and method based on machine learning |
| WO2024005798A1 (en) * | 2022-06-28 | 2024-01-04 | Siemens Industry Software Inc. | A system on a chip comprising a diagnostics module |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010267689A (en) * | 2009-05-13 | 2010-11-25 | Renesas Electronics Corp | Method of manufacturing semiconductor integrated circuit device |
| JP2010278073A (en) * | 2009-05-26 | 2010-12-09 | Panasonic Corp | Semiconductor integrated circuit, and device and method for inspecting the same |
| CN104635138A (en) * | 2013-11-12 | 2015-05-20 | 上海华虹集成电路有限责任公司 | Method for retesting integrated chips with memory units |
| US20190050515A1 (en) * | 2018-06-27 | 2019-02-14 | Intel Corporation | Analog functional safety with anomaly detection |
| CN111814870A (en) * | 2020-07-06 | 2020-10-23 | 北京航空航天大学 | CPS fuzzy test method based on convolutional neural network |
| CN113191399A (en) * | 2021-04-12 | 2021-07-30 | 普赛微科技(杭州)有限公司 | Method for improving yield of semiconductor chips based on machine learning classifier |
| WO2021181863A1 (en) * | 2020-03-10 | 2021-09-16 | 株式会社アドバンテスト | Assessment device, test system, assessment method, and assessment program |
| CN113900869A (en) * | 2021-09-28 | 2022-01-07 | 普赛微科技(杭州)有限公司 | Chip test data judgment method and device, storage medium and test method |
-
2022
- 2022-05-24 CN CN202210567431.0A patent/CN114660443A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010267689A (en) * | 2009-05-13 | 2010-11-25 | Renesas Electronics Corp | Method of manufacturing semiconductor integrated circuit device |
| JP2010278073A (en) * | 2009-05-26 | 2010-12-09 | Panasonic Corp | Semiconductor integrated circuit, and device and method for inspecting the same |
| CN104635138A (en) * | 2013-11-12 | 2015-05-20 | 上海华虹集成电路有限责任公司 | Method for retesting integrated chips with memory units |
| US20190050515A1 (en) * | 2018-06-27 | 2019-02-14 | Intel Corporation | Analog functional safety with anomaly detection |
| CN110647414A (en) * | 2018-06-27 | 2020-01-03 | 英特尔公司 | Improved analog function security with anomaly detection |
| WO2021181863A1 (en) * | 2020-03-10 | 2021-09-16 | 株式会社アドバンテスト | Assessment device, test system, assessment method, and assessment program |
| CN111814870A (en) * | 2020-07-06 | 2020-10-23 | 北京航空航天大学 | CPS fuzzy test method based on convolutional neural network |
| CN113191399A (en) * | 2021-04-12 | 2021-07-30 | 普赛微科技(杭州)有限公司 | Method for improving yield of semiconductor chips based on machine learning classifier |
| CN113900869A (en) * | 2021-09-28 | 2022-01-07 | 普赛微科技(杭州)有限公司 | Chip test data judgment method and device, storage medium and test method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024005798A1 (en) * | 2022-06-28 | 2024-01-04 | Siemens Industry Software Inc. | A system on a chip comprising a diagnostics module |
| CN116774017A (en) * | 2023-08-22 | 2023-09-19 | 南京宏泰半导体科技股份有限公司 | Chip test efficiency improving system and method based on machine learning |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114660443A (en) | Integrated circuit ATE automatic retest system and method based on machine learning | |
| US11187747B2 (en) | Inspection system and malfunction analysis/prediction method for inspection system | |
| WO2008115755A2 (en) | A testing method using a scalable parametric measurement macro | |
| JP2015520505A (en) | Interposer between inspection machine and material handling device to separate and manage various requests from multiple entities in inspection cell operation | |
| JP2023535721A (en) | Prediction of equipment failure modes from process traces | |
| US7184932B1 (en) | Reliability prediction for complex components | |
| US20140282327A1 (en) | Cutter in diagnosis (cid) a method to improve the throughput of the yield ramp up process | |
| KR20210100028A (en) | Method of examining specimens and system thereof | |
| Appello et al. | Understanding yield losses in logic circuits | |
| CN115616374A (en) | Machine learning-based semiconductor chip test system | |
| KR102581229B1 (en) | Analysis device, analysis method and analysis program | |
| TWI762773B (en) | Analysis device, analysis method, and recording medium on which analysis program is recorded | |
| US20170220706A1 (en) | Systems, methods and apparatus that employ statistical analysis of structural test information to identify yield loss mechanisms | |
| US20050114058A1 (en) | Method for analyzing inspected data, apparatus and its program | |
| CN116453437B (en) | Display screen module testing method, device, equipment and storage medium | |
| US11899065B2 (en) | System and method to weight defects with co-located modeled faults | |
| Ahsan et al. | Data-driven prognostics for smart qualification testing of electronic products | |
| WO2020075326A1 (en) | Analysis device, analysis method, and analysis program | |
| CN116774017A (en) | Chip test efficiency improving system and method based on machine learning | |
| CN117912536A (en) | Memory chip aging test management method and system | |
| TWM618949U (en) | Process event abnormality analysis platform using artificial intelligence | |
| TWM627157U (en) | Process time anomaly analysis platform using artificial intelligence | |
| TWM618958U (en) | Development platform capable of realizing big data analysis | |
| Bangalore et al. | Schmoo Data Analysis Using Machine Language Algorithms | |
| TW202331276A (en) | Systems and methods for multidimensional dynamic part average testing |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20220624 |
|
| RJ01 | Rejection of invention patent application after publication |