CN114660437A - Waveform file generation method and device - Google Patents
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- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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Abstract
The embodiment of the invention provides a waveform file generation method and a waveform file generation device, which relate to the technical field of chip testing, and the method comprises the following steps: the method comprises the steps of obtaining a waveform file generated in the process of simulating a chip to be tested, and obtaining debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating the debugging information; respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp; and respectively writing debugging information corresponding to each first timestamp into the waveform file based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for testing hardware of the chip to be tested. The waveform generated by applying the scheme provided by the embodiment of the invention contains debugging information, so that the debugging efficiency in the chip testing process can be improved by applying the generated waveform file to test the chip.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a waveform file generation method and a waveform file generation device.
Background
In order to Test whether the functions of the chip can achieve the design purpose, an Automatic Test Equipment (ATE) is used to perform the function Test on the chip. When the ATE is used for testing a chip, the ATE analyzes a vcd (value Change dump) waveform file for testing the chip to obtain a stimulus signal, and then inputs the stimulus signal into a pin of the chip, and if an output signal of the chip is an expected signal, the chip is indicated to realize a preset function, so that a design purpose can be realized, and the test is passed.
In the process of using ATE to perform chip testing, a situation that an output signal is not an expected signal may occur, and at this time, it may be considered that the chip cannot implement a preset function, and the chip needs to be debugged. However, since the output signal is a timing signal and cannot intuitively reflect the specific processing performed by the chip at each time in the process of processing the input signal, it is difficult to locate a problematic position of the chip when the chip is debugged, and the debugging efficiency is low.
Disclosure of Invention
The embodiment of the invention aims to provide a waveform file generation method and a waveform file generation device so as to generate a waveform file. The specific technical scheme is as follows:
in a first aspect, an embodiment of the present invention provides a waveform file generation method, where the method includes:
the method comprises the steps of obtaining a waveform file generated in the process of simulating a chip to be tested, and obtaining debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating the debugging information;
respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp;
and respectively writing debugging information corresponding to each first timestamp into the waveform file based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain a waveform file for testing hardware of the chip to be tested.
In an embodiment of the present invention, the writing, into the waveform file, the debugging information corresponding to each first timestamp based on a recording position of a second timestamp close to each first timestamp in the waveform file, to obtain a waveform file for performing a hardware test on the chip to be tested, includes:
writing the debugging information corresponding to each first timestamp into the waveform file to obtain a waveform file for performing hardware test on the chip to be tested according to the following mode:
if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file, wherein the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp;
and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position, adjacent to and behind the data position of the waveform data corresponding to the target timestamp, in the waveform file.
In an embodiment of the present invention, the writing the debugging information corresponding to each first timestamp into the waveform file includes:
writing debugging information corresponding to the first timestamp into the waveform file according to a target format, wherein the target format is as follows: the debugging information corresponding to the first timestamp is located between the preset first debugging information starting identifier and the preset first debugging information ending identifier.
In an embodiment of the present invention, the separately determining second timestamps recorded in the waveform file, which are close to each first timestamp, includes:
analyzing the waveform file to obtain a second timestamp recorded in the waveform file and a time unit of the second timestamp;
and respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp based on the time unit of the second time stamp and the time unit of the first time stamp.
In an embodiment of the present invention, the determining the second timestamps, which are recorded in the waveform file and are close to each first timestamp, based on the time unit of the second timestamp and the time unit of the first timestamp respectively includes:
if the time unit of the second timestamp is not consistent with the time unit of the first timestamp, unifying each first timestamp and each second timestamp to the same time unit;
and respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp based on the first timestamps and the second timestamps after the time units are unified.
In an embodiment of the present invention, the obtaining the debugging information generated in the process of simulating the chip to be tested and the first timestamp for generating the debugging information includes:
acquiring a log file generated in the process of simulating the chip to be tested;
identifying each debugging information identifier recorded in the log file;
for each debugging information identifier recorded in the log file, after the debugging information identifier in the log file, identifying a timestamp identifier corresponding to the debugging information identifier, a preset second debugging information starting identifier and a preset second debugging information ending identifier;
and determining information between the second debugging information starting identifier and the second debugging information ending identifier in the log file as each piece of debugging information, and determining a timestamp behind the timestamp identifier in the log file as a first timestamp for generating the debugging information.
In a second aspect, an embodiment of the present invention provides a waveform file generating apparatus, where the apparatus includes:
the file and information acquisition module is used for acquiring a waveform file generated in the process of simulating a chip to be tested, and acquiring each debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating each debugging information;
the time stamp determining module is used for respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp;
and the debugging information writing module is used for writing the debugging information corresponding to each first timestamp into the waveform file respectively based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for performing hardware test on the chip to be tested.
In an embodiment of the present invention, the debugging information writing module is specifically configured to:
writing the debugging information corresponding to each first timestamp into the waveform file to obtain a waveform file for testing hardware of the chip to be tested according to the following mode:
if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file, wherein the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp;
and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position, adjacent to and behind the data position of the waveform data corresponding to the target timestamp, in the waveform file.
In an embodiment of the present invention, the debugging information writing module is specifically configured to write the debugging information corresponding to the first timestamp into the waveform file according to a target format, where the target format is: the debugging information corresponding to the first timestamp is located between the preset first debugging information starting identifier and the preset first debugging information ending identifier.
In an embodiment of the present invention, the timestamp determining module includes:
the waveform file analysis submodule is used for analyzing the waveform file to obtain a second timestamp recorded in the waveform file and a time unit of the second timestamp;
and the time stamp determining submodule is used for respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp based on the time unit of the second time stamp and the time unit of the first time stamp.
In an embodiment of the present invention, the timestamp determination sub-module is specifically configured to unify each first timestamp and each second timestamp to a same time unit if the time unit of the second timestamp is not consistent with the time unit of the first timestamp; and respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp based on the first timestamps and the second timestamps after the time units are unified.
In an embodiment of the present invention, the file and information obtaining module includes:
the file acquisition submodule is used for acquiring a waveform file and a log file generated in the process of simulating the chip to be tested;
the first identification recognition submodule is used for recognizing each debugging information identification recorded in the log file;
the second identification recognition submodule is used for recognizing a timestamp identification corresponding to the debugging information identification, a preset second debugging information starting identification and a preset second debugging information ending identification after the debugging information identification in the log file aiming at each debugging information identification recorded in the log file;
and the information determining submodule is used for determining information between the second debugging information starting identifier and the second debugging information ending identifier in the log file as each piece of debugging information, and determining a timestamp behind the timestamp identifier in the log file as a first timestamp for generating each piece of debugging information.
In a third aspect, an embodiment of the present invention provides an electronic device, including: a processor and a machine-readable storage medium storing machine-executable instructions executable by the processor, the processor being caused by the machine-executable instructions to: the waveform file generation method according to the first aspect is implemented.
In a fourth aspect, embodiments of the present invention provide a computer-readable storage medium storing machine-executable instructions that, when invoked and executed by a processor, cause the processor to: the waveform file generation method according to the first aspect is implemented.
In a fifth aspect, an embodiment of the present invention further provides a computer program product containing instructions, which when run on a computer, causes the computer to implement the waveform file generation method according to the first aspect.
As can be seen from the above, when the waveform file is generated by applying the scheme provided in the embodiment of the present invention, for each first timestamp corresponding to the debug information, a second timestamp recorded in the waveform file and close to the first timestamp is determined, so that based on the recording position of the second timestamp in the waveform file, the debug information corresponding to the first timestamp can be written in the waveform file, and a new waveform file can be successfully generated.
Furthermore, as the waveform file generated by applying the scheme provided by the embodiment of the present invention carries the debug information, when the ATE is used and the chip is tested based on the new waveform file, if the output signal is found to be abnormal in the test process, the timestamp generating the abnormal signal can be matched with the timestamp recorded in the new waveform file, and according to the debug information recorded at the timestamp matched in the new waveform file, the problem occurring in the chip test process is analyzed, so as to facilitate the positioning of the problem, and further, the chip can be debugged aiming at the problem, so that the debug efficiency in the chip test process can be improved.
Of course, not all of the advantages described above need to be achieved at the same time in the practice of any one product or method of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other embodiments can be obtained by those skilled in the art according to the drawings.
Fig. 1 is a schematic flowchart of a first waveform file generation method according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating contents of a waveform file according to an embodiment of the present invention;
fig. 3 is a schematic flowchart of a second waveform file generation method according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a first waveform file generating apparatus according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a second waveform file generating apparatus according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived from the embodiments given herein by one of ordinary skill in the art, are within the scope of the invention.
First, an application scenario of the embodiment of the present invention is explained.
The scheme provided by the embodiment of the invention can be applied to a chip test scene, in particular to a scene for positioning the problems of the chip in the ATE test process.
When the ATE is used for testing the chip, the ATE analyzes the VCD waveform file for testing the chip to obtain an excitation signal, then the excitation signal is input into a pin of the chip, if the output signal of the chip is an expected signal, the chip is indicated to realize a preset function, the design purpose can be realized, and the test is passed. If the output signal of the chip is not the expected signal, the chip fails to realize the preset function, the test fails, and the chip needs to be debugged.
In order to facilitate rapid positioning of a chip at a problem position during debugging of the chip and improve debugging efficiency, the embodiment of the invention provides a waveform file generation scheme, and the waveform file generation scheme provided by the embodiment of the invention can be applied to generate a waveform file carrying debugging information, so that when ATE tests the chip based on the generated waveform file, if signal output is abnormal in the test process, the timestamp generating the abnormal signal can be matched with the timestamp recorded in the generated waveform file, and according to the debugging information recorded at the matched timestamp in the generated waveform file, the problems occurring in the chip test process are analyzed, the problems can be conveniently positioned, and the chip can be debugged aiming at the problems, thereby improving the debugging efficiency in the chip test process.
The following is a description of the implementation body of the solution provided by the embodiment of the present invention.
The execution main body of the scheme provided by the embodiment of the invention can be any electronic equipment with a data processing function.
The following describes a waveform file generation method provided by an embodiment of the present invention.
Referring to fig. 1, fig. 1 is a schematic flow chart of a first waveform file generation method according to an embodiment of the present invention, where the method includes the following steps S101 to S103.
Step S101: the method comprises the steps of obtaining a waveform file generated in the process of simulating a chip to be tested, and obtaining debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating the debugging information.
Chip testing is often divided into two steps: simulation and hardware testing.
The simulation is to use a simulation tool to run a design file of the chip to simulate the actual running of the chip, a waveform file is generated in the simulation process, and the waveform file records waveform data generated in the simulation running process of the chip and a timestamp for generating the waveform data. In some cases, in addition to the waveform file, a log file may be generated during the simulation, and the log file records each debug information generated during the simulation and a first timestamp for generating each debug information.
The simulation tool may be a simulation tool such as VCS, XRUN, questastasim, etc., and the waveform file may be a VCD file, a wlf (wave Log file), etc., depending on the simulation tool. Therefore, when the scheme provided by the embodiment of the invention is applied to obtain the waveform file, the waveform file does not depend on a specific simulation tool, the complete decoupling with the simulation tool is realized, and the application range is wide.
The chip is actually manufactured after simulation, the chip needs to be further subjected to hardware test by using equipment such as ATE (automatic test equipment), and if the test is passed, the chip is considered to be in accordance with the design purpose, so that batch production can be performed. The ATE device is a device that detects whether the function of the chip meets the design purpose.
The chip to be tested is the chip which needs to be tested.
Specifically, the waveform file generated in the process of simulating the chip to be tested can be obtained in the following manner.
In one embodiment, a simulation tool may be invoked to simulate a chip to be tested, such that a waveform file generated during a simulation process may be obtained.
In another embodiment, a pre-stored waveform file may be obtained. For example, a chip to be tested may be simulated in advance and a waveform file generated in the simulation process may be stored, in which case the waveform file may be obtained. It can be seen that the waveform file obtained in the embodiment of the present invention may be pre-stored, and the simulation tool does not need to be reused to simulate the chip to be tested, so that the time consumed by simulating the chip to be tested can be saved, and the time for generating the waveform file by applying the scheme provided in the embodiment of the present invention is further reduced.
The following describes a manner of obtaining the above-described pieces of debug information and generating first timestamps for the pieces of debug information.
When the simulation tool is used for simulating the chip to be tested, an instruction for outputting debugging information can be added in the simulation environment of the chip to be tested in advance, so that in the process of running the design file of the chip to be tested by using the simulation tool, corresponding debugging information can be output according to the instruction added in advance, and a timestamp for generating the debugging information is output.
Specifically, the following two ways are described based on different output modes of the debug information and the timestamp for generating the debug information.
In one embodiment, during the process of performing simulation operation on a chip to be tested by using a simulation tool, a device operating the simulation tool may call a console to output the debugging information and generate a first timestamp of the debugging information. This allows obtaining the debug information from the information output from the console and generating a first timestamp of the debug information.
In another embodiment, in the process of performing simulation operation on the chip to be tested by using the simulation tool, in addition to generating the waveform file, a log file may be generated, and the debugging information and the first timestamp for generating the debugging information may be recorded in the log file, in this case, each piece of debugging information recorded in the log file and the first timestamp for generating each piece of debugging information may be extracted. The detailed implementation manner is shown in steps S301-S304 in the embodiment of fig. 3, and will not be described again here.
Step S102: second timestamps recorded in the waveform file, which are close to each first timestamp, are respectively determined.
Specifically, the second time stamps recorded in the waveform file, which are close to each of the first time stamps, may be separately determined in the following manner.
In one embodiment, the time unit of the first time stamp and the time unit of the second time stamp are the same, so that an absolute value of a difference between the first time stamp and each of the second time stamps recorded in the waveform file can be calculated for each of the first time stamps, and the second time stamp having the smallest absolute value of the difference from the first time stamp can be determined as the second time stamp close to the first time stamp.
Specifically, a first list of first timestamps for generating the debug information may be constructed, and a second list of second timestamps recorded in the waveform file may be constructed, so that each first timestamp in the first list may be traversed, and a second timestamp in the second list, which is close to the first timestamp, may be determined by calculating an absolute value of the difference.
When the absolute value of the difference between the first timestamp and each second timestamp recorded in the waveform file is calculated, if the absolute value of the difference between a certain second timestamp and the first timestamp is 0, it is indicated that the second timestamp is the same as the first timestamp, and then the second timestamp is the second timestamp close to the first timestamp, so that the calculation of the absolute value of the difference between other subsequent second timestamps and the first timestamp can be omitted.
In another embodiment, the time unit of the first timestamp is different from the time unit of the second timestamp. For example, the time unit of the second time stamp is a nanosecond, and the time unit of the first time stamp is a femtosecond. In this case, the first time stamps and the second time stamps may be unified to the same time unit, and then the second time stamps recorded in the waveform file, which are close to each of the first time stamps, may be determined based on the first time stamps and the second time stamps subjected to the time unit unification.
After the time units of the first time stamp and the second time stamp are unified, since the units of the two time stamps are the same, the absolute value of the difference between the first time stamp and each of the second time stamps recorded in the waveform file can be directly calculated for each of the first time stamps, and the second time stamp having the smallest absolute value of the difference from the first time stamp can be determined as the second time stamp close to the first time stamp.
The unifying of the first timestamps and the second timestamps to the same time unit may be converting the time unit of the first timestamps to the time unit of the second timestamps, or converting the time unit of the second timestamps to the time unit of the first timestamps.
Of course, the sizes of the time units of the first timestamp and the second timestamp can be judged, the time unit of the timestamp with the larger time unit is converted into the time unit of the timestamp with the smaller time unit, and therefore errors can be avoided when the time unit of the timestamp with the smaller time unit is converted into the time unit of the timestamp with the larger time unit.
For example, if the time unit of the first timestamp is femtosecond and the time unit of the second timestamp is nanosecond, an error may be generated in the conversion process if the time unit of the first timestamp is converted into the time unit of the second timestamp. If a certain first time stamp is 8293500000 femtoseconds, the time unit of the first time stamp is converted into 8294 nanoseconds, and it can be seen that an error occurs after the conversion of the time unit.
Specifically, it is determined whether or not the time unit of the first time stamp and the time unit of the second time stamp are the same, the waveform file may be analyzed, the time unit of the second time stamp recorded in the waveform file may be obtained based on the analysis result, and then it may be determined whether or not the time unit of the first time stamp and the time unit of the second time stamp are the same.
Under the condition that time units are not uniform, the first time stamps and the second time stamps are unified, numerical operation can be directly carried out on the basis of the unified time units, and therefore the second time stamps close to the first time stamps can be determined more conveniently.
As can be seen from the above, when determining the second timestamp close to each first timestamp, the time units of the first timestamp and the second timestamp are also taken into consideration, so that the second timestamp close to each first timestamp can be more accurately determined based on the time units of the first timestamp and the second timestamp.
Step S103: and respectively writing debugging information corresponding to each first timestamp into the waveform file based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for testing hardware of the chip to be tested.
In an embodiment of the present invention, the waveform file may be a VCD waveform file, and a data recording method of the waveform file will be described below by taking the VCD waveform file as an example.
Referring to fig. 2, in order to illustrate the content of a waveform file according to an embodiment of the present invention, a "# + number" part in the diagram is a second timestamp recorded in the waveform file, and a "0" or a "1" adjacent to and after the second timestamp is waveform data corresponding to the second timestamp. As can be seen from fig. 2, the second timestamps in the waveform file are recorded in the waveform file from small to large according to the size sequence of the timestamps, each second timestamp has waveform data corresponding to it, and the waveform data is adjacent to and behind the second timestamp.
Next, a description will be given of a manner of writing the debug information corresponding to each first time stamp into the waveform file.
Specifically, the debug information corresponding to each first timestamp may be written into the waveform file in the following manner.
In one embodiment, after the recording position of the second timestamp close to each first timestamp in the waveform file is determined for each first timestamp, the debugging information corresponding to each first timestamp may be written into a position adjacent to the recording position of the second timestamp in the waveform file. For example, the position may be a position adjacent to and before the recording position of the second time stamp, or may be a position adjacent to and after the recording position of the second time stamp.
In another embodiment, the debugging information corresponding to each first timestamp may be written into the waveform file in different manners based on a size relationship between a second timestamp close to each first timestamp and the first timestamp, and specific embodiments are described in detail in the following examples, which are not described in detail herein.
After the debugging information corresponding to each first timestamp is written into the waveform file, the waveform file for hardware testing of the chip to be tested can be generated, and the debugging information in the generated waveform file is used as an interface for information interaction between a worker and a simulation process, so that when the hardware testing is performed on the chip to be tested based on the generated waveform file, the worker can conveniently analyze the result of the hardware testing according to the debugging information.
As can be seen from the above, when the waveform file is generated by applying the scheme provided in the embodiment of the present invention, for each first timestamp corresponding to the debug information, a second timestamp recorded in the waveform file and close to the first timestamp is determined, so that based on the recording position of the second timestamp in the waveform file, the debug information corresponding to the first timestamp can be written in the waveform file, and a new waveform file can be successfully generated.
Furthermore, as the waveform file generated by applying the scheme provided by the embodiment of the present invention carries the debug information, when the ATE is used and the chip is tested based on the new waveform file, if the output signal is found to be abnormal in the test process, the timestamp generating the abnormal signal can be matched with the timestamp recorded in the new waveform file, and according to the debug information recorded at the timestamp matched in the new waveform file, the problem occurring in the chip test process is analyzed, so as to facilitate the positioning of the problem, and further, the chip can be debugged aiming at the problem, so that the debug efficiency in the chip test process can be improved.
Next, a description will be given of a method of writing debug information corresponding to each first time stamp into a waveform file based on a magnitude relationship between a second time stamp close to each first time stamp and the first time stamp, in cases 1 and 2.
Case 1: and if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file.
Wherein, the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp.
In order to ensure that the debug information written in the waveform file is adjacent to the recording position of the target timestamp recorded in the waveform file and that the correspondence between the target timestamp and the waveform data is not destroyed, the debug information corresponding to the first timestamp may be written in the waveform file at a position adjacent to the recording position of the target timestamp and before the recording position.
For convenience of describing the writing position of the debug information in this case, a specific example will be described below with reference to fig. 2.
Referring to fig. 2, taking the debug information 2 as an example, if the first timestamp for generating the debug information 2 is 3500 ns, the target timestamp in the waveform file close to the first timestamp is 3720 ns, and the waveform data corresponding to the target timestamp is "0". At this time, the target timestamp is not earlier than the first timestamp, and it can be seen from the figure that the debug information 2 can be written into the waveform file at a position adjacent to and before the recording position of 3720 ns, so that not only the debug information 2 written into the waveform file is adjacent to the recording position of the target timestamp of 3720 ns recorded in the waveform file, but also the correspondence between the target timestamp of 3720 ns and the waveform data "0" is not destroyed.
Case 2: and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position adjacent to and after the data position of the waveform data corresponding to the target timestamp in the waveform file.
In this case, in order to ensure that the debug information written in the waveform file is close to the recording position of the target timestamp recorded in the waveform file and not to destroy the correspondence between the target timestamp and the waveform data, the debug information corresponding to the first timestamp may be written in a position adjacent to and subsequent to the data position of the waveform data corresponding to the target timestamp in the waveform file.
For convenience of describing the writing position of the debug information in this case, a specific example will be described below with reference to fig. 2.
Referring to fig. 2, taking the debug information 1 as an example, if the first timestamp for generating the debug information 1 is 1300 ns, the target timestamp close to the first timestamp in the waveform file is 1220 ns, and the waveform data corresponding to the target timestamp is "0". If the debug information 1 is written in the waveform file at a position adjacent to and after the 3720 ns recording position, the debug information 1 is written between the second timestamp 1220 ns and the waveform data "0", which obviously destroys the correspondence between the second timestamp and the waveform data "0". Therefore, as can be seen from the figure, the debug information 1 is actually written in a position adjacent to and subsequent to the data position of the waveform data "0" corresponding to 3720 nanoseconds in the waveform file, which not only makes the debug information 1 written in the waveform file adjacent to the recording position of the target timestamp 1220 nanoseconds recorded in the waveform file, but also does not destroy the correspondence between the target timestamp 1220 nanoseconds and the waveform data "0".
Due to the fact that the debugging information corresponding to each first timestamp is written into the waveform file in different modes based on the size of the target timestamp and the size of the first timestamp, the debugging information written into the waveform file is close to the recording position of the target timestamp recorded in the waveform file, the debugging information is prevented from being written into the space between the target timestamp and the waveform data corresponding to the target timestamp, and the waveform data recorded in the waveform file can be prevented from being affected.
Specifically, the debugging information corresponding to the first timestamp may be written into the waveform file according to a target format, where the target format is: the debugging information corresponding to the first timestamp is located between a preset first debugging information starting identifier and a preset first debugging information ending identifier.
In an embodiment, the preset first debug information start identifier and the preset first debug information end identifier may be keywords preset according to a format of a waveform file. For example, in the case where the waveform file is a VCD file, as shown in fig. 2, the first debug information start flag may be "$ comment", and the first debug information end flag may be "$ end". It should be understood that the above example is only one implementation manner of setting the first debug information start identifier and the first debug information end identifier, and the format and the content of the first debug information start identifier and the first debug information end identifier are not limited in the embodiments of the present invention.
Therefore, the debugging information corresponding to the first timestamp is written into the waveform file according to the target format, and the debugging information can be conveniently identified from the waveform file by a worker.
In an embodiment of the present invention, before determining the second timestamp recorded in the waveform file, which is close to each first timestamp, the file header of the waveform file may be parsed, at least one of information such as a time unit, a generation date, and a version number of the waveform file may be obtained based on the parsing result, and whether the waveform file is a valid waveform file may be determined according to the information. For example, in one case, if the time unit, the date of generation, and the version number are successfully analyzed from the header of the waveform file, the waveform file may be considered to be a valid file. In another case, if the time unit of the waveform file is an expected time unit, the waveform file may be considered as a valid file. In another case, if the generation date of the waveform file is an expected date, the waveform file may be considered to be a valid file. In another case, if the version number of the waveform file is a preset version number, the waveform file may be considered as a valid file.
After the waveform file is ensured to be a valid file, the step of determining a second timestamp which is recorded in the waveform file and is close to each first timestamp is carried out, so that the waveform file is ensured to be a valid file, and the fact that a new waveform file generated by writing debugging information into the waveform file is also ensured to be a valid file is further ensured.
On the basis of the embodiment shown in fig. 1, when obtaining each piece of debugging information and generating the first timestamp of each piece of debugging information, a log file generated in the process of simulating the chip to be tested may also be obtained, and then each piece of debugging information recorded in the log file and the first timestamp of each piece of debugging information may be extracted. Based on the above situation, an embodiment of the present invention provides another waveform file generation method. Specifically, referring to fig. 3, fig. 3 is a schematic flowchart of a second waveform file generation method according to an embodiment of the present invention, where the method includes the following steps S301 to S306.
Step S301: and obtaining a waveform file and a log file generated in the process of simulating the chip to be tested.
The manner of obtaining the waveform file generated during the simulation of the chip to be tested is described in step S101 in the embodiment shown in fig. 1, and is not described herein again.
As can be seen from the foregoing description, in the process of simulating the chip to be tested, not only the waveform file but also a log file can be generated, and the generated log file can record the debugging information generated in the simulation process and the first timestamp generating the debugging information, so that in order to obtain the debugging information and the first timestamp generating the debugging information, the log file generated in the process of simulating the chip to be tested can be obtained.
The following describes a manner of obtaining the above-described log file.
In one embodiment, a simulation tool may be called to simulate a chip to be tested, so that a log file generated in a simulation process may be obtained.
In another embodiment, a pre-stored log file may be obtained. For example, a chip to be tested may be simulated in advance and a log file generated in the simulation process may be stored, in which case, the log file stored in advance may be obtained.
Step S302: and identifying each debugging information identifier recorded in the log file.
The debug information identifier is used to identify debug information, and the debug information identifier may be a keyword in a preset format, for example, the debug information identifier may be "[ add _ comments _ for _ ate ]", or the like.
Specifically, the debugging Information identifier may be identified from the log file by using a VEI (VCD with Enhancement Information) tool identifier developed based on Python.
The log file is a file generated in the process of simulating the chip to be tested, and may have various types of information including debugging information, such as operation record information, data interaction information, and the like.
Then, in order to enable the VEI tool to identify the debug information from the plurality of pieces of information and generate the timestamp of the debug information, the debug information identifier may be identified first, and the debug information may be further identified and the timestamp of the debug information may be generated based on the debug information identifier.
Step S303: and aiming at each debugging information identifier recorded in the log file, after the debugging information identifier in the log file, identifying a timestamp identifier, a preset second debugging information starting identifier and a preset second debugging information ending identifier corresponding to the debugging information identifier.
And a timestamp, a preset second debugging information starting identifier and a preset second debugging information ending identifier correspond to the back of each piece of debugging information, wherein the timestamp identifier is used for identifying the second timestamp for generating the debugging information, and the preset second debugging information starting identifier and the preset second debugging information ending identifier are used for identifying the beginning and the end of the debugging information.
The timestamp identifier, the second debug information start identifier, and the second debug information end identifier may be keywords in a preset format. For example, the timestamp identification may be "@", the second debug information start identification may be [ comments begin ], and the second debug information end identification may be [ comments end ].
It should be noted that the second debug information start identifier may be the same as or different from the first debug information start identifier, and the second debug information end identifier may be the same as or different from the first debug information end identifier.
It can be understood that the foregoing example of setting the debug information identifier in step S302 and the example in this step are only one implementation manner of setting the debug information identifier, the timestamp identifier, the second debug information start identifier, and the second debug information end identifier, and the format and content of the debug information identifier, the timestamp identifier, the second debug information start identifier, and the second debug information end identifier are not limited in the embodiment of the present invention.
Step S304: and determining information between the second debugging information starting identifier and the second debugging information ending identifier in the log file as each piece of debugging information, and determining a timestamp after the timestamp identifier in the log file as a first timestamp for generating each piece of debugging information.
Specifically, the first timestamp for generating each debug information may be determined in the following different manners.
In one implementation, after the timestamp recorded in the log file is identified, the information of the preset number of bytes is read as the first timestamp.
In another implementation manner, information after the identification of the timestamp recorded in the log file and before the identifier of the end of the next information is read as the first timestamp.
In another implementation, information after the timestamp identifier and before the next information identifier recorded in the log file is read as the first timestamp.
Step S305: second timestamps recorded in the waveform file, which are close to each first timestamp, are respectively determined.
Step S306: and respectively writing debugging information corresponding to each first timestamp into the waveform file based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for testing hardware of the chip to be tested.
The steps S305 and S306 are the same as the steps S102 and S103 in the embodiment shown in fig. 1, and are not repeated here.
Therefore, after the log file generated in the simulation process of the chip to be tested is obtained, the debugging information and the first timestamp for generating the debugging information can be quickly extracted from the log file according to the identification recorded in the log file, and the efficiency of obtaining the debugging information and the first timestamp for generating the debugging information is improved.
Corresponding to the waveform file generation method, the embodiment of the invention also provides a waveform file generation device.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a first data communication device according to an embodiment of the present invention, where the device includes the following modules 401 and 403.
A file and information obtaining module 401, configured to obtain a waveform file generated in a process of simulating a chip to be tested, and obtain each piece of debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating each piece of debugging information;
a timestamp determining module 402, configured to determine second timestamps recorded in the waveform file, which are close to each first timestamp, respectively;
a debugging information writing module 403, configured to write, based on a recording position of a second timestamp close to each first timestamp in the waveform file, the debugging information corresponding to each first timestamp in the waveform file, respectively, to obtain a waveform file for performing a hardware test on the chip to be tested.
As can be seen from the above, when the waveform file is generated by applying the embodiment provided by the present invention, the second timestamp recorded in the waveform file and close to the first timestamp is determined for the first timestamp corresponding to each piece of debugging information, so that the debugging information corresponding to the first timestamp can be written into the waveform file based on the recording position of the second timestamp in the waveform file, and a new waveform file can be successfully generated.
Furthermore, as the waveform file generated by applying the scheme provided by the embodiment of the present invention carries the debug information, when the ATE is used and the chip is tested based on the new waveform file, if the output signal is found to be abnormal in the test process, the timestamp generating the abnormal signal can be matched with the timestamp recorded in the new waveform file, and according to the debug information recorded at the timestamp matched in the new waveform file, the problem occurring in the chip test process is analyzed, so as to facilitate the positioning of the problem, and further, the chip can be debugged aiming at the problem, so that the debug efficiency in the chip test process can be improved.
In an embodiment of the present invention, the debugging information writing module 403 is specifically configured to:
writing the debugging information corresponding to each first timestamp into the waveform file to obtain a waveform file for performing hardware test on the chip to be tested according to the following mode:
if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file, wherein the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp;
and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position, adjacent to and behind the data position of the waveform data corresponding to the target timestamp, in the waveform file.
Due to the fact that the debugging information corresponding to each first timestamp is written into the waveform file in different modes based on the size of the target timestamp and the size of the first timestamp, the debugging information written into the waveform file is close to the recording position of the target timestamp recorded in the waveform file, the debugging information is prevented from being written into the space between the target timestamp and the waveform data corresponding to the target timestamp, and the waveform data recorded in the waveform file can be prevented from being affected.
In an embodiment of the present invention, the debugging information writing module 403 is specifically configured to write the debugging information corresponding to the first timestamp into the waveform file according to a target format, where the target format is: the debugging information corresponding to the first timestamp is located between the preset first debugging information starting identifier and the preset first debugging information ending identifier.
Therefore, the debugging information corresponding to the first timestamp is written into the waveform file according to the target format, and the debugging information can be conveniently identified from the waveform file by a worker.
In an embodiment of the present invention, the timestamp determining module 402 includes:
the waveform file analysis submodule is used for analyzing the waveform file to obtain a second timestamp recorded in the waveform file and a time unit of the second timestamp;
and the timestamp determining submodule is used for respectively determining second timestamps close to each first timestamp recorded in the waveform file based on the time units of the second timestamps and the time units of the first timestamps.
As can be seen from the above, when determining the second timestamp close to each first timestamp, the time units of the first timestamp and the second timestamp are also taken into consideration, so that the second timestamp close to each first timestamp can be more accurately determined based on the time units of the first timestamp and the second timestamp.
In one embodiment of the invention, the timestamp determination sub-module,
the time unit of the second timestamp is different from the time unit of the first timestamp, and the first timestamps and the second timestamps are unified to the same time unit; and respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp based on the first timestamps and the second timestamps after the time units are unified.
Under the condition that the units are not uniform, the first time stamp and the second time stamp are unified, numerical operation can be directly carried out on the basis of the unified time units, and therefore the second time stamp close to each first time stamp can be determined conveniently.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a second data communication device according to an embodiment of the present invention, where the device includes the following modules 501 and 506.
The file obtaining sub-module 501 is configured to obtain a waveform file and a log file generated in a process of simulating a chip to be tested;
a first identifier recognizing sub-module 502, configured to recognize each debugging information identifier recorded in the log file;
a second identifier recognition sub-module 503, configured to, for each debug information identifier recorded in the log file, recognize, after the debug information identifier in the log file, a timestamp identifier corresponding to the debug information identifier, a preset second debug information start identifier, and a preset second debug information end identifier;
an information determining submodule 504, configured to determine, as each piece of debugging information, information in the log file between the second debugging information start identifier and the second debugging information end identifier, and determine, as a first timestamp for generating each piece of debugging information, a timestamp in the log file after the timestamp identifier;
a timestamp determining module 505, configured to determine second timestamps recorded in the waveform file, which are close to each first timestamp, respectively;
and a debug information writing module 506, configured to write, based on a recording position of a second timestamp close to each first timestamp in the waveform file, the debug information corresponding to each first timestamp in the waveform file, respectively, to obtain a waveform file for performing a hardware test on the chip to be tested.
Therefore, after the log file generated in the simulation process of the chip to be tested is obtained, the debugging information and the first timestamp for generating the debugging information can be quickly extracted from the log file according to the identification recorded in the log file, and the efficiency of obtaining the debugging information and the first timestamp for generating the debugging information is improved.
An embodiment of the present invention further provides an electronic device, as shown in fig. 6, including: a processor 601 and a machine-readable storage medium 602, the machine-readable storage medium 602 storing machine-executable instructions executable by the processor, the processor 601 being caused by the machine-executable instructions to: the waveform file generation method provided by the embodiment of the invention is realized.
The machine-readable storage medium may include a Random Access Memory (RAM) and a Non-Volatile Memory (NVM), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.
In yet another embodiment provided by the present invention, there is also provided a machine-readable storage medium storing machine-executable instructions that, when invoked and executed by a processor, cause the processor to: the waveform file generation method provided by the embodiment of the invention is realized.
In yet another embodiment provided by the present invention, a computer program product containing instructions is also provided, which when run on a computer, causes the computer to execute the waveform file generation method provided by the embodiment of the present invention.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the invention to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on differences from other embodiments. In particular, as for the apparatus, the electronic device and the storage medium embodiment, since they are substantially similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the partial description of the method embodiment.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.
Claims (12)
1. A waveform file generation method, comprising:
the method comprises the steps of obtaining a waveform file generated in the process of simulating a chip to be tested, and obtaining debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating the debugging information;
respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp;
and respectively writing debugging information corresponding to each first timestamp into the waveform file based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for testing hardware of the chip to be tested.
2. The method according to claim 1, wherein writing the debugging information corresponding to each first timestamp into the waveform file based on a recording position of a second timestamp close to each first timestamp in the waveform file, respectively, to obtain a waveform file for performing a hardware test on the chip to be tested, comprises:
writing the debugging information corresponding to each first timestamp into the waveform file to obtain a waveform file for testing hardware of the chip to be tested according to the following mode:
if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file, wherein the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp;
and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position, adjacent to and behind the data position of the waveform data corresponding to the target timestamp, in the waveform file.
3. The method of claim 2, wherein writing the debug information corresponding to each first timestamp into the waveform file comprises:
writing debugging information corresponding to the first timestamp into the waveform file according to a target format, wherein the target format is as follows: the debugging information corresponding to the first timestamp is located between the preset first debugging information starting identifier and the preset first debugging information ending identifier.
4. The method according to any one of claims 1-3, wherein said separately determining second timestamps recorded in said waveform file that are proximate to each first timestamp comprises:
analyzing the waveform file to obtain a second timestamp recorded in the waveform file and a time unit of the second timestamp;
and respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp based on the time unit of the second time stamp and the time unit of the first time stamp.
5. The method of claim 4, wherein the determining the second timestamps similar to each first timestamp recorded in the waveform file based on the time unit of the second timestamp and the time unit of the first timestamp respectively comprises:
if the time unit of the second timestamp is not consistent with the time unit of the first timestamp, unifying each first timestamp and each second timestamp to the same time unit;
and respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp based on the first timestamps and the second timestamps after the time units are unified.
6. The method according to any one of claims 1 to 3, wherein the obtaining of each debug information generated in the process of simulating the chip to be tested and the first timestamp of each debug information comprises:
acquiring a log file generated in the process of simulating the chip to be tested;
identifying each debugging information identifier recorded in the log file;
for each debugging information identifier recorded in the log file, after the debugging information identifier in the log file, identifying a timestamp identifier corresponding to the debugging information identifier, a preset second debugging information starting identifier and a preset second debugging information ending identifier;
and determining information between the second debugging information starting identifier and the second debugging information ending identifier in the log file as each piece of debugging information, and determining a timestamp behind the timestamp identifier in the log file as a first timestamp for generating each piece of debugging information.
7. A waveform file generating apparatus, characterized by comprising:
the file and information acquisition module is used for acquiring a waveform file generated in the process of simulating a chip to be tested, and acquiring each debugging information generated in the process of simulating the chip to be tested and a first timestamp for generating each debugging information;
the time stamp determining module is used for respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp;
and the debugging information writing module is used for writing the debugging information corresponding to each first timestamp into the waveform file respectively based on the recording position of a second timestamp close to each first timestamp in the waveform file to obtain the waveform file for performing hardware test on the chip to be tested.
8. The apparatus of claim 7, wherein the debug information write module is specifically configured to:
writing the debugging information corresponding to each first timestamp into the waveform file to obtain a waveform file for performing hardware test on the chip to be tested according to the following mode:
if the target timestamp is not earlier than the first timestamp, writing debugging information corresponding to the first timestamp into a position, adjacent to and before the recording position of the target timestamp, in the waveform file, wherein the target timestamp is: a second timestamp in the waveform file that is similar to the first timestamp;
and if the target timestamp is earlier than the first timestamp, writing the debugging information corresponding to the first timestamp into a position, adjacent to and behind the data position of the waveform data corresponding to the target timestamp, in the waveform file.
9. The apparatus of claim 8, wherein the debugging information writing module is specifically configured to write the debugging information corresponding to the first timestamp into the waveform file according to a target format, where the target format is: the debugging information corresponding to the first timestamp is located between the preset first debugging information starting identifier and the preset first debugging information ending identifier.
10. The apparatus according to any of claims 7-9, wherein the timestamp determination module comprises:
the waveform file analysis submodule is used for analyzing the waveform file to obtain a second timestamp recorded in the waveform file and a time unit of the second timestamp;
and the time stamp determining submodule is used for respectively determining second time stamps which are recorded in the waveform file and are close to each first time stamp based on the time unit of the second time stamp and the time unit of the first time stamp.
11. The apparatus of claim 10,
the timestamp determination submodule is specifically configured to unify each first timestamp and each second timestamp to the same time unit if the time unit of the second timestamp is not consistent with the time unit of the first timestamp; and respectively determining second timestamps which are recorded in the waveform file and are close to each first timestamp based on the first timestamps and the second timestamps after the time units are unified.
12. The apparatus according to any one of claims 7-9, wherein the file and information obtaining module comprises:
the file acquisition submodule is used for acquiring a waveform file and a log file generated in the process of simulating the chip to be tested;
the first identification recognition submodule is used for recognizing each debugging information identification recorded in the log file;
the second identification recognition submodule is used for recognizing a timestamp identification corresponding to the debugging information identification, a preset second debugging information starting identification and a preset second debugging information ending identification after the debugging information identification in the log file aiming at each debugging information identification recorded in the log file;
and the information determining submodule is used for determining information between the second debugging information starting identifier and the second debugging information ending identifier in the log file as each piece of debugging information, and determining a timestamp behind the timestamp identifier in the log file as a first timestamp for generating each piece of debugging information.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115630594A (en) * | 2022-12-19 | 2023-01-20 | 杭州加速科技有限公司 | Method and system for converting chip design simulation file into Pattern file |
| CN118068058A (en) * | 2024-04-18 | 2024-05-24 | 格创通信(浙江)有限公司 | Excitation signal generation method and device, chip test equipment and storage medium |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115630594A (en) * | 2022-12-19 | 2023-01-20 | 杭州加速科技有限公司 | Method and system for converting chip design simulation file into Pattern file |
| CN115630594B (en) * | 2022-12-19 | 2023-03-21 | 杭州加速科技有限公司 | Method and system for converting chip design simulation file into Pattern file |
| CN118068058A (en) * | 2024-04-18 | 2024-05-24 | 格创通信(浙江)有限公司 | Excitation signal generation method and device, chip test equipment and storage medium |
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