CN114649802A - Equivalent circuit model of surge suppression buffer - Google Patents
Equivalent circuit model of surge suppression buffer Download PDFInfo
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- CN114649802A CN114649802A CN202210329571.4A CN202210329571A CN114649802A CN 114649802 A CN114649802 A CN 114649802A CN 202210329571 A CN202210329571 A CN 202210329571A CN 114649802 A CN114649802 A CN 114649802A
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- 239000000872 buffer Substances 0.000 title claims abstract description 69
- 230000001629 suppression Effects 0.000 title claims abstract description 31
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical group [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims abstract description 35
- 239000003990 capacitor Substances 0.000 claims description 25
- 238000004804 winding Methods 0.000 claims description 23
- 238000012360 testing method Methods 0.000 claims description 20
- 229910001004 magnetic alloy Inorganic materials 0.000 claims description 16
- 230000015556 catabolic process Effects 0.000 claims description 14
- 239000004576 sand Substances 0.000 claims description 11
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- 230000035699 permeability Effects 0.000 claims description 9
- 229910045601 alloy Inorganic materials 0.000 claims description 6
- 239000000956 alloy Substances 0.000 claims description 6
- 229910052742 iron Inorganic materials 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 4
- 238000010998 test method Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 14
- 230000014509 gene expression Effects 0.000 abstract description 13
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
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Abstract
The invention provides an equivalent circuit model of a surge suppression buffer, which is formed by connecting a magnetizing inductor and an eddy current resistor in parallel, and establishes a new equivalent magnetizing inductor expression, so that the technical problem that the equivalent circuit model of the buffer is different from the actual performance is solved, the performance of the buffer in the surge suppression process can be analyzed and predicted through a circuit model, and the reliability of a power supply system is improved; and the structural size of the iron core and the characteristic parameters of the strip can be reasonably selected according to the equivalent circuit model parameter expression, so that the required surge suppression effect is achieved, the size is minimized, and the cost is reduced.
Description
Technical Field
The invention belongs to the technical field of surge suppression, and particularly relates to an equivalent circuit model of a surge suppression buffer.
Background
A snubber is a surge suppression protection device installed between a high voltage power supply and an auxiliary heating load. When a spark occurs, the snubber can limit the short circuit current and dissipate fault energy, thereby protecting the high voltage power supply and the auxiliary heating load. Although numerical methods such as finite difference method and finite element method are common methods for analyzing the eddy current problem, the complexity of numerical calculation and time cost are too large, so that it is more desirable to establish a simple and effective circuit model for analyzing the characteristics of the iron core.
Due to the nonlinearity of iron core inductance and iron loss, difficulty is brought to the establishment of the equivalent circuit model of the buffer. The magnetic flux matching model simply makes linear processing on the magnetizing inductance and the iron loss resistance of the iron core, and the linear processing cannot be well matched with the actual performance of the iron core. Based on a saturation wave theory, a buffer simplified equivalent circuit analysis method (FBO method for short) proposed by Fink, Baker and Owren ignores the magnetizing inductance of the buffer, equates the buffer to a time-varying resistance, and deduces an equivalent resistance expression related to characteristic parameters of an alloy strip and the structural size of an iron core, wherein the expression can guide the design of the buffer, but the expression is regarded as a pure-resistance equivalent circuit model and cannot accurately approximate the actual characteristics of the buffer. On the basis of the FBO model, EAST et al corrected the eddy current ratio from 2.5 to 1 and added the equivalent parallel magnetization inductance to the circuit model, however the derived inductance expression default inductance value decreased monotonically over time, which is in contrast to the actual situation.
Disclosure of Invention
Aiming at the defects or improvement requirements in the prior art, the invention provides an equivalent circuit model of a surge suppression buffer, establishes a new equivalent magnetizing inductance expression based on a saturated wave theory, and aims to solve the technical problem that the equivalent circuit model of the buffer in the surge suppression field is different from the actual performance.
To achieve the above object, according to a first aspect of the present invention, there is provided an equivalent circuit model of a surge suppressing snubber, including magnetizing inductors L connected in parallel with each othersAnd eddy current resistance Rs;
LsNumber N of iron cores cascaded with buffercThe following relation is satisfied:
wherein N isLThe number of the soft magnetic alloy strip winding layers of the buffer iron core, w and d are the width and the thickness of the soft magnetic alloy strip respectively, and r1、Respectively the inner radius and the outer radius of the iron core, mu is the product of the vacuum permeability and the relative permeability of the soft magnetic alloy strip material, a1Is the saturation thickness of the 1 st turn of the winding, LnThe magnetizing inductance of the nth winding is obtained.
Preferably, the material of the buffer iron core is iron-based nanocrystalline magnetically soft alloy.
Preferably, RsAnd NcThe following relation is satisfied:
wherein R isnAnd p is the eddy current resistance of the nth winding, and the resistivity of the alloy strip is shown.
According to a second aspect of the present invention, there is provided a test circuit applied to an equivalent circuit model of a surge suppression buffer as described in the first aspect, comprising: the device comprises a power supply module, a breakdown simulation module and a distributed capacitor C;
the power supply module comprises a first direct-current voltage source E and a resistor R which are sequentially connected in series1And a DC switch K;
the breakdown simulation module comprises a three-electrode spark ball gap and is used for simulating beam breakdown;
the power supply module, the equivalent circuit model of the buffer and the distributed capacitor are sequentially connected to form a loop, one end of the three-electrode spark ball gap is connected with the connection point of the equivalent circuit model of the power supply module and the buffer, and the other end of the three-electrode spark ball gap is connected with the connection point of the power supply module and the distributed capacitor;
preferably, the buffer further comprises a bias power supply module for applying a reverse bias current to the buffer.
The bias power supply module comprises an inductor L and a resistor R which are sequentially connected in series2And a direct current source I.
According to a third aspect of the present invention, there is provided a test method applied to an equivalent circuit model test circuit of a surge suppression buffer as described in the second aspect, characterized by comprising:
and switching on the direct current switch K, switching on a three-electrode spark ball switch SGS and switching off the direct current switch K when the distributed capacitor C is charged to the initial discharge voltage, so that the distributed capacitor C is discharged through a buffer circuit, and testing the voltage and current waveform when the distributed capacitor C is discharged to verify the surge suppression effect.
According to a fourth aspect of the present invention, there is provided a test system characterized by comprising: a computer-readable storage medium and a processor;
the computer-readable storage medium is used for storing executable instructions;
the processor is configured to read executable instructions stored in the computer-readable storage medium and execute the testing method according to the third aspect.
In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:
(1) the equivalent circuit model of the surge suppression buffer is formed by connecting the magnetizing inductance and the eddy current resistor in parallel, and a new equivalent magnetizing inductance expression is established, so that the technical problem that the equivalent circuit model of the buffer is different from the actual performance is solved, the performance of the buffer in the surge suppression process can be analyzed and predicted through the circuit model, and the reliability of a power supply system is improved; and the structural size of the iron core and the characteristic parameters of the strip can be reasonably selected according to the equivalent circuit model parameter expression, so that the required surge suppression effect is achieved, the size is minimized, and the cost is reduced.
(2) The test circuit of the equivalent circuit model of the surge suppression buffer can verify the surge suppression effect and the accuracy of the buffer circuit model by testing the voltage and current waveform when the capacitor discharges.
Drawings
Fig. 1 is a schematic diagram of a surge suppression circuit including a buffer equivalent circuit model according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a core buffer according to an embodiment of the present invention;
fig. 3 is a second schematic structural diagram of a core buffer according to an embodiment of the present invention;
FIG. 4 is a schematic equivalent circuit diagram of the n-th turn of the soft magnetic alloy winding according to the embodiment of the present invention;
FIG. 5 is a schematic diagram of simulated and measured waveforms of arc current and capacitor voltage provided in accordance with the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
An embodiment of the present invention provides an equivalent circuit model of a surge suppression buffer, as shown in fig. 1, including magnetizing inductors L connected in parallel with each othersAnd eddy current resistance Rs;
Specifically, the buffer equivalent circuit model portion includes a magnetizing inductance LsAnd eddy current resistance RsWherein the inductance LsAnd a resistance RsAnd (4) connecting in parallel. Inductor LsAnd a resistor RsOne end is connected. Inductor LsAnother terminal of (1) and a resistor RsAnd the other end of the two are connected.
Furthermore, the buffer in the embodiment of the invention is an iron-based nanocrystalline buffer. An ideal wound core strip should have a high saturation flux density, high electrical resistivity, and high relative permeability to better suppress transient arc current spikes and dissipate distributed capacitive energy storage with a smaller core volume. Iron-based nanocrystals (FINEMET) are an ideal soft magnetic alloy for making buffer cores.
As shown in fig. 2-3, the core damper is implemented by sleeving a plurality of toroidal cores on the inner conductor of a transmission line for transmitting a dc high voltage from an accelerator power supply to an accelerator pad. Wherein N iscFor the number of cascaded cores, the cores are composed of NLThe laminated soft magnetic alloy strip is formed by winding, and the lamination coefficient of the iron core is s; the width of the soft magnetic alloy strip is w, and the thickness of the soft magnetic alloy strip is d; r is1、rNLRespectively the inner radius and the outer radius of the core.
Further, when breakdown occurs, the arc current that forms a loop through the transmission line is the core excitation current, which can be decomposed into two components: the core is magnetized to generate a magnetization component (reactive component) of the main flux and an eddy current component (active component) for balancing eddy current loss. The magnetic conductivity of the iron core is far larger than that of air, so that the main magnetic flux is far larger than the leakage magnetic flux, and the leakage magnetic flux can be ignored during analysis. Thus, the iron core buffer can use the magnetizing inductance LsAnd eddy current resistance RsEquivalent to a parallel circuit of (a).
Furthermore, the research object is to use any n-th turn of soft magnetic alloy winding strip which is not fully saturated, and the equivalent circuit is shown in figure 4.
Specifically, when the breakdown occurs, an arc current i flows through the transmission lineAThere are two components: one is a magnetizing current component i0nThe main magnetic flux is used for establishing main magnetic flux in each turn of winding belt; second is the eddy current component ienFor counteracting the magnetomotive force generated by eddy currents in the tape, and hence
iA=i0n+ien (1)
Wherein i0nAnd ienRespectively representing the magnetizing current and the eddy current of the nth turn, in units of: ampere;
specifically, the magnetic flux variation generates an induced voltage in the outer saturation region of
Wherein a isnRepresents the saturated thickness of the n-th turn of the winding, in units: rice; Δ B represents the magnetic flux density from an initial value to a saturation value BsWhen the core is energized with a reverse bias current, based on the wave saturation theory, Δ B is 2BsThe unit: tesla;
in particular, the consequent eddy currents form a closed loop at the outer saturation level, and the loop resistance, i.e. the eddy current resistance, can be approximated by
Wherein r isnIs the winding radius of the nth turn of winding strip around the central axis of the iron core, and the unit is: rice; ρ is the resistivity of the alloy strip, unit: ohm.
Further, the expressions of the eddy current in the n-th turn of the soft magnetic alloy ribbon can be obtained from the expressions (2) and (3):
further, in the buffer simplified equivalent circuit analysis method (hereinafter, abbreviated as FBO method) proposed by Fink, Baker and Owren, the magnetizing inductance L is setnThe magnetic field with infinite magnetic permeability is treated by neglecting magnetizing inductance in parallel equivalent circuit and only considering eddy resistance Rn. Under this simplifying assumption, i0n0, eddy currents i in the winding band of each layerenAre all equal. Therefore, as can be seen from the equation (4), the relation between the n-th turn of the winding and the saturation thickness of the 1 st turn (innermost layer) of the winding is
an=a1(r1/rn)1/2 (5)
Further, neglecting the shunt magnetizing inductance, the buffer equivalent voltage drop derived by the FBO method is as follows
Further, the equivalent eddy current resistance R of the core buffersCan be expressed as
Furthermore, considering the permeability as infinite, the magnetomotive force generated by the arc current is only balanced with the magnetomotive force that maintains the eddy currents, which means that the snubber does not store energy at any time. Obviously, this is not in accordance with the physical characteristics of the core, and the equivalent circuit model considering only the eddy current resistance is not accurate enough. To further derive the inductance L including magnetizationsThe equivalent circuit model of (2) is simplified again: approximately considering the magnetizing current i of each turn of the strip0nAre all equal while swirling ienAre all equal. This simplified analysis is based on two preconditions: (1) the soft magnetic alloy strip has very high magnetic conductivity and very large magnetizing inductance, so that the difference of magnetizing currents of the turns of the winding strip is not large; (2) the toroidal core has a small outer to inner radius ratio, preferably less than 2.5, so that the winding radius-dependent electrical parameters of the individual turns of the strip do not differ significantly. With such a simplified process, the equations (5) to (7) derived by the FBO method are still valid.
Further, the magnetization inductance of the n-th turn of the soft magnetic alloy strip may be approximated by
Wherein, murIs the relative magnetic permeability of the soft magnetic alloy strip, unit: henry/meter; mu.s0Is the vacuum permeability, unit: henry/meter; dnThe thickness of an effective magnetization area is shown, and the effective magnetization area refers to an area and a unit which can generate magnetic flux turnover under the action of magnetomotive force established by magnetization current in a winding belt; rice; dnIs an important parameter for determining the magnetizing inductance Ln; if the outer layer saturation area is considered to be expanded into the winding strip until the outer layer saturation area is shortThe effective magnetization zone thickness D is obtained when the road pulse is over or the winding of the turn is completely saturatednEqual to the thickness of the inner remanent zone. However, in the view of the "magnetic domain model", the outer saturation region is prevented from further expansion and even contraction. Therefore, in the embodiment of the present invention, the effective magnetization region thickness DnIs shown as
Wherein d represents the thickness of the strip, unit: rice; a indicates that the outer saturated zone has a uniform thickness (saturated thickness), in units of: rice;
further, the equivalent magnetizing inductance L of the core buffersIs composed of
The test circuit applied to the equivalent circuit model of the surge suppression buffer provided by the embodiment of the invention comprises: the device comprises a power supply module, a breakdown simulation module and a distributed capacitor C;
the power supply module comprises a first direct-current voltage source E and a resistor R which are sequentially connected in series1And a DC switch K;
the breakdown simulation module comprises a three-electrode spark ball gap and is used for simulating beam breakdown;
the equivalent circuit model of power module, buffer and distributed capacitance connect gradually and constitute the return circuit, the one end in three electrode spark ball clearances with the tie point of the equivalent circuit model of power module, buffer is connected, the other end with the tie point of power module, distributed capacitance is connected.
Preferably, the buffer further comprises a bias power supply module for applying a reverse bias current to the buffer;
the bias power supply module comprises an inductor L and a resistor R which are sequentially connected in series2And a direct current source I.
In particular, the amount of the solvent to be used,the power supply module comprises a DC voltage source E and a series resistor R1The direct current switch K is used for supplying power to the circuit; the bias power supply module comprises a direct current source I and a series resistor R2And an inductor L for applying a reverse bias current to the buffer; the breakdown simulation module comprises a three-electrode spark ball gap and is used for simulating beam breakdown; the distributed capacitance module includes a distributed capacitance C of the transmission line.
As shown in fig. 1, wherein the positive pole of the dc voltage source and the resistor R1Is connected to one end of a resistor R1Is connected with one end of a direct current switch, and the other end of the direct current switch is connected with an inductor LsOne terminal of (1), resistance RsOne end of the inductor is connected with one end of the bias power supply part; inductor LsThe other end of (1), the resistance RsThe other end of the first power supply is connected with the cathode of a direct current source of the bias power supply part; resistance R of bias power supply section2One end of the inductor is connected with the other end of the inductor of the bias power supply part, and the other end of the inductor is connected with the positive electrode of the direct current source of the bias power supply part; inductor LsThe other end of (1), the resistance RsThe other end of the capacitor is connected with the cathode of a direct current source of the bias power supply part and the anode of a capacitor C; one end of a three-electrode spark ball gap SGS and the other end of a DC switch (inductor L)sOne end of (1), resistor RsOne end of which is connected to one end of an inductance L of the bias power supply portion) and the other end of which is connected to the negative electrode of the capacitor and the negative electrode of the dc voltage source E. Wherein the capacitor voltage is measured by a voltage measuring probe connected in parallel with the distributed capacitance.
The embodiment of the invention provides a test method of an equivalent circuit model test circuit applied to a surge suppression buffer, which comprises the following steps:
and switching on the direct current switch K, switching on a three-electrode spark ball switch SGS and switching off the direct current switch K when the distributed capacitor C is charged to the initial discharge voltage, so that the distributed capacitor C is discharged through a buffer circuit, and testing the voltage and current waveform when the distributed capacitor C is discharged to verify the surge suppression effect.
Specifically, firstly, the DC switch is turned on, and a 10kV adjustable DC high-voltage power supply E is used for charging a high-frequency high-voltage capacitor C through a 2M omega resistorElectricity; the capacitor C will be charged to the initial discharge voltage U0The circuit simulates beam breakdown in an accelerator through a three-electrode Spark Gap Switch (SGS), and once the SGS is triggered to turn on, the dc switch is turned off and the capacitor C discharges through the buffer circuit. The surge suppression effect and the accuracy of the buffer circuit model are verified by testing the voltage and current waveforms when the capacitor discharges.
The bias power supply module is used for applying reverse bias current to the buffer before the direct current switch is switched on so as to increase a hysteresis loop of the iron core and prevent saturation; meanwhile, the bias power supply enables the iron core to be just in a negative saturation position, and the inductance is very small when the iron core is not in fault, so that the normal operation of the circuit cannot be interfered.
The simulation and actual measurement waveform schematic diagrams of the arc current and the capacitor voltage obtained by simulating the method provided by the embodiment of the invention are shown in fig. 5, and it can be seen from the diagrams that the actual measurement waveform and the simulation waveform have higher consistency. The effectiveness of the equivalent circuit model of the surge suppression buffer provided by the invention is fully verified by experimental and simulation results.
The invention establishes a new equivalent magnetizing inductance expression, improves an equivalent circuit model of the iron core buffer, solves the problems of the existing buffer model and enables the application range to be wider. The accuracy of the buffer equivalent parallel circuit model is verified through simulation and prototype testing, and the use scenes of the circuit and the model establishing method are further expanded. The problem that the equivalent circuit model of the buffer in the surge suppression field is different from the actual performance is solved, the performance of the buffer in the surge suppression process can be analyzed and predicted through the circuit model, and the reliability of a power supply system is improved. And the structural size of the iron core and the characteristic parameters of the strip can be reasonably selected according to the equivalent circuit model parameter expression, so that the required surge suppression effect is achieved, the size is minimized, and the cost is reduced.
An embodiment of the present invention provides a test system, including: a computer-readable storage medium and a processor;
the computer-readable storage medium is used for storing executable instructions;
the processor is configured to read executable instructions stored in the computer-readable storage medium and execute the testing method according to the embodiment.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. An equivalent circuit model of a surge suppression buffer is characterized by comprising magnetizing inductors L which are connected in parallelsAnd eddy current resistance Rs;
LsNumber N of iron cores cascaded with buffercThe following relation is satisfied:
wherein N isLThe number of the soft magnetic alloy strip winding layers of the buffer iron core, w and d are the width and the thickness of the soft magnetic alloy strip respectively, and r1、Respectively the inner radius and the outer radius of the iron core, mu is the product of the vacuum permeability and the relative permeability of the soft magnetic alloy strip material, a1Is the saturation thickness of the 1 st turn of the winding, LnThe magnetizing inductance of the nth winding is obtained.
2. The equivalent circuit model of claim 1, wherein the material of said buffer core is an iron-based nanocrystalline magnetically soft alloy.
4. A test circuit applied to an equivalent circuit model of a surge suppressor buffer according to any one of claims 1 to 3, comprising: the device comprises a power supply module, a breakdown simulation module and a distributed capacitor C;
the power supply module comprises a first direct-current voltage source E and a resistor R which are sequentially connected in series1And a DC switch K;
the breakdown simulation module comprises a three-electrode spark ball gap and is used for simulating beam breakdown;
the equivalent circuit model of power module, buffer and distributed capacitance connect gradually and constitute the return circuit, the one end in three electrode spark ball clearances with the tie point of the equivalent circuit model of power module, buffer is connected, the other end with the tie point of power module, distributed capacitance is connected.
5. The test circuit of claim 4, further comprising a bias power supply module for applying a reverse bias current to the buffer;
the bias power supply module comprises an inductor L and a resistor R which are sequentially connected in series2And a direct current source I.
6. A test method of an equivalent circuit model test circuit applied to the surge suppression buffer according to claim 5, comprising:
and switching on the direct current switch K, switching on a three-electrode spark ball switch SGS and switching off the direct current switch K when the distributed capacitor C is charged to an initial discharge voltage, so that the distributed capacitor C is discharged through a buffer circuit, and testing a voltage and current waveform when the distributed capacitor C is discharged so as to verify the accuracy and the surge suppression effect of the equivalent circuit model.
7. A test system, comprising: a computer-readable storage medium and a processor;
the computer-readable storage medium is used for storing executable instructions;
the processor is configured to read executable instructions stored in the computer-readable storage medium and execute the testing method of claim 6.
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CN102386619A (en) * | 2011-12-05 | 2012-03-21 | 黄兴英 | Circuit for inhibiting interference signal and carrying out surge protection |
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JP2019086295A (en) * | 2017-11-01 | 2019-06-06 | 三菱電機株式会社 | Reliability test device |
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2022
- 2022-03-30 CN CN202210329571.4A patent/CN114649802A/en active Pending
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CN102386619A (en) * | 2011-12-05 | 2012-03-21 | 黄兴英 | Circuit for inhibiting interference signal and carrying out surge protection |
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CN114243665A (en) * | 2021-12-09 | 2022-03-25 | 中国电子科技集团公司第二十九研究所 | Current detection type current surge suppression circuit based on feedback and feedforward |
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Title |
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SHAOXIANG MA 等: "Analysis and Application of the Equivalent Circuit Model for Core Snubber", 《IEEE TRANSACTIONS ON PLASMA SCIENCE》 * |
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