CN114647543A - Method for verifying external software modules for use by a system-on-chip - Google Patents

Method for verifying external software modules for use by a system-on-chip Download PDF

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Publication number
CN114647543A
CN114647543A CN202111566630.1A CN202111566630A CN114647543A CN 114647543 A CN114647543 A CN 114647543A CN 202111566630 A CN202111566630 A CN 202111566630A CN 114647543 A CN114647543 A CN 114647543A
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China
Prior art keywords
check value
chip
software module
calculated
external software
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CN202111566630.1A
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Chinese (zh)
Inventor
A·蒙德罗
S·卡塔拉诺
C·帕斯卡尔
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STMicroelectronics Rousset SAS
STMicroelectronics SRL
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STMicroelectronics Rousset SAS
STMicroelectronics SRL
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Priority claimed from FR2013782A external-priority patent/FR3118218B1/en
Application filed by STMicroelectronics Rousset SAS, STMicroelectronics SRL filed Critical STMicroelectronics Rousset SAS
Publication of CN114647543A publication Critical patent/CN114647543A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2247—Verification or detection of system hardware configuration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package

Abstract

The present disclosure relates to a method for verifying an external software module for use by a system-on-chip. According to one aspect, a system-on-chip is presented that includes a memory storage device, a computation circuit, a comparison circuit, and a verification circuit. The memory storage device is configured to store an external software module. The calculation circuit is configured to calculate a number of modified software modules from the external software module and to iteratively calculate the check value until a final check value is obtained. Each check value is calculated at least from a predefined initial check value based on a given modified software module and a previously calculated check value. The comparison circuit is configured to compare the final check value with an expected value stored in the system-on-chip. The verification circuitry is configured to verify the external software module when the final check value equals the expected value.

Description

Method for verifying external software modules for use by a system-on-chip
Cross Reference to Related Applications
The present application claims priority from french application number FR 2013782 filed on 21/12/2020, which is incorporated herein by reference in its entirety.
Technical Field
The present disclosure relates generally to systems on chips and, in particular embodiments, to verification of external software modules used by systems on chips.
Background
An external software module is a software program (e.g., code, instructions, etc.) that is not initially provided to the system-on-chip but may be injected into the system-on-chip. For example, external software modules may be used to implement services that were not originally provided to the system-on-chip.
For example, for cost reasons, some systems on chip do not include non-volatile memory, such as flash or ROM memory, for storing firmware that may be used to implement some special tasks. These special tasks may be, for example, platform debugging, analysis and reconfiguration, as well as deep address/failure analysis. It may be advantageous to provide such firmware to a system-on-chip after field deployment.
However, for security reasons, it is advantageous for the system-on-chip to verify the external software module before implementing the external software module to ensure that the external software module is an authorized software module. To authenticate external software modules, systems-on-chips typically use advanced security services to implement complex approaches.
However, in low cost systems on chip, there may not be any security features, such as cryptographic features, in the hardware or software to implement some advanced security services. Thus, for such a system on chip, there are no features for verifying external software modules. Furthermore, in such a system-on-chip, certain areas of the system-on-chip may not be accessible outside the factory, since not all security procedures are available. It would be advantageous to provide a method that is capable of verifying and authenticating external software modules for use by a system on a chip.
Disclosure of Invention
According to one aspect, a method for verifying an external software module for use by a system on a chip is presented. The method comprises the following steps performed by the system on chip: acquiring an external software module; calculating a number of modified software modules from the external software modules; iteratively calculating check values until final check values are obtained, each check value being calculated starting from a predefined initial check value at least from a given modified software module and a previously calculated check value; comparing the final check value with an expected value stored in the system-on-chip; and verifying the external software module when the final check value is equal to the expected value.
In an embodiment, the method comprises: a first check value is calculated based on the initial check value and the modified software module.
In an embodiment, the method comprises iteratively calculating a number of check values, each check value being calculated from at least one previously calculated check value and the modified software module.
In an embodiment, the check value calculation is iterated a predefined number of times until a final check value is obtained and the final check value is compared to the expected value. The expected value is defined by the manufacturer of the system-on-chip according to the certified software module.
In an embodiment, the expected value is calculated from the authenticated software module in the same manner as the final check value. If the final check value is equal to the expected value, then the probability that the external software module is an authenticated software module is high and the external software module is verified for use by the system on chip.
The iterations performed for the calculation of the final check value reduce the probability of verifying an external software module that is not an authenticated software module. This method advantageously allows to authenticate the external software module in a simple and secure way.
Low cost systems on chip typically include cyclic redundancy check circuitry. In an embodiment, each check value is calculated by using a cyclic redundancy check algorithm. Advantageously, by using cyclic and redundancy check modules, the system-on-chip does not require any additional security modules. Thus, the method can be implemented on a low cost system with a cyclic redundancy check circuit.
Alternatively, each check value is calculated by using a hash algorithm. In an embodiment, each check value is also calculated using the length of the external software module. Using the length of the external software module to calculate the check value advantageously increases the robustness of the method. Further, the check value is calculated using the length of the external software module in order to prevent a length extension attack.
In an embodiment, in order to hack into a system-on-chip, a hacker must be able to generate the following software modules: the software module has the same length as the authenticated external module and the system-on-chip may generate a final check value for the software module that is equal to the expected value of the authenticated external module. The probability of successful development of such software modules is low.
In an embodiment, each modified software module is calculated by a non-linear function. The use of a non-linear function ensures a high degree of independence between two modified software modules that are generated in succession. It thus increases the robustness of the method.
Alternatively, each modified software module may be calculated by a linear function.
Advantageously, the expected value is stored in configuration bits of the system on chip or encoded at the register transfer stage.
In an embodiment, a system on a chip is presented. The system-on-chip includes a memory configured to store an external software module and a computing circuit configured to: calculating a number of modified software modules from the external software modules; the check values are iteratively calculated until final check values are obtained — each check value being calculated starting from a predefined initial check value at least from a given modified software module and a previously calculated check value. The system on a chip further comprises: a comparison circuit configured to compare the final verification value with an expected value stored in the system-on-chip; and a verification circuit configured to verify the external software module when the final check value equals the expected value.
In an embodiment, the memory is a volatile memory.
In an embodiment, a system on a chip includes a processor to implement a comparison circuit and a verification circuit.
In an embodiment, the calculation circuit comprises a cyclic redundancy check circuit for calculating each check value.
In an embodiment, the calculation circuit comprises a hash circuit for calculating each check value.
In an embodiment, the calculation circuitry is configured to calculate each check value by using the length of the external software module.
In an embodiment, the calculation circuitry comprises non-linear function circuitry configured to calculate each modified software module by a non-linear function.
In an embodiment, the non-linear function comprises a shift of bits of the modified software module.
In an embodiment, the expected value is stored in a configuration bit or encoded at a register transfer stage.
In an embodiment, several expected values are stored in the system on chip.
Different predefined expected values may be used to verify different external software modules that may provide different additional services to the system-on-chip.
Drawings
For a more complete understanding of the present disclosure and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a flow diagram of an embodiment method for verifying an external software module;
FIG. 2 is a diagram of an embodiment of a portion of a system-on-chip;
FIG. 3 is a timing diagram of an embodiment for obtaining a final check value; and
FIG. 4 is a diagram of an embodiment of a portion of a system-on-chip.
Detailed Description
FIG. 1 illustrates a method, implemented by a system-on-chip, for verifying an external software module received by the system-on-chip for use by the system-on-chip. The external software module may be a software module that provides additional services to the system-on-chip. In an embodiment, each external software module that the system on chip may use is defined by the manufacturer of the system on chip.
The system on chip is configured to calculate a number of check values crc (k) from an external software module, where k is an integer from 1 to N. Thus, the system on chip is configured to calculate several check values CRC (k) starting from the first check value CRC (1) to the final check value CRC (n). The check value is calculated from a modified software module derived from an external software module received by the system-on-chip.
The system on chip is configured to validate the external software module according to the calculated final check value crc (n). In an embodiment, the external software module is verified if the final check value crc (n) is equal to the desired value defined by the manufacturer.
In an embodiment, the number N is selected to reduce the probability of obtaining the same final check value for two different external software modules. The larger the value of N, the lower the probability of obtaining the same final check value for two different software modules. In an embodiment, the number N is selected to minimize the computation time of the final check value. In an embodiment, the number N is greater than 10. In an embodiment, the number N is between 15 and 20.
As shown in fig. 1, the method includes acquiring an external software module 10 by a system-on-chip.
Next, the method comprises an initialization step 11, in which the value k is initialized to 1 and an initial check value CRC (0) and the number N of check values to be calculated are defined. The initial check value CRC (0) may be any value. In an embodiment, the initial check value is randomly defined.
The method comprises a loop 12 for calculating a check value from different modified software modules. In an embodiment, the loop comprises a step 13, wherein the modified software module is calculated from the external software module using a non-linear function.
In an embodiment, the modified software module is denoted as SW _ module # (k) F SW _ module # (k-1), where SW _ module # (k) is the modified software module to be computed, SW _ module # (k-1) is the external software module when k is equal to 1 or the last computed modified software module when k is greater than or equal to 2, and F is a non-linear function.
In some embodiments, the modified software module is denoted SW _ module # (k) Fk ESW _ module, where SW _ module # (k) is the modified software module to be computed, ESW _ module is the external software module, and Fk is a k-dependent nonlinear function.
In an embodiment, the external software module is formed by a binary data word that is modified by a non-linear function to obtain a modified data word forming the modified software module.
In some embodiments, the modified software module is calculated from the external software module using a linear function. The function used to compute the modified software module allows a new modified software module to be obtained that is different from the last computed modified software module.
The cycle 12 includes: in step 14, a check value CRC (k) is calculated based on the modified software module, the last calculated check value CRC (k-1) or the initial check value CRC (0), and the length (S) of the external software module. The length (S) of the external software module is the number of words that constitute the external software module. In an embodiment, the check value is calculated using a cyclic redundancy check algorithm, such as a CRC-32 algorithm, a HASH algorithm, or the like.
In an embodiment, the check value is calculated from a concatenated binary word of the length (S) of the modified software module used to calculate the check value, the previous check value and the external software module.
In an embodiment, the check value CRC (k) is expressed as CRC (k) ═ CRC (SW _ module # (k) | CRC (k-1) | S), where k is an integer between 1 and N, where SW _ module # (k) is the modified software module, CRC (k-1) is the last calculated check value from the previous modified software module SW _ module # (k-1) or the initial check value CRC (0), and (S) is the length of the external software module.
In step 15, the number k is compared with the number N. If the number k is less than the number N, steps 13 to 15 are repeated to calculate a new check value and the number k is incremented. However, when k is equal to N, this means that the last calculated check value is the final check value. In this case, the method comprises a step 16 in which the final check value is compared with an expected value defined by the manufacturer. If the final check value crc (n) differs from the desired value defined by the manufacturer, the external software module is rejected in step 17. If the final check value CRC (N) is equal to the desired value defined by the manufacturer, the external software module is validated at step 18. Once verified, the external software module may be used by the system-on-chip.
Advantageously, the use of the previous check value CRC (k-1) to calculate the new check value guarantees a chain effect on the calculation of each check value. Furthermore, using the length (S) of the external software module to calculate the check value increases the robustness of the method. Advantageously, using the length (S) of the external software module to calculate the check value prevents a length extension attack.
In general, in order to intrude on a system-on-chip, a hacker must be able to generate the following software modules: the software module has the same length as the authenticated external module and the system-on-chip may generate a final check value for the software module that is equal to the expected value of the authenticated external module.
FIG. 2 illustrates a portion of an embodiment of a system-on-chip configured to generate a final check value. The system on chip includes a finite state machine circuit (FSM), a volatile memory storage device (MEM), a non-linear function circuit (NLFM), a Multiplexer (MUX), a cyclic redundancy check circuit (CRCM)), and a Latch (LTCH).
The volatile memory storage (MEM) is configured to store an external software module (ESW) or program. The volatile memory storage (MEM) may be a RAM ("random access memory").
A finite state machine circuit (FSM) includes various inputs and outputs. The first input is configured to receive a Reset Signal (RST). The Reset Signal (RST) is used to reset the finite state machine circuit (FSM).
The second input is configured to receive a system clock signal (SYS _ CLK). The finite state machine circuit (FSM) operates according to a system clock signal (SYS _ CLK).
The finite state machine circuit (FSM) also includes an output configured to transmit a clock signal (RCLK) to an input of the volatile memory storage device (MEM). The clock signal (RCLK) is generated by a finite state machine circuit (FSM).
The finite state machine circuit (FSM) further comprises an output configured to emit a signal (RSEL) to another input of the volatile memory storage means (MEM). The signal (RSEL) is used to select a volatile memory storage means (MEM).
The finite state machine circuit (FSM) further comprises an output configured to transmit a read signal (RD) to another input of the volatile memory storage device (MEM). The read signal (RD) is used to indicate a read of the volatile memory storage means (MEM).
The finite state machine circuit (FSM) further comprises an output for delivering an address signal (ADDR) to another input of the volatile memory storage device (MEM). The address signal (ADDR) is the address of a data word of an external software module (ESW) in the volatile memory storage device (MEM).
An input of a finite state machine circuit (FSM) is configured to receive a number N of check values to be generated to obtain a final check value.
The finite state machine circuit (FSM) further includes an input configured to receive a signal (NXT) from an output of the nonlinear function circuit (NLFM).
The finite state machine circuit (FSM) further includes an input configured to receive a signal (PVS) from an output of the non-linear function circuit (NLFM).
The finite state machine circuit (FSM) further includes an input configured to receive a signal (FRDY) from an output of the non-linear function circuit (NLFM).
The finite state machine circuit (FSM) further includes an output configured to deliver a number k at an input of a non-linear function circuit (NLFM). A finite state machine circuit (FSM) is configured to increment a number k after each computation of a check value.
In an embodiment, a finite state machine circuit (FSM) is configured to initialize a number k to 1 to compute a first check value CRC (1).
The finite state machine circuit (FSM) includes an output configured to transmit a Signal (SEL) to a Multiplexer (MUX).
Another output of the finite state machine circuit (FSM) is configured to pulse a signal (LTCH _ R) delivered to the Latch (LTCH).
The output of the finite state machine circuit (FSM) is configured to transmit a signal (CLK _ CRC) to the cyclic redundancy check circuit (CRCM).
Another input of the finite state machine circuit (FSM) is configured to receive a signal (SW _ L) corresponding to the length (S) of the external software module (ESW).
A finite state machine circuit (FSM) includes an output configured to transmit a signal (RDY) to the processor when the final check value has been calculated.
A finite state machine circuit (FSM) is configured to implement a method for calculating a final check value crc (n).
The non-linear function circuit (NLFM) is configured to convert each data word (DAT) of the external software module (ESW) into a modified data word fk (DAT). By doing so, the non-linear function circuit (NLFM) is configured to generate a modified software module formed by each modified data word fk (DAT) generated from the data word (DAT) of the external software module (ESW).
In an embodiment, the system on chip is configured such that each modified software module is generated by a non-linear function circuit (NLFM) directly from an external software module (ESW).
In an embodiment, a non-linear function circuit (NLFM) is configured to implement a non-linear function. The non-linear function depends on the number k generated by a finite state machine circuit (FSM) to generate a different modified software module for each iteration of k. The non-linear function may comprise a shift of bits of a data word (DAT) of an external software module (ESW) received at a non-linear function circuit (NLFM) input.
For example, the non-linear function may be expressed as fk (DAT) ═ DAT < < k, where fk (DAT) LSB + k-m ═ not (DATMSB-m), m being from 0 to k-1, where fk (DAT) is the modified data word calculated from the data word (DAT), fk (DAT) LSB is the least significant bit of the modified data word fk (DAT), and DATMSB is the most significant bit of the data word (DAT).
The non-linear function may comprise performing an exclusive or function between different data words (DAT) of the external software module (ESW). For example, the non-linear function may be expressed as: when ADDR ≧ k and ADDR < ADDR _ max-k, Fk [ DAT (ADDR) ] -DAT (ADDR-k) xor DAT (ADDR + k); when ADDR < k or ADDR ≧ ADDR _ MAX-k, Fk [ DAT (ADDR)) ] DAT (ADDR) xor M, where Fk [ DAT (ADDR)) ] is the modified data word calculated for the data word (DAT) (ADDR) stored at address ADDR, DAT (ADDR-1) is the previous data word in memory, and DAT (ADDR +1) is the next data word in memory, ADDR _ MAX is the maximum data word address of the software module used to calculate the new modified software module, address ADDR is between 0 and address ADDR _ MAX, ADDR _ MAX is equal to the length (S) of the external software module, M is a constant, e.g. 0xA 5.
The non-linear function circuit (NLFM) includes outputs for delivering a signal (NXT), a signal (PVS), and a signal (FRDY) to a finite state machine circuit (FSM). The signal (PVS) is used by the non-linear function circuit (NLFM) to request from the finite state machine circuit (FSM) a data word stored in the volatile memory storage means (MEM) which is stored at a previous address ADDR-k of an address ADDR of the data word (DAT).
The signal (NXT) is used by the non-linear function circuit (NLFM) to request a data word (DAT) stored in the volatile memory storage means (MEM) from the finite state machine circuit (FSM), which data word (DAT) is stored at a next address ADDR + k of an address ADDR of the data word (DAT).
The signal (FRDY) is used by the non-linear function circuit (NLFM) to indicate to the finite state machine circuit (FSM) that the calculated modified data word fk (dat) is available.
The non-linear function circuit (NLFM) also includes an output for delivering the modified data word fk (dat) to the Multiplexer (MUX).
The Multiplexer (MUX) comprises different inputs for receiving the signal CRC (0), the modified data word fk (dat), the length (SW _ L) of the external software module (ESW) and the last calculated check value CRC (k-1).
The Multiplexer (MUX) further includes an output connected to an input of a cyclic redundancy check circuit (CRCM).
The Multiplexer (MUX) further comprises an input for receiving a Signal (SEL) from a finite state machine circuit (FSM). The Signal (SEL) allows the input of the Multiplexer (MUX) to be selected for delivery at the output of the Multiplexer (MUX).
A cyclic redundancy check circuit (CRCM) is configured to calculate a check value crc (k). In an embodiment, the check value crc (k) is calculated from the modified data word fk (dat) calculated by the non-linear function circuit (NLFM), the last calculated check value or initial check value and the length (SW _ L) of the external software module (ESW).
In an embodiment, the modified data word fk (dat), the last check value CRC (k-1) or the initial check value CRC (0), and the length (SW _ L) of the external software module (ESW) are provided to the cyclic redundancy check circuit (CRCM) through a Multiplexer (MUX) controlled by the finite state machine circuit (FSM). In an embodiment, a cyclic redundancy check circuit (CRCM) may perform a CRC-32 algorithm.
The cyclic redundancy check circuit (CRCM) comprises an input for receiving a signal (CLK _ CRC) generated by a finite state machine circuit (FSM).
The cyclic redundancy check circuit (CRCM) comprises an output for delivering a check value to an input of the Latch (LTCH).
A cyclic redundancy check circuit (CRCM) is used to calculate the number of check values, which is equal to the number N received at the input of the finite state machine circuit (FSM). The nth check value is a final check value.
The Latch (LTCH) is used to temporarily store each check value calculated by the cyclic redundancy check circuit (CRCM).
The Latch (LTCH) further comprises an input for receiving a signal (LTCH _ R) from a finite state machine circuit (FSM).
The Latch (LTCH) comprises an output for delivering a last calculated check value through a cyclic redundancy check circuit (CRCM) when the signal (LTCH _ R) is asserted by the finite state machine circuit (FSM).
The output of the Latch (LTCH) is connected to the input of the Multiplexer (MUX) to deliver the signal CRC (k-1).
The output of the Latch (LTCH) is also coupled to the processor.
The Latch (LTCH) is thus used to deliver the last calculated check value CRC (k-1) to the Multiplexer (MUX) for calculation of the further check value CRC (k) by the cyclic redundancy check circuit (CRCM).
After the final check value crc (n) calculation, a Latch (LTCH) is configured to store the final check value before delivering the final check value to the processor. A finite state machine circuit (FSM) is configured to assert a signal (RDY) when the final check value is available to the processor.
When the signal (RDY) is asserted, the processor is configured to receive the final check value. The processor is then configured to compare the final check value with a predefined expected value. The expected value is defined by the system-on-chip manufacturer in terms of an authorized external software module (ESW). In an embodiment, the expected value is stored in the system on chip. For example, the expected value may be stored in a configuration bit or encoded at a Register Transfer Level (RTL).
If the final check value is equal to the expected value, then the probability that the external software module (ESW) provided to the system-on-chip is an authorized software module is high. In this case, the processor is configured to authenticate an external software module (ESW). The external software module (ESW) may then be used by the system on chip.
Otherwise, if the final check value is not equal to the expected value, it indicates that the external software module (ESW) provided to the system-on-chip is not an authorized software module. In this case, the processor is configured to reject the external software module (ESW). Therefore, in this case, the system on chip cannot use an external software module (ESW).
Fig. 3 shows an example of a timeline of signals used by different elements of the system on chip of fig. 1 for obtaining the final check value crc (n). Initially, the external software module (ESW) to be authenticated is stored in the volatile memory storage device (MEM). In an embodiment, an external software module (ESW) is divided into several data words that are stored in memory at different addresses. In one embodiment, each data word includes 32 bits.
The length (S) of the external software module (ESW) is received by the finite state machine circuit (FSM) via a signal (SW _ L). The number N of check values to be calculated is also received by a finite state machine circuit (FSM).
In an initialization step, a finite state machine circuit (FSM) selects with a Signal (SEL) the input of a Multiplexer (MUX) receiving an initial check value CRC (0), which initial check value CRC (0) can be RTL encoded. For example, the finite state machine circuit (FSM) selects the input n ° 0 of the multiplexer using the value "SEL 0" of the Signal (SEL). The initial check value CRC (0) may be equal to any value X.
The clock signal (CLK _ CRC) is pulsed to provide an initial check value to the cyclic redundancy check circuit (CRCM). A finite state machine circuit (FSM) pulses a signal (LTCH _ R) to store a signal CRC (0) in a Latch (LTCH). This initial check value is used to calculate a first check value CRC (1).
The modified data word fk (dat) for each word of the external software module (ESW) is calculated to calculate the check value.
In an embodiment, a finite state machine circuit (FSM) delivers an address of a data word (DAT) to a volatile memory storage device (MEM). The finite state machine circuit (FSM) also pulses a signal (RD) to indicate a read of a data word (DAT) stored in the volatile memory storage device (MEM) at an address delivered by the finite state machine circuit (FSM). In an embodiment, the reading of the data word (DAT) begins at a rising edge of the clock signal (RCLK).
The finite state machine circuit (FSM) also asserts a signal (RSEL) to select a volatile memory storage device (MEM).
In addition, the finite state machine circuit (FSM) selects the input of the Multiplexer (MUX) that receives the modified data word fk (dat) using the Signal (SEL). For example, a finite state machine circuit (FSM) selects the input n ° 1 of the multiplexer using the value "SEL 1" of the Signal (SEL).
The data word (DAT) is delivered by the volatile memory storage (MEM) to the non-linear function circuit (NLFM). Next, the non-linear function circuit (NLFM) calculates a modified data word fk (DAT) from the data word (DAT) delivered by the volatile memory storage means (MEM). In an embodiment, the calculation of the modified data word fk (dat) is performed in accordance with the system clock signal (SYS _ CLK).
The non-linear function circuit (NLFM) asserts the signal (PVS) or the signal (NXT) in case the non-linear function circuit (NLFM) requires the previous or next data word of the external software module (ESW) to calculate the modified data word fk (dat).
When the finite state machine circuit (FSM) receives the signal (PVS) or the signal (NXT), the finite state machine circuit (FSM) requests a read of a data word stored at a previous or next address of the volatile memory storage means (MEM). The data word stored at the previous or next address is then delivered to a non-linear function circuit (NLFM).
When the calculation of the modified data word fk (dat) is finished, the non-linear function circuit (NLFM) asserts a signal (FRDY) to indicate to the finite state machine circuit (FSM) that the modified data word fk (dat) is available.
The finite state machine circuit (FSM) pulses a clock signal (CLK _ CRC) to deliver the modified data words fk (dat) to the cyclic redundancy check circuit (CRCM). When a modified data word fk (DAT) has been calculated for each data word (DAT) of an external software module (ESW), the modified software module is retrieved.
For example, in fig. 3, the non-linear function circuit does not require a previous data word or a next data word of an external software module. The modified Data word F1(Data 0) is calculated from the Data word (DAT) a 0 stored at address 0x00 … 0 of the volatile memory, where k is equal to 1. The modified Data word F1(Data S-1) is calculated from the Data word (DAT) a S-1 stored at address ADDR S-1 of the volatile memory, where k equals 1. Modified Data words F1(Data 0) through F1(Data S-1) form a first modified software module.
The modified Data word FN (Data 0) is calculated from the Data word (DAT) a 0 stored at address 0x00 … 0 of the volatile memory, where k is equal to N. The modified Data word FN (Data S-1) is calculated from the Data word (DAT) a S-1 stored at address ADDR S-1 of the volatile memory, where k is equal to N. The modified Data words FN (Data 0) through FN (Data S-1) form the final modified software module.
For the calculation of the check values, the finite state machine circuit (FSM) selects the input of the Multiplexer (MUX) that receives the last calculated check value CRC (k-1) or the initial check value CRC (0) when all modified data words fk (dat) (i.e. the modified software modules) have been delivered to the cyclic redundancy check circuit (CRCM). For example, the finite state machine circuit (FSM) selects the input n ° 3 of the multiplexer using the value "SEL 3" of the Signal (SEL).
The clock signal (CLK _ CRC) is pulsed by a finite state machine circuit (FSM). This allows the last calculated check value CRC (k-1) or the initial check value CRC (0) to be delivered to the cyclic redundancy check circuit (CRCM) for the calculation of the new check value.
The finite state machine circuit (FSM) selects the input of the Multiplexer (MUX) which receives the software length (S) via the signal (SW _ L). For example, the finite state machine circuit (FSM) selects the input n ° 2 of the multiplexer using the value "SEL 2" of the Signal (SEL).
The clock signal (CLK _ CRC) is pulsed by a finite state machine circuit (FSM), which allows the software length (S) to be delivered to a cyclic redundancy check circuit (CRCM) to calculate a new check value.
The new check value is calculated by the cyclic redundancy check circuit (CRCM) using all calculated modified data words fk (dat), the last calculated check value CRC (k-1) or the initial check value CRC (0), and the software length (S).
For example, the first check value CRC (1) is calculated from the modified Data words F1(Data 0) to F1(Data S-1) of the first modified software module, and may also be calculated from the initial check value CRC (0) and the length (S) of the external software module.
A finite state machine circuit (FSM) pulses a signal (LTCH _ R) to store a new check value in a Latch (LTCH). The check value is calculated until the final check value crc (n) is obtained.
For example, the final check value CRC (N) is calculated from the modified Data words FN (Data 0) to FN (Data S-1) of the final modified software module, and may also be calculated from the previous check value CRC (N-1) and the length (S) of the external software module.
When the final check value has been calculated, a finite state machine circuit (FSM) pulses a signal (LTCH _ R) to store the final check value in a Latch (LTCH). A finite state machine circuit (FSM) pulses a signal (RDY) to deliver a final check value crc (n) to the processor. The processor uses the final check value to authenticate an external software module (ESW).
In an embodiment, the processor compares the final check value with a predefined expected value. If the final check value is equal to the expected value, the processor authenticates the external software module (ESW) and the system-on-chip may use the external software module (ESW). Otherwise, if the final check value is not equal to the expected value, the processor will reject the external software module (ESW) and the system-on-chip cannot use the external software module (ESW).
FIG. 4 illustrates an embodiment of a portion of a system-on-chip configured to generate a final check value. In contrast to the system-on-chip of fig. 1, the system-on-chip from fig. 4 provides another method of generating a modified software module by a non-linear function circuit (NLFM).
In an embodiment, the non-linear function circuit (NLFM) is configured to apply the exact same non-linear function to each data word (DAT) received at the input of the non-linear function circuit (NLFM). Thus, the non-linear function does not depend on the number k.
However, the system on chip is configured such that each modified software module is generated by a non-linear function circuit (NLFM) directly from the modified software module, the first modified software module being generated from an external software module.
In an embodiment, a volatile memory storage (MEM) is configured to store each modified software module. For example, the modified software modules may be stored in memory banks TMP1 through TMPm.
Furthermore, the non-linear function circuit (NLFM) is configured to receive a data word (DAT) of an external software module (ESW) or a data word (DAT) of a modified software module stored in the volatile memory storage means (MEM). The non-linear function circuit (NLFM) is configured to calculate a modified data word f (DAT) from each data word (DAT) received at its input.
In an embodiment, the finite state machine circuit (FSM) is configured to select an external software module (ESW) or a data word (DAT) of a modified software module for delivery to the non-linear function circuit (NLFM).
The modified data word f (DAT) obtained from the external software module (ESW) or the data word (DAT) of the given modified software module forms a new modified software module.
The non-linear function circuit (NLFM) is configured to deliver each modified data word f (dat) of the new modified software module to the volatile memory storage means (MEM). The non-linear function circuit (NLFM) is further configured to assert a signal WR to indicate a write to the newly calculated modified data word f (dat). The non-linear function may comprise a shift of bits of a data word (DAT) of an external software module (ESW) or a modified software module received at an input of the non-linear function circuit (NLFM).
For example, the non-linear function may be expressed as f (DAT) ═ DAT<<1 and F (DAT)LSB＝not(DATMSB) Wherein F (DAT) is a modified data word calculated from the data word (DAT), F (DAT)LSBIs the least significant bit of the modified data word F (DAT), DATMSBIs the most significant bit of the data word (DAT).
In an embodiment, the non-linear function comprises performing an exclusive or function between different data words.
For example, in this case, the non-linear function may be expressed as: when ADDR >1 and ADDR < ADDR _ MAX-1, F [ DAT (ADDR) ] -DAT (ADDR-1) xor DAT (ADDR + 1); when ADDR is 0 or ADDR _ MAX, F [ DAT (ADDR)) ] DAT (ADDR) xor M, where F [ DAT (ADDR)) ] is the modified data word calculated for the data word (DAT) (ADDR) stored at address ADDR, DAT (ADDR-1) is the previous data word in memory, DAT (ADDR +1) is the next data word in memory, ADDR _ MAX is the maximum data word address of the software module used to calculate the new modified software module, address ADDR is between 0 and address ADDR _ MAX, ADDR _ MAX is equal to the length of the external software module, M is a constant, e.g. 0xA 5.
Otherwise, each check value is calculated in the same manner as in the embodiment of fig. 1.
In an embodiment, each modified software module stored in memory may be overridden by a newly computed modified software module when the modified software module stored in memory is no longer needed for computing the new modified software module. This allows the amount of memory required to store the software module to be minimized.
In an embodiment, some system-on-chips may store different predefined expected values in order to verify different external software modules that may provide different additional services to the system-on-chip. Thus, for each external software module that may be used by the system-on-chip, a predefined expected value is stored in the system-on-chip.
For example, a first expected value may be defined to verify an external software module that may be used to perform HMAC-SHA256 functions. A second expected value may be defined to verify an external software module that may be used to perform the AES function. A third expected value may be defined to verify an external software module that may be used to authorize an additional external software module selected by a user of the system-on-chip.
The present disclosure is susceptible to various changes and modifications apparent to those skilled in the art. For example, each check value may be calculated in a different manner than described above.
In an embodiment, each check value may be calculated from a modified software module calculated by the non-linear function circuit and may be calculated from the result of an auxiliary function module having as inputs the last calculated check value and the length of the external software module.
Alternatively, each check value may be calculated from a modified software module calculated by the non-linear function circuit, and may be calculated from the result of an auxiliary function module having as inputs a number of already calculated check values and the length of the external software module.
Although the description has been described in detail, it should be understood that various changes, substitutions, and alterations can be made hereto without departing from the spirit and scope of the disclosure as defined by the appended claims. Like elements in different figures are denoted by like reference numerals. Moreover, the scope of the present disclosure is not intended to be limited to the particular embodiments described herein, as one of ordinary skill in the art will readily appreciate from the present disclosure that processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
Accordingly, the specification and figures are to be regarded in a simplified manner as being illustrative of the present disclosure as defined in the appended claims, and are intended to cover any and all modifications, variations, combinations, or equivalents that fall within the scope of the present disclosure.

Claims (20)

1. A method, comprising:
acquiring an external software module for the system on chip;
calculating a number of modified software modules from the external software modules;
calculating check values iteratively calculated from the initial predefined check value to a final check value, each check value being calculated from one or more modified software modules and a previously calculated check value;
comparing the final check value to an expected value stored in the system-on-chip; and
verifying the external software module for use by the system-on-chip in response to the final check value being equal to the expected value.
2. The method of claim 1, wherein calculating the check value comprises: each check value is calculated using a cyclic redundancy check algorithm.
3. The method of claim 1, wherein calculating the check value comprises: each check value is calculated using a hash algorithm.
4. The method of claim 1, wherein calculating the check value comprises: each check value is calculated using the length of the external software module.
5. The method of claim 1, wherein computing a number of modified software modules comprises: the modified software modules are computed using a non-linear function.
6. The method of claim 5, wherein the non-linear function comprises a shift of bits of a corresponding modified software module.
7. The method of claim 1, wherein the expected value stored in the system-on-chip comprises the expected value stored in a configuration bit of the system-on-chip or the expected value stored in the system-on-chip is encoded at a register transfer stage.
8. A system on a chip, comprising:
a memory storage configured to store an external software module;
a computation circuit configured to:
calculating a number of modified software modules from the external software modules;
calculating check values iteratively calculated from the initial predefined check value to a final check value, each check value being calculated from one or more modified software modules and a previously calculated check value;
a comparison circuit configured to: comparing the final check value to an expected value stored in the system-on-chip; and
a verification circuit configured to: verifying the external software module for use by the system-on-chip in response to the final check value being equal to the expected value.
9. The system-on-chip of claim 8, wherein the computation circuit comprises a cyclic redundancy check circuit configured to compute the check value.
10. The system-on-chip of claim 8, wherein the computation circuit comprises a hash circuit configured to compute the check value.
11. The system-on-chip as recited in claim 8, wherein the computation circuitry is configured to compute each check value using a length of the external software module.
12. The system-on-chip of claim 8, wherein the computation circuit comprises a non-linear function circuit configured to compute the number of modified software modules using a non-linear function.
13. The system-on-chip of claim 12, wherein the non-linear function comprises a shift of bits of a corresponding modified software module.
14. The system on chip of claim 8, wherein the expected value is stored in a configuration bit of the system on chip or encoded at a register transfer stage.
15. The system on a chip of claim 8, wherein the memory storage is configured to store additional external software modules.
16. An apparatus comprising a system-on-chip, the system-on-chip comprising:
a memory storage configured to store an external software module;
a computation circuit configured to:
calculating a number of modified software modules from the external software modules;
calculating check values iteratively calculated from the initial predefined check value to a final check value, each check value calculated from the one or more modified software modules and a previously calculated check value;
a comparison circuit configured to: comparing the final check value to an expected value stored in the system-on-chip; and
a verification circuit configured to: verifying the external software module for use by the system-on-chip in response to the final check value being equal to the expected value.
17. The apparatus of claim 16, wherein the calculation circuit comprises a cyclic redundancy check circuit configured to calculate the check value.
18. The apparatus of claim 16, wherein the computation circuit comprises a hash circuit configured to compute the check value.
19. The apparatus of claim 16, wherein the computation circuitry is configured to compute each check value using a length of the external software module.
20. The apparatus of claim 16, wherein the computation circuitry comprises non-linear function circuitry configured to compute the number of modified software modules using a non-linear function.
CN202111566630.1A 2020-12-21 2021-12-20 Method for verifying external software modules for use by a system-on-chip Pending CN114647543A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
FR2013782A FR3118218B1 (en) 2020-12-21 2020-12-21 Method for validating an external software module for use by a system on a chip
FR2013782 2020-12-21
US17/454,231 US20220197990A1 (en) 2020-12-21 2021-11-09 Method for validating an external software module for its use by a system-on-a-chip
US17/454,231 2021-11-09

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