CN114640292A - Current judging circuit - Google Patents

Abstract

A current judging circuit is used for judging the state of a current passing through a coil of a motor and comprises a high-side circuit, a low-side circuit and a processing unit. The high-side circuit is used for outputting a first judgment signal according to a first voltage difference between two ends of a first body diode of a high-side transistor and the voltage level of a first control signal. The low-side circuit is used for outputting a second judgment signal according to a second voltage difference between two ends of a second body diode of a low-side transistor and the voltage level of a second control signal. The processing unit is used for receiving the first judgment signal and the second judgment signal and judging the state of the current according to the voltage level of the first judgment signal and the voltage level of the second judgment signal. Through the design of the high-side circuit and the low-side circuit, the current judging circuit does not need to measure the voltage value of the node, and further, the problem caused by measuring the voltage value higher than the system high voltage or lower than the system low voltage can be avoided.

Description

Current judging circuit

Technical Field

The present disclosure relates to a current determination circuit, and more particularly, to a current determination circuit for determining a state of a coil current.

Background

Taking a set of high-side transistors and low-side transistors in a driving circuit of a three-phase motor as an example, generally, the high-side transistors and the low-side transistors are turned on alternately to change the flow direction of the coil current, thereby driving the motor. When the motor is driven, there may be a period (hereinafter referred to as Dead Zone) when the high-side transistor and the low-side transistor are simultaneously in an off state. It is noted that the direction of the coil current in the dead band region most reflects the instantaneous state of the motor during operation. In addition, the voltage value of a node where the high-side transistor, the low-side transistor and the motor coil are commonly coupled changes according to the flowing direction of the coil current in the dead zone. Accordingly, conventionally, the current direction of the coil current in the dead zone can be determined by comparing the voltage value of the node with the system high voltage or the system low voltage, so as to obtain the real-time state information of the motor in operation.

However, the above-mentioned determination result is easily affected by the system noise, and since the voltage value higher than the system high voltage (or lower than the system low voltage) is measured, an auxiliary circuit (or other special measures) is often required, which further increases the cost. In addition, when the voltage value of the node is between the system high voltage and the system low voltage, the flow direction of the coil current cannot be judged.

Disclosure of Invention

Accordingly, the present disclosure provides a current determination circuit. The current determination circuit is used for determining the state of a current passing through a coil of a motor and comprises a high-side transistor, a low-side transistor, a high-side circuit, a low-side circuit and a processing unit. The high-side transistor is coupled to the coil, selectively turned on or off according to a voltage level of a first control signal, and includes a first body diode. The low-side transistor is coupled to the coil, selectively turned on or off according to a voltage level of a second control signal, and includes a second body diode. The high-side circuit is coupled to the high-side transistor and is used for outputting a first judgment signal according to a first voltage difference between two ends of the first body diode and the voltage level of the first control signal. The low-side circuit is coupled to the low-side transistor and is used for outputting a second judgment signal according to a second voltage difference between two ends of the second body diode and the voltage level of the second control signal. The processing unit is used for outputting the first control signal and the second control signal, receiving the first judgment signal and the second judgment signal, and judging the state of the current according to the voltage level of the first judgment signal and the voltage level of the second judgment signal.

In another embodiment, the processing unit determines that the current is zero when the first determination signal is at a low voltage level and the second determination signal is at a low voltage level.

In another embodiment, when the first determination signal is at a high voltage level and the second determination signal is at a low voltage level, the processing unit determines that the current flows out of the coil and then passes through the first body diode.

In another embodiment, when the first determination signal is at a low voltage level and the second determination signal is at a high voltage level, the processing unit determines that the current flows into the coil after passing through the second body diode.

In another embodiment, when the first determination signal is at a high voltage level and the second determination signal is at a high voltage level, the processing unit determines that the state of the current is indeterminate.

In another embodiment, the high-side circuit includes a first comparator coupled to the first body diode and configured to output a first state signal according to the first voltage difference between two ends of the first body diode.

In another embodiment, the high-side circuit further includes a first logic gate coupled to the first comparator and the high-side transistor, and configured to output the first determination signal according to a voltage level of the first state signal and a voltage level of the first control signal.

In another embodiment, the low side circuit includes a second comparator coupled to the second body diode for outputting a second state signal according to the second voltage difference across the second body diode.

In another embodiment, the low-side circuit further includes a second logic gate coupled to the low-side transistor and configured to switch the voltage level of the second control signal, and a third logic gate coupled to the second comparator and the second logic gate and configured to output the second determination signal according to the voltage level of the second state signal and the voltage level of the second control signal switched by the second logic gate.

In another embodiment, the high-side transistor further comprises a first terminal, a second terminal and a first control terminal, wherein two terminals of the first body diode are coupled to the first terminal and the second terminal, the first terminal is used for receiving a system high voltage, the second terminal is coupled to the coil, and the first control terminal is used for receiving the first control signal; the low-side transistor further includes a third terminal, a fourth terminal, and a second control terminal, wherein two terminals of the second body diode are coupled to the third terminal and the fourth terminal, the third terminal is coupled to the coil, the fourth terminal is configured to receive a system low voltage, and the second control terminal is configured to receive the second control signal.

Through the design of the high-side circuit and the low-side circuit, the current judging circuit of the disclosure can judge the state of the current in the coil in the dead zone according to a first voltage difference parasitic on two ends of a first body diode of the high-side transistor and a second voltage difference parasitic on two ends of a second body diode of the low-side transistor. The current judging circuit can avoid the problem caused by measuring the voltage value higher than the system high voltage or lower than the system low voltage because the voltage value of the node does not need to be measured. In addition, the processing unit can also acquire the phase information of the current and adjust the phase relation between the current and the back electromotive force of the motor, so that the motor can run at the optimal rotating speed value.

Drawings

FIG. 1 is a schematic diagram illustrating a current determination circuit according to some embodiments of the present disclosure;

FIG. 2 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;

FIG. 3 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;

FIG. 4 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure;

FIG. 5 is a schematic diagram illustrating a current determination circuit in operation according to some embodiments of the present disclosure.

[ description of symbols ]

10 coil

100 current judging circuit

102 high side transistor

104 low side transistor

106 high side circuit

108 low side circuit

110 processing unit

120 controller

121 first body diode

141 second body diode

161 first comparator

162 first logic gate

181 second comparator

182 second logic gate

183 third logic gate

CS1 first control Signal

CS2 second control signal

SS1 first status signal

SS2 second status signal

DS1 first decision signal

DS2 second decision signal

Vcc, system high voltage

Vss System Low Voltage

I1, I2, I3, I4 current

N is node

Detailed Description

The following embodiments are described in detail with reference to the accompanying drawings, but the embodiments are only for explaining the present invention and not for limiting the present invention, and the description of the structural operation is not for limiting the execution sequence thereof, and any structure obtained by recombining the elements and having an equivalent function is included in the scope of the present disclosure.

The term (terms) used throughout the specification and claims has the ordinary meaning as commonly understood in each art, in the disclosure herein and in the specific disclosure herein, unless otherwise indicated.

As used herein, the terms "first," "second," …, etc. do not denote any order or importance, nor do they denote any order or importance, but rather are used to distinguish one element from another element or operation described in such technical terms.

Further, as used herein, the term "couple" or "connect" refers to two or more elements being in direct physical or electrical contact with each other, or in indirect physical or electrical contact with each other, or to the mutual operation or action of two or more elements.

Referring to fig. 1, one embodiment of the present disclosure relates to a current determination circuit 100. The current determination circuit 100 is used for determining a state of a current (e.g., the current I2 in fig. 3 or the current I3 in fig. 4) passing through a coil 10 of a motor (not shown), and includes a high-side transistor 102, a low-side transistor 104, a high-side circuit 106, a low-side circuit 108, and a processing unit 110.

In the present embodiment, the motor is a three-phase motor. It will be appreciated that the motor includes three coils (one of which is the coil 10 shown in figure 1). However, for the sake of simplicity of explanation, the other two coils and the two current determination circuits corresponding to these coils are omitted in fig. 1.

Structurally, the processing unit 110 is coupled to the high-side transistor 102 and the low-side transistor 104, and configured to output a first control signal CS1 and a second control signal CS2 to the high-side transistor 102 and the low-side transistor 104, respectively, so as to control the high-side transistor 102 and the low-side transistor 104. Specifically, the processing unit 110 includes a controller 120, and the controller 120 is configured to generate a first control signal CS1 and a second control signal CS 2.

The high-side transistor 102 is selectively turned on or off according to the voltage level of the first control signal CS1, and the low-side transistor 104 is selectively turned on or off according to the voltage level of the second control signal CS 2. As shown in fig. 1, the high-side transistor 102, the low-side transistor 104 and the coil 10 of the motor are commonly coupled to a node N.

Specifically, the high-side transistor 102 includes a first terminal for receiving a system high voltage Vcc, a second terminal coupled to the node N, a first control terminal for receiving the first control signal CS1, a cathode terminal of the first body diode 121 coupled to the first terminal, and an anode terminal of the first body diode 121 coupled to the second terminal (or node N), and a first body diode 121 parasitic between the first terminal and the second terminal. The low-side transistor 104 includes a third terminal coupled to the node N, a fourth terminal for receiving a system low voltage Vss, a second control terminal for receiving a second control signal CS2, a cathode terminal of the second body diode 141 coupled to the third terminal (or node N), and an anode terminal of the second body diode 141 coupled to the fourth terminal, and a second body diode 141 parasitic between the third terminal and the fourth terminal. In other words, the second terminal of the high-side transistor 102 and the third terminal of the low-side transistor 104 are coupled to the coil 10 of the motor.

In the embodiment, the high-side transistor 102 is a pmos and the low-side transistor 104 is an nmos, however, the disclosure is not limited thereto. In some embodiments, the high-side transistor 102 may be implemented as nmos and the low-side transistor 104 may be implemented as pmos. Alternatively, in other embodiments, the high-side transistor 102 and the low-side transistor 104 may be implemented as bipolar transistors.

The high-side circuit 106 and the low-side circuit 108 are coupled to the high-side transistor 102 and the low-side transistor 104, respectively, wherein the high-side circuit 106 is configured to output a first determination signal DS1 according to a first voltage difference VD1 across the first body diode 121 and a voltage level (corresponding to an on state of the high-side transistor 102) of the first control signal CS1, and the low-side circuit 108 is configured to output a second determination signal DS2 according to a second voltage difference VD2 across the second body diode 141 and a voltage level (corresponding to an on state of the low-side transistor 104) of the second control signal CS 2.

Specifically, the high-side circuit 106 includes a first comparator 161 and a first logic gate 162. A positive input terminal and a negative input terminal of the first comparator 161 are respectively coupled to the anode terminal and the cathode terminal of the first body diode 121, and are configured to output a first state signal SS1 according to a first voltage difference VD1 between two terminals (i.e., the anode terminal and the cathode terminal) of the first body diode 121. In the present embodiment, the first voltage difference VD1 varies according to whether a current flows through the first body diode 121 in the forward direction. For example, when a current flows through the first body diode 121 in a forward direction, the first voltage difference VD1 (e.g., 0.7 v) between two ends of the first body diode 121 is greater than 0 v (i.e., is a positive value), which causes the voltage level of the positive input terminal of the first comparator 161 to be higher than the voltage level of the negative input terminal of the first comparator 161, such that the first comparator 161 outputs the first state signal SS1 with a high voltage level. On the contrary, when no current flows through the first body diode 121 in the forward direction, the first voltage difference VD1 between the two ends of the first body diode 121 is not greater than 0 v (i.e. not a positive value), which results in the voltage level of the positive input terminal of the first comparator 161 being lower than the voltage level of the negative input terminal of the first comparator 161, and further the first comparator 161 outputs the first state signal SS1 with a low voltage level.

Two input terminals of the first logic gate 162 are coupled to the output terminal of the first comparator 161 and the first control terminal of the high-side transistor 102, respectively, and are configured to output the first determination signal DS1 with a high voltage level or a low voltage level according to the voltage level of the first state signal SS1 and the voltage level of the first control signal CS 1. For example, when at least one of the first state signal SS1 and the first control signal CS1 is at a low voltage level, the first logic gate 162 outputs the first determination signal DS1 at the low voltage level. When the first state signal SS1 and the first control signal CS1 are both at the high voltage level, the first logic gate 162 outputs the first determination signal DS1 at the high voltage level. In the present embodiment, the first logic gate 162 is an AND gate (AND gate).

The low side circuit 108 includes a second comparator 181, a second logic gate 182, and a third logic gate 182. A positive input terminal and a negative input terminal of the second comparator 181 are coupled to the anode terminal and the cathode terminal of the second bulk diode 141, respectively. Similar to the above description of the first comparator 161, the second voltage difference VD2 varies according to whether or not a current flows through the second body diode 141 in the forward direction. In this way, the second comparator 181 is configured to determine to output a second state signal SS2 with a high voltage level or a low voltage level according to whether the second voltage difference VD2 between the two ends of the second body diode 141 is a positive value.

The second logic gate 182 is coupled to the second control terminal of the low-side transistor 104 and is used for switching the voltage level of the second control signal CS 2. For example, when the processing unit 110 outputs the second control signal CS2 with a low voltage level, the second logic gate 182 may switch the second control signal CS2 from the low voltage level to the high voltage level, and vice versa. In the present embodiment, the second logic gate 182 is a NOT gate (NOT gate).

Two input terminals of the third logic gate 182 are coupled to the output terminal of the second comparator 181 and the output terminal of the second logic gate 182, respectively. Similar to the above description of the first logic gate 162, the third logic gate 182 is configured to output the second determination signal DS2 with a high voltage level or a low voltage level according to the voltage level of the second state signal SS2 and the voltage level of the second control signal CS 2. In the present embodiment, the third logic gate 182 is an AND gate (AND gate).

In addition, the output terminal of the first logic gate 162 and the output terminal of the third logic gate 182 are coupled to the processing unit 110. In this way, the processing unit 110 is configured to receive the first determination signal DS1 and the second determination signal DS2, and determine the state of the current in the coil 10 according to the voltage level of the first determination signal DS1 and the voltage level of the second determination signal DS 2.

For a better understanding of the present disclosure, the operation of the current determination circuit 100 will be described in the following paragraphs in conjunction with the accompanying drawings.

When the motor is running, the processing unit 110 of the current determination circuit 100 controls the voltage level of the first control signal CS1 and the voltage level of the second control signal CS2 through the controller 120 to turn on the high-side transistor 102 and the low-side transistor 104 in turn.

Referring to fig. 2, in the present embodiment (i.e., the high-side transistor 102 is a pmos, and the low-side transistor 104 is an nmos), first, the processing unit 110 outputs a first control signal CS1 with a low voltage level and a second control signal CS2 with a low voltage level, respectively, to turn on the high-side transistor 102 and turn off the low-side transistor 104. Thus, the current I1 flows from the system high voltage Vcc, sequentially through the high-side transistor 102 and the node N, and flows into the coil 10 to drive the motor. The processing unit 110 determines that the current determination circuit 100 does not enter the dead zone (dead zone) according to the first control signal CS1 with the low voltage level and the second control signal CS2 with the low voltage level.

The processing unit 110 then changes the first control signal CS1 from the low voltage level to the high voltage level to switch the high-side transistor 102 from the on state to the off state. Referring to fig. 3 and 4, the high-side transistor 102 and the low-side transistor 104 are both in the off state (i.e., the current determination circuit 100 enters the quiescent region). At the instant the high-side transistor 102 switches from the on-state to the off-state (while the low-side transistor 104 remains off), there is still a transient current (current I2 as shown in fig. 3 or current I3 as shown in fig. 4). With the high-side transistor 102 completely turned off, the transient current will flow in the forward direction through the first body diode 121 or in the forward direction through the second body diode 141, so that the first voltage difference VD1 or the second voltage difference VD2 changes. For example, when the high-side transistor 102 and the low-side transistor 104 are both turned off, if the current I2 (sequentially passing through the second body diode 141 and the node N and flowing into the coil 10) as shown in fig. 3 exists, the second voltage difference VD2 becomes a positive value. On the contrary, if the current I3 (flowing out of the coil 10 and sequentially passing through the node N and the first body diode 121) shown in fig. 4 exists, the first voltage difference VD1 becomes a positive value. It is understood that neither the first voltage difference VD1 shown in fig. 3 (because no current flows forward through the first body diode 121 in fig. 3) nor the second voltage difference VD2 shown in fig. 4 (because no current flows forward through the second body diode 141 in fig. 4) becomes positive.

Referring to fig. 3 again, since the first voltage difference VD1 is not positive (because the current I2 does not flow through the first body diode 121 in the forward direction), the first comparator 161 outputs the first state signal SS1 with a low voltage level according to the first voltage difference VD1, and the first logic gate 162 outputs the first determination signal DS1 with a low voltage level (e.g., logic 0) according to the first state signal SS1 with a low voltage level and the first control signal CS1 with a high voltage level. Since the second voltage difference VD2 is positive (because the current I2 flows from the system low voltage Vss, sequentially passes through the second body diode 141 and the node N) and the second control signal CS2 is switched from the low voltage level to the high voltage level through the second logic gate 182, the second comparator 181 outputs the second state signal SS2 with the high voltage level according to the positive second voltage difference VD2, and the third logic gate 183 outputs the second determination signal DS2 with the high voltage level (e.g., logic 1) according to the second state signal SS2 with the high voltage level and the second control signal CS2 with the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead-band region according to the first control signal CS1 with the high voltage level and the second control signal CS2 with the low voltage level, and determines that the current I2 sequentially passes through the second body diode 141 and the node N according to the first determination signal DS1 with the low voltage level and the second determination signal DS2 with the high voltage level, and then flows into the coil 10.

Referring to fig. 4 again, since the first voltage difference VD1 is positive (since the current I3 flows into the system high voltage Vcc through the node N and the first body diode 121 in sequence), the first comparator 161 outputs the first state signal SS1 with a high voltage level according to the positive first voltage difference VD1, and the first logic gate 162 outputs the first determination signal DS1 with a high voltage level (e.g., logic 1) according to the first state signal SS1 with a high voltage level and the first control signal CS1 with a high voltage level. Since the second voltage difference VD2 is not positive (because the current I3 does not flow through the second body diode 141 in the forward direction) and the second control signal CS2 is switched from the low voltage level to the high voltage level via the second logic gate 182, the second comparator 181 outputs the first state signal SS1 of the low voltage level according to the second voltage difference VD2 which is not positive, and the third logic gate 183 outputs the second determination signal DS2 of the low voltage level (e.g., logic 0) according to the second state signal SS2 of the low voltage level and the second control signal CS2 of the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead-band region according to the first control signal CS1 with the high voltage level and the second control signal CS2 with the low voltage level, and determines that the current I3 flows out of the coil 10 according to the first determination signal DS1 with the high voltage level and the second determination signal DS2 with the low voltage level, and sequentially passes through the node N and the first body diode 121.

The processing unit 110 then changes the second control signal CS2 from the low voltage level to the high voltage level to switch the low-side transistor 104 from the off state to the on state. Referring to fig. 5, the high-side transistor 102 is in an off state and the low-side transistor 104 is in an on state. In this way, a current I4 flows from the coil 10, sequentially through the node N and the low-side transistor 104, and flows to the system low voltage Vss to drive the motor. The processing unit 110 determines that the current determination circuit 100 does not enter the dead zone according to the first control signal CS1 with the high voltage level and the second control signal CS2 with the high voltage level.

It should be noted that, when the current determining circuit 100 enters the dead zone (the first control signal CS1 is at the high voltage level, and the second control signal CS2 is at the low voltage level), the first voltage difference VD1 and the second voltage difference VD2 may not be positive values because the magnitude of the current I2 or the current I3 is just zero. In this way, since the first voltage difference VD1 is not a positive value and the first control signal CS1 is at the high voltage level, the first logic gate 162 outputs the first determination signal DS1 at the low voltage level (e.g., logic 0) according to the first state signal SS1 at the low voltage level and the first control signal CS1 at the high voltage level, and since the second voltage difference VD2 is not a positive value and the second control signal CS2 is switched from the low voltage level to the high voltage level through the second logic gate 182, the third logic gate 183 outputs the second determination signal DS2 at the low voltage level (e.g., logic 0) according to the second state signal SS2 at the low voltage level and the second control signal CS2 at the high voltage level. The processing unit 110 determines that the current determination circuit 100 enters the dead zone according to the first control signal CS1 with the high voltage level and the second control signal CS2 with the low voltage level, and determines that the current I2 or the current I3 is zero (i.e., no current passes through the coil 10) according to the first determination signal DS1 with the low voltage level and the second determination signal DS2 with the low voltage level.

In addition, when the current determination circuit 100 enters the dead zone (the first control signal CS1 is at the high voltage level, and the second control signal CS2 is at the low voltage level), the first comparator 161 and the second comparator 181 may output the first state signal SS1 at the high voltage level and the second state signal SS2 at the high voltage level respectively due to circuit failure. In this way, the first logic gate 162 outputs the first determination signal DS1 with a high voltage level (e.g., logic 1) according to the first state signal SS1 with a high voltage level and the first control signal CS1 with a high voltage level, and the third logic gate 183 outputs the second determination signal DS2 with a high voltage level (e.g., logic 1) according to the second state signal SS2 with a high voltage level and the second control signal CS2 with a high voltage level because the second control signal CS2 is switched from a low voltage level to a high voltage level via the second logic gate 182. The processing unit 110 determines that the current determination circuit 100 enters the dead-band region according to the first control signal CS1 with the high voltage level and the second control signal CS2 with the low voltage level, and determines that the state of the current passing through the coil 10 is not determined according to the first determination signal DS1 with the high voltage level and the second determination signal DS2 with the high voltage level. Since the state of the current passing through the coil 10 is undetermined, the processing unit 110 determines that the current determination circuit 100 has failed, and stops the operation of the current determination circuit 100.

By combining the above conditions, a truth table can be organized. In other words, the processing unit 110 can determine the state of the current in the coil 10 in the dead zone according to the truth table. Wherein, the truth table is as follows:

DS1	DS2	state of current flowing in coil
			0	0	Current is zero
0	1	Current inflow coil
			1	0	Current outflow coil
1	1	Current state is undefined

Through the design of the high-side circuit 106 and the low-side circuit 108, the current determination circuit 100 of the present disclosure can determine the state of the current in the coil 10 in the dead zone according to the first voltage difference VD1 parasitic across the first body diode 121 of the high-side transistor 102 and the second voltage difference VD2 parasitic across the second body diode 141 of the low-side transistor 104. Since the voltage value of the node N does not need to be measured, the current determination circuit 100 can avoid the problem caused by measuring the voltage value higher than the system high voltage Vcc or lower than the system low voltage Vss. In addition, the processing unit 110 can also obtain the phase information of the current and adjust the phase relationship between the current and the back electromotive force of the motor, so that the motor can operate at the optimal rotating speed value.

Although the present disclosure has been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure, and therefore, the scope of the disclosure should be determined by that defined in the appended claims.

Claims (10)

1. A current determination circuit for determining a state of a current through a coil of a motor, comprising:

a high-side transistor, coupled to the coil, for selectively turning on or off according to a voltage level of a first control signal, and including a first body diode;

a low side transistor coupled to the coil for selectively turning on or off according to a voltage level of a second control signal, and including a second body diode;

a high-side circuit coupled to the high-side transistor and configured to output a first determination signal according to a first voltage difference between two ends of the first body diode and a voltage level of the first control signal;

a low side circuit coupled to the low side transistor for outputting a second determination signal according to a second voltage difference between two ends of the second body diode and a voltage level of the second control signal; and

a processing unit, configured to output the first control signal and the second control signal, receive the first determination signal and the second determination signal, and determine the state of the current according to a voltage level of the first determination signal and a voltage level of the second determination signal.

2. The current determination circuit of claim 1, wherein the processing unit determines the current to be zero when the first determination signal is at a low voltage level and the second determination signal is at a low voltage level.

3. The current determination circuit of claim 1, wherein when the first determination signal is at a high voltage level and the second determination signal is at a low voltage level, the processing unit determines that the current flows out of the coil and then passes through the first body diode.

4. The current determination circuit of claim 1, wherein the processing unit determines that the current flows into the coil after passing through the second body diode when the first determination signal is at a low voltage level and the second determination signal is at a high voltage level.

5. The circuit of claim 1, wherein the processing unit determines that the state of the current is indeterminate when the first determination signal is at a high voltage level and the second determination signal is at a high voltage level.

6. The current determination circuit of claim 1, wherein the high-side circuit comprises a first comparator coupled to the first body diode and configured to output a first state signal according to the first voltage difference across the first body diode.

7. The current determination circuit of claim 6, wherein the high-side circuit further comprises a first logic gate coupled to the first comparator and the high-side transistor for outputting the first determination signal according to the voltage level of the first state signal and the voltage level of the first control signal.

8. The current determination circuit of claim 1, wherein the low side circuit comprises a second comparator coupled to the second body diode and configured to output a second state signal according to the second voltage difference across the second body diode.

9. The current determining circuit of claim 8, wherein the low side circuit further comprises a second logic gate coupled to the low side transistor for switching the voltage level of the second control signal, and a third logic gate coupled to the second comparator and the second logic gate for outputting the second determining signal according to the voltage level of the second state signal and the voltage level of the second control signal switched by the second logic gate.

10. The current determination circuit according to claim 1, wherein:

the high-side transistor further comprises a first end, a second end and a first control end, wherein two ends of the first body diode are coupled to the first end and the second end, the first end is used for receiving a system high voltage, the second end is coupled to the coil, and the first control end is used for receiving the first control signal;

the low-side transistor further includes a third terminal, a fourth terminal, and a second control terminal, wherein two terminals of the second body diode are coupled to the third terminal and the fourth terminal, the third terminal is coupled to the coil, the fourth terminal is configured to receive a system low voltage, and the second control terminal is configured to receive the second control signal.

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