CN114639348A - Driving circuit and method of display unit and display panel - Google Patents
Driving circuit and method of display unit and display panel Download PDFInfo
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- CN114639348A CN114639348A CN202210492274.1A CN202210492274A CN114639348A CN 114639348 A CN114639348 A CN 114639348A CN 202210492274 A CN202210492274 A CN 202210492274A CN 114639348 A CN114639348 A CN 114639348A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
Abstract
The application relates to a drive circuit, a method and a display panel of a display unit, the drive circuit of the display unit, through multiplexing a first scanning signal circuit or a light-emitting control signal circuit as a second reset circuit, thereby realizing the reset of the display unit, the problem that the drive circuit of the display unit occupies a large space due to the fact that a reset circuit is independently arranged for the display unit is avoided, thin film transistors in the drive circuit of the display unit are reduced, the area of the drive circuit of the display unit is reduced, the circuit structural design is simplified, thereby the pixel aperture ratio is increased, and further the display effect is improved.
Description
Technical Field
The present disclosure relates to the field of display panel technologies, and in particular, to a driving circuit and method for a display unit and a display panel.
Background
An Organic Light Emitting Diode (OLED) Display panel has many advantages, such as self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition and contrast, a viewing angle of approximately 180 °, a wide temperature range, and capability of implementing flexible Display and large-area full-color Display, and is considered as a Display device with the most potential development.
OLEDs can be classified into two major categories, namely, direct addressing and Thin Film Transistor (TFT) Matrix addressing, namely, Passive Matrix OLEDs (PMs) and Active Matrix OLEDs (AMs) according to driving methods.
At present, in the related art, when the OLED is driven by the thin film transistor, a 7T1C circuit (T represents a TFT, and C represents a capacitor) is adopted, and the 7 TFTs cause the OLED driving circuit to occupy a large amount of space, and along with the technical development, the size of the display unit becomes smaller and smaller, and the occupied space of the 7T1C circuit greatly affects the aperture ratio of the OLED panel pixel, thereby reducing the display effect.
Disclosure of Invention
The application provides a driving circuit and a method of a display unit and a display panel, and aims to solve the problem that in the related art, the driving circuit of the display unit occupies a large space and influences the aperture opening ratio of the display panel.
In a first aspect, the present application provides a driving circuit of a display unit, the driving circuit of the display unit comprising: light-emitting circuit, compensating circuit, memory circuit, first reset circuit, memory circuit respectively with first reset circuit, compensating circuit and light-emitting circuit connects, the display element positive pole with light-emitting circuit connects, the drive circuit of display element still includes: a second reset circuit; the first reset circuit configured to reset the memory circuit in response to a reference voltage; the second reset circuit is connected to a cathode of the display unit, and configured to reset the display unit when the first reset circuit resets the memory circuit, and the second reset circuit is one of a light emission control signal circuit and a first scan signal circuit; the compensation circuit configured to transmit a data signal to the storage circuit; the storage circuit is configured to store the received data signal and output the data signal as a compensation signal; the light emitting circuit is configured to be turned on when the storage circuit outputs the compensation signal to drive the display unit to emit light.
Optionally, the compensation circuit comprises: a first compensation circuit and a second compensation circuit; a connection node among the first reset circuit, the first compensation circuit and the storage circuit is a first node; a connection node between the light emitting circuit and the second compensation circuit is a second node; a node between the light emitting circuit and the first compensation circuit is a third node; the first reset circuit, in response to the reference voltage, transmits the reference voltage to the first node, through which the reference voltage is transmitted to the storage circuit to reset the storage circuit; the second reset circuit outputs a high-level signal to reset the display unit when the first reset circuit responds to the reference voltage; the second compensation circuit transmits the data signal to the second node so that the data signal flows to the first compensation circuit through the second node and the third node, the first compensation circuit transmits the data signal to the first node, and the data signal is transmitted to the storage circuit through the first node; a third thin film transistor is arranged on the light-emitting circuit, a control terminal of the third thin film transistor is connected with the first node, and the storage circuit outputs the compensation signal to the first node so as to transmit the compensation signal to the control terminal of the third thin film transistor; and when the control end of the third thin film transistor receives the compensation signal, the light-emitting circuit is conducted to drive the display unit to emit light.
Optionally, the reset circuit comprises a fifth thin film transistor; a control end of the fifth thin film transistor is connected with a first scanning signal; a first end of the fifth thin film transistor is connected to a reference voltage, and a second end of the fifth thin film transistor is connected to the first node; the fifth thin film transistor transmits the reference voltage to the first node when the fifth thin film transistor is turned on by the first scan signal.
Optionally, the first compensation circuit includes a fourth thin film transistor, the second compensation circuit includes a second thin film transistor, and control terminals of the second thin film transistor and the fourth thin film transistor are connected to a second scan signal; a first end of the second thin film transistor is connected with a data signal, and a second end of the second thin film transistor is connected with the second node; a first end of the fourth thin film transistor is connected to the third node, and a second end of the fourth thin film transistor is connected to the first node.
Optionally, the light emitting circuit further comprises: a first thin film transistor, a sixth thin film transistor; the first end of the first thin film transistor is connected with a positive power supply voltage, the second end of the first thin film transistor is connected with the first end of the third thin film transistor, the second end of the third thin film transistor is connected with the first end of the sixth thin film transistor, and the second end of the sixth thin film transistor is connected with the anode of the display unit; and the control ends of the first thin film transistor and the sixth thin film transistor are connected with a light-emitting control signal.
Optionally, when the second reset circuit is a light-emitting control signal circuit, the thin film transistors included in the driving circuit of the display unit are all P-type thin film transistors.
Optionally, when the second reset circuit is a first scan signal circuit, all of the thin film transistors included in the driving circuit of the display unit are N-type thin film transistors.
In a second aspect, the present application provides a method of driving a display unit, the method being applied to a driving circuit of a display unit as defined in any one of the above, the method comprising: in the resetting stage, the first resetting circuit is conducted to reset the storage circuit, and the second resetting circuit is used for resetting the display unit; in the compensation stage, the compensation circuit is switched on to transmit a data signal to the storage circuit, and the storage circuit stores the received data signal and outputs the data signal as a compensation signal; and in the light-emitting stage, the light-emitting circuit is switched on according to the compensation signal so as to drive the display unit to emit light.
Optionally, resetting the display unit by a second reset circuit includes: when the second reset circuit is a light-emitting control signal circuit, controlling the light-emitting control signal circuit to output a high-level signal to reset the display unit; or, when the second reset circuit is a first scanning signal circuit, the first scanning signal circuit is controlled to output a high-level signal to reset the display unit.
In a third aspect, a display panel is provided, the display panel comprising: the display unit comprises a substrate, wherein a plurality of sub-pixels are arranged on the substrate, each sub-pixel comprises a display unit and a driving circuit of the display unit, and the driving circuit of the display unit is connected with the display unit.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages:
the driving circuit of the display unit provided by the embodiment of the application includes, but is not limited to: the display device comprises a light-emitting circuit, a compensation circuit, a storage circuit, a first reset circuit, a second reset circuit and a display unit, wherein the storage circuit is respectively connected with the first reset circuit, the compensation circuit and the light-emitting circuit, and the anode of the display unit is connected with the light-emitting circuit; the first reset circuit configured to reset the memory circuit in response to a reference voltage; the second reset circuit is connected to a cathode of the display unit, and configured to reset the display unit when the first reset circuit resets the memory circuit, and the second reset circuit is one of a light emission control signal circuit and a first scan signal circuit; the compensation circuit configured to transmit a data signal to the storage circuit; the storage circuit is configured to store the received data signal and output the data signal as a compensation signal; the light-emitting circuit is configured to be conducted when the storage circuit outputs the compensation signal so as to drive the display unit to emit light; through multiplexing first scanning signal circuit or light-emitting control signal circuit as second reset circuit to this realizes the restoration to the display element, has avoided setting up a reset circuit alone for the display element and has leaded to the big problem of display element's drive circuit occupation space, has reduced the thin film transistor in the drive circuit of display element, has reduced the drive circuit's of display element area, has simplified circuit structure design, thereby increase the pixel aperture opening ratio, and then has promoted the display effect.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic diagram of a basic structure of a driving circuit of a display unit according to an embodiment of the present disclosure;
fig. 2 is a basic schematic diagram of a driving circuit of an alternative display unit according to an embodiment of the present disclosure;
fig. 3 is a basic schematic diagram of an alternative driving circuit of a display unit in a reset phase according to an embodiment of the present disclosure;
fig. 4 is a basic schematic diagram of an alternative driving circuit of a display unit in a compensation phase according to an embodiment of the present disclosure;
fig. 5 is a basic schematic diagram of an alternative driving circuit of a display unit in a light-emitting phase according to a first embodiment of the present disclosure;
fig. 6 is a basic schematic diagram of a driving circuit of an alternative display unit according to a second embodiment of the present application;
fig. 7 is a timing diagram of various signals in a driving circuit of an alternative display unit according to a second embodiment of the present disclosure;
fig. 8 is a basic schematic diagram of a driving circuit of an alternative display unit according to a third embodiment of the present disclosure;
fig. 9 is a timing diagram of various signals in a driving circuit of an alternative display unit according to a third embodiment of the present application;
fig. 10 is a basic schematic diagram of a driving method of a display unit according to a fourth embodiment of the present application;
fig. 11 is a schematic diagram of a basic structure of a display panel according to a fifth embodiment of the present application;
fig. 12 is a schematic structural diagram of a display device according to a sixth embodiment of the present application;
description of reference numerals:
1-a light emitting circuit; 2-a compensation circuit; 21-a first compensation circuit; 22-a second compensation circuit; 3-a storage circuit; 4-a first reset circuit; 5-a second reset circuit; 6-a display unit; 7-a drive circuit of the display unit; 8-a substrate; 9-sub-pixel; m1 — first thin film transistor; m2 — a second thin film transistor; m3 — a third thin film transistor; m4 — fourth thin film transistor; m5 — fifth thin film transistor; m6-sixth thin film transistor; n1 — first node; n2-second node; n3-third node; vref-reference voltage; emit — emission control signal; SCAN 1-first SCAN signal; SCAN 2-second SCAN signal; VDD-Power supply positive voltage; vdata-data signal.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Example one
In order to solve the problem that the display unit driving circuit occupies a large space and affects the aperture ratio of the display panel, please refer to fig. 1, where fig. 1 is a schematic structural diagram of a driving circuit 7 of a display unit provided in an embodiment of the present application, where the driving circuit 7 of the display unit includes but is not limited to: the display unit comprises a light-emitting circuit 1, a compensation circuit 2, a storage circuit 3, a first reset circuit 4 and a second reset circuit 5, wherein the storage circuit is respectively connected with the first reset circuit, the compensation circuit and the light-emitting circuit, and the anode of the display unit is connected with the light-emitting circuit;
the first reset circuit 4 configured to reset the memory circuit 3 in response to a reference voltage Vref;
the second reset circuit 5 is connected to a cathode of a display unit 6, and configured to reset the display unit 6 when the first reset circuit 4 resets the storage circuit 3, wherein the second reset circuit 5 is one of a light emission control signal circuit and a first scan signal circuit;
the compensation circuit 2 configured to transmit a data signal Vdata to the storage circuit 3;
the storage circuit 3 is configured to store the received data signal Vdata and output the data signal Vdata as a compensation signal;
the light emitting circuit 1 is configured to be turned on when the storage circuit 3 outputs the compensation signal to drive the display unit 6 to emit light, and the light emitting circuit 1 may be connected to an anode of the display unit 6.
It should be understood that, as shown in fig. 2, a storage capacitor Cst is disposed on the storage circuit 3, so as to be capable of storing the data signal Vdata; the light emitting control signal circuit is used for outputting a light emitting control signal Emit (Emit signal), and the first SCAN signal circuit is used for outputting a first SCAN signal SCAN1 (SCAN 1 SCAN signal), the driving circuit 7 of the display unit provided by the embodiment realizes the reset of the display unit 6 by multiplexing the first SCAN signal circuit or the light emitting control signal circuit into the second reset circuit 5, thereby avoiding the problem of large area of the driving circuit of the display unit caused by independently arranging a reset circuit for the display unit, reducing the circuits in the driving circuit 7 of the display unit, reducing the volume of the driving circuit 7 of the display unit, simplifying the circuit structure design, increasing the pixel aperture ratio, and further improving the display effect.
It should be understood that the first reset circuit 4 is connected to the reference voltage circuit, which in turn is connected to the reference voltage Vref; the compensation circuit 2 is connected with the data signal circuit and further connected with a data signal Vdata; the light emitting circuit 1 is connected to a positive voltage VDD terminal of a power supply, and then is connected to the positive voltage VDD terminal of the power supply, wherein the data signal Vdata and the reference voltage Vref may be high-level signals or low-level signals, that is, the data signal Vdata and the reference voltage Vref are set according to actual requirements, which will be described in detail later, and are not described herein again;
in the above example, the driving circuit 7 of the display unit provided in this embodiment has three working phases, where the three working phases are: a reset stage, a compensation stage and a light-emitting stage; wherein the content of the first and second substances,
in the resetting stage, the first resetting circuit 4 responds to the reference voltage Vref to reset the storage circuit 3, and the second resetting circuit 5 resets the display unit 6;
in the compensation phase, the compensation circuit 2 transmits the data signal Vdata to the storage circuit 3;
in the light emitting stage, the storage circuit 3 outputs the data signal Vdata as a compensation signal to turn on the light emitting circuit 1, and the light emitting circuit 1 drives the display unit 6 to emit light in response to the power supply positive voltage VDD.
In some examples of the present application, the compensation circuit 2 includes: a first compensation circuit 21 and a second compensation circuit 22; as shown in fig. 2, a connection node between the first reset circuit 4, the first compensation circuit 21, and the storage circuit 3 is a first node N1; a connection node between the light emitting circuit 1 and the second compensation circuit 22 is a second node N2; a node between the light emitting circuit 1 and the first compensation circuit 21 is a third node N3; the first reset circuit 4 transmits the reference voltage Vref to the first node N1 in response to the reference voltage Vref, and transmits the reference voltage Vref to the storage circuit 3 through the first node N1 to reset the storage circuit 3; the second reset circuit 5 outputs a high level signal to reset the display unit 6 when the first reset circuit 4 responds to the reference voltage Vref; the second compensation circuit 22 transmits the data signal Vdata to the first node N1 by transmitting the data signal Vdata to the second node N2 such that the data signal Vdata flows to the first compensation circuit 21 through the second node N2 and the third node N3, and the first compensation circuit 21 transmits the data signal Vdata to the storage circuit 3 through the first node N1; a third thin film transistor M3 is present on the light emitting circuit 1, a control terminal of the third thin film transistor M3 is connected to the first node N1, and the storage circuit 3 outputs the compensation signal to the first node N1 to transmit the compensation signal to a control terminal of the third thin film transistor M3; when the control terminal of the third thin film transistor M3 receives the compensation signal, the light emitting circuit 1 is turned on to drive the display unit 6 to emit light.
As shown in fig. 2, the first node N1 is connected to the first reset circuit 4, the memory circuit 3, the control terminal of the third thin film transistor M3, and the first compensation circuit 21, respectively, so that the first reset circuit 4 can transmit the reference voltage Vref to the memory circuit 3 to reset the memory circuit 3, and when the memory circuit 3 is reset, the reference voltage Vref can be transmitted to the third thin film transistor M3 to reset the control terminal of the third thin film transistor M3, so as to turn on the third thin film transistor M3;
wherein, the connection node between the light emitting circuit 1 and the first compensation circuit 21 is a third node N3, the connection node with the second compensation circuit 22 is the second node N2, that is, the connection between the first compensation circuit 21 and the second compensation circuit is realized by multiplexing the partial light emitting circuit 1, the second compensation circuit 22 transmits the data signal Vdata to the second node N2, the multiplexing partial light emitting circuit 1 further transmits the data signal Vdata to the third node N3, the first compensation circuit 21 receives the data signal Vdata from the third node N3, transmits the data signal Vdata to the first node N1, the data signal Vdata is transmitted to the memory circuit 3 through the first node N1, it being understood that, the data signal Vdata is synchronously transmitted to the third thin film transistor M3 to turn on the third thin film transistor M3 when being transmitted to the memory circuit 3. By multiplexing part of the light-emitting circuits 1, circuits in the driving circuit 7 of the display unit are also reduced, the volume of the driving circuit 7 of the display unit is reduced, and the structural design of the circuit can be simplified, so that the aperture ratio of pixels is increased, and the display effect is improved;
it can be understood that, in the reset phase of the second reset circuit 5, a high level signal is output to reset the display unit 6; specifically, one end of the light emitting circuit 1 is connected to the positive voltage VDD of the power supply, the other end of the light emitting unit is connected to the anode of the display unit 6, the cathode of the display unit 6 is connected to the reset circuit, when the anode connection voltage of the display unit 6 is higher than the cathode connection voltage of the display unit 6, the current flows from the anode to the cathode, the display unit 6 emits light, therefore, in the reset stage, the second reset circuit 5 outputs a high level signal, the anode voltage of the display unit 6 is not higher than the cathode voltage of the display unit 6, the display unit 6 does not emit light, and the display unit 6 is turned off.
In the above example, when the second reset circuit 5 is a light emission control signal Emit circuit and the driving circuit 7 of the display unit is in the reset stage, the light emission control signal Emit circuit outputs a high level signal to reset the display unit 6; when the second reset circuit 5 is a first scan signal circuit and the driving circuit 7 of the display unit is in the reset stage, the first scan signal circuit outputs a high level signal to reset the display unit 6. It is understood that when the driving circuit 7 of the display unit is in the light-emitting phase, the second reset circuit 5 outputs a low level signal so that the anode voltage of the display unit 6 is not higher than the cathode voltage of the display unit 6, so that the display unit 6 emits light to light the display unit 6.
In some examples of the present embodiment, the reset circuit includes a fifth thin film transistor M5; a control terminal of the fifth thin film transistor M5 is connected to a first SCAN signal SCAN 1; a first terminal of the fifth thin film transistor M5 is connected to a reference voltage Vref, and a second terminal of the fifth thin film transistor M5 is connected to the first node N1; when the fifth thin film transistor M5 is turned on by the first SCAN signal SCAN1, the fifth thin film transistor M5 transmits the reference voltage Vref to the first node N1.
The control terminal of the fifth thin film transistor M5 is connected to the first SCAN signal circuit, and further connected to the first SCAN signal SCAN1, it can be understood that the first SCAN signal SCAN1 output by the first SCAN signal circuit may be a high-level signal or a low-level signal, that is, the first SCAN signal SCAN1 may change with the driving circuit 7 of the display unit being in different working stages; specifically, for example, when the first SCAN signal SCAN1 is a high-level signal, the fifth thin film transistor M5 is turned on, and when the drive circuit 7 of the display unit is in the reset stage, the first SCAN signal circuit outputs the first SCAN signal SCAN1 of a high level, turns on the fifth thin film transistor M5, and when the drive circuit 7 of the display unit is not in the reset stage, the first SCAN signal circuit outputs the first SCAN signal SCAN1 of a low level, and turns off the fifth thin film transistor M5; for another example, when the first SCAN signal SCAN1 is a low-level signal, the fifth thin film transistor M5 is turned on, and when the driving circuit 7 of the display unit is in the reset stage, the first SCAN signal circuit outputs the low-level first SCAN signal SCAN1, and turns on the fifth thin film transistor M5, and when the driving circuit 7 of the display unit is not in the reset stage, the first SCAN signal circuit outputs the high-level first SCAN signal SCAN1, and turns off the fifth thin film transistor M5, which is not limited by the type of the fifth thin film transistor M5 in this embodiment, and can be flexibly set according to actual use requirements.
In some examples of the present application, the first compensation circuit 21 includes a fourth thin film transistor M4, the second compensation circuit 22 includes a second thin film transistor M2, and control terminals of the second thin film transistor M2 and the fourth thin film transistor M4 are connected to the second SCAN signal SCAN 2; a first end of the second thin film transistor M2 is connected to a data signal Vdata, and a second end of the second thin film transistor M2 is connected to the second node N2; a first end of the fourth thin film transistor M4 is connected to the third node N3, and a second end of the fourth thin film transistor M4 is connected to the first node N1, it can be understood that, the first SCAN signal circuit is a SCAN line of an nth row, the second SCAN signal circuit is a SCAN line of an N +1 th row, and the SCAN direction of the embodiment is from the 1 st row to the last row, that is, the first SCAN signal SCAN1 and the second SCAN signal SCAN2 SCAN at a time;
the control terminals of the second thin film transistor M2 and the fourth thin film transistor M4 are connected to a second SCAN signal circuit, and then are connected to a second SCAN signal SCAN2, the second SCAN signal SCAN2 output by the second SCAN signal circuit may be a high level signal or a low level signal, that is, the second SCAN signal SCAN2 may change with the driving circuit 7 of the display unit being in different working stages; specifically, for example, when the second SCAN signal SCAN2 is a high-level signal, the second thin film transistor M2 and the fourth thin film transistor M4 are turned on, and when the driving circuit 7 of the display unit is in the compensation stage, the second SCAN signal circuit outputs the high-level second SCAN signal SCAN2, and turns on the second thin film transistor M2 and the fourth thin film transistor M4; when the driving circuit 7 of the display unit is not in the compensation stage, the second SCAN signal circuit outputs the second SCAN signal SCAN2 of low level, turning off the second thin film transistor M2 and the fourth thin film transistor M4; for another example, when the second SCAN signal SCAN2 is a low level signal, the second thin film transistor M2 and the fourth thin film transistor M4 are turned on, and when the driving circuit 7 of the display unit is in the compensation phase, the second SCAN signal circuit outputs the low level second SCAN signal SCAN2, turns on the second thin film transistor M2 and the fourth thin film transistor M4, and when the driving circuit 7 of the display unit is not in the compensation phase, the second SCAN signal circuit outputs the high level second SCAN signal SCAN2, turns off the second thin film transistor M2 and the fourth thin film transistor M4;
as follows from the above example, it can be understood that the second thin film transistor M2 and the fourth thin film transistor M4 are of the same type, for example, the second thin film transistor M2 and the fourth thin film transistor M4 are both P-type thin film transistors, and are both in an on state when the second SCAN signal circuit outputs the second SCAN signal SCAN2 with a low level; it is understood that, in some examples, the second thin film transistor M2 and the fourth thin film transistor M4 are different types of transistors, for example, the second thin film transistor M2 is a P-type thin film transistor, and the fourth thin film transistor M4 is N rows of thin film transistors, then an inverter is disposed between the fourth thin film transistor M4 and the second SCAN signal circuit, and both are in a conducting state when the second SCAN signal circuit outputs the second SCAN signal SCAN2 at a low level; the present embodiment does not limit the types of the second thin film transistor M2 and the fourth thin film transistor M4, and can be flexibly configured according to actual use requirements.
In some examples of the present embodiment, the light emitting circuit 1 further includes: a first thin film transistor M1, a sixth thin film transistor M6; a first terminal of the first thin film transistor M1 is connected to a power supply positive voltage VDD, a second terminal of the first thin film transistor M1 is connected to a first terminal of the third thin film transistor M3, a second terminal of the third thin film transistor M3 is connected to a first terminal of the sixth thin film transistor M6, and a second terminal of the sixth thin film transistor M6 is connected to an anode of the display unit 6; the control ends of the first thin film transistor M1 and the sixth thin film transistor M6 are connected to a light emission control signal Emit.
The control ends of the first thin film transistor M1 and the sixth thin film transistor M6 are connected to the emission control signal unit circuit, and then are connected to the emission control signal unit, the emission control signal unit output by the emission control signal unit circuit may be a high level signal or a low level signal, that is, the emission control signal unit may change with the driving circuit 7 of the display unit in different working stages; specifically, for example, when the emission control signal Emit is a high-level signal, the first thin film transistor M1 and the sixth thin film transistor M6 are turned on, and when the driving circuit 7 of the display unit is in a light-emitting stage, the emission control signal Emit circuit outputs the emission control signal Emit of a high level, and turns on the first thin film transistor M1 and the sixth thin film transistor M6; when the driving circuit 7 of the display unit is not in the light-emitting stage, the light-emitting control signal Emit circuit outputs the light-emitting control signal Emit of a low level, and turns off the first thin film transistor M1 and the sixth thin film transistor M6; for another example, when the light emission control signal Emit is a low level signal, the first thin film transistor M1 and the sixth thin film transistor M6 are turned on, and when the driving circuit 7 of the display unit is in a light emission phase, the light emission control signal Emit circuit outputs the light emission control signal Emit of a low level, and turns on the first thin film transistor M1 and the sixth thin film transistor M6, and when the driving circuit 7 of the display unit is not in a compensation phase, the light emission control signal Emit circuit outputs the light emission control signal Emit of a high level, and turns off the first thin film transistor M1 and the sixth thin film transistor M6.
As a result of the above example, it can be understood that the first thin film transistor M1 and the sixth thin film transistor M6 are transistors of the same type, for example, the first thin film transistor M1 and the sixth thin film transistor M6 are both P-type thin film transistors, and are both in a conducting state when the emission control signal Emit circuit outputs the emission control signal Emit at a low level; it can be understood that, in some examples, the first thin film transistor M1 and the sixth thin film transistor M6 are different types of transistors, for example, the first thin film transistor M1 is a P-type thin film transistor, and the sixth thin film transistor M6 is an N-row thin film transistor, at this time, an inverter is disposed between the sixth thin film transistor M6 and the emission control signal Emit circuit, and then when the emission control signal Emit circuit outputs the low-level emission control signal Emit, both the first thin film transistor M1 and the sixth thin film transistor M6 are in a conducting state; the present embodiment does not limit the types of the first thin film transistor M1 and the sixth thin film transistor M6, and can be flexibly configured according to actual use requirements.
In some examples of the present application, when the second reset circuit 5 is a light emission control signal Emit circuit, all of the thin film transistors included in the driving circuit 7 of the display unit are P-type thin film transistors, that is, the second reset circuit 5 is a light emission control signal Emit circuit, and all of the first thin film transistor M1, the second thin film transistor M2, the third thin film transistor M3, the fourth thin film transistor M4, the fifth thin film transistor M5, and the sixth thin film transistor M6 in the driving circuit 7 of the display unit are P-type thin film transistors, it can be understood that the reference voltage Vref is a low voltage at this time, and thus, the reset of the memory circuit 3 and the third thin film transistor M3 can be realized. Taking one frame of light emitting signal as one cycle, dividing one frame of signal into three periods of T1, T2 and T3, wherein the period of T1 corresponds to a reset phase, the period of T2 corresponds to a compensation phase, and the period of T3 corresponds to a light emitting phase, it should be understood that there may be interval periods between the periods of T1, T2 and T3, and there may also be continuous intervals between the periods of T1, T2 and T3.
In the reset stage of T1, as shown in fig. 3, the thin film transistors are turned on and off, wherein the first scan control signal outputs a low-level first scan control signal, and the fifth thin film transistor M5 is turned on, so that the first reset circuit 4 resets the memory circuit 3 in response to the reference voltage Vref, it can be understood that, when resetting the memory circuit 3, the first reset circuit 4 also resets the third thin film transistor M3 in response to the reference voltage Vref, and turns on the third thin film transistor M3; the second scan control signal circuit outputs a high-level second scan control signal so that the second thin film transistor M2 and the fourth thin film transistor M4 are in an off state, and the compensation circuit 2 does not operate; the light emission control signal Emit circuit outputs a high-level light emission control signal Emit, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a cut-off state, the light emitting circuit 1 does not work, and the display unit 6 is reset;
at the compensation stage of T2, as shown in fig. 4, the on and off schematic diagrams of each thin film transistor are shown, wherein the first scan control signal outputs the first scan control signal with high level, and turns off the fifth thin film transistor M5; the second scan control signal circuit outputs a low-level second scan control signal so that the second thin film transistor M2 and the fourth thin film transistor M4 are in a conductive state, the compensation circuit 2 operates to transmit the data signal Vdata to the memory circuit 3 and the third thin film transistor M3 so that the third thin film transistor M3 is in a conductive state; the light emission control signal Emit circuit continues to output the light emission control signal Emit of a high level, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a cut-off state, the light emitting circuit 1 does not work, and the display unit 6 is reset;
in the light emitting stage of T3, as shown in fig. 5, the on and off schematic diagrams of each thin film transistor are shown, wherein the first scan control signal outputs the first scan control signal of high level, turning off the fifth thin film transistor M5; the second scan control signal circuit outputs a high-level second scan control signal, so that the second thin film transistor M2 and the fourth thin film transistor M4 are in an off state, the compensation circuit 2 does not operate, and at this time, the storage circuit 3 outputs the data signal Vdata as a compensation signal to the third thin film transistor M3 to continuously turn on the third thin film transistor M3; the light emission control signal Emit circuit outputs a low-level light emission control signal Emit, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a conducting state, and the light emitting circuit 1 operates to drive the display unit 6 to perform light emission display.
In some examples of the present application, when the second reset circuit 5 is a first scan signal circuit, all of the thin film transistors included in the driving circuit 7 of the display unit are N-type thin film transistors, that is, the second reset circuit 5 is a light emission control signal Emit circuit, and all of the first thin film transistor M1, the second thin film transistor M2, the third thin film transistor M3, the fourth thin film transistor M4, the fifth thin film transistor M5, and the sixth thin film transistor M6 in the driving circuit 7 of the display unit are N-type thin film transistors, it can be understood that the reference voltage Vref is a high voltage at this time, and thus the reset of the memory circuit 3 and the third thin film transistor M3 can be realized; taking a frame of light-emitting signal as a period, dividing the frame of signal into time T1, time T2, time T3, time T1 corresponding to a reset phase, time T2 corresponding to a compensation phase, time T3 corresponding to a light-emitting phase, wherein,
in the reset stage of T1, as shown in fig. 3, the thin film transistors are turned on and off, the first scan control signal outputs a high-level first scan control signal, and the fifth thin film transistor M5 is turned on, so that the first reset circuit 4 resets the memory circuit 3 in response to the reference voltage Vref, it can be understood that, when resetting the memory circuit 3, the first reset circuit 4 also resets the third thin film transistor M3 in response to the reference voltage Vref, and turns on the third thin film transistor M3; the second scan control signal circuit outputs a low-level second scan control signal so that the second thin film transistor M2 and the fourth thin film transistor M4 are in an off state, and the compensation circuit 2 does not operate; the light emission control signal Emit circuit outputs a low-level light emission control signal Emit, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a cut-off state, the light emitting circuit 1 does not work, and the display unit 6 is reset;
in the compensation stage of T2, as shown in fig. 4, the tft is turned on or off, the first scan control signal outputs the first scan control signal at a low level, and the fifth tft M5 is turned off; the second scan control signal circuit outputs a high-level second scan control signal so that the second thin film transistor M2 and the fourth thin film transistor M4 are in a conductive state, the compensation circuit 2 operates to transmit the data signal Vdata to the memory circuit 3 and the third thin film transistor M3 so that the third thin film transistor M3 is in a conductive state; the light emission control signal Emit circuit continues to output the light emission control signal Emit of a low level, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a cut-off state, the light emitting circuit 1 does not work, and the display unit 6 is reset;
in the light emitting period of T3, as shown in fig. 5, the on/off diagram of each thin film transistor is shown, the first scan control signal outputs the first scan control signal of low level, and the fifth thin film transistor M5 is turned off; the second scan control signal circuit outputs a low-level second scan control signal, so that the second thin film transistor M2 and the fourth thin film transistor M4 are in an off state, the compensation circuit 2 does not operate, and at this time, the storage circuit 3 outputs the data signal Vdata as a compensation signal to the third thin film transistor M3 to continuously turn on the third thin film transistor M3; the light emission control signal Emit circuit outputs a high-level light emission control signal Emit, so that the first thin film transistor M1 and the fourth thin film transistor M4 are in a conducting state, and the light emitting circuit 1 operates to drive the display unit 6 to perform light emission display.
In some examples of the present application, the display unit 6 includes a red display unit 6, a green display unit 6, and a blue display unit 6; or, the display unit 6 includes a red light display unit 6, a green light display unit 6, a blue light display unit 6, and a yellow light display unit 6; or, the display unit 6 comprises a red light display unit 6, a green light display unit 6, a blue light display unit 6 and a white light display unit 6;
the categories of the display unit include, but are not limited to: an OLED display unit.
The driving circuit 7 of the display unit provided in this embodiment includes, but is not limited to: the display device comprises a light-emitting circuit 1, a compensation circuit 2, a storage circuit 3, a first reset circuit 4, a second reset circuit 5 and a display unit 6; the first reset circuit 4 configured to reset the memory circuit 3 in response to a reference voltage Vref; the second reset circuit 5 is connected to a cathode of the display unit 6, and configured to reset the display unit 6 when the first reset circuit 4 resets the storage circuit 3, and the second reset circuit 5 is one of a light emission control signal Emit circuit and a first scan signal circuit; the compensation circuit 2 configured to transmit a data signal Vdata to the storage circuit 3; the storage circuit 3 is configured to store the received data signal Vdata and output the data signal Vdata as a compensation signal; the light-emitting circuit 1 is configured to be turned on when the storage circuit 3 outputs the compensation signal to drive the display unit 6 to emit light; through multiplexing first scanning signal circuit or the Emit circuit of luminous control signal as second reset circuit 5 to this realizes the reset to display element 6, has avoided setting up a reset circuit's problem alone for display element 6, has reduced the thin-film transistor in display element's drive circuit 7, has reduced display element's drive circuit 7's area, can simplify circuit structure design, thereby increase the pixel aperture ratio, and then promoted the display effect.
Example two
The present embodiment further provides a driving circuit 7 of a display unit, wherein as shown in fig. 6, the driving circuit 7 of the display unit includes but is not limited to: the display device comprises a light-emitting circuit 1, a compensation circuit 2, a storage circuit 3, a first reset circuit 4, a second reset circuit 5 and a display unit 6, wherein the compensation circuit 2 comprises but is not limited to a first compensation circuit 21 and a second compensation circuit 22; a connection node among the first reset circuit 4, the first compensation circuit 21 and the storage circuit 3 is a first node N1; a connection node between the light emitting circuit 1 and the second compensation circuit 22 is a second node N2; a node between the light emitting circuit 1 and the first compensation circuit 21 is a third node N3, one end of the light emitting circuit 1 is connected with an anode of the display unit 6, a cathode of the display unit 6 is connected with the light emitting control signal Emit circuit and is connected to the light emitting control signal Emit, and the storage circuit 3 is provided with a storage capacitor Cst;
the reset circuit includes a fifth thin film transistor M5; a control terminal of the fifth thin film transistor M5 is connected to a first SCAN signal SCAN 1; a first terminal of the fifth thin film transistor M5 is connected to a reference voltage Vref, and a second terminal of the fifth thin film transistor M5 is connected to the first node N1; when the fifth thin film transistor M5 is turned on by the first SCAN signal SCAN1, the fifth thin film transistor M5 transmits the reference voltage Vref to the first node N1; the first compensation circuit 21 includes a fourth thin film transistor M4, the second compensation circuit 22 includes a second thin film transistor M2, and control terminals of the second thin film transistor M2 and the fourth thin film transistor M4 are connected to a second SCAN signal SCAN 2; a first end of the second thin film transistor M2 is connected to a data signal Vdata, and a second end of the second thin film transistor M2 is connected to the second node N2; a first terminal of the fourth thin film transistor M4 is connected to the third node N3, and a second terminal of the fourth thin film transistor M4 is connected to the first node N1; the light emitting circuit 1 further includes: a first thin film transistor M1, a sixth thin film transistor M6; a first terminal of the first thin film transistor M1 is connected to a power supply positive voltage VDD, a second terminal of the first thin film transistor M1 is connected to a first terminal of the third thin film transistor M3, a second terminal of the third thin film transistor M3 is connected to a first terminal of the sixth thin film transistor M6, and a second terminal of the sixth thin film transistor M6 is connected to an anode of the display unit 6; the control ends of the first thin film transistor M1 and the sixth thin film transistor M6 are connected with a light emitting control signal Emit, and the first thin film transistor M6, the second thin film transistor M6 and the third thin film transistor M6 are all P-type thin film transistors;
taking a frame signal as an example, the frame signal is divided into three periods T1, T2 and T3, as shown in fig. 7, and fig. 7 is a timing chart of each signal;
in the reset (T1) stage, the first SCAN signal circuit outputs the low-level first SCAN signal SCAN1, the fifth thin film transistor M5 is turned on, the voltage of the gate N1 of the fifth thin film transistor M5 is Vref (the Vref is a low-level signal), the voltage is output to the memory circuit 3 to reset the memory circuit 3, and the voltage is output to the third thin film transistor M3 to perform a reset on function. Meanwhile, the emission control signal Emit connected to the cathode of the display unit 6 is at a high potential, the potential is higher than the anode of the display unit 6, and the display unit 6 simultaneously performs resetting;
a compensation (T2) stage, wherein when the third TFT M3 is turned on, the second SCAN signal SCAN2 outputs a low-level second SCAN signal SCAN2, the second TFT M2 and the fourth TFT M4 are turned on, Vdata is written into the gate of the third TFT M3, the final potential of the first node N1 is Vdata-Vth in consideration of the threshold voltage of the TFT, and the cathode of the display unit 6 is at a high potential and still in a closed state;
in the light emission (T3) phase, when the third thin film transistor M3 is continuously turned on by the compensation signal, the light emission control signal Emit is at the low potential, the first thin film transistor M1 and the sixth thin film transistor M6 are turned on, and the display unit 6 emits light.
EXAMPLE III
The present embodiment further provides a driving circuit 7 of a display unit, wherein, as shown in fig. 8, the driving circuit 7 of the display unit includes but is not limited to: the display device comprises a light-emitting circuit 1, a compensation circuit 2, a storage circuit 3, a first reset circuit 4, a second reset circuit 5 and a display unit 6, wherein the compensation circuit 2 comprises but is not limited to a first compensation circuit 21 and a second compensation circuit 22; the connection node among the first reset circuit 4, the first compensation circuit 21 and the storage circuit 3 is a first node N1; a connection node between the light emitting circuit 1 and the second compensation circuit 22 is a second node N2; a node between the light emitting circuit 1 and the first compensation circuit 21 is a third node N3, one end of the light emitting circuit 1 is connected to an anode of the display unit 6, a cathode of the display unit 6 is connected to the first scan signal circuit, and the storage circuit 3 is provided with a storage capacitor Cst;
the reset circuit includes a fifth thin film transistor M5; a control terminal of the fifth thin film transistor M5 is connected to a first SCAN signal SCAN 1; a first terminal of the fifth thin film transistor M5 is connected to a reference voltage Vref, and a second terminal of the fifth thin film transistor M5 is connected to the first node N1; when the fifth thin film transistor M5 is turned on by the first SCAN signal SCAN1, the fifth thin film transistor M5 transmits the reference voltage Vref to the first node N1; the first compensation circuit 21 comprises a fourth thin film transistor M4, the second compensation circuit 22 comprises a second thin film transistor M2, and control terminals of the second thin film transistor M2 and the fourth thin film transistor M4 are connected to a second SCAN signal SCAN 2; a first end of the second thin film transistor M2 is connected to a data signal Vdata, and a second end of the second thin film transistor M2 is connected to the second node N2; a first terminal of the fourth thin film transistor M4 is connected to the third node N3, and a second terminal of the fourth thin film transistor M4 is connected to the first node N1; the light emitting circuit 1 further includes: a first thin film transistor M1, a sixth thin film transistor M6; a first terminal of the first thin film transistor M1 is connected to a power supply positive voltage VDD, a second terminal of the first thin film transistor M1 is connected to a first terminal of the third thin film transistor M3, a second terminal of the third thin film transistor M3 is connected to a first terminal of the sixth thin film transistor M6, and a second terminal of the sixth thin film transistor M6 is connected to an anode of the display unit 6; the control ends of the first thin film transistor M1 and the sixth thin film transistor M6 are connected with a light emitting control signal Emit, and the first to sixth thin film transistors M6 are all N-type thin film transistors;
taking a frame signal as an example, the frame signal is divided into three periods T1, T2 and T3, as shown in fig. 9, and fig. 9 is a timing chart of each signal;
in the reset (T1) phase, the first SCAN signal circuit outputs the high-level first SCAN signal SCAN1, the fifth thin film transistor M5 is turned on, the voltage of the gate N1 of the fifth thin film transistor M5 is Vref (the Vref is a high-level signal), the voltage is output to the memory circuit 3 to reset the memory circuit 3, and the voltage is output to the third thin film transistor M3 to perform the function of turning on the reset. Meanwhile, the emission control signal Emit connected to the cathode of the display unit 6 is at a low potential, the potential is higher than that of the anode of the display unit 6, and the display unit 6 simultaneously performs resetting;
a compensation (T2) stage, in which the second SCAN signal SCAN2 outputs a high-level second SCAN signal SCAN2 when the third thin film transistor M3 is turned on, the second thin film transistor M2 and the fourth thin film transistor M4 are turned on, Vdata is written into the gate of the third thin film transistor M3, and the final potential of the first node N1 is Vdata-Vth in consideration of the threshold voltage of the thin film transistor;
in the light emission (T3) phase, when the third thin film transistor M3 is continuously turned on by the compensation signal, the light emission control signal Emit is at a high potential, the first thin film transistor M1 and the sixth thin film transistor M6 are turned on, and the display unit 6 emits light.
Example four
The embodiment of the present application provides a driving method of a display unit 6, which is applied to the driving circuit 7 of the display unit according to any one of the above embodiments, as shown in fig. 10, and the method includes, but is not limited to:
s101, in a reset stage, conducting a first reset circuit to reset the storage circuit, and resetting the display unit through a second reset circuit;
s102, in a compensation stage, turning on a compensation circuit to transmit a data signal to a storage circuit, wherein the storage circuit stores the received data signal and outputs the data signal as a compensation signal;
and S103, in the light emitting stage, conducting a light emitting circuit according to the compensation signal to drive the display unit to emit light.
In some examples of the present embodiment, resetting the display unit by the second reset circuit includes:
when the second reset circuit is a light-emitting control signal circuit, controlling the light-emitting control signal circuit to output a high-level signal to reset the display unit;
or the like, or, alternatively,
when the second reset circuit is a first scanning signal circuit, the first scanning signal circuit is controlled to output a high-level signal to reset the display unit.
EXAMPLE five
An embodiment of the present application provides a display panel, as shown in fig. 11, the display panel includes: the display device comprises a substrate 8, wherein a plurality of sub-pixels 9 are arranged on the substrate 8, each sub-pixel 9 comprises a display unit 6 and a driving circuit 7 of the display unit, and the driving circuit 7 of the display unit is connected with the display unit 6.
Example 6
As shown in fig. 12, an embodiment of the present application provides a display device, which includes a processor 111, a communication interface 112, a memory 113, and a communication bus 114, where the processor 111, the communication interface 112, and the memory 113 complete communication with each other through the communication bus 114;
a memory 113 for storing a computer program;
in an embodiment of the present application, the processor 111 is configured to implement the steps of the method for driving the display unit according to any one of the method embodiments when executing the program stored in the memory 113.
The present application further provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the driving method of the display unit as provided in any one of the method embodiments described above.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A drive circuit of a display unit, the drive circuit of the display unit comprising: the circuit comprises a light-emitting circuit, a compensation circuit, a storage circuit and a first reset circuit; the storage circuit is respectively connected with the first reset circuit, the compensation circuit and the light-emitting circuit, and the display unit anode is connected with the light-emitting circuit, and the driving circuit of the display unit further comprises: a second reset circuit;
the first reset circuit configured to reset the memory circuit in response to a reference voltage;
the second reset circuit is connected to a cathode of the display unit, and configured to reset the display unit when the first reset circuit resets the memory circuit, and the second reset circuit is one of a light emission control signal circuit and a first scan signal circuit;
the compensation circuit configured to transmit a data signal to the storage circuit;
the storage circuit is configured to store the received data signal and output the data signal as a compensation signal;
the light emitting circuit is configured to be turned on when the storage circuit outputs the compensation signal to drive the display unit to emit light.
2. The driving circuit of a display unit according to claim 1, wherein the compensation circuit comprises: a first compensation circuit and a second compensation circuit; a connection node among the first reset circuit, the first compensation circuit and the storage circuit is a first node; a connection node between the light emitting circuit and the second compensation circuit is a second node; a node between the light emitting circuit and the first compensation circuit is a third node;
the first reset circuit, in response to the reference voltage, transmits the reference voltage to the first node, through which the reference voltage is transmitted to the memory circuit to reset the memory circuit;
the second reset circuit outputs a high-level signal to reset the display unit when the first reset circuit responds to the reference voltage;
the second compensation circuit transmits the data signal to the second node so that the data signal flows to the first compensation circuit through the second node and the third node, the first compensation circuit transmits the data signal to the first node, and the data signal is transmitted to the storage circuit through the first node;
a third thin film transistor is arranged on the light-emitting circuit, a control terminal of the third thin film transistor is connected with the first node, and the storage circuit outputs the compensation signal to the first node so as to transmit the compensation signal to the control terminal of the third thin film transistor; and when the control end of the third thin film transistor receives the compensation signal, the light-emitting circuit is conducted to drive the display unit to emit light.
3. The driving circuit of a display unit according to claim 2, wherein the reset circuit includes a fifth thin film transistor; a control end of the fifth thin film transistor is connected with a first scanning signal; a first end of the fifth thin film transistor is connected to a reference voltage, and a second end of the fifth thin film transistor is connected to the first node;
the fifth thin film transistor transmits the reference voltage to the first node when the fifth thin film transistor is turned on by the first scan signal.
4. The driving circuit of the display unit according to claim 2, wherein the first compensation circuit comprises a fourth thin film transistor, the second compensation circuit comprises a second thin film transistor, and control terminals of the second thin film transistor and the fourth thin film transistor are connected to a second scan signal;
a first end of the second thin film transistor is connected with a data signal, and a second end of the second thin film transistor is connected with the second node; a first end of the fourth thin film transistor is connected to the third node, and a second end of the fourth thin film transistor is connected to the first node.
5. The driving circuit of a display unit according to claim 2, wherein the light emitting circuit further comprises: a first thin film transistor, a sixth thin film transistor;
the first end of the first thin film transistor is connected with a positive power supply voltage, the second end of the first thin film transistor is connected with the first end of the third thin film transistor, the second end of the third thin film transistor is connected with the first end of the sixth thin film transistor, and the second end of the sixth thin film transistor is connected with the anode of the display unit;
and the control ends of the first thin film transistor and the sixth thin film transistor are connected with a light-emitting control signal.
6. The driving circuit of a display unit according to claim 5, wherein when the second reset circuit is a light emission control signal circuit, the thin film transistors included in the driving circuit of the display unit are all P-type thin film transistors.
7. The circuit according to claim 5, wherein when the second reset circuit is a first scan signal circuit, the thin film transistors included in the circuit are all N-type thin film transistors.
8. A method for driving a display unit, the method being applied to a driving circuit of a display unit according to any one of claims 1 to 7, the method comprising:
in the resetting stage, the first resetting circuit is conducted to reset the storage circuit, and the second resetting circuit is used for resetting the display unit;
in the compensation stage, the compensation circuit is switched on to transmit a data signal to the storage circuit, and the storage circuit stores the received data signal and outputs the data signal as a compensation signal;
and in the light-emitting stage, the light-emitting circuit is switched on according to the compensation signal so as to drive the display unit to emit light.
9. The method for driving a display unit according to claim 8, wherein resetting the display unit by the second reset circuit includes:
when the second reset circuit is a light-emitting control signal circuit, controlling the light-emitting control signal circuit to output a high-level signal to reset the display unit;
or the like, or, alternatively,
when the second reset circuit is a first scanning signal circuit, the first scanning signal circuit is controlled to output a high-level signal to reset the display unit.
10. A display panel, comprising: comprising a substrate on which a plurality of sub-pixels are arranged, each sub-pixel comprising a display unit and a drive circuit for the display unit according to any of claims 1-7, the drive circuit for the display unit being connected to the display unit.
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| CN115657353A (en) * | 2022-12-28 | 2023-01-31 | 惠科股份有限公司 | Pixel circuit, pixel control method and display device |
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| US20050206591A1 (en) * | 2004-03-18 | 2005-09-22 | Wen-Chun Wang | Active matrix organic electroluminescence light emitting diode driving circuit |
| US20130088474A1 (en) * | 2011-10-05 | 2013-04-11 | Wen-Chun Wang | Light-emitting component driving circuit and related pixel circuit and applications using the same |
| CN104167177A (en) * | 2014-08-15 | 2014-11-26 | 合肥鑫晟光电科技有限公司 | Pixel circuit, organic electroluminescence display panel and display device |
| US20170039948A1 (en) * | 2015-04-03 | 2017-02-09 | Boe Technology Group Co., Ltd. | Pixel Circuit, Driving Method Thereof, Array Substrate, and Display Device |
| WO2019062579A1 (en) * | 2017-09-30 | 2019-04-04 | 京东方科技集团股份有限公司 | Pixel circuit and driving method thereof, and display device |
| US20190304371A1 (en) * | 2018-03-30 | 2019-10-03 | Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Pixel driving circuit and display device with the same |
| CN111341257A (en) * | 2020-03-24 | 2020-06-26 | 武汉天马微电子有限公司 | Display panel, driving method thereof and display device |
| US20210366398A1 (en) * | 2021-08-03 | 2021-11-25 | Google Llc | Delaying Anode Voltage Reset for Quicker Response Times in OLED Displays |
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| CN115376460A (en) * | 2022-10-24 | 2022-11-22 | 惠科股份有限公司 | Display panel, pixel circuit and display device |
| CN115657353A (en) * | 2022-12-28 | 2023-01-31 | 惠科股份有限公司 | Pixel circuit, pixel control method and display device |
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